From: <pbhagavatula@marvell.com>
To: <jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>
Cc: <dev@dpdk.org>
Subject: [dpdk-dev] [PATCH v3 04/42] event/octeontx2: add device configure function
Date: Fri, 28 Jun 2019 23:53:15 +0530 [thread overview]
Message-ID: <20190628182354.228-5-pbhagavatula@marvell.com> (raw)
In-Reply-To: <20190628182354.228-1-pbhagavatula@marvell.com>
From: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add the device configure function that attaches the requested number of
SSO GWS(event ports) and GGRP(event queues) LF's to the PF.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
drivers/event/octeontx2/otx2_evdev.c | 258 +++++++++++++++++++++++++++
drivers/event/octeontx2/otx2_evdev.h | 10 ++
2 files changed, 268 insertions(+)
diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c
index 839a5ccaa..00996578a 100644
--- a/drivers/event/octeontx2/otx2_evdev.c
+++ b/drivers/event/octeontx2/otx2_evdev.c
@@ -37,9 +37,267 @@ otx2_sso_info_get(struct rte_eventdev *event_dev,
RTE_EVENT_DEV_CAP_NONSEQ_MODE;
}
+static int
+sso_hw_lf_cfg(struct otx2_mbox *mbox, enum otx2_sso_lf_type type,
+ uint16_t nb_lf, uint8_t attach)
+{
+ if (attach) {
+ struct rsrc_attach_req *req;
+
+ req = otx2_mbox_alloc_msg_attach_resources(mbox);
+ switch (type) {
+ case SSO_LF_GGRP:
+ req->sso = nb_lf;
+ break;
+ case SSO_LF_GWS:
+ req->ssow = nb_lf;
+ break;
+ default:
+ return -EINVAL;
+ }
+ req->modify = true;
+ if (otx2_mbox_process(mbox) < 0)
+ return -EIO;
+ } else {
+ struct rsrc_detach_req *req;
+
+ req = otx2_mbox_alloc_msg_detach_resources(mbox);
+ switch (type) {
+ case SSO_LF_GGRP:
+ req->sso = true;
+ break;
+ case SSO_LF_GWS:
+ req->ssow = true;
+ break;
+ default:
+ return -EINVAL;
+ }
+ req->partial = true;
+ if (otx2_mbox_process(mbox) < 0)
+ return -EIO;
+ }
+
+ return 0;
+}
+
+static int
+sso_lf_cfg(struct otx2_sso_evdev *dev, struct otx2_mbox *mbox,
+ enum otx2_sso_lf_type type, uint16_t nb_lf, uint8_t alloc)
+{
+ void *rsp;
+ int rc;
+
+ if (alloc) {
+ switch (type) {
+ case SSO_LF_GGRP:
+ {
+ struct sso_lf_alloc_req *req_ggrp;
+ req_ggrp = otx2_mbox_alloc_msg_sso_lf_alloc(mbox);
+ req_ggrp->hwgrps = nb_lf;
+ }
+ break;
+ case SSO_LF_GWS:
+ {
+ struct ssow_lf_alloc_req *req_hws;
+ req_hws = otx2_mbox_alloc_msg_ssow_lf_alloc(mbox);
+ req_hws->hws = nb_lf;
+ }
+ break;
+ default:
+ return -EINVAL;
+ }
+ } else {
+ switch (type) {
+ case SSO_LF_GGRP:
+ {
+ struct sso_lf_free_req *req_ggrp;
+ req_ggrp = otx2_mbox_alloc_msg_sso_lf_free(mbox);
+ req_ggrp->hwgrps = nb_lf;
+ }
+ break;
+ case SSO_LF_GWS:
+ {
+ struct ssow_lf_free_req *req_hws;
+ req_hws = otx2_mbox_alloc_msg_ssow_lf_free(mbox);
+ req_hws->hws = nb_lf;
+ }
+ break;
+ default:
+ return -EINVAL;
+ }
+ }
+
+ rc = otx2_mbox_process_msg_tmo(mbox, (void **)&rsp, ~0);
+ if (rc < 0)
+ return rc;
+
+ if (alloc && type == SSO_LF_GGRP) {
+ struct sso_lf_alloc_rsp *rsp_ggrp = rsp;
+
+ dev->xaq_buf_size = rsp_ggrp->xaq_buf_size;
+ dev->xae_waes = rsp_ggrp->xaq_wq_entries;
+ dev->iue = rsp_ggrp->in_unit_entries;
+ }
+
+ return 0;
+}
+
+static int
+sso_configure_ports(const struct rte_eventdev *event_dev)
+{
+ struct otx2_sso_evdev *dev = sso_pmd_priv(event_dev);
+ struct otx2_mbox *mbox = dev->mbox;
+ uint8_t nb_lf;
+ int rc;
+
+ otx2_sso_dbg("Configuring event ports %d", dev->nb_event_ports);
+
+ nb_lf = dev->nb_event_ports;
+ /* Ask AF to attach required LFs. */
+ rc = sso_hw_lf_cfg(mbox, SSO_LF_GWS, nb_lf, true);
+ if (rc < 0) {
+ otx2_err("Failed to attach SSO GWS LF");
+ return -ENODEV;
+ }
+
+ if (sso_lf_cfg(dev, mbox, SSO_LF_GWS, nb_lf, true) < 0) {
+ sso_hw_lf_cfg(mbox, SSO_LF_GWS, nb_lf, false);
+ otx2_err("Failed to init SSO GWS LF");
+ return -ENODEV;
+ }
+
+ return rc;
+}
+
+static int
+sso_configure_queues(const struct rte_eventdev *event_dev)
+{
+ struct otx2_sso_evdev *dev = sso_pmd_priv(event_dev);
+ struct otx2_mbox *mbox = dev->mbox;
+ uint8_t nb_lf;
+ int rc;
+
+ otx2_sso_dbg("Configuring event queues %d", dev->nb_event_queues);
+
+ nb_lf = dev->nb_event_queues;
+ /* Ask AF to attach required LFs. */
+ rc = sso_hw_lf_cfg(mbox, SSO_LF_GGRP, nb_lf, true);
+ if (rc < 0) {
+ otx2_err("Failed to attach SSO GGRP LF");
+ return -ENODEV;
+ }
+
+ if (sso_lf_cfg(dev, mbox, SSO_LF_GGRP, nb_lf, true) < 0) {
+ sso_hw_lf_cfg(mbox, SSO_LF_GGRP, nb_lf, false);
+ otx2_err("Failed to init SSO GGRP LF");
+ return -ENODEV;
+ }
+
+ return rc;
+}
+
+static void
+sso_lf_teardown(struct otx2_sso_evdev *dev,
+ enum otx2_sso_lf_type lf_type)
+{
+ uint8_t nb_lf;
+
+ switch (lf_type) {
+ case SSO_LF_GGRP:
+ nb_lf = dev->nb_event_queues;
+ break;
+ case SSO_LF_GWS:
+ nb_lf = dev->nb_event_ports;
+ break;
+ default:
+ return;
+ }
+
+ sso_lf_cfg(dev, dev->mbox, lf_type, nb_lf, false);
+ sso_hw_lf_cfg(dev->mbox, lf_type, nb_lf, false);
+}
+
+static int
+otx2_sso_configure(const struct rte_eventdev *event_dev)
+{
+ struct rte_event_dev_config *conf = &event_dev->data->dev_conf;
+ struct otx2_sso_evdev *dev = sso_pmd_priv(event_dev);
+ uint32_t deq_tmo_ns;
+ int rc;
+
+ sso_func_trace();
+ deq_tmo_ns = conf->dequeue_timeout_ns;
+
+ if (deq_tmo_ns == 0)
+ deq_tmo_ns = dev->min_dequeue_timeout_ns;
+
+ if (deq_tmo_ns < dev->min_dequeue_timeout_ns ||
+ deq_tmo_ns > dev->max_dequeue_timeout_ns) {
+ otx2_err("Unsupported dequeue timeout requested");
+ return -EINVAL;
+ }
+
+ if (conf->event_dev_cfg & RTE_EVENT_DEV_CFG_PER_DEQUEUE_TIMEOUT)
+ dev->is_timeout_deq = 1;
+
+ dev->deq_tmo_ns = deq_tmo_ns;
+
+ if (conf->nb_event_ports > dev->max_event_ports ||
+ conf->nb_event_queues > dev->max_event_queues) {
+ otx2_err("Unsupported event queues/ports requested");
+ return -EINVAL;
+ }
+
+ if (conf->nb_event_port_dequeue_depth > 1) {
+ otx2_err("Unsupported event port deq depth requested");
+ return -EINVAL;
+ }
+
+ if (conf->nb_event_port_enqueue_depth > 1) {
+ otx2_err("Unsupported event port enq depth requested");
+ return -EINVAL;
+ }
+
+ if (dev->nb_event_queues) {
+ /* Finit any previous queues. */
+ sso_lf_teardown(dev, SSO_LF_GGRP);
+ }
+ if (dev->nb_event_ports) {
+ /* Finit any previous ports. */
+ sso_lf_teardown(dev, SSO_LF_GWS);
+ }
+
+ dev->nb_event_queues = conf->nb_event_queues;
+ dev->nb_event_ports = conf->nb_event_ports;
+
+ if (sso_configure_ports(event_dev)) {
+ otx2_err("Failed to configure event ports");
+ return -ENODEV;
+ }
+
+ if (sso_configure_queues(event_dev) < 0) {
+ otx2_err("Failed to configure event queues");
+ rc = -ENODEV;
+ goto teardown_hws;
+ }
+
+ dev->configured = 1;
+ rte_mb();
+
+ return 0;
+
+teardown_hws:
+ sso_lf_teardown(dev, SSO_LF_GWS);
+ dev->nb_event_queues = 0;
+ dev->nb_event_ports = 0;
+ dev->configured = 0;
+ return rc;
+}
+
/* Initialize and register event driver with DPDK Application */
static struct rte_eventdev_ops otx2_sso_ops = {
.dev_infos_get = otx2_sso_info_get,
+ .dev_configure = otx2_sso_configure,
};
static int
diff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h
index 4427efcad..feb4ed6f4 100644
--- a/drivers/event/octeontx2/otx2_evdev.h
+++ b/drivers/event/octeontx2/otx2_evdev.h
@@ -20,6 +20,11 @@
#define USEC2NSEC(__us) ((__us) * 1E3)
+enum otx2_sso_lf_type {
+ SSO_LF_GGRP,
+ SSO_LF_GWS
+};
+
struct otx2_sso_evdev {
OTX2_DEV; /* Base class */
uint8_t max_event_queues;
@@ -27,10 +32,15 @@ struct otx2_sso_evdev {
uint8_t is_timeout_deq;
uint8_t nb_event_queues;
uint8_t nb_event_ports;
+ uint8_t configured;
uint32_t deq_tmo_ns;
uint32_t min_dequeue_timeout_ns;
uint32_t max_dequeue_timeout_ns;
int32_t max_num_events;
+ /* HW const */
+ uint32_t xae_waes;
+ uint32_t xaq_buf_size;
+ uint32_t iue;
} __rte_cache_aligned;
static inline struct otx2_sso_evdev *
--
2.22.0
next prev parent reply other threads:[~2019-06-28 18:24 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-28 18:23 [dpdk-dev] [PATCH v3 00/42] OCTEONTX2 event device driver pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 01/42] event/octeontx2: add build infra and device probe pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 02/42] event/octeontx2: add init and fini for octeontx2 SSO object pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 03/42] event/octeontx2: add device capabilities function pbhagavatula
2019-06-28 18:23 ` pbhagavatula [this message]
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 05/42] event/octeontx2: add event queue config functions pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 06/42] event/octeontx2: allocate event inflight buffers pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 07/42] event/octeontx2: add devargs for inflight buffer count pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 08/42] event/octeontx2: add event port config functions pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 09/42] event/octeontx2: support linking queues to ports pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 10/42] event/octeontx2: support dequeue timeout tick conversion pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 11/42] event/octeontx2: add SSO GWS and GGRP IRQ handlers pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 12/42] event/octeontx2: add register dump functions pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 13/42] event/octeontx2: add xstats support pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 14/42] event/octeontx2: add SSO HW device operations pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 15/42] event/octeontx2: add worker enqueue functions pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 16/42] event/octeontx2: add worker dequeue functions pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 17/42] event/octeontx2: add octeontx2 SSO dual workslot mode pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 18/42] event/octeontx2: add SSO dual GWS HW device operations pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 19/42] event/octeontx2: add worker dual GWS enqueue functions pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 20/42] event/octeontx2: add worker dual GWS dequeue functions pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 21/42] event/octeontx2: add devargs to force legacy mode pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 22/42] event/octeontx2: add device start function pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 23/42] event/octeontx2: add devargs to control SSO GGRP QoS pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 24/42] event/octeontx2: add device stop and close functions pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 25/42] event/octeontx2: add SSO selftest pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 26/42] event/octeontx2: add event timer support pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 27/42] event/octeontx2: add timer adapter capabilities pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 28/42] event/octeontx2: create and free timer adapter pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 29/42] event/octeontx2: allow TIM to optimize config pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 30/42] event/octeontx2: add devargs to disable NPA pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 31/42] event/octeontx2: add devargs to modify chunk slots pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 32/42] event/octeontx2: add TIM IRQ handlers pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 33/42] event/octeontx2: allow adapters to resize inflight buffers pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 34/42] event/octeontx2: add timer adapter info get function pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 35/42] event/octeontx2: add TIM bucket operations pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 36/42] event/octeontx2: add event timer arm routine pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 37/42] event/octeontx2: add event timer arm timeout burst pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 38/42] event/octeontx2: add event timer cancel function pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 39/42] event/octeontx2: add event timer stats get and reset pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 40/42] event/octeontx2: add even timer adapter start and stop pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 41/42] event/octeontx2: add devargs to limit timer adapters pbhagavatula
2019-06-28 18:23 ` [dpdk-dev] [PATCH v3 42/42] event/octeontx2: add devargs to control adapter parameters pbhagavatula
2019-07-02 4:25 ` [dpdk-dev] [PATCH v3 00/42] OCTEONTX2 event device driver Jerin Jacob Kollanukkaran
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190628182354.228-5-pbhagavatula@marvell.com \
--to=pbhagavatula@marvell.com \
--cc=dev@dpdk.org \
--cc=jerinj@marvell.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).