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Date: Sun, 30 Jun 2019 13:27:53 -0700
From: Stephen Hemminger <stephen@networkplumber.org>
To: Gavin Hu <gavin.hu@arm.com>
Cc: dev@dpdk.org, thomas@monjalon.net, jerinj@marvell.com,
 hemant.agrawal@nxp.com, bruce.richardson@intel.com,
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Subject: Re: [dpdk-dev] [RFC 1/5] eal: add the APIs to wait until equal
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On Mon,  1 Jul 2019 00:21:12 +0800
Gavin Hu <gavin.hu@arm.com> wrote:

> +#ifdef RTE_USE_WFE
> +#define rte_wait_until_equal_relaxed(addr, expected) do {\
> +		typeof(*addr) tmp;  \
> +		if (__builtin_constant_p((expected))) \
> +			do { \
> +				if (sizeof(*(addr)) == 16)\
> +					asm volatile(  \
> +						"sevl\n"  \
> +						"1:	 wfe\n"  \
> +						"ldxrh  %w0, %1\n"  \
> +						"cmp	%w0, %w2\n"  \
> +						"bne	1b\n"  \
> +						: "=&r"(tmp)  \
> +						: "Q"(*addr), "i"(expected)  \
> +						: "cc", "memory");  \
> +				else if (sizeof(*(addr)) == 32)\
> +					asm volatile(  \
> +						"sevl\n"  \
> +						"1:	 wfe\n"  \
> +						"ldxr  %w0, %1\n"  \
> +						"cmp	%w0, %w2\n"  \
> +						"bne	1b\n"  \
> +						: "=&r"(tmp)  \
> +						: "Q"(*addr), "i"(expected)  \
> +						: "cc", "memory");  \
> +				else if (sizeof(*(addr)) == 64)\
> +					asm volatile(  \
> +						"sevl\n"  \
> +						"1:	 wfe\n"  \
> +						"ldxr  %x0, %1\n"  \
> +						"cmp	%x0, %x2\n"  \
> +						"bne	1b\n"  \
> +						: "=&r" (tmp)  \
> +						: "Q"(*addr), "i"(expected)  \
> +						: "cc", "memory"); \
> +			} while (0); \
> +		else \
> +			do { \
> +				if (sizeof(*(addr)) == 16)\
> +					asm volatile(  \
> +						"sevl\n"  \
> +						"1:	 wfe\n"  \
> +						"ldxrh  %w0, %1\n"  \
> +						"cmp	%w0, %w2\n"  \
> +						"bne	1b\n"  \
> +						: "=&r"(tmp)  \
> +						: "Q"(*addr), "r"(expected)  \
> +						: "cc", "memory");  \
> +				else if (sizeof(*(addr)) == 32)\
> +					asm volatile(  \
> +						"sevl\n"  \
> +						"1:	 wfe\n"  \
> +						"ldxr  %w0, %1\n"  \
> +						"cmp	%w0, %w2\n"  \
> +						"bne	1b\n"  \
> +						: "=&r"(tmp)  \
> +						: "Q"(*addr), "r"(expected)  \
> +						: "cc", "memory");  \
> +				else if (sizeof(*(addr)) == 64)\
> +					asm volatile(  \
> +						"sevl\n"  \
> +						"1:	 wfe\n"  \
> +						"ldxr  %x0, %1\n"  \
> +						"cmp	%x0, %x2\n"  \
> +						"bne	1b\n"  \
> +						: "=&r" (tmp)  \
> +						: "Q"(*addr), "r"(expected)  \
> +						: "cc", "memory");  \
> +		} while (0); \
> +} while (0)

That is a hot mess.
Macro's are harder to maintain and offer no benefit over inline functions.