[dpdk-dev] [PATCH v3 02/58] net/octeontx2: add ethdev probe and remove

[<jerinj@marvell.com>]

From: Jerin Jacob <jerinj@marvell.com>

add basic PCIe ethdev probe and remove.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
---
 drivers/net/octeontx2/Makefile      | 11 +++-
 drivers/net/octeontx2/meson.build   | 14 ++++-
 drivers/net/octeontx2/otx2_ethdev.c | 93 +++++++++++++++++++++++++++++
 drivers/net/octeontx2/otx2_ethdev.h | 27 +++++++++
 4 files changed, 143 insertions(+), 2 deletions(-)
 create mode 100644 drivers/net/octeontx2/otx2_ethdev.h

diff --git a/drivers/net/octeontx2/Makefile b/drivers/net/octeontx2/Makefile
index 9c467352f..8999c38d1 100644
--- a/drivers/net/octeontx2/Makefile
+++ b/drivers/net/octeontx2/Makefile
@@ -15,6 +15,14 @@ CFLAGS += -I$(RTE_SDK)/drivers/mempool/octeontx2
 CFLAGS += -I$(RTE_SDK)/drivers/net/octeontx2
 CFLAGS += -O3
 
+ifneq ($(CONFIG_RTE_ARCH_64),y)
+CFLAGS += -Wno-int-to-pointer-cast
+CFLAGS += -Wno-pointer-to-int-cast
+ifeq ($(CONFIG_RTE_TOOLCHAIN_ICC),y)
+CFLAGS += -diag-disable 2259 -flax-vector-conversions
+endif
+endif
+
 EXPORT_MAP := rte_pmd_octeontx2_version.map
 
 LIBABIVER := 1
@@ -25,6 +33,7 @@ LIBABIVER := 1
 SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX2_PMD) += \
 	otx2_ethdev.c
 
-LDLIBS += -lrte_common_octeontx2 -lrte_mempool_octeontx2
+LDLIBS += -lrte_common_octeontx2 -lrte_mempool_octeontx2 -lrte_eal
+LDLIBS += -lrte_ethdev -lrte_bus_pci
 
 include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/net/octeontx2/meson.build b/drivers/net/octeontx2/meson.build
index 0d0ca32da..db375f33b 100644
--- a/drivers/net/octeontx2/meson.build
+++ b/drivers/net/octeontx2/meson.build
@@ -6,4 +6,16 @@ sources = files(
 		'otx2_ethdev.c',
 		)
 
-deps += ['common_octeontx2', 'mempool_octeontx2']
+deps += ['bus_pci', 'common_octeontx2', 'mempool_octeontx2']
+
+extra_flags = []
+# This integrated controller runs only on a arm64 machine, remove 32bit warnings
+if not dpdk_conf.get('RTE_ARCH_64')
+	extra_flags += ['-Wno-int-to-pointer-cast', '-Wno-pointer-to-int-cast']
+endif
+
+foreach flag: extra_flags
+	if cc.has_argument(flag)
+		cflags += flag
+	endif
+endforeach
diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c
index d26535dee..05fa8988e 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -1,3 +1,96 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  * Copyright(C) 2019 Marvell International Ltd.
  */
+
+#include <rte_ethdev_pci.h>
+#include <rte_io.h>
+#include <rte_malloc.h>
+
+#include "otx2_ethdev.h"
+
+static int
+otx2_eth_dev_init(struct rte_eth_dev *eth_dev)
+{
+	RTE_SET_USED(eth_dev);
+
+	return -ENODEV;
+}
+
+static int
+otx2_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool mbox_close)
+{
+	RTE_SET_USED(eth_dev);
+	RTE_SET_USED(mbox_close);
+
+	return -ENODEV;
+}
+
+static int
+nix_remove(struct rte_pci_device *pci_dev)
+{
+	struct rte_eth_dev *eth_dev;
+	int rc;
+
+	eth_dev = rte_eth_dev_allocated(pci_dev->device.name);
+	if (eth_dev) {
+		/* Cleanup eth dev */
+		rc = otx2_eth_dev_uninit(eth_dev, true);
+		if (rc)
+			return rc;
+
+		rte_eth_dev_pci_release(eth_dev);
+	}
+
+	/* Nothing to be done for secondary processes */
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
+		return 0;
+
+	return 0;
+}
+
+static int
+nix_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
+{
+	int rc;
+
+	RTE_SET_USED(pci_drv);
+
+	rc = rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct otx2_eth_dev),
+					   otx2_eth_dev_init);
+
+	/* On error on secondary, recheck if port exists in primary or
+	 * in mid of detach state.
+	 */
+	if (rte_eal_process_type() != RTE_PROC_PRIMARY && rc)
+		if (!rte_eth_dev_allocated(pci_dev->device.name))
+			return 0;
+	return rc;
+}
+
+static const struct rte_pci_id pci_nix_map[] = {
+	{
+		RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_RVU_PF)
+	},
+	{
+		RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, PCI_DEVID_OCTEONTX2_RVU_VF)
+	},
+	{
+		RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
+			       PCI_DEVID_OCTEONTX2_RVU_AF_VF)
+	},
+	{
+		.vendor_id = 0,
+	},
+};
+
+static struct rte_pci_driver pci_nix = {
+	.id_table = pci_nix_map,
+	.drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA |
+			RTE_PCI_DRV_INTR_LSC,
+	.probe = nix_probe,
+	.remove = nix_remove,
+};
+
+RTE_PMD_REGISTER_PCI(net_octeontx2, pci_nix);
+RTE_PMD_REGISTER_PCI_TABLE(net_octeontx2, pci_nix_map);
+RTE_PMD_REGISTER_KMOD_DEP(net_octeontx2, "vfio-pci");
diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h
new file mode 100644
index 000000000..fd01a3254
--- /dev/null
+++ b/drivers/net/octeontx2/otx2_ethdev.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(C) 2019 Marvell International Ltd.
+ */
+
+#ifndef __OTX2_ETHDEV_H__
+#define __OTX2_ETHDEV_H__
+
+#include <stdint.h>
+
+#include <rte_common.h>
+
+#include "otx2_common.h"
+#include "otx2_dev.h"
+#include "otx2_irq.h"
+#include "otx2_mempool.h"
+
+struct otx2_eth_dev {
+	OTX2_DEV; /* Base class */
+} __rte_cache_aligned;
+
+static inline struct otx2_eth_dev *
+otx2_eth_pmd_priv(struct rte_eth_dev *eth_dev)
+{
+	return eth_dev->data->dev_private;
+}
+
+#endif /* __OTX2_ETHDEV_H__ */
-- 
2.21.0