From: <pbhagavatula@marvell.com>
To: <jerinj@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>
Cc: <dev@dpdk.org>, Harman Kalra <hkalra@marvell.com>,
Nithin Dabilpuram <ndabilpuram@marvell.com>
Subject: [dpdk-dev] [PATCH v3 4/6] event/octeontx2: add PTP support for SSO
Date: Wed, 3 Jul 2019 15:34:28 +0530 [thread overview]
Message-ID: <20190703100430.716-5-pbhagavatula@marvell.com> (raw)
In-Reply-To: <20190703100430.716-1-pbhagavatula@marvell.com>
From: Harman Kalra <hkalra@marvell.com>
Add PTP support for SSO based on rx_offloads of the queue connected to
it.
Signed-off-by: Harman Kalra <hkalra@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
drivers/event/octeontx2/otx2_evdev.c | 2 ++
drivers/event/octeontx2/otx2_evdev.h | 6 ++++++
drivers/event/octeontx2/otx2_evdev_adptr.c | 1 +
drivers/event/octeontx2/otx2_worker.h | 6 ++++++
drivers/event/octeontx2/otx2_worker_dual.c | 18 ++++++++++++------
drivers/event/octeontx2/otx2_worker_dual.h | 5 ++++-
6 files changed, 31 insertions(+), 7 deletions(-)
diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c
index f45fc008d..ca75e4215 100644
--- a/drivers/event/octeontx2/otx2_evdev.c
+++ b/drivers/event/octeontx2/otx2_evdev.c
@@ -1095,6 +1095,7 @@ otx2_sso_port_setup(struct rte_eventdev *event_dev, uint8_t port_id,
sizeof(uintptr_t) * OTX2_SSO_MAX_VHGRP);
ws->fc_mem = dev->fc_mem;
ws->xaq_lmt = dev->xaq_lmt;
+ ws->tstamp = dev->tstamp;
otx2_write64(val, OTX2_SSOW_GET_BASE_ADDR(
ws->ws_state[0].getwrk_op) + SSOW_LF_GWS_NW_TIM);
otx2_write64(val, OTX2_SSOW_GET_BASE_ADDR(
@@ -1107,6 +1108,7 @@ otx2_sso_port_setup(struct rte_eventdev *event_dev, uint8_t port_id,
sizeof(uintptr_t) * OTX2_SSO_MAX_VHGRP);
ws->fc_mem = dev->fc_mem;
ws->xaq_lmt = dev->xaq_lmt;
+ ws->tstamp = dev->tstamp;
otx2_write64(val, base + SSOW_LF_GWS_NW_TIM);
}
diff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h
index a81a8be6f..2df9ec468 100644
--- a/drivers/event/octeontx2/otx2_evdev.h
+++ b/drivers/event/octeontx2/otx2_evdev.h
@@ -149,6 +149,8 @@ struct otx2_sso_evdev {
/* MSIX offsets */
uint16_t sso_msixoff[OTX2_SSO_MAX_VHGRP];
uint16_t ssow_msixoff[OTX2_SSO_MAX_VHWS];
+ /* PTP timestamp */
+ struct otx2_timesync_info *tstamp;
} __rte_cache_aligned;
#define OTX2_SSOGWS_OPS \
@@ -173,6 +175,8 @@ struct otx2_ssogws {
uint64_t xaq_lmt __rte_cache_aligned;
uint64_t *fc_mem;
uintptr_t grps_base[OTX2_SSO_MAX_VHGRP];
+ /* PTP timestamp */
+ struct otx2_timesync_info *tstamp;
} __rte_cache_aligned;
struct otx2_ssogws_state {
@@ -190,6 +194,8 @@ struct otx2_ssogws_dual {
uint64_t xaq_lmt __rte_cache_aligned;
uint64_t *fc_mem;
uintptr_t grps_base[OTX2_SSO_MAX_VHGRP];
+ /* PTP timestamp */
+ struct otx2_timesync_info *tstamp;
} __rte_cache_aligned;
static inline struct otx2_sso_evdev *
diff --git a/drivers/event/octeontx2/otx2_evdev_adptr.c b/drivers/event/octeontx2/otx2_evdev_adptr.c
index c66dfa642..883bd1cdf 100644
--- a/drivers/event/octeontx2/otx2_evdev_adptr.c
+++ b/drivers/event/octeontx2/otx2_evdev_adptr.c
@@ -297,6 +297,7 @@ otx2_sso_rx_adapter_queue_add(const struct rte_eventdev *event_dev,
}
dev->rx_offloads |= otx2_eth_dev->rx_offload_flags;
+ dev->tstamp = &otx2_eth_dev->tstamp;
sso_fastpath_fns_set((struct rte_eventdev *)(uintptr_t)event_dev);
return 0;
diff --git a/drivers/event/octeontx2/otx2_worker.h b/drivers/event/octeontx2/otx2_worker.h
index accf7f956..1e1e947ef 100644
--- a/drivers/event/octeontx2/otx2_worker.h
+++ b/drivers/event/octeontx2/otx2_worker.h
@@ -68,6 +68,9 @@ otx2_ssogws_get_work(struct otx2_ssogws *ws, struct rte_event *ev,
event.event_type == RTE_EVENT_TYPE_ETHDEV) {
otx2_wqe_to_mbuf(get_work1, mbuf, event.sub_event_type,
(uint32_t) event.get_work0, flags, lookup_mem);
+ /* Extracting tstamp, if PTP enabled*/
+ otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, ws->tstamp,
+ flags);
get_work1 = mbuf;
}
@@ -127,6 +130,9 @@ otx2_ssogws_get_work_empty(struct otx2_ssogws *ws, struct rte_event *ev,
event.event_type == RTE_EVENT_TYPE_ETHDEV) {
otx2_wqe_to_mbuf(get_work1, mbuf, event.sub_event_type,
(uint32_t) event.get_work0, flags, NULL);
+ /* Extracting tstamp, if PTP enabled*/
+ otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, ws->tstamp,
+ flags);
get_work1 = mbuf;
}
diff --git a/drivers/event/octeontx2/otx2_worker_dual.c b/drivers/event/octeontx2/otx2_worker_dual.c
index b5cf9ac12..cbe03c1bb 100644
--- a/drivers/event/octeontx2/otx2_worker_dual.c
+++ b/drivers/event/octeontx2/otx2_worker_dual.c
@@ -158,7 +158,8 @@ otx2_ssogws_dual_deq_ ##name(void *port, struct rte_event *ev, \
\
gw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws], \
&ws->ws_state[!ws->vws], ev, \
- flags, ws->lookup_mem); \
+ flags, ws->lookup_mem, \
+ ws->tstamp); \
ws->vws = !ws->vws; \
\
return gw; \
@@ -191,13 +192,15 @@ otx2_ssogws_dual_deq_timeout_ ##name(void *port, struct rte_event *ev, \
\
gw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws], \
&ws->ws_state[!ws->vws], ev, \
- flags, ws->lookup_mem); \
+ flags, ws->lookup_mem, \
+ ws->tstamp); \
ws->vws = !ws->vws; \
for (iter = 1; iter < timeout_ticks && (gw == 0); iter++) { \
gw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws], \
&ws->ws_state[!ws->vws], \
ev, flags, \
- ws->lookup_mem); \
+ ws->lookup_mem, \
+ ws->tstamp); \
ws->vws = !ws->vws; \
} \
\
@@ -234,7 +237,8 @@ otx2_ssogws_dual_deq_seg_ ##name(void *port, struct rte_event *ev, \
gw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws], \
&ws->ws_state[!ws->vws], ev, \
flags | NIX_RX_MULTI_SEG_F, \
- ws->lookup_mem); \
+ ws->lookup_mem, \
+ ws->tstamp); \
ws->vws = !ws->vws; \
\
return gw; \
@@ -271,14 +275,16 @@ otx2_ssogws_dual_deq_seg_timeout_ ##name(void *port, \
gw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws], \
&ws->ws_state[!ws->vws], ev, \
flags | NIX_RX_MULTI_SEG_F, \
- ws->lookup_mem); \
+ ws->lookup_mem, \
+ ws->tstamp); \
ws->vws = !ws->vws; \
for (iter = 1; iter < timeout_ticks && (gw == 0); iter++) { \
gw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws], \
&ws->ws_state[!ws->vws], \
ev, flags | \
NIX_RX_MULTI_SEG_F, \
- ws->lookup_mem); \
+ ws->lookup_mem, \
+ ws->tstamp); \
ws->vws = !ws->vws; \
} \
\
diff --git a/drivers/event/octeontx2/otx2_worker_dual.h b/drivers/event/octeontx2/otx2_worker_dual.h
index 32fe61b44..4a72f424d 100644
--- a/drivers/event/octeontx2/otx2_worker_dual.h
+++ b/drivers/event/octeontx2/otx2_worker_dual.h
@@ -16,7 +16,8 @@ static __rte_always_inline uint16_t
otx2_ssogws_dual_get_work(struct otx2_ssogws_state *ws,
struct otx2_ssogws_state *ws_pair,
struct rte_event *ev, const uint32_t flags,
- const void * const lookup_mem)
+ const void * const lookup_mem,
+ struct otx2_timesync_info * const tstamp)
{
const uint64_t set_gw = BIT_ULL(16) | 1;
union otx2_sso_event event;
@@ -69,6 +70,8 @@ otx2_ssogws_dual_get_work(struct otx2_ssogws_state *ws,
event.event_type == RTE_EVENT_TYPE_ETHDEV) {
otx2_wqe_to_mbuf(get_work1, mbuf, event.sub_event_type,
(uint32_t) event.get_work0, flags, lookup_mem);
+ /* Extracting tstamp, if PTP enabled*/
+ otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, tstamp, flags);
get_work1 = mbuf;
}
--
2.22.0
next prev parent reply other threads:[~2019-07-03 10:05 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-07-03 10:04 [dpdk-dev] [PATCH v3 0/6] event/octeontx2: add Rx/Tx adapter support pbhagavatula
2019-07-03 10:04 ` [dpdk-dev] [PATCH v3 1/6] event/octeontx2: add event eth Rx " pbhagavatula
2019-07-03 10:12 ` Jerin Jacob Kollanukkaran
2019-07-03 10:04 ` [dpdk-dev] [PATCH v3 2/6] event/octeontx2: resize SSO inflight event buffers pbhagavatula
2019-07-03 10:04 ` [dpdk-dev] [PATCH v3 3/6] event/octeontx2: add event eth Rx adapter fastpath ops pbhagavatula
2019-07-03 10:04 ` pbhagavatula [this message]
2019-07-03 10:04 ` [dpdk-dev] [PATCH v3 5/6] event/octeontx2: add Tx adadpter support pbhagavatula
2019-07-03 10:04 ` [dpdk-dev] [PATCH v3 6/6] doc: update Marvell OCTEON TX2 documentation pbhagavatula
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