From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 95614A0487 for ; Thu, 4 Jul 2019 04:20:26 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6C30D1B197; Thu, 4 Jul 2019 04:20:00 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id B5FA95B3A for ; Thu, 4 Jul 2019 04:19:58 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x642FiFQ016481 for ; Wed, 3 Jul 2019 19:19:58 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=rUFPglhdbcGGh5bgER3YQ++pxy5JWQDra9D0yJigX68=; b=B9bOLtpZZppt1Dyvr7BrELuQB94KFmghgZ/8nBhEzp1GReBdS9dYpdbWpc+uYvJJZpZe kEjEYv9gr4XmFRS9PWrCEb7XmSTvPnWr7OxThd2ixtUkjORxN92jt1a2jMRcJd/4Z8EU WN1xda/nPnIKMUTKiat0mU0Alg9acLz+UuY/iL1z2joZ/6R9S1KeO8pdvJaQxvcOrUsd ZOdE02+4kpvB4aTrCxj0YNHXUxytmYUviqnzLJoj7oZ19slLz+cuP+v3+g2s8KXYwaOf 7UKWjAQQ+0RZrwTw1cJQAnToZy+oD3czrNvO307zSceSupkcVn73Xx3KDeNOi8BtbOjV Zw== Received: from sc-exch02.marvell.com ([199.233.58.182]) by mx0b-0016f401.pphosted.com with ESMTP id 2tgtf73bbr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Wed, 03 Jul 2019 19:19:58 -0700 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Wed, 3 Jul 2019 19:19:56 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Wed, 3 Jul 2019 19:19:56 -0700 Received: from BG-LT7430.marvell.com (unknown [10.28.17.42]) by maili.marvell.com (Postfix) with ESMTP id 3B3453F703F; Wed, 3 Jul 2019 19:19:53 -0700 (PDT) From: To: , Pavan Nikhilesh CC: , Harman Kalra , Nithin Dabilpuram Date: Thu, 4 Jul 2019 07:49:38 +0530 Message-ID: <20190704021940.3023-5-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190704021940.3023-1-pbhagavatula@marvell.com> References: <20190704021940.3023-1-pbhagavatula@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-07-04_01:, , signatures=0 Subject: [dpdk-dev] [PATCH v4 4/5] event/octeontx2: add PTP support for SSO X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Harman Kalra Add PTP support for SSO based on rx_offloads of the queue connected to it. Signed-off-by: Harman Kalra Signed-off-by: Nithin Dabilpuram Signed-off-by: Pavan Nikhilesh --- drivers/event/octeontx2/otx2_evdev.c | 2 ++ drivers/event/octeontx2/otx2_evdev.h | 6 ++++++ drivers/event/octeontx2/otx2_evdev_adptr.c | 1 + drivers/event/octeontx2/otx2_worker.h | 6 ++++++ drivers/event/octeontx2/otx2_worker_dual.c | 18 ++++++++++++------ drivers/event/octeontx2/otx2_worker_dual.h | 5 ++++- 6 files changed, 31 insertions(+), 7 deletions(-) diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c index f45fc008d..ca75e4215 100644 --- a/drivers/event/octeontx2/otx2_evdev.c +++ b/drivers/event/octeontx2/otx2_evdev.c @@ -1095,6 +1095,7 @@ otx2_sso_port_setup(struct rte_eventdev *event_dev, uint8_t port_id, sizeof(uintptr_t) * OTX2_SSO_MAX_VHGRP); ws->fc_mem = dev->fc_mem; ws->xaq_lmt = dev->xaq_lmt; + ws->tstamp = dev->tstamp; otx2_write64(val, OTX2_SSOW_GET_BASE_ADDR( ws->ws_state[0].getwrk_op) + SSOW_LF_GWS_NW_TIM); otx2_write64(val, OTX2_SSOW_GET_BASE_ADDR( @@ -1107,6 +1108,7 @@ otx2_sso_port_setup(struct rte_eventdev *event_dev, uint8_t port_id, sizeof(uintptr_t) * OTX2_SSO_MAX_VHGRP); ws->fc_mem = dev->fc_mem; ws->xaq_lmt = dev->xaq_lmt; + ws->tstamp = dev->tstamp; otx2_write64(val, base + SSOW_LF_GWS_NW_TIM); } diff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h index a81a8be6f..2df9ec468 100644 --- a/drivers/event/octeontx2/otx2_evdev.h +++ b/drivers/event/octeontx2/otx2_evdev.h @@ -149,6 +149,8 @@ struct otx2_sso_evdev { /* MSIX offsets */ uint16_t sso_msixoff[OTX2_SSO_MAX_VHGRP]; uint16_t ssow_msixoff[OTX2_SSO_MAX_VHWS]; + /* PTP timestamp */ + struct otx2_timesync_info *tstamp; } __rte_cache_aligned; #define OTX2_SSOGWS_OPS \ @@ -173,6 +175,8 @@ struct otx2_ssogws { uint64_t xaq_lmt __rte_cache_aligned; uint64_t *fc_mem; uintptr_t grps_base[OTX2_SSO_MAX_VHGRP]; + /* PTP timestamp */ + struct otx2_timesync_info *tstamp; } __rte_cache_aligned; struct otx2_ssogws_state { @@ -190,6 +194,8 @@ struct otx2_ssogws_dual { uint64_t xaq_lmt __rte_cache_aligned; uint64_t *fc_mem; uintptr_t grps_base[OTX2_SSO_MAX_VHGRP]; + /* PTP timestamp */ + struct otx2_timesync_info *tstamp; } __rte_cache_aligned; static inline struct otx2_sso_evdev * diff --git a/drivers/event/octeontx2/otx2_evdev_adptr.c b/drivers/event/octeontx2/otx2_evdev_adptr.c index e605fd1d4..e5aaa67b6 100644 --- a/drivers/event/octeontx2/otx2_evdev_adptr.c +++ b/drivers/event/octeontx2/otx2_evdev_adptr.c @@ -297,6 +297,7 @@ otx2_sso_rx_adapter_queue_add(const struct rte_eventdev *event_dev, } dev->rx_offloads |= otx2_eth_dev->rx_offload_flags; + dev->tstamp = &otx2_eth_dev->tstamp; sso_fastpath_fns_set((struct rte_eventdev *)(uintptr_t)event_dev); return 0; diff --git a/drivers/event/octeontx2/otx2_worker.h b/drivers/event/octeontx2/otx2_worker.h index accf7f956..1e1e947ef 100644 --- a/drivers/event/octeontx2/otx2_worker.h +++ b/drivers/event/octeontx2/otx2_worker.h @@ -68,6 +68,9 @@ otx2_ssogws_get_work(struct otx2_ssogws *ws, struct rte_event *ev, event.event_type == RTE_EVENT_TYPE_ETHDEV) { otx2_wqe_to_mbuf(get_work1, mbuf, event.sub_event_type, (uint32_t) event.get_work0, flags, lookup_mem); + /* Extracting tstamp, if PTP enabled*/ + otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, ws->tstamp, + flags); get_work1 = mbuf; } @@ -127,6 +130,9 @@ otx2_ssogws_get_work_empty(struct otx2_ssogws *ws, struct rte_event *ev, event.event_type == RTE_EVENT_TYPE_ETHDEV) { otx2_wqe_to_mbuf(get_work1, mbuf, event.sub_event_type, (uint32_t) event.get_work0, flags, NULL); + /* Extracting tstamp, if PTP enabled*/ + otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, ws->tstamp, + flags); get_work1 = mbuf; } diff --git a/drivers/event/octeontx2/otx2_worker_dual.c b/drivers/event/octeontx2/otx2_worker_dual.c index b5cf9ac12..cbe03c1bb 100644 --- a/drivers/event/octeontx2/otx2_worker_dual.c +++ b/drivers/event/octeontx2/otx2_worker_dual.c @@ -158,7 +158,8 @@ otx2_ssogws_dual_deq_ ##name(void *port, struct rte_event *ev, \ \ gw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws], \ &ws->ws_state[!ws->vws], ev, \ - flags, ws->lookup_mem); \ + flags, ws->lookup_mem, \ + ws->tstamp); \ ws->vws = !ws->vws; \ \ return gw; \ @@ -191,13 +192,15 @@ otx2_ssogws_dual_deq_timeout_ ##name(void *port, struct rte_event *ev, \ \ gw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws], \ &ws->ws_state[!ws->vws], ev, \ - flags, ws->lookup_mem); \ + flags, ws->lookup_mem, \ + ws->tstamp); \ ws->vws = !ws->vws; \ for (iter = 1; iter < timeout_ticks && (gw == 0); iter++) { \ gw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws], \ &ws->ws_state[!ws->vws], \ ev, flags, \ - ws->lookup_mem); \ + ws->lookup_mem, \ + ws->tstamp); \ ws->vws = !ws->vws; \ } \ \ @@ -234,7 +237,8 @@ otx2_ssogws_dual_deq_seg_ ##name(void *port, struct rte_event *ev, \ gw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws], \ &ws->ws_state[!ws->vws], ev, \ flags | NIX_RX_MULTI_SEG_F, \ - ws->lookup_mem); \ + ws->lookup_mem, \ + ws->tstamp); \ ws->vws = !ws->vws; \ \ return gw; \ @@ -271,14 +275,16 @@ otx2_ssogws_dual_deq_seg_timeout_ ##name(void *port, \ gw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws], \ &ws->ws_state[!ws->vws], ev, \ flags | NIX_RX_MULTI_SEG_F, \ - ws->lookup_mem); \ + ws->lookup_mem, \ + ws->tstamp); \ ws->vws = !ws->vws; \ for (iter = 1; iter < timeout_ticks && (gw == 0); iter++) { \ gw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws], \ &ws->ws_state[!ws->vws], \ ev, flags | \ NIX_RX_MULTI_SEG_F, \ - ws->lookup_mem); \ + ws->lookup_mem, \ + ws->tstamp); \ ws->vws = !ws->vws; \ } \ \ diff --git a/drivers/event/octeontx2/otx2_worker_dual.h b/drivers/event/octeontx2/otx2_worker_dual.h index 32fe61b44..4a72f424d 100644 --- a/drivers/event/octeontx2/otx2_worker_dual.h +++ b/drivers/event/octeontx2/otx2_worker_dual.h @@ -16,7 +16,8 @@ static __rte_always_inline uint16_t otx2_ssogws_dual_get_work(struct otx2_ssogws_state *ws, struct otx2_ssogws_state *ws_pair, struct rte_event *ev, const uint32_t flags, - const void * const lookup_mem) + const void * const lookup_mem, + struct otx2_timesync_info * const tstamp) { const uint64_t set_gw = BIT_ULL(16) | 1; union otx2_sso_event event; @@ -69,6 +70,8 @@ otx2_ssogws_dual_get_work(struct otx2_ssogws_state *ws, event.event_type == RTE_EVENT_TYPE_ETHDEV) { otx2_wqe_to_mbuf(get_work1, mbuf, event.sub_event_type, (uint32_t) event.get_work0, flags, lookup_mem); + /* Extracting tstamp, if PTP enabled*/ + otx2_nix_mbuf_to_tstamp((struct rte_mbuf *)mbuf, tstamp, flags); get_work1 = mbuf; } -- 2.22.0