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From: hgovindh <hariprasad.govindharajan@intel.com>
To: Marko Kovacevic <marko.kovacevic@intel.com>, Ori Kam <orika@mellanox.com>,
Bruce Richardson <bruce.richardson@intel.com>,
Pablo de Lara <pablo.de.lara.guarch@intel.com>,
Radu Nicolau <radu.nicolau@intel.com>, Akhil Goyal <akhil.goyal@nxp.com>,
Tomasz Kantecki <tomasz.kantecki@intel.com>
Cc: dev@dpdk.org, drc@linux.vnet.ibm.com, ruifeng.wang@arm.com,
hgovindh <hariprasad.govindharajan@intel.com>,
maciej.czekaj@caviumnetworks.com, stable@dpdk.org
Date: Fri, 26 Jul 2019 14:58:58 +0100
Message-Id: <20190726135858.55792-1-hariprasad.govindharajan@intel.com>
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Subject: [dpdk-dev] [PATCH v4] examples/l3fwd: fix unaligned memory access
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Fix unaligned memory access when reading IPv6 header which
leads to segmentation fault by changing aligned memory read
to unaligned memory read.
Bugzilla ID: 279
Fixes: 64d3955de1de ("examples/l3fwd: fix ARM build")
Cc: maciej.czekaj@caviumnetworks.com
Cc: stable@dpdk.org
Signed-off-by: hgovindh <hariprasad.govindharajan@intel.com>
---
V2: Added functions which will do unaligned load based on the
underlying architecture
V3: Removed functions added in V2 and replaced them with if macros
which will branch based on the underlying architecture. As per my
understanding since the unaligned load affects only Intel arch,
I added that function branch and left the original code for other arc.
Can someone with ARM and PowerPC arch, could you please validate this
patch and let me know?
---
examples/l3fwd/l3fwd_em.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/examples/l3fwd/l3fwd_em.c b/examples/l3fwd/l3fwd_em.c
index 5f499e005..ad6fe76e8 100644
--- a/examples/l3fwd/l3fwd_em.c
+++ b/examples/l3fwd/l3fwd_em.c
@@ -287,8 +287,11 @@ em_get_ipv6_dst_port(void *ipv6_hdr, uint16_t portid, void *lookup_struct)
* Get part of 5 tuple: dst IP address lower 96 bits
* and src IP address higher 32 bits.
*/
+#if defined RTE_ARCH_X86
+ key.xmm[1] = _mm_loadu_si128(data1);
+#else
key.xmm[1] = *(xmm_t *)data1;
-
+#endif
/*
* Get part of 5 tuple: dst port and src port
* and dst IP address higher 32 bits.
--
2.22.0