From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7C53FA00E6 for ; Mon, 5 Aug 2019 07:39:43 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 7DE601BE48; Mon, 5 Aug 2019 07:39:42 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 8E1F11BE47; Mon, 5 Aug 2019 07:39:40 +0200 (CEST) X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Aug 2019 22:39:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,348,1559545200"; d="scan'208";a="173785892" Received: from yexl-server.sh.intel.com (HELO localhost) ([10.67.117.5]) by fmsmga008.fm.intel.com with ESMTP; 04 Aug 2019 22:39:38 -0700 Date: Mon, 5 Aug 2019 13:39:13 +0800 From: Ye Xiaolong To: Xiao Zhang Cc: dev@dpdk.org, wenzhuo.lu@intel.com, stable@dpdk.org Message-ID: <20190805053913.GE51603@intel.com> References: <1564954020-38741-1-git-send-email-xiao.zhang@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1564954020-38741-1-git-send-email-xiao.zhang@intel.com> User-Agent: Mutt/1.9.4 (2018-02-28) Subject: Re: [dpdk-dev] [PATCH] net/e1000: fix unchecked return value coverity issue X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 08/05, Xiao Zhang wrote: >Add return value checking when reading configure information from PCI >register to avoid coverity issue. > >Fixes: 1fc97012 ("net/e1000: fix i219 hang on reset/close") >Cc: stable@dpdk.org > >Signed-off-by: Xiao Zhang >--- > drivers/net/e1000/em_rxtx.c | 18 +++++++++++++++--- > 1 file changed, 15 insertions(+), 3 deletions(-) > >diff --git a/drivers/net/e1000/em_rxtx.c b/drivers/net/e1000/em_rxtx.c >index 6f40b45..5925e49 100644 >--- a/drivers/net/e1000/em_rxtx.c >+++ b/drivers/net/e1000/em_rxtx.c >@@ -2109,20 +2109,32 @@ em_flush_desc_rings(struct rte_eth_dev *dev) > struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); > struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); > uint16_t pci_cfg_status = 0; >+ int ret; > > fextnvm11 = E1000_READ_REG(hw, E1000_FEXTNVM11); > E1000_WRITE_REG(hw, E1000_FEXTNVM11, > fextnvm11 | E1000_FEXTNVM11_DISABLE_MULR_FIX); > tdlen = E1000_READ_REG(hw, E1000_TDLEN(0)); >- rte_pci_read_config(pci_dev, &pci_cfg_status, sizeof(pci_cfg_status), >- PCI_CFG_STATUS_REG); >+ ret = rte_pci_read_config(pci_dev, &pci_cfg_status, >+ sizeof(pci_cfg_status), PCI_CFG_STATUS_REG); >+ if (ret < 0) { >+ PMD_DRV_LOG(ERR, "Failed to read PCI offset 0x%x", >+ PCI_CFG_STATUS_REG); >+ return; >+ } > > /* do nothing if we're not in faulty state, or if the queue is empty */ > if ((pci_cfg_status & FLUSH_DESC_REQUIRED) && tdlen) { > /* flush desc ring */ > e1000_flush_tx_ring(dev); >- rte_pci_read_config(pci_dev, &pci_cfg_status, >+ ret = rte_pci_read_config(pci_dev, &pci_cfg_status, > sizeof(pci_cfg_status), PCI_CFG_STATUS_REG); >+ if (ret < 0) { >+ PMD_DRV_LOG(ERR, "Failed to read PCI offset 0x%x", >+ PCI_CFG_STATUS_REG); >+ return; >+ } >+ > if (pci_cfg_status & FLUSH_DESC_REQUIRED) > e1000_flush_rx_ring(dev); > } >-- >2.7.4 > Reviewed-by: Xiaolong Ye