From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8A66DA2EDB for ; Tue, 1 Oct 2019 08:43:35 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 83C635B3C; Tue, 1 Oct 2019 08:42:13 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 5C62A1BEB4 for ; Tue, 1 Oct 2019 08:42:11 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x916ennr007139; Mon, 30 Sep 2019 23:42:09 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=/PoZBPJsgSCYDZLCRpj8CRlUJ4Vd/gyBRhs/TW96y3A=; b=HIOCN3enrECHF67/K2fze/uPvevFv8WpKYe33THulMUsmZVQ/H528pBtLnyX+q38ueYA AsoxDJpDqaYOS1Xn2T/usgdBWLd/1ePm04Lj8Y5koNH1y98XmDcFJbJoXBneiT3q8wil xkCJL9IdoJRmtYESZ8w9+gaH9JVuLvlF0K7VAZ2wEaDOU2e7vNoGQcoUzOFboWKQEuxF SgLH9cDF7WCZUADhufL1deQqWEmBSPWZC7xRhkP6xVpwoTLlXoghrV4d9Xwi0Ti6qKZv VGQyMEa7SYnDmZbeC3au10XMVpa5wnSKm42Wh2Mn3pGMcfodEVZu1QR4jEwZhxjgLLwH 4Q== Received: from sc-exch04.marvell.com ([199.233.58.184]) by mx0a-0016f401.pphosted.com with ESMTP id 2vbur19109-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 30 Sep 2019 23:42:09 -0700 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Mon, 30 Sep 2019 23:42:08 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Mon, 30 Sep 2019 23:42:08 -0700 Received: from BG-LT7430.marvell.com (bg-lt7430.marvell.com [10.28.10.255]) by maili.marvell.com (Postfix) with ESMTP id 160F43F7043; Mon, 30 Sep 2019 23:42:02 -0700 (PDT) From: To: , , Ajit Khaparde , Somnath Kotur , John Daley , Hyong Youb Kim , "Beilei Xing" , Qi Zhang , Jingjing Wu , Wenzhuo Lu , Qiming Yang , Konstantin Ananyev , Matan Azrad , Shahaf Shuler , Viacheslav Ovsiienko , Nithin Dabilpuram , Kiran Kumar K CC: , Pavan Nikhilesh Date: Tue, 1 Oct 2019 12:11:37 +0530 Message-ID: <20191001064139.9325-6-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191001064139.9325-1-pbhagavatula@marvell.com> References: <20191001063453.7138-1-pbhagavatula@marvell.com> <20191001064139.9325-1-pbhagavatula@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-10-01_03:2019-09-30,2019-10-01 signatures=0 Subject: [dpdk-dev] [PATCH v5 5/7] drivers/net: update Rx flow flag and mark capabilities X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Add DEV_RX_OFFLOAD_FLOW_MARK flag for all PMDs that support flow action flag and mark. Signed-off-by: Pavan Nikhilesh --- drivers/net/bnxt/bnxt_ethdev.c | 3 ++- drivers/net/enic/enic_res.c | 3 ++- drivers/net/i40e/i40e_ethdev.c | 3 ++- drivers/net/iavf/iavf_ethdev.c | 3 ++- drivers/net/ice/ice_ethdev.c | 3 ++- drivers/net/ixgbe/ixgbe_rxtx.c | 3 ++- drivers/net/mlx5/mlx5_rxq.c | 3 ++- drivers/net/octeontx2/otx2_ethdev.h | 3 ++- drivers/net/octeontx2/otx2_flow_parse.c | 3 ++- drivers/net/sfc/sfc_ef10_essb_rx.c | 3 ++- 10 files changed, 20 insertions(+), 10 deletions(-) diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index 6c106baf7..fd1fb7eda 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -161,7 +161,8 @@ static const struct rte_pci_id bnxt_pci_id_map[] = { DEV_RX_OFFLOAD_JUMBO_FRAME | \ DEV_RX_OFFLOAD_KEEP_CRC | \ DEV_RX_OFFLOAD_TCP_LRO | \ - DEV_RX_OFFLOAD_RSS_HASH) + DEV_RX_OFFLOAD_RSS_HASH | \ + DEV_RX_OFFLOAD_FLOW_MARK) static int bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask); static void bnxt_print_link_info(struct rte_eth_dev *eth_dev); diff --git a/drivers/net/enic/enic_res.c b/drivers/net/enic/enic_res.c index 607a085f8..3503d5d7e 100644 --- a/drivers/net/enic/enic_res.c +++ b/drivers/net/enic/enic_res.c @@ -199,7 +199,8 @@ int enic_get_vnic_config(struct enic *enic) DEV_RX_OFFLOAD_IPV4_CKSUM | DEV_RX_OFFLOAD_UDP_CKSUM | DEV_RX_OFFLOAD_TCP_CKSUM | - DEV_RX_OFFLOAD_RSS_HASH; + DEV_RX_OFFLOAD_RSS_HASH | + DEV_RX_OFFLOAD_FLOW_MARK; enic->tx_offload_mask = PKT_TX_IPV6 | PKT_TX_IPV4 | diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 7058e0213..6311943be 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -3512,7 +3512,8 @@ i40e_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) DEV_RX_OFFLOAD_VLAN_EXTEND | DEV_RX_OFFLOAD_VLAN_FILTER | DEV_RX_OFFLOAD_JUMBO_FRAME | - DEV_RX_OFFLOAD_RSS_HASH; + DEV_RX_OFFLOAD_RSS_HASH | + DEV_RX_OFFLOAD_FLOW_MARK; dev_info->tx_queue_offload_capa = DEV_TX_OFFLOAD_MBUF_FAST_FREE; dev_info->tx_offload_capa = diff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethdev.c index aef91a79b..7bdaa87b1 100644 --- a/drivers/net/iavf/iavf_ethdev.c +++ b/drivers/net/iavf/iavf_ethdev.c @@ -518,7 +518,8 @@ iavf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) DEV_RX_OFFLOAD_SCATTER | DEV_RX_OFFLOAD_JUMBO_FRAME | DEV_RX_OFFLOAD_VLAN_FILTER | - DEV_RX_OFFLOAD_RSS_HASH; + DEV_RX_OFFLOAD_RSS_HASH | + DEV_RX_OFFLOAD_FLOW_MARK; dev_info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT | DEV_TX_OFFLOAD_QINQ_INSERT | diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index 2e2a6b2af..984af659f 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -2146,7 +2146,8 @@ ice_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) DEV_RX_OFFLOAD_QINQ_STRIP | DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | DEV_RX_OFFLOAD_VLAN_EXTEND | - DEV_RX_OFFLOAD_RSS_HASH; + DEV_RX_OFFLOAD_RSS_HASH | + DEV_RX_OFFLOAD_FLOW_MARK; dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_QINQ_INSERT | DEV_TX_OFFLOAD_IPV4_CKSUM | diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c index fa572d184..1481e2426 100644 --- a/drivers/net/ixgbe/ixgbe_rxtx.c +++ b/drivers/net/ixgbe/ixgbe_rxtx.c @@ -2873,7 +2873,8 @@ ixgbe_get_rx_port_offloads(struct rte_eth_dev *dev) DEV_RX_OFFLOAD_JUMBO_FRAME | DEV_RX_OFFLOAD_VLAN_FILTER | DEV_RX_OFFLOAD_SCATTER | - DEV_RX_OFFLOAD_RSS_HASH; + DEV_RX_OFFLOAD_RSS_HASH | + DEV_RX_OFFLOAD_FLOW_MARK; if (hw->mac.type == ixgbe_mac_82598EB) offloads |= DEV_RX_OFFLOAD_VLAN_STRIP; diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index b5fd57693..1bf01bda3 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -369,7 +369,8 @@ mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev) uint64_t offloads = (DEV_RX_OFFLOAD_SCATTER | DEV_RX_OFFLOAD_TIMESTAMP | DEV_RX_OFFLOAD_JUMBO_FRAME | - DEV_RX_OFFLOAD_RSS_HASH); + DEV_RX_OFFLOAD_RSS_HASH | + DEV_RX_OFFLOAD_FLOW_MARK); if (config->hw_fcs_strip) offloads |= DEV_RX_OFFLOAD_KEEP_CRC; diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h index 0cca6746d..97c1a636a 100644 --- a/drivers/net/octeontx2/otx2_ethdev.h +++ b/drivers/net/octeontx2/otx2_ethdev.h @@ -141,7 +141,8 @@ DEV_RX_OFFLOAD_VLAN_FILTER | \ DEV_RX_OFFLOAD_QINQ_STRIP | \ DEV_RX_OFFLOAD_TIMESTAMP | \ - DEV_RX_OFFLOAD_RSS_HASH) + DEV_RX_OFFLOAD_RSS_HASH | \ + DEV_RX_OFFLOAD_FLOW_MARK) #define NIX_DEFAULT_RSS_CTX_GROUP 0 #define NIX_DEFAULT_RSS_MCAM_IDX -1 diff --git a/drivers/net/octeontx2/otx2_flow_parse.c b/drivers/net/octeontx2/otx2_flow_parse.c index 6670c1a70..6eb69a8b2 100644 --- a/drivers/net/octeontx2/otx2_flow_parse.c +++ b/drivers/net/octeontx2/otx2_flow_parse.c @@ -979,7 +979,8 @@ otx2_flow_parse_actions(struct rte_eth_dev *dev, if (mark) flow->npc_action |= (uint64_t)mark << 40; - if (rte_atomic32_read(&npc->mark_actions) == 1) { + if (rte_atomic32_read(&npc->mark_actions) == 1 && + (hw->rx_offloads & DEV_RX_OFFLOAD_FLOW_MARK)) { hw->rx_offload_flags |= NIX_RX_OFFLOAD_MARK_UPDATE_F; otx2_eth_set_rx_function(dev); diff --git a/drivers/net/sfc/sfc_ef10_essb_rx.c b/drivers/net/sfc/sfc_ef10_essb_rx.c index 220ef0e47..1887731e2 100644 --- a/drivers/net/sfc/sfc_ef10_essb_rx.c +++ b/drivers/net/sfc/sfc_ef10_essb_rx.c @@ -716,7 +716,8 @@ struct sfc_dp_rx sfc_ef10_essb_rx = { .features = SFC_DP_RX_FEAT_FLOW_FLAG | SFC_DP_RX_FEAT_FLOW_MARK, .dev_offload_capa = DEV_RX_OFFLOAD_CHECKSUM, - .queue_offload_capa = DEV_RX_OFFLOAD_RSS_HASH, + .queue_offload_capa = DEV_RX_OFFLOAD_RSS_HASH | + DEV_RX_OFFLOAD_FLOW_MARK, .get_dev_info = sfc_ef10_essb_rx_get_dev_info, .pool_ops_supported = sfc_ef10_essb_rx_pool_ops_supported, .qsize_up_rings = sfc_ef10_essb_rx_qsize_up_rings, -- 2.17.1