DPDK patches and discussions
 help / color / mirror / Atom feed
From: Arek Kusztal <arkadiuszx.kusztal@intel.com>
To: dev@dpdk.org
Cc: akhil.goyal@nxp.com, fiona.trahe@intel.com,
	Arek Kusztal <arkadiuszx.kusztal@intel.com>
Subject: [dpdk-dev] [PATCH v2 3/5] crypto/qat: add rsa crt implementation to asym pmd
Date: Fri, 11 Oct 2019 12:03:37 +0200	[thread overview]
Message-ID: <20191011100339.12912-4-arkadiuszx.kusztal@intel.com> (raw)
In-Reply-To: <20191011100339.12912-1-arkadiuszx.kusztal@intel.com>

This commit extends RSA implementation by CRT option

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
---
 doc/guides/cryptodevs/features/qat.ini             |  1 +
 doc/guides/rel_notes/release_19_11.rst             |  2 +
 .../qat/qat_adf/qat_pke_functionality_arrays.h     |  9 ++++
 drivers/crypto/qat/qat_asym.c                      | 61 +++++++++++++++++++++-
 drivers/crypto/qat/qat_asym.h                      |  1 +
 drivers/crypto/qat/qat_asym_pmd.c                  |  3 +-
 6 files changed, 74 insertions(+), 3 deletions(-)

diff --git a/doc/guides/cryptodevs/features/qat.ini b/doc/guides/cryptodevs/features/qat.ini
index 374b523..6e350eb 100644
--- a/doc/guides/cryptodevs/features/qat.ini
+++ b/doc/guides/cryptodevs/features/qat.ini
@@ -15,6 +15,7 @@ OOP LB  In LB  Out     = Y
 Digest encrypted       = Y
 Asymmetric sessionless = Y
 RSA PRIV OP KEY EXP    = Y
+RSA PRIV OP KEY QT     = Y
 
 ;
 ; Supported crypto algorithms of the 'qat' crypto driver.
diff --git a/doc/guides/rel_notes/release_19_11.rst b/doc/guides/rel_notes/release_19_11.rst
index e081fb1..730b198 100644
--- a/doc/guides/rel_notes/release_19_11.rst
+++ b/doc/guides/rel_notes/release_19_11.rst
@@ -91,6 +91,8 @@ New Features
 
   Added support for RSA algorithm with pair (n, d) private key representation.
 
+  Added support for RSA algorithm with quintuple private key representation.
+
 * **Added cryptodev API to use asymmetric session-less operation.**
 
   Added session-less option to cryptodev asymmetric API. It works the same way
diff --git a/drivers/common/qat/qat_adf/qat_pke_functionality_arrays.h b/drivers/common/qat/qat_adf/qat_pke_functionality_arrays.h
index 4f857b9..4921e0c 100644
--- a/drivers/common/qat/qat_adf/qat_pke_functionality_arrays.h
+++ b/drivers/common/qat/qat_adf/qat_pke_functionality_arrays.h
@@ -67,4 +67,13 @@ static const uint32_t RSA_MODEXP_DEC_IDS[][2] = {
 		{ 4096,	PKE_RSA_DP1_4096 },
 };
 
+static const uint32_t RSA_MODEXP_DEC_CRT_IDS[][2] = {
+		{ 512,	PKE_RSA_DP2_512 },
+		{ 1024,	PKE_RSA_DP2_1024 },
+		{ 1536,	PKE_RSA_DP2_1536 },
+		{ 2048,	PKE_RSA_DP2_2048 },
+		{ 3072,	PKE_RSA_DP2_3072 },
+		{ 4096,	PKE_RSA_DP2_4096 },
+};
+
 #endif
diff --git a/drivers/crypto/qat/qat_asym.c b/drivers/crypto/qat/qat_asym.c
index 8985270..92e4c9c 100644
--- a/drivers/crypto/qat/qat_asym.c
+++ b/drivers/crypto/qat/qat_asym.c
@@ -354,8 +354,65 @@ qat_asym_fill_arrays(struct rte_crypto_asym_op *asym_op,
 			}
 
 			if (xform->rsa.key_type == RTE_RSA_KET_TYPE_QT) {
-				QAT_LOG(ERR, "RSA CRT not implemented");
-				return QAT_ASYM_ERROR_INVALID_PARAM;
+
+				qat_req->input_param_count =
+						QAT_ASYM_RSA_QT_NUM_IN_PARAMS;
+				if (qat_asym_get_sz_and_func_id(RSA_MODEXP_DEC_CRT_IDS,
+						sizeof(RSA_MODEXP_DEC_CRT_IDS)/
+						sizeof(*RSA_MODEXP_DEC_CRT_IDS),
+						&alg_size, &func_id)) {
+					return QAT_ASYM_ERROR_INVALID_PARAM;
+				}
+				alg_size_in_bytes = alg_size >> 3;
+
+				rte_memcpy(cookie->input_array[1] +
+						(alg_size_in_bytes >> 1) -
+						xform->rsa.qt.p.length
+						, xform->rsa.qt.p.data,
+						xform->rsa.qt.p.length);
+				rte_memcpy(cookie->input_array[2] +
+						(alg_size_in_bytes >> 1) -
+						xform->rsa.qt.q.length
+						, xform->rsa.qt.q.data,
+						xform->rsa.qt.q.length);
+				rte_memcpy(cookie->input_array[3] +
+						(alg_size_in_bytes >> 1) -
+						xform->rsa.qt.dP.length
+						, xform->rsa.qt.dP.data,
+						xform->rsa.qt.dP.length);
+				rte_memcpy(cookie->input_array[4] +
+						(alg_size_in_bytes >> 1) -
+						xform->rsa.qt.dQ.length
+						, xform->rsa.qt.dQ.data,
+						xform->rsa.qt.dQ.length);
+				rte_memcpy(cookie->input_array[5] +
+						(alg_size_in_bytes >> 1) -
+						xform->rsa.qt.qInv.length
+						, xform->rsa.qt.qInv.data,
+						xform->rsa.qt.qInv.length);
+				cookie->alg_size = alg_size;
+				qat_req->pke_hdr.cd_pars.func_id = func_id;
+
+#if RTE_LOG_DP_LEVEL >= RTE_LOG_DEBUG
+				QAT_DP_HEXDUMP_LOG(DEBUG, "C",
+						cookie->input_array[0],
+						alg_size_in_bytes);
+				QAT_DP_HEXDUMP_LOG(DEBUG, "p",
+						cookie->input_array[1],
+						alg_size_in_bytes);
+				QAT_DP_HEXDUMP_LOG(DEBUG, "q",
+						cookie->input_array[2],
+						alg_size_in_bytes);
+				QAT_DP_HEXDUMP_LOG(DEBUG,
+						"dP", cookie->input_array[3],
+						alg_size_in_bytes);
+				QAT_DP_HEXDUMP_LOG(DEBUG,
+						"dQ", cookie->input_array[4],
+						alg_size_in_bytes);
+				QAT_DP_HEXDUMP_LOG(DEBUG,
+						"qInv", cookie->input_array[5],
+						alg_size_in_bytes);
+#endif
 			} else if (xform->rsa.key_type ==
 					RTE_RSA_KEY_TYPE_EXP) {
 				if (qat_asym_get_sz_and_func_id(
diff --git a/drivers/crypto/qat/qat_asym.h b/drivers/crypto/qat/qat_asym.h
index b12a969..a8e86e6 100644
--- a/drivers/crypto/qat/qat_asym.h
+++ b/drivers/crypto/qat/qat_asym.h
@@ -26,6 +26,7 @@ typedef uint64_t large_int_ptr;
 #define QAT_ASYM_MODEXP_NUM_OUT_PARAMS		1
 #define QAT_ASYM_RSA_NUM_IN_PARAMS		3
 #define QAT_ASYM_RSA_NUM_OUT_PARAMS		1
+#define QAT_ASYM_RSA_QT_NUM_IN_PARAMS		6
 
 struct qat_asym_op_cookie {
 	size_t alg_size;
diff --git a/drivers/crypto/qat/qat_asym_pmd.c b/drivers/crypto/qat/qat_asym_pmd.c
index 78fc2d7..c8a52b6 100644
--- a/drivers/crypto/qat/qat_asym_pmd.c
+++ b/drivers/crypto/qat/qat_asym_pmd.c
@@ -272,7 +272,8 @@ qat_asym_dev_create(struct qat_pci_device *qat_pci_dev)
 	cryptodev->feature_flags = RTE_CRYPTODEV_FF_ASYMMETRIC_CRYPTO |
 			RTE_CRYPTODEV_FF_HW_ACCELERATED |
 			RTE_CRYPTODEV_FF_ASYM_SESSIONLESS |
-			RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_EXP;
+			RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_EXP |
+			RTE_CRYPTODEV_FF_RSA_PRIV_OP_KEY_QT;
 	internals = cryptodev->data->dev_private;
 	internals->qat_dev = qat_pci_dev;
 	qat_pci_dev->asym_dev = internals;
-- 
2.1.0


  parent reply	other threads:[~2019-10-11 10:06 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-11 10:03 [dpdk-dev] [PATCH v2 0/5] Add session-less, RSA, RSA-CRT to QAT Arek Kusztal
2019-10-11 10:03 ` [dpdk-dev] [PATCH v2 1/5] crypto/qat: add sessionless implementation to asym pmd Arek Kusztal
2019-10-11 10:03 ` [dpdk-dev] [PATCH v2 2/5] crypto/qat: add rsa " Arek Kusztal
2019-10-11 10:03 ` Arek Kusztal [this message]
2019-10-11 10:03 ` [dpdk-dev] [PATCH v2 4/5] test/crypto: add sessionless to asymmetric mod exp Arek Kusztal
2019-10-11 10:03 ` [dpdk-dev] [PATCH v2 5/5] test/crypto: add rsa tests to qat Arek Kusztal
2019-10-15 10:22 ` [dpdk-dev] [PATCH v2 0/5] Add session-less, RSA, RSA-CRT to QAT Akhil Goyal
2019-10-17  9:27   ` Trahe, Fiona
2019-10-21 10:47     ` Trahe, Fiona

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20191011100339.12912-4-arkadiuszx.kusztal@intel.com \
    --to=arkadiuszx.kusztal@intel.com \
    --cc=akhil.goyal@nxp.com \
    --cc=dev@dpdk.org \
    --cc=fiona.trahe@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).