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From: <kirankumark@marvell.com>
To: Adrien Mazarguil <adrien.mazarguil@6wind.com>,
	Wenzhuo Lu <wenzhuo.lu@intel.com>,
	Jingjing Wu <jingjing.wu@intel.com>,
	"Bernard Iremonger" <bernard.iremonger@intel.com>,
	John McNamara <john.mcnamara@intel.com>,
	Marko Kovacevic <marko.kovacevic@intel.com>,
	Thomas Monjalon <thomas@monjalon.net>,
	Ferruh Yigit <ferruh.yigit@intel.com>,
	Andrew Rybchenko <arybchenko@solarflare.com>,
	Olivier Matz <olivier.matz@6wind.com>
Cc: <dev@dpdk.org>, <ajit.khaparde@broadcom.com>,
	Kiran Kumar K <kirankumark@marvell.com>
Subject: [dpdk-dev]  [PATCH] ethdev: add HIGIG2 key field to flow API
Date: Tue, 15 Oct 2019 11:50:48 +0530	[thread overview]
Message-ID: <20191015062048.22095-1-kirankumark@marvell.com> (raw)
In-Reply-To: <20191014042956.18616-1-kirankumark@marvell.com>

From: Kiran Kumar K <kirankumark@marvell.com>

Add new rte_flow_item_higig2_hdr in order to match higig2 header.
It is a layer 2.5 protocol and used in broadcom switches.
Header format is based on the following document.
http://read.pudn.com/downloads558/doc/comm/2301468/HiGig_protocol.pdf

Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
---

V2 Changes:
* Added support in testpmd to parse the higig2 item
* Moved the higig2 header to new file
* Added indentation in doc

 app/test-pmd/cmdline_flow.c        |  33 +++++++
 doc/guides/prog_guide/rte_flow.rst |   8 ++
 lib/librte_ethdev/rte_flow.c       |   1 +
 lib/librte_ethdev/rte_flow.h       |   7 ++
 lib/librte_net/Makefile            |   2 +-
 lib/librte_net/rte_higig.h         | 138 +++++++++++++++++++++++++++++
 6 files changed, 188 insertions(+), 1 deletion(-)
 create mode 100644 lib/librte_net/rte_higig.h

diff --git a/app/test-pmd/cmdline_flow.c b/app/test-pmd/cmdline_flow.c
index b26b8bfe2..8d6c354fa 100644
--- a/app/test-pmd/cmdline_flow.c
+++ b/app/test-pmd/cmdline_flow.c
@@ -203,6 +203,9 @@ enum index {
 	ITEM_PPPOED,
 	ITEM_PPPOE_SEID,
 	ITEM_PPPOE_PROTO_ID,
+	ITEM_HIGIG2,
+	ITEM_HIGIG2_CLASSIFICATION,
+	ITEM_HIGIG2_VID,

 	/* Validate/create actions. */
 	ACTIONS,
@@ -675,6 +678,7 @@ static const enum index next_item[] = {
 	ITEM_PPPOES,
 	ITEM_PPPOED,
 	ITEM_PPPOE_PROTO_ID,
+	ITEM_HIGIG2,
 	END_SET,
 	ZERO,
 };
@@ -939,6 +943,13 @@ static const enum index item_pppoe_proto_id[] = {
 	ZERO,
 };

+static const enum index item_higig2[] = {
+	ITEM_HIGIG2_CLASSIFICATION,
+	ITEM_HIGIG2_VID,
+	ITEM_NEXT,
+	ZERO,
+};
+
 static const enum index next_action[] = {
 	ACTION_END,
 	ACTION_VOID,
@@ -2419,6 +2430,28 @@ static const struct token token_list[] = {
 		.next = NEXT(item_pppoe_proto_id),
 		.call = parse_vc,
 	},
+	[ITEM_HIGIG2] = {
+		.name = "higig2",
+		.help = "matches higig2 header",
+		.priv = PRIV_ITEM(HIGIG2,
+				sizeof(struct rte_flow_item_higig2_hdr)),
+		.next = NEXT(item_higig2),
+		.call = parse_vc,
+	},
+	[ITEM_HIGIG2_CLASSIFICATION] = {
+		.name = "classification",
+		.help = "matches classification of higig2 header",
+		.next = NEXT(item_higig2, NEXT_ENTRY(UNSIGNED), item_param),
+		.args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_higig2_hdr,
+					ppt1.classification)),
+	},
+	[ITEM_HIGIG2_VID] = {
+		.name = "vid",
+		.help = "matches vid of higig2 header",
+		.next = NEXT(item_higig2, NEXT_ENTRY(UNSIGNED), item_param),
+		.args = ARGS(ARGS_ENTRY_HTON(struct rte_flow_item_higig2_hdr,
+					ppt1.vid)),
+	},
 	/* Validate/create actions. */
 	[ACTIONS] = {
 		.name = "actions",
diff --git a/doc/guides/prog_guide/rte_flow.rst b/doc/guides/prog_guide/rte_flow.rst
index 1c837ff13..a47266c67 100644
--- a/doc/guides/prog_guide/rte_flow.rst
+++ b/doc/guides/prog_guide/rte_flow.rst
@@ -1289,6 +1289,14 @@ Matches a IP Authentication Header (RFC 4302).
 - ``seq_num``: counter value increased by 1 on each packet sent.
 - Default ``mask`` matches spi.

+Item: ``HIGIG2``
+^^^^^^^^^^^^^^^^^
+
+Matches a HIGIG2 header field. It is layer 2.5 protocol and used in
+broadcom switches.
+
+- Default ``mask`` matches classification and vlan.
+

 Actions
 ~~~~~~~
diff --git a/lib/librte_ethdev/rte_flow.c b/lib/librte_ethdev/rte_flow.c
index 81a85b995..ca0f68016 100644
--- a/lib/librte_ethdev/rte_flow.c
+++ b/lib/librte_ethdev/rte_flow.c
@@ -83,6 +83,7 @@ static const struct rte_flow_desc_data rte_flow_desc_item[] = {
 	MK_FLOW_ITEM(NSH, sizeof(struct rte_flow_item_nsh)),
 	MK_FLOW_ITEM(IGMP, sizeof(struct rte_flow_item_igmp)),
 	MK_FLOW_ITEM(AH, sizeof(struct rte_flow_item_ah)),
+	MK_FLOW_ITEM(HIGIG2, sizeof(struct rte_flow_item_higig2_hdr)),
 };

 /** Generate flow_action[] entry. */
diff --git a/lib/librte_ethdev/rte_flow.h b/lib/librte_ethdev/rte_flow.h
index bcfc06cdc..79f160df0 100644
--- a/lib/librte_ethdev/rte_flow.h
+++ b/lib/librte_ethdev/rte_flow.h
@@ -27,6 +27,7 @@
 #include <rte_udp.h>
 #include <rte_byteorder.h>
 #include <rte_esp.h>
+#include <rte_higig.h>

 #ifdef __cplusplus
 extern "C" {
@@ -491,6 +492,12 @@ enum rte_flow_item_type {
 	 *
 	 */
 	RTE_FLOW_ITEM_TYPE_AH,
+
+	/**
+	 * Matches a HIGIG header.
+	 * see struct rte_flow_item_higig2_hdr.
+	 */
+	RTE_FLOW_ITEM_TYPE_HIGIG2,
 };

 /**
diff --git a/lib/librte_net/Makefile b/lib/librte_net/Makefile
index 1244c9fd5..62735a5f9 100644
--- a/lib/librte_net/Makefile
+++ b/lib/librte_net/Makefile
@@ -21,6 +21,6 @@ SRCS-$(CONFIG_RTE_LIBRTE_NET) += rte_arp.c
 SYMLINK-$(CONFIG_RTE_LIBRTE_NET)-include := rte_ip.h rte_tcp.h rte_udp.h rte_esp.h
 SYMLINK-$(CONFIG_RTE_LIBRTE_NET)-include += rte_sctp.h rte_icmp.h rte_arp.h
 SYMLINK-$(CONFIG_RTE_LIBRTE_NET)-include += rte_ether.h rte_gre.h rte_net.h
-SYMLINK-$(CONFIG_RTE_LIBRTE_NET)-include += rte_net_crc.h rte_mpls.h
+SYMLINK-$(CONFIG_RTE_LIBRTE_NET)-include += rte_net_crc.h rte_mpls.h rte_higig.h

 include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/lib/librte_net/rte_higig.h b/lib/librte_net/rte_higig.h
new file mode 100644
index 000000000..121c0a850
--- /dev/null
+++ b/lib/librte_net/rte_higig.h
@@ -0,0 +1,138 @@
+
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2016 6WIND S.A.
+ */
+
+#ifndef _RTE_HIGIG2_H_
+#define _RTE_HIGIG2_H_
+
+#include <stdint.h>
+#include <rte_byteorder.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * RTE_FLOW_ITEM_TYPE_HIGIG2
+ * Matches higig2 header.
+ */
+struct rte_higig2_frc {
+#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
+	uint32_t ksop:8;
+	uint32_t tc:4;
+	uint32_t mcst:1;
+	uint32_t resv:3;
+	uint32_t dst_modid:8;
+	uint32_t dst_pid:8;
+	uint32_t src_modid:8;
+	uint32_t src_pid:8;
+	uint32_t lbid:8;
+	uint32_t ppd_type:3;
+	uint32_t resv1:3;
+	uint32_t dp:2;
+#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
+	uint32_t ksop:8;
+	uint32_t resv:3;
+	uint32_t mcst:1;
+	uint32_t tc:4;
+	uint32_t dst_modid:8;
+	uint32_t dst_pid:8;
+	uint32_t src_modid:8;
+	uint32_t src_pid:8;
+	uint32_t lbid:8;
+	uint32_t dp:2;
+	uint32_t resv1:3;
+	uint32_t ppd_type:3;
+#endif
+} __attribute__((packed));
+
+struct rte_higig2_ppt_type0 {
+#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
+	uint32_t mirror:1;
+	uint32_t mirror_done:1;
+	uint32_t mirror_only:1;
+	uint32_t ingress_tagged:1;
+	uint32_t dst_tgid:3;
+	uint32_t dst_t:1;
+	uint32_t vc_label2:4;
+	uint32_t label_present:1;
+	uint32_t l3:1;
+	uint32_t res:2;
+	uint32_t vc_label1:8;
+	uint32_t vc_label0:8;
+	uint32_t vid_high:8;
+	uint32_t vid_low:8;
+	uint32_t opcode:3;
+	uint32_t res1:2;
+	uint32_t src_t:1;
+	uint32_t pfm:2;
+	uint32_t res2:5;
+	uint32_t hdr_ext_len:3;
+#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
+	uint32_t dst_t:1;
+	uint32_t dst_tgid:3;
+	uint32_t ingress_tagged:1;
+	uint32_t mirror_only:1;
+	uint32_t mirror_done:1;
+	uint32_t mirror:1;
+	uint32_t res:2;
+	uint32_t l3:1;
+	uint32_t label_present:1;
+	uint32_t vc_label2:4;
+	uint32_t vc_label1:8;
+	uint32_t vc_label0:8;
+	uint32_t vid_high:8;
+	uint32_t vid_low:8;
+	uint32_t pfm:2;
+	uint32_t src_t:1;
+	uint32_t res1:2;
+	uint32_t opcode:3;
+	uint32_t hdr_ext_len:3;
+	uint32_t res2:5;
+#endif
+} __attribute__((packed));
+
+struct rte_higig2_ppt_type1 {
+	uint16_t classification;
+	uint16_t resv;
+	uint16_t vid;
+#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
+	uint16_t opcode:3;
+	uint16_t resv1:2;
+	uint16_t src_t:1;
+	uint16_t pfm:2;
+	uint16_t resv2:5;
+	uint16_t hdr_ext_len:3;
+#elif RTE_BYTE_ORDER == RTE_BIG_ENDIAN
+	uint16_t pfm:2;
+	uint16_t src_t:1;
+	uint16_t resv1:2;
+	uint16_t opcode:3;
+	uint16_t hdr_ext_len:3;
+	uint16_t resv2:5;
+#endif
+} __attribute__((packed));
+
+RTE_STD_C11
+struct rte_flow_item_higig2_hdr {
+	struct rte_higig2_frc fcr;
+	union {
+		struct rte_higig2_ppt_type0 ppt0;
+		struct rte_higig2_ppt_type1 ppt1;
+	};
+} __attribute__((packed));
+
+/** Default mask for RTE_FLOW_ITEM_TYPE_HIGIG2. */
+#ifndef __cplusplus
+static const struct rte_flow_item_higig2_hdr rte_flow_item_higig2_hdr_mask = {
+	.ppt1.classification = 0xffff,
+	.ppt1.vid = 0xfff,
+};
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* RTE_HIGIG2_H_ */
--
2.17.1


  parent reply	other threads:[~2019-10-15  6:21 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-14  4:29 kirankumark
2019-10-14  7:08 ` Andrew Rybchenko
2019-10-15  4:23   ` [dpdk-dev] [EXT] " Kiran Kumar Kokkilagadda
2019-10-15  6:20 ` kirankumark [this message]
2019-10-15  6:27   ` [dpdk-dev] " Jerin Jacob
2019-10-15  6:57     ` [dpdk-dev] [EXT] " Kiran Kumar Kokkilagadda
2019-10-15  8:22     ` [dpdk-dev] " Ananyev, Konstantin
2019-10-15  8:32   ` [dpdk-dev] [PATCH v3] " kirankumark
2019-10-17  4:15     ` [dpdk-dev] [PATCH v4] " kirankumark
2019-10-17  9:08       ` Andrew Rybchenko
2019-10-18  4:13       ` [dpdk-dev] [PATCH v5] " kirankumark
2019-10-18  7:36         ` Andrew Rybchenko
2019-10-18 17:36         ` Ferruh Yigit
2019-10-19  4:51           ` [dpdk-dev] [EXT] " Kiran Kumar Kokkilagadda
2019-10-19  4:56         ` [dpdk-dev] [PATCH v6] " kirankumark
2019-10-19  9:47           ` Jerin Jacob
2019-10-20  4:52           ` [dpdk-dev] [PATCH v7] " kirankumark
2019-10-20 13:56             ` Jerin Jacob
2019-10-21  3:52             ` [dpdk-dev] [PATCH v8] " kirankumark
2019-10-21  9:16               ` [dpdk-dev] [PATCH v9] " kirankumark
2019-10-21 16:48                 ` Olivier Matz
2019-10-22  4:16                 ` [dpdk-dev] [PATCH v10] " kirankumark
2019-10-22  9:19                   ` Ferruh Yigit
2019-10-23 10:50                     ` Raslan Darawsheh
2019-10-23 11:39                       ` Olivier Matz
2019-10-23 11:43                         ` [dpdk-dev] [EXT] " Kiran Kumar Kokkilagadda
2019-10-23 14:04                           ` Olivier Matz
2019-10-23 14:14                             ` Ferruh Yigit
2019-10-23 22:04                   ` [dpdk-dev] " Thomas Monjalon
2019-10-15 16:47 ` [dpdk-dev] [PATCH] " Stephen Hemminger
2019-10-16  3:14   ` [dpdk-dev] [EXT] " Kiran Kumar Kokkilagadda

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