From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <dev-bounces@dpdk.org>
Received: from dpdk.org (dpdk.org [92.243.14.124])
	by inbox.dpdk.org (Postfix) with ESMTP id D8906A00BE;
	Tue, 29 Oct 2019 15:14:30 +0100 (CET)
Received: from [92.243.14.124] (localhost [127.0.0.1])
	by dpdk.org (Postfix) with ESMTP id 509CA1BF9B;
	Tue, 29 Oct 2019 15:12:56 +0100 (CET)
Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com
 [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id C04641BF52
 for <dev@dpdk.org>; Tue, 29 Oct 2019 15:12:42 +0100 (CET)
Received: from pps.filterd (m0045851.ppops.net [127.0.0.1])
 by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id
 x9TDxsc4015970; Tue, 29 Oct 2019 07:12:42 -0700
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;
 h=from : to : cc :
 subject : date : message-id : in-reply-to : references : mime-version :
 content-type : content-transfer-encoding; s=pfpt0818;
 bh=2hXUR5T8rVrq832LQOtqGEb/zCGdTKkniqomGqQYu1I=;
 b=q9wLFJM7rt01hN+vfyCBjk87sI/eDac7YhgY6WG5v6Cb50utMSYv1nIi9nkv3BJ5Otzy
 wnqBJqAQoLFbd7j/EIFS8jchYoWq01uyf+CiwOpXttXJzHSSefKkNZxiIJ+tBtEVjZiS
 zfKG9TnlaBbnyGA3iJwRKVmZW1Yq25e8FQ9J3C/Xj3tFlhU/cky3dRK4ARiEJJnr7eYG
 i0g3af7sfURMc9Uy6kDdSu81HK+jQpgzrJfA6aluS13FtW2mqAOg+H7cp0yokHTbEaK1
 tiPl6z6F0cwcP31ESVN0trBygh+2pdxin3uu99qcfizlf7mbiO2SiPICI7LXINvygVIu pA== 
Received: from sc-exch02.marvell.com ([199.233.58.182])
 by mx0b-0016f401.pphosted.com with ESMTP id 2vvnnp1p4c-1
 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);
 Tue, 29 Oct 2019 07:12:42 -0700
Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH02.marvell.com
 (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Tue, 29 Oct
 2019 07:12:40 -0700
Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com
 (10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend
 Transport; Tue, 29 Oct 2019 07:12:40 -0700
Received: from amok.marvell.com (unknown [10.95.130.126])
 by maili.marvell.com (Postfix) with ESMTP id 0B4793F7043;
 Tue, 29 Oct 2019 07:12:38 -0700 (PDT)
From: Andrzej Ostruszka <aostruszka@marvell.com>
To: <dev@dpdk.org>, Rasesh Mody <rmody@marvell.com>, Shahed Shaikh
 <shshaikh@marvell.com>
CC: <mattias.ronnblom@ericsson.com>, <stephen@networkplumber.org>
Date: Tue, 29 Oct 2019 15:12:12 +0100
Message-ID: <20191029141212.4907-13-aostruszka@marvell.com>
X-Mailer: git-send-email 2.17.1
In-Reply-To: <20191029141212.4907-1-aostruszka@marvell.com>
References: <20191028142145.3758-1-aostruszka@marvell.com>
 <20191029141212.4907-1-aostruszka@marvell.com>
MIME-Version: 1.0
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: 8bit
X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8
 definitions=2019-10-29_04:2019-10-28,2019-10-29 signatures=0
Subject: [dpdk-dev] [PATCH v6 12/12] net/qede: clean LTO build warnings
	(maybe-uninitialized)
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.15
Precedence: list
List-Id: DPDK patches and discussions <dev.dpdk.org>
List-Unsubscribe: <https://mails.dpdk.org/options/dev>,
 <mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://mails.dpdk.org/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <https://mails.dpdk.org/listinfo/dev>,
 <mailto:dev-request@dpdk.org?subject=subscribe>
Errors-To: dev-bounces@dpdk.org
Sender: "dev" <dev-bounces@dpdk.org>

During LTO build compiler reports some 'false positive' warnings about
variables being possibly used uninitialized.  This patch silences these
warnings.

Exemplary compiler warning to suppress (with LTO enabled):
error: ‘transceiver_type’ may be used uninitialized in this function
[-Werror=maybe-uninitialized]
  switch (transceiver_type) {

Signed-off-by: Andrzej Ostruszka <aostruszka@marvell.com>
---
 drivers/net/qede/base/ecore_mcp.c | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/net/qede/base/ecore_mcp.c b/drivers/net/qede/base/ecore_mcp.c
index a5aa07438..7518765a0 100644
--- a/drivers/net/qede/base/ecore_mcp.c
+++ b/drivers/net/qede/base/ecore_mcp.c
@@ -2328,7 +2328,7 @@ enum _ecore_status_t ecore_mcp_trans_speed_mask(struct ecore_hwfn *p_hwfn,
 						struct ecore_ptt *p_ptt,
 						u32 *p_speed_mask)
 {
-	u32 transceiver_type, transceiver_state;
+	u32 transceiver_type = ETH_TRANSCEIVER_TYPE_NONE, transceiver_state;
 
 	ecore_mcp_get_transceiver_data(p_hwfn, p_ptt, &transceiver_state,
 				       &transceiver_type);
@@ -3223,7 +3223,8 @@ enum _ecore_status_t ecore_mcp_nvm_put_file_begin(struct ecore_dev *p_dev,
 enum _ecore_status_t ecore_mcp_nvm_write(struct ecore_dev *p_dev, u32 cmd,
 					 u32 addr, u8 *p_buf, u32 len)
 {
-	u32 buf_idx, buf_size, nvm_cmd, nvm_offset, resp, param;
+	u32 buf_idx, buf_size, nvm_cmd, nvm_offset;
+	u32 resp = FW_MSG_CODE_ERROR, param;
 	struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(p_dev);
 	enum _ecore_status_t rc = ECORE_INVAL;
 	struct ecore_ptt *p_ptt;
@@ -3322,7 +3323,7 @@ enum _ecore_status_t ecore_mcp_nvm_set_secure_mode(struct ecore_dev *p_dev,
 {
 	struct ecore_hwfn *p_hwfn = ECORE_LEADING_HWFN(p_dev);
 	struct ecore_ptt *p_ptt;
-	u32 resp, param;
+	u32 resp = 0, param;
 	enum _ecore_status_t rc;
 
 	p_ptt = ecore_ptt_acquire(p_hwfn);
@@ -3430,7 +3431,7 @@ enum _ecore_status_t ecore_mcp_gpio_read(struct ecore_hwfn *p_hwfn,
 					 u16 gpio, u32 *gpio_val)
 {
 	enum _ecore_status_t rc = ECORE_SUCCESS;
-	u32 drv_mb_param = 0, rsp;
+	u32 drv_mb_param = 0, rsp = 0;
 
 	drv_mb_param = (gpio << DRV_MB_PARAM_GPIO_NUMBER_OFFSET);
 
@@ -3451,7 +3452,7 @@ enum _ecore_status_t ecore_mcp_gpio_write(struct ecore_hwfn *p_hwfn,
 					  u16 gpio, u16 gpio_val)
 {
 	enum _ecore_status_t rc = ECORE_SUCCESS;
-	u32 drv_mb_param = 0, param, rsp;
+	u32 drv_mb_param = 0, param, rsp = 0;
 
 	drv_mb_param = (gpio << DRV_MB_PARAM_GPIO_NUMBER_OFFSET) |
 		(gpio_val << DRV_MB_PARAM_GPIO_VALUE_OFFSET);
@@ -3541,7 +3542,7 @@ enum _ecore_status_t ecore_mcp_bist_clock_test(struct ecore_hwfn *p_hwfn,
 enum _ecore_status_t ecore_mcp_bist_nvm_test_get_num_images(
 	struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt, u32 *num_images)
 {
-	u32 drv_mb_param = 0, rsp;
+	u32 drv_mb_param = 0, rsp = 0;
 	enum _ecore_status_t rc = ECORE_SUCCESS;
 
 	drv_mb_param = (DRV_MB_PARAM_BIST_NVM_TEST_NUM_IMAGES <<
@@ -3925,7 +3926,7 @@ enum _ecore_status_t
 __ecore_mcp_resc_lock(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
 		      struct ecore_resc_lock_params *p_params)
 {
-	u32 param = 0, mcp_resp, mcp_param;
+	u32 param = 0, mcp_resp = 0, mcp_param = 0;
 	u8 opcode;
 	enum _ecore_status_t rc;
 
-- 
2.17.1