From: Leyi Rong <leyi.rong@intel.com>
To: wenzhuo.lu@intel.com, qi.z.zhang@intel.com, xiaolong.ye@intel.com
Cc: dev@dpdk.org, Leyi Rong <leyi.rong@intel.com>
Subject: [dpdk-dev] [PATCH v2] net/iavf: set CMD bit2 to 1 in Tx Desc of AVX Tx path
Date: Tue, 12 Nov 2019 10:42:06 +0800 [thread overview]
Message-ID: <20191112024206.5563-1-leyi.rong@intel.com> (raw)
In-Reply-To: <20191107052144.78380-1-leyi.rong@intel.com>
Fix iavf vf_checksum_sw case fail in X710/XXV710, set bit2 to 1
of CMD field in Tx descriptor of AVX Tx path according to Spec.
Fixes: af0c246a3800 ("net/iavf: enable AVX2 for iavf")
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
---
v2:
- Use IAVF_TX_DESC_CMD_ICRC instead of 0x04.
---
drivers/net/iavf/iavf_rxtx_vec_avx2.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/net/iavf/iavf_rxtx_vec_avx2.c b/drivers/net/iavf/iavf_rxtx_vec_avx2.c
index f0c00be56..a5133d8d8 100644
--- a/drivers/net/iavf/iavf_rxtx_vec_avx2.c
+++ b/drivers/net/iavf/iavf_rxtx_vec_avx2.c
@@ -785,8 +785,9 @@ iavf_xmit_fixed_burst_vec_avx2(void *tx_queue, struct rte_mbuf **tx_pkts,
volatile struct iavf_tx_desc *txdp;
struct iavf_tx_entry *txep;
uint16_t n, nb_commit, tx_id;
- uint64_t flags = IAVF_TX_DESC_CMD_EOP;
- uint64_t rs = IAVF_TX_DESC_CMD_RS | IAVF_TX_DESC_CMD_EOP;
+ /* bit2 is reserved and must be set to 1 according to Spec */
+ uint64_t flags = IAVF_TX_DESC_CMD_EOP | IAVF_TX_DESC_CMD_ICRC;
+ uint64_t rs = IAVF_TX_DESC_CMD_RS | flags;
/* cross rx_thresh boundary is not allowed */
nb_pkts = RTE_MIN(nb_pkts, txq->rs_thresh);
--
2.17.1
next prev parent reply other threads:[~2019-11-12 2:47 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-07 5:21 [dpdk-dev] [PATCH] " Leyi Rong
2019-11-12 1:55 ` Zhang, Qi Z
2019-11-12 2:42 ` Leyi Rong [this message]
2019-11-12 3:00 ` [dpdk-dev] [PATCH v2] " Zhang, Qi Z
2019-11-13 2:28 ` Ye Xiaolong
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