From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 10E4BA04B5; Mon, 2 Dec 2019 09:05:40 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E75F71C0CA; Mon, 2 Dec 2019 08:59:10 +0100 (CET) Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 3552B1BF97 for ; Mon, 2 Dec 2019 08:59:02 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 01 Dec 2019 23:59:01 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,268,1571727600"; d="scan'208";a="207993643" Received: from dpdk_yexl_af_xdp.sh.intel.com ([10.67.119.186]) by fmsmga008.fm.intel.com with ESMTP; 01 Dec 2019 23:59:00 -0800 From: Xiaolong Ye To: Beilei Xing , Qi Zhang Cc: dev@dpdk.org, Xiaolong Ye , Jacek Naczyk Date: Mon, 2 Dec 2019 15:49:17 +0800 Message-Id: <20191202074935.97629-52-xiaolong.ye@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191202074935.97629-1-xiaolong.ye@intel.com> References: <20191202074935.97629-1-xiaolong.ye@intel.com> Subject: [dpdk-dev] [PATCH 51/69] net/i40e/base: add MRR field defines X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add defines for Minimum Rollback Revision fields as defined in FVL DCR 378 Signed-off-by: Jacek Naczyk Reviewed-by: Aleksandr Loktionov Reviewed-by: Azarewicz Piotr Reviewed-by: Michael Alice Signed-off-by: Xiaolong Ye --- drivers/net/i40e/base/i40e_type.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/net/i40e/base/i40e_type.h b/drivers/net/i40e/base/i40e_type.h index 9b481ef5b..e75301534 100644 --- a/drivers/net/i40e/base/i40e_type.h +++ b/drivers/net/i40e/base/i40e_type.h @@ -2049,5 +2049,15 @@ struct i40e_profile_info { #define I40E_BCM_PHY_PCS_STATUS1_RX_LPI BIT(8) #define I40E_BCM_PHY_PCS_STATUS1_TX_LPI BIT(9) #endif +#if defined(PREBOOT_SUPPORT) || defined(I40E_QV) +#define I40E_SR_MINRREV_PCIE_ANALOG_LO 0x60 +#define I40E_SR_MINRREV_PCIE_ANALOG_HI 0x61 +#define I40E_SR_MINRREV_PHY_ANALOG_LO 0x62 +#define I40E_SR_MINRREV_PHY_ANALOG_HI 0x63 +#define I40E_SR_MINRREV_OPTION_ROM_LO 0x64 +#define I40E_SR_MINRREV_OPTION_ROM_HI 0x65 +#define I40E_SR_MINRREV_EMP_IMAGE_LO 0x66 +#define I40E_SR_MINRREV_EMP_IMAGE_HI 0x67 +#endif /* PREBOOT_SUPPORT || I40E_QV */ #endif /* _I40E_TYPE_H_ */ -- 2.17.1