From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id BEA23A04F3; Thu, 19 Dec 2019 14:42:01 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 766D61BDFD; Thu, 19 Dec 2019 14:42:00 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id B98FA1BC25; Thu, 19 Dec 2019 14:41:58 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id xBJDeDI4016227; Thu, 19 Dec 2019 05:41:55 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=WDxYx+OFn9Gp4+OYbBHzs28t8rcOh9xPkYNxe3BeDy4=; b=C7nNRhiZKYoeWkKKihY8l2YEPqFogaJ6hYOiu0VX7PuwSASXzR9hPA+oeeYeWDe/Fnj2 UPFZV9fkSgTgI84/AVCgT2jX6XmUdI5iOt2/bCM4x6Z4ZeIEL5z0AHOwhGadcGC0NJmG hHhcWePalJg44BEnJoXey4haKv0utWU5MdXi6KvCYCYhbjI7D9bsWuhM/tcz1DFGeJN3 EWT1M5b9h0CqDaQXcz0OfI0DDTO32Ao5jJwR8Ja2jN0syrqhS2HL9O6jK2VKoxaE9tB1 6sVyorZxPAvEq7GBz/5bPVzHSCgfOc+PWsEaiJ3crSHeGM6zck5y4LpSAqK+XpHdqmMN bQ== Received: from sc-exch03.marvell.com ([199.233.58.183]) by mx0b-0016f401.pphosted.com with ESMTP id 2wxn0wu4ec-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 19 Dec 2019 05:41:55 -0800 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 19 Dec 2019 05:41:52 -0800 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 19 Dec 2019 05:41:53 -0800 Received: from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14]) by maili.marvell.com (Postfix) with ESMTP id A07A23F703F; Thu, 19 Dec 2019 05:41:49 -0800 (PST) From: To: CC: , , , , , , , , , , , , Jerin Jacob , Date: Thu, 19 Dec 2019 19:12:27 +0530 Message-ID: <20191219134227.3841799-1-jerinj@marvell.com> X-Mailer: git-send-email 2.24.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,18.0.572 definitions=2019-12-19_01:2019-12-17,2019-12-19 signatures=0 Subject: [dpdk-dev] [PATCH] mempool: fix mempool obj alignment for non x86 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Jerin Jacob The exiting optimize_object_size() function address the memory object alignment constraint on x86 for better performance. Different (Mirco) architecture may have different memory alignment constraint for better performance and it not same as the existing optimize_object_size() function. Some use, XOR(kind of CRC) scheme to enable DRAM channel distribution based on the address and some may have a different formula. Introducing arch_mem_object_align() function to abstract the differences in different (mirco) architectures and avoid wasting memory for mempool object alignment for the architecture the existing optimize_object_size() is not valid. Additional details: https://www.mail-archive.com/dev@dpdk.org/msg149157.html Fixes: af75078fece3 ("first public release") Cc: stable@dpdk.org Signed-off-by: Jerin Jacob --- doc/guides/prog_guide/mempool_lib.rst | 6 +++--- lib/librte_mempool/rte_mempool.c | 17 +++++++++++++---- 2 files changed, 16 insertions(+), 7 deletions(-) diff --git a/doc/guides/prog_guide/mempool_lib.rst b/doc/guides/prog_guide/mempool_lib.rst index 3bb84b0a6..eea7a2906 100644 --- a/doc/guides/prog_guide/mempool_lib.rst +++ b/doc/guides/prog_guide/mempool_lib.rst @@ -27,10 +27,10 @@ In debug mode (CONFIG_RTE_LIBRTE_MEMPOOL_DEBUG is enabled), statistics about get from/put in the pool are stored in the mempool structure. Statistics are per-lcore to avoid concurrent access to statistics counters. -Memory Alignment Constraints ----------------------------- +Memory Alignment Constraints on X86 architecture +------------------------------------------------ -Depending on hardware memory configuration, performance can be greatly improved by adding a specific padding between objects. +Depending on hardware memory configuration on X86 architecture, performance can be greatly improved by adding a specific padding between objects. The objective is to ensure that the beginning of each object starts on a different channel and rank in memory so that all channels are equally loaded. This is particularly true for packet buffers when doing L3 forwarding or flow classification. diff --git a/lib/librte_mempool/rte_mempool.c b/lib/librte_mempool/rte_mempool.c index 78d8eb941..871894525 100644 --- a/lib/librte_mempool/rte_mempool.c +++ b/lib/librte_mempool/rte_mempool.c @@ -45,6 +45,7 @@ EAL_REGISTER_TAILQ(rte_mempool_tailq) #define CALC_CACHE_FLUSHTHRESH(c) \ ((typeof(c))((c) * CACHE_FLUSHTHRESH_MULTIPLIER)) +#if defined(RTE_ARCH_X86) /* * return the greatest common divisor between a and b (fast algorithm) * @@ -74,12 +75,13 @@ static unsigned get_gcd(unsigned a, unsigned b) } /* - * Depending on memory configuration, objects addresses are spread + * Depending on memory configuration on x86 arch, objects addresses are spread * between channels and ranks in RAM: the pool allocator will add * padding between objects. This function return the new size of the * object. */ -static unsigned optimize_object_size(unsigned obj_size) +static unsigned +arch_mem_object_align(unsigned obj_size) { unsigned nrank, nchan; unsigned new_obj_size; @@ -99,6 +101,13 @@ static unsigned optimize_object_size(unsigned obj_size) new_obj_size++; return new_obj_size * RTE_MEMPOOL_ALIGN; } +#else +static unsigned +arch_mem_object_align(unsigned obj_size) +{ + return obj_size; +} +#endif struct pagesz_walk_arg { int socket_id; @@ -234,8 +243,8 @@ rte_mempool_calc_obj_size(uint32_t elt_size, uint32_t flags, */ if ((flags & MEMPOOL_F_NO_SPREAD) == 0) { unsigned new_size; - new_size = optimize_object_size(sz->header_size + sz->elt_size + - sz->trailer_size); + new_size = arch_mem_object_align + (sz->header_size + sz->elt_size + sz->trailer_size); sz->trailer_size = new_size - sz->header_size - sz->elt_size; } -- 2.24.1