From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 24D5FA0556; Thu, 20 Feb 2020 12:04:45 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 013A437B0; Thu, 20 Feb 2020 12:04:45 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 1986A3B5 for ; Thu, 20 Feb 2020 12:04:42 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 01KB05Gt032091; Thu, 20 Feb 2020 03:04:42 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=pfpt0818; bh=ENVrcm4nrFdB7+CDZvNsUVwlD7D2FpALTp8/iZK/N88=; b=mqSPbx/lTKvxsp8lCAnqH6C3C0Fr3he4Hgc6ZCKY3zTSRPYJYW7iKOmOyday5wniq7w1 q3TMKf+t6OxAW1rsNJzfdcN95Hab5qWPolNaBN9MDyEBGOKNiAOD0GTTV8pJVUMBfUds 0f2FnYECMjpCtZf5c0a3H7YTmeWRotm5UEvYRysGOLp5sB1WUDsIdLWDslsKTSiVlAIt zH1/DQAAYFCZVzYWty0aw150+Hsjy69TGAT7oMT6T2YVIp0Mct1+F8wakyT0PjRiC4Ru ALgEKni5GL+J2JTTuGy9dJh8MAbL862lrbuxu5elOhCxLI8SrAUVuBA6mYatnUx3v8C3 Xw== Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0b-0016f401.pphosted.com with ESMTP id 2y8ubv72w1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 20 Feb 2020 03:04:42 -0800 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 20 Feb 2020 03:04:39 -0800 Received: from hyd1399.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 20 Feb 2020 03:04:38 -0800 From: Nagadheeraj Rottela To: CC: , , Nagadheeraj Rottela Date: Thu, 20 Feb 2020 16:34:31 +0530 Message-ID: <20200220110431.30074-1-rnagadheeraj@marvell.com> X-Mailer: git-send-email 2.13.6 MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572 definitions=2020-02-20_03:2020-02-19, 2020-02-20 signatures=0 Subject: [dpdk-dev] [PATCH] crypto/nitrox: fix coverity defects X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Address the defects reported by coverity: Unintended sign extension and Out-of-bounds access. Coverity issue: 349899, 349905, 349911, 349921, 349923, 349926 Fixes: 32e4930d5a3b ("crypto/nitrox: add hardware queue management") Fixes: 9fdef0cc2385 ("crypto/nitrox: create symmetric cryptodev") Signed-off-by: Nagadheeraj Rottela --- drivers/crypto/nitrox/nitrox_csr.h | 18 +++++++++--------- drivers/crypto/nitrox/nitrox_sym.c | 3 ++- 2 files changed, 11 insertions(+), 10 deletions(-) diff --git a/drivers/crypto/nitrox/nitrox_csr.h b/drivers/crypto/nitrox/nitrox_csr.h index 8cd92e38b..b4c969b26 100644 --- a/drivers/crypto/nitrox/nitrox_csr.h +++ b/drivers/crypto/nitrox/nitrox_csr.h @@ -12,15 +12,15 @@ #define NITROX_CSR_ADDR(bar_addr, offset) (bar_addr + (offset)) /* NPS packet registers */ -#define NPS_PKT_IN_INSTR_CTLX(_i) (0x10060 + ((_i) * 0x40000)) -#define NPS_PKT_IN_INSTR_BADDRX(_i) (0x10068 + ((_i) * 0x40000)) -#define NPS_PKT_IN_INSTR_RSIZEX(_i) (0x10070 + ((_i) * 0x40000)) -#define NPS_PKT_IN_DONE_CNTSX(_i) (0x10080 + ((_i) * 0x40000)) -#define NPS_PKT_IN_INSTR_BAOFF_DBELLX(_i) (0x10078 + ((_i) * 0x40000)) -#define NPS_PKT_IN_INT_LEVELSX(_i) (0x10088 + ((_i) * 0x40000)) -#define NPS_PKT_SLC_CTLX(_i) (0x10000 + ((_i) * 0x40000)) -#define NPS_PKT_SLC_CNTSX(_i) (0x10008 + ((_i) * 0x40000)) -#define NPS_PKT_SLC_INT_LEVELSX(_i) (0x10010 + ((_i) * 0x40000)) +#define NPS_PKT_IN_INSTR_CTLX(_i) (0x10060UL + ((_i) * 0x40000UL)) +#define NPS_PKT_IN_INSTR_BADDRX(_i) (0x10068UL + ((_i) * 0x40000UL)) +#define NPS_PKT_IN_INSTR_RSIZEX(_i) (0x10070UL + ((_i) * 0x40000UL)) +#define NPS_PKT_IN_DONE_CNTSX(_i) (0x10080UL + ((_i) * 0x40000UL)) +#define NPS_PKT_IN_INSTR_BAOFF_DBELLX(_i) (0x10078UL + ((_i) * 0x40000UL)) +#define NPS_PKT_IN_INT_LEVELSX(_i) (0x10088UL + ((_i) * 0x40000UL)) +#define NPS_PKT_SLC_CTLX(_i) (0x10000UL + ((_i) * 0x40000UL)) +#define NPS_PKT_SLC_CNTSX(_i) (0x10008UL + ((_i) * 0x40000UL)) +#define NPS_PKT_SLC_INT_LEVELSX(_i) (0x10010UL + ((_i) * 0x40000UL)) /* AQM Virtual Function Registers */ #define AQMQ_QSZX(_i) (0x20008 + ((_i)*0x40000)) diff --git a/drivers/crypto/nitrox/nitrox_sym.c b/drivers/crypto/nitrox/nitrox_sym.c index 56410c44d..d1b32fec9 100644 --- a/drivers/crypto/nitrox/nitrox_sym.c +++ b/drivers/crypto/nitrox/nitrox_sym.c @@ -683,7 +683,8 @@ nitrox_sym_pmd_create(struct nitrox_device *ndev) struct rte_cryptodev *cdev; rte_pci_device_name(&ndev->pdev->addr, name, sizeof(name)); - snprintf(name + strlen(name), RTE_CRYPTODEV_NAME_MAX_LEN, "_n5sym"); + snprintf(name + strlen(name), RTE_CRYPTODEV_NAME_MAX_LEN - strlen(name), + "_n5sym"); ndev->rte_sym_dev.driver = &nitrox_rte_sym_drv; ndev->rte_sym_dev.numa_node = ndev->pdev->device.numa_node; ndev->rte_sym_dev.devargs = NULL; -- 2.13.6