From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id CEC17A057B; Mon, 30 Mar 2020 13:43:31 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5F6AA1C0C6; Mon, 30 Mar 2020 13:42:30 +0200 (CEST) Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by dpdk.org (Postfix) with ESMTP id DC7401C0B9 for ; Mon, 30 Mar 2020 13:42:26 +0200 (CEST) IronPort-SDR: BMDxTaRbtnKptAm8bjpAwWMSTFiYopzDKh6+kjPkqUlCld6iWir3I3YQsl1/EAj9dDUhYbwKRn fRI8WkWHsVHg== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Mar 2020 04:42:26 -0700 IronPort-SDR: ZVhRHT6cEUk17BtlHEpLj83O4t6lUmuFa9DOl6TPrGLqi3IoMR9A9/FB97+vHh50QgLS7v00LU avjZJvcS4lvw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,324,1580803200"; d="scan'208";a="449769884" Received: from dpdk51.sh.intel.com ([10.67.110.245]) by fmsmga006.fm.intel.com with ESMTP; 30 Mar 2020 04:42:25 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: xiaolong.ye@intel.com, dev@dpdk.org, Qi Zhang , Paul M Stillwell Jr Date: Mon, 30 Mar 2020 19:45:31 +0800 Message-Id: <20200330114538.43275-10-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200330114538.43275-1-qi.z.zhang@intel.com> References: <20200330114538.43275-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH 09/16] net/ice/base: improve GTPU extend header handle X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" A GTPU header can stack with a extend header or not, while current implementation does not allow HDR bit sets like below: ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_GTPU_EH ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_GTPU_UP ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_GTPU_DWN Which is not convenient for upper layer flow parser to generate correct HDR bit. but it could be if we have below assumptions: ICE_FLOW_SEG_HDR_GTPU_DWN -- for GTPU with extend header down link ICE_FLOW_SEG_HDR_GTPU_UP -- for GTPU with extend header up link ICE_FLOW_SEG_HDR_GTPU_EH -- for GTPU with any extend header ICE_FLOW_SEG_HDR_GTPU_IP -- for any GTPU header, but when it combined with any above it downgrade to a dummy one. And handle from specific case to generic case will hit all the cases as expected. if else (hdr & ICE_FLOW_SEG_HDR_GTPU_DWN) { ... } else if (hdr & ICE_FLOW_SEG_HDR_GTPU_UP) { ... } else if (hdr & ICE_FLOW_SEG_HDR_GTPU_EH) { ... } else if (hdr & ICE_FLOW_SEG_HDR_GTPU_IP { ... } Signed-off-by: Qi Zhang Signed-off-by: Paul M Stillwell Jr --- drivers/net/ice/base/ice_flow.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index e523b8f45..466fa83d6 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -656,8 +656,7 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params) /* Attributes for GTP packet with Extension Header */ params->attr = ice_attr_gtpu_eh; params->attr_cnt = ARRAY_SIZE(ice_attr_gtpu_eh); - } else if ((hdrs & ICE_FLOW_SEG_HDR_GTPU) == - ICE_FLOW_SEG_HDR_GTPU) { + } else if (hdrs & ICE_FLOW_SEG_HDR_GTPU_IP) { src = (const ice_bitmap_t *)ice_ptypes_gtpu; ice_and_bitmap(params->ptypes, params->ptypes, src, ICE_FLOW_PTYPE_MAX); -- 2.13.6