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Mon, 8 Jun 2020 16:02:09 +0000 X-Mailer: git-send-email 2.25.1 X-Originating-IP: [176.230.226.145] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 42e65b40-6719-46d0-1708-08d80bc54d1a X-MS-TrafficTypeDiagnostic: DB8PR05MB6777: X-LD-Processed: a652971c-7d2e-4d9b-a6a4-d149256f461b,ExtFwd X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4941; X-Forefront-PRVS: 042857DBB5 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: PUTclE9GcMipk0L4UWYWqYAAEmn1usedCNhK82pt+8zJR60hMSeTxxSRVrzr08p5DHqJHSS4IMCBAtOAzk/XfOMy64726ociLwrOAtNenMrEGUZMkPuTEBLGuC0hNPuQMuo1fBfCI4bzBhF1CzMgbLSKvnAY8w6Ryqc2OdrJ2RabwRft4yu9paOlTq6glugC5Cu87fxySnYeNcELpga4Ukr9KTVVNQMNPIEcSAQ3x+M3m131FZ94D2qJ/qbbFZdUxNE0QQtm1n0mW2dJS+/WHXCB6XFEeySrISuxTAva8rnP0uw2Xx5utddQMtswlZzmmdyz6gQxWMdxvIHihD9Wxw== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DB8PR05MB6761.eurprd05.prod.outlook.com; PTR:; CAT:NONE; SFTY:; SFS:(4636009)(136003)(396003)(346002)(366004)(39860400002)(376002)(83380400001)(2906002)(8936002)(36756003)(5660300002)(316002)(107886003)(4326008)(55016002)(8676002)(26005)(478600001)(86362001)(6666004)(52116002)(7696005)(6916009)(1076003)(956004)(16526019)(186003)(66476007)(66946007)(66556008)(8886007)(2616005); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: K+KvI2UckGJtRKNu6FT8gmqMItOG7c74axhQsMMgJRqz7mr7SP1xeqQMu4OOcWONkGEifHXg4x8UFoin1Rq/UNPDRT1JBS8gKQSueiirFUQD2rqe1HZGUQx6KJhq7r9FFlpXM9KkRah/J6P96WymHFJA4QCfmhTJs+1d56XsDtd402mV9tJQSWwpRcTNVKjuvh5vqNr4xOKnCoI+4XwFk/isMqle8c8Qwsohl6ITUJCFF+GDcXUA2fCnMsTTVW6wI0YCRFAEKLgvzhk9A/U9YIVgmZfFIMpKGQXLtwx4TsYuzXOfzkn2m6FZ2/J1D9Mkj5D5hI96YnGlvzciLsGFiJukp2UaPo2bERXhp68YP32GD5JEme6Bp4YAkteFVhY4j9yt3s4YuFdqWEHEzB4kJVthNZHIUc6gc/mhpDQD+eIUSmUyhFARGorsu/apxDKBeV8A1SxqoXjzOdx8of1F02ya4tYA0hceR+rRsxpSrYs= X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: 42e65b40-6719-46d0-1708-08d80bc54d1a X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Jun 2020 16:02:10.5203 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: SJTR5Pb1Y/dQCHzx2CvHLtXDvapXIfzZn6Q8e2dgNgCj5I+z1WJo91+Qn+heSkOf9Tss6+1uhH1gmaj0FlR2gw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB8PR05MB6777 Subject: [dpdk-dev] [PATCH 1/1] net/mlx5: fix flow memory allocation size X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" In DV enabled MLX5 PMD build mlx5_ipool_cfg[MLX5_IPOOL_MLX5_FLOW].size was initiated for DV structure. If RTE initialization encountered MLX5 PCI function with disabled DV support mlx5_ipool_cfg[MLX5_IPOOL_MLX5_FLOW].size was reduced to match legacy verbs flow size. Since mlx5_ipool_cfg[MLX5_IPOOL_MLX5_FLOW] is a global variable that change reflected on DV enabled MLX5 PCI functions too. Running flow with invalid ipool size crashes PMD. The patch adjusts ipool flow size for each active PCI function. Fixes: b88341ca35fc ("net/mlx5: convert flow dev handle to indexed") Signed-off-by: Gregory Etelson Acked-by: Matan Azrad --- drivers/net/mlx5/mlx5.c | 40 +++++++++++++++++++++++++--------------- 1 file changed, 25 insertions(+), 15 deletions(-) diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c index 5589772eb8..145021ef0f 100644 --- a/drivers/net/mlx5/mlx5.c +++ b/drivers/net/mlx5/mlx5.c @@ -198,7 +198,7 @@ struct mlx5_dev_spawn_data { static LIST_HEAD(, mlx5_ibv_shared) mlx5_ibv_list = LIST_HEAD_INITIALIZER(); static pthread_mutex_t mlx5_ibv_list_mutex = PTHREAD_MUTEX_INITIALIZER; -static struct mlx5_indexed_pool_config mlx5_ipool_cfg[] = { +static const struct mlx5_indexed_pool_config mlx5_ipool_cfg[] = { #ifdef HAVE_IBV_FLOW_DV_SUPPORT { .size = sizeof(struct mlx5_flow_dv_encap_decap_resource), @@ -290,7 +290,11 @@ static struct mlx5_indexed_pool_config mlx5_ipool_cfg[] = { .type = "mlx5_hrxq_ipool", }, { - .size = sizeof(struct mlx5_flow_handle), + /* + * MLX5_IPOOL_MLX5_FLOW size varies for DV and VERBS flows. + * It set in run time according to PCI function configuration. + */ + .size = 0, .trunk_size = 64, .grow_trunk = 3, .grow_shift = 2, @@ -562,22 +566,28 @@ mlx5_flow_counters_mng_close(struct mlx5_ibv_shared *sh) */ static void mlx5_flow_ipool_create(struct mlx5_ibv_shared *sh, - const struct mlx5_dev_config *config __rte_unused) + const struct mlx5_dev_config *config) { uint8_t i; + struct mlx5_indexed_pool_config cfg; -#ifdef HAVE_IBV_FLOW_DV_SUPPORT - /* - * While DV is supported, user chooses the verbs mode, - * the mlx5 flow handle size is different with the - * MLX5_FLOW_HANDLE_VERBS_SIZE. - */ - if (!config->dv_flow_en) - mlx5_ipool_cfg[MLX5_IPOOL_MLX5_FLOW].size = - MLX5_FLOW_HANDLE_VERBS_SIZE; -#endif - for (i = 0; i < MLX5_IPOOL_MAX; ++i) - sh->ipool[i] = mlx5_ipool_create(&mlx5_ipool_cfg[i]); + for (i = 0; i < MLX5_IPOOL_MAX; ++i) { + cfg = mlx5_ipool_cfg[i]; + switch (i) { + default: + break; + /* + * Set MLX5_IPOOL_MLX5_FLOW ipool size + * according to PCI function flow configuration. + */ + case MLX5_IPOOL_MLX5_FLOW: + cfg.size = config->dv_flow_en ? + sizeof(struct mlx5_flow_handle) : + MLX5_FLOW_HANDLE_VERBS_SIZE; + break; + } + sh->ipool[i] = mlx5_ipool_create(&cfg); + } } /** -- 2.25.1