From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 81330A0516; Tue, 9 Jun 2020 14:01:38 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 2BD481BF91; Tue, 9 Jun 2020 13:57:16 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id 784261BF5C for ; Tue, 9 Jun 2020 13:57:06 +0200 (CEST) IronPort-SDR: eqi9hBC53epF57rVGdX9+eaTtAJNHsxYfDA3ZKcFqRsZjNC+ZuVuOGPM9nJGtn/Ach0q9O8Ck3 6/qRGS49/oZg== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2020 04:57:06 -0700 IronPort-SDR: xqWu3/xwxvf1ZywCCjTLyX0Qeifo0fzvjCOrzsVQQSgkSmMkvzVnqq9wYA+mnHghC+a40a/4j6 WyJZXxhzd15Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,492,1583222400"; d="scan'208";a="473044195" Received: from dpdk51.sh.intel.com ([10.67.111.82]) by fmsmga005.fm.intel.com with ESMTP; 09 Jun 2020 04:57:04 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: xiaolong.ye@intel.com, dev@dpdk.org, Qi Zhang , Jacob Keller , "Paul M . Stillwell Jr" Date: Tue, 9 Jun 2020 19:59:41 +0800 Message-Id: <20200609120001.35110-33-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200609120001.35110-1-qi.z.zhang@intel.com> References: <20200603024016.30636-1-qi.z.zhang@intel.com> <20200609120001.35110-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v2 32/52] net/ice/base: reset capabilities before parsing X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The capability flags used to report whether an NVM component has a pending update are stored as simple booleans. If ice_parse_caps finds the relevant capability then the boolean is set to true. If the capability is not provided by firmware, then the boolean value will be left alone. This works during initialization because the capabilities structure is zero-initialized. However, this does not work if capabilities are updated by calling ice_get_caps again after driver load. For example, consider if firmware had a pending update, and then an EMPR was triggered. The update will complete, and firmware will no longer report these capabilities. However, the device driver will have already set the pending flags. After an EMPR, new capabilities are read. However, because the pending flags in the dev_caps.common_cap structure have already been set, they will remain true. Fix this by clearing the capabilities structures in ice_parse_caps before processing any capabilities. This ensures that the capabilities structure will always be refreshed to match the state of the device or function capabilities reported by firmware. Signed-off-by: Jacob Keller Signed-off-by: Paul M. Stillwell Jr Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_common.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index e1181a102..e2e7f1137 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -1828,10 +1828,16 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count, if (opc == ice_aqc_opc_list_dev_caps) { dev_p = &hw->dev_caps; caps = &dev_p->common_cap; + + ice_memset(dev_p, 0, sizeof(*dev_p), ICE_NONDMA_MEM); + prefix = "dev cap"; } else if (opc == ice_aqc_opc_list_func_caps) { func_p = &hw->func_caps; caps = &func_p->common_cap; + + ice_memset(func_p, 0, sizeof(*func_p), ICE_NONDMA_MEM); + prefix = "func cap"; } else { ice_debug(hw, ICE_DBG_INIT, "wrong opcode\n"); -- 2.13.6