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From: Somnath Kotur <somnath.kotur@broadcom.com>
To: dev@dpdk.org
Cc: ferruh.yigit@intel.com
Subject: [dpdk-dev] [PATCH 02/36] net/bnxt: remove svif and vlan information from header bitmap
Date: Wed, 10 Jun 2020 17:13:53 +0530
Message-ID: <20200610114427.22146-3-somnath.kotur@broadcom.com> (raw)
In-Reply-To: <20200610114427.22146-1-somnath.kotur@broadcom.com>

From: Kishore Padmanabha <kishore.padmanabha@broadcom.com>

The svif and vlan information are removed from header bitmap
signature so that the matching algorithm does not use these
fields to perform matching. So flows with or without vlan
tag could use the same flow template.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Reviewed-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Reviewed-by: Michael Baucom <michael.baucom@broadcom.com>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
---
 drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c         |  3 ++
 drivers/net/bnxt/tf_ulp/ulp_mapper.c            | 16 ++++++++
 drivers/net/bnxt/tf_ulp/ulp_mapper.h            |  2 +
 drivers/net/bnxt/tf_ulp/ulp_matcher.c           | 25 +------------
 drivers/net/bnxt/tf_ulp/ulp_rte_parser.c        | 45 +++++++++++------------
 drivers/net/bnxt/tf_ulp/ulp_rte_parser.h        |  1 +
 drivers/net/bnxt/tf_ulp/ulp_template_db.c       | 18 ++++-----
 drivers/net/bnxt/tf_ulp/ulp_template_db.h       | 49 +++++++++++--------------
 drivers/net/bnxt/tf_ulp/ulp_template_field_db.h |  2 +-
 drivers/net/bnxt/tf_ulp/ulp_utils.c             | 34 +++++++++++++++++
 drivers/net/bnxt/tf_ulp/ulp_utils.h             | 18 +++++++++
 11 files changed, 128 insertions(+), 85 deletions(-)

diff --git a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c
index dbec8ce..1d8d79f 100644
--- a/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c
+++ b/drivers/net/bnxt/tf_ulp/bnxt_ulp_flow.c
@@ -99,6 +99,8 @@ bnxt_ulp_flow_create(struct rte_eth_dev *dev,
 	ULP_UTIL_CHF_IDX_WR(&params, BNXT_ULP_CHF_IDX_INCOMING_IF,
 			    dev->data->port_id);
 	ULP_UTIL_CHF_IDX_WR(&params, BNXT_ULP_CHF_IDX_DIRECTION, params.dir);
+	ULP_UTIL_CHF_IDX_WR(&params, BNXT_ULP_CHF_IDX_SVIF,
+			    BNXT_ULP_INVALID_SVIF_VAL);
 
 	/* Parse the rte flow pattern */
 	ret = bnxt_ulp_rte_parser_hdr_parse(pattern, &params);
@@ -121,6 +123,7 @@ bnxt_ulp_flow_create(struct rte_eth_dev *dev,
 	mapper_cparms.app_priority = attr->priority;
 	mapper_cparms.hdr_bitmap = &params.hdr_bitmap;
 	mapper_cparms.hdr_field = params.hdr_field;
+	mapper_cparms.comp_fld = params.comp_fld;
 	mapper_cparms.act = &params.act_bitmap;
 	mapper_cparms.act_prop = &params.act_prop;
 	mapper_cparms.class_tid = class_id;
diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.c b/drivers/net/bnxt/tf_ulp/ulp_mapper.c
index 938b88e..1a0d577 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_mapper.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.c
@@ -743,6 +743,21 @@ ulp_mapper_keymask_field_process(struct bnxt_ulp_mapper_parms *parms,
 			return -EINVAL;
 		}
 		break;
+	case BNXT_ULP_SPEC_OPC_SET_TO_COMP_HDR_FIELD:
+		if (!ulp_operand_read(operand, (uint8_t *)&idx,
+				      sizeof(uint16_t))) {
+			BNXT_TF_DBG(ERR, "%s key operand read failed.\n", name);
+			return -EINVAL;
+		}
+		idx = tfp_be_to_cpu_16(idx);
+		if (idx < BNXT_ULP_CHF_IDX_LAST)
+			val = ulp_blob_push_32(blob, &parms->comp_fld[idx],
+					       bitlen);
+		if (!val) {
+			BNXT_TF_DBG(ERR, "%s push to key blob failed\n", name);
+			return -EINVAL;
+		}
+		break;
 	case BNXT_ULP_SPEC_OPC_SET_TO_REGFILE:
 		if (!ulp_operand_read(operand, (uint8_t *)&idx,
 				      sizeof(uint16_t))) {
@@ -1857,6 +1872,7 @@ ulp_mapper_flow_create(struct bnxt_ulp_context *ulp_ctx,
 	parms.act_bitmap = cparms->act;
 	parms.regfile = &regfile;
 	parms.hdr_field = cparms->hdr_field;
+	parms.comp_fld = cparms->comp_fld;
 	parms.tfp = bnxt_ulp_cntxt_tfp_get(ulp_ctx);
 	parms.ulp_ctx = ulp_ctx;
 	parms.tcam_tbl_opc = BNXT_ULP_MAPPER_TCAM_TBL_OPC_NORMAL;
diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.h b/drivers/net/bnxt/tf_ulp/ulp_mapper.h
index 162d869..e794795 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_mapper.h
+++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.h
@@ -67,6 +67,7 @@ struct bnxt_ulp_mapper_parms {
 	struct ulp_rte_act_prop			*act_prop;
 	struct ulp_rte_act_bitmap		*act_bitmap;
 	struct ulp_rte_hdr_field		*hdr_field;
+	uint32_t				*comp_fld;
 	struct ulp_regfile			*regfile;
 	struct tf				*tfp;
 	struct bnxt_ulp_context			*ulp_ctx;
@@ -82,6 +83,7 @@ struct bnxt_ulp_mapper_create_parms {
 	uint32_t			app_priority;
 	struct ulp_rte_hdr_bitmap	*hdr_bitmap;
 	struct ulp_rte_hdr_field	*hdr_field;
+	uint32_t			*comp_fld;
 	struct ulp_rte_act_bitmap	*act;
 	struct ulp_rte_act_prop		*act_prop;
 	uint32_t			class_tid;
diff --git a/drivers/net/bnxt/tf_ulp/ulp_matcher.c b/drivers/net/bnxt/tf_ulp/ulp_matcher.c
index e5f23ef..f665700 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_matcher.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_matcher.c
@@ -34,22 +34,6 @@ ulp_matcher_action_hash_calculate(uint64_t hi_sig)
 	return (uint32_t)hash;
 }
 
-/* Utility function to mask the computed and internal proto headers. */
-static void
-ulp_matcher_hdr_fields_normalize(struct ulp_rte_hdr_bitmap *hdr1,
-				 struct ulp_rte_hdr_bitmap *hdr2)
-{
-	/* copy the contents first */
-	rte_memcpy(hdr2, hdr1, sizeof(struct ulp_rte_hdr_bitmap));
-
-	/* reset the computed fields */
-	ULP_BITMAP_RESET(hdr2->bits, BNXT_ULP_HDR_BIT_SVIF);
-	ULP_BITMAP_RESET(hdr2->bits, BNXT_ULP_HDR_BIT_OO_VLAN);
-	ULP_BITMAP_RESET(hdr2->bits, BNXT_ULP_HDR_BIT_OI_VLAN);
-	ULP_BITMAP_RESET(hdr2->bits, BNXT_ULP_HDR_BIT_IO_VLAN);
-	ULP_BITMAP_RESET(hdr2->bits, BNXT_ULP_HDR_BIT_II_VLAN);
-}
-
 /*
  * Function to handle the matching of RTE Flows and validating
  * the pattern masks against the flow templates.
@@ -58,16 +42,11 @@ int32_t
 ulp_matcher_pattern_match(struct ulp_rte_parser_params *params,
 			  uint32_t *class_id)
 {
-	struct ulp_rte_hdr_bitmap hdr_bitmap_masked;
 	struct bnxt_ulp_class_match_info *class_match;
 	uint32_t class_hid;
 	uint8_t vf_to_vf;
 	uint16_t tmpl_id;
 
-	/* Remove the hdr bit maps that are internal or computed */
-	ulp_matcher_hdr_fields_normalize(&params->hdr_bitmap,
-					 &hdr_bitmap_masked);
-
 	/* determine vf to vf flow */
 	if (params->dir == ULP_DIR_EGRESS &&
 	    ULP_BITMAP_ISSET(params->act_bitmap.bits,
@@ -78,7 +57,7 @@ ulp_matcher_pattern_match(struct ulp_rte_parser_params *params,
 	}
 
 	/* calculate the hash of the given flow */
-	class_hid = ulp_matcher_class_hash_calculate(hdr_bitmap_masked.bits,
+	class_hid = ulp_matcher_class_hash_calculate(params->hdr_bitmap.bits,
 						     params->fld_bitmap.bits);
 
 	/* validate the calculate hash values */
@@ -89,7 +68,7 @@ ulp_matcher_pattern_match(struct ulp_rte_parser_params *params,
 		goto error;
 
 	class_match = &ulp_class_match_list[tmpl_id];
-	if (ULP_BITMAP_CMP(&hdr_bitmap_masked, &class_match->hdr_sig)) {
+	if (ULP_BITMAP_CMP(&params->hdr_bitmap, &class_match->hdr_sig)) {
 		BNXT_TF_DBG(DEBUG, "Proto Header does not match\n");
 		goto error;
 	}
diff --git a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c
index ace5fad..4f7adfc 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c
@@ -165,15 +165,13 @@ ulp_rte_parser_svif_set(struct ulp_rte_parser_params *params,
 	uint32_t ifindex;
 	int32_t rc;
 
-	if (ULP_BITMAP_ISSET(params->hdr_bitmap.bits, BNXT_ULP_HDR_BIT_SVIF)) {
+	if (ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_SVIF) !=
+	    BNXT_ULP_INVALID_SVIF_VAL) {
 		BNXT_TF_DBG(ERR,
 			    "SVIF already set,multiple source not support'd\n");
 		return BNXT_TF_RC_ERROR;
 	}
 
-	/*update the hdr_bitmap with BNXT_ULP_HDR_PROTO_SVIF */
-	ULP_BITMAP_SET(params->hdr_bitmap.bits, BNXT_ULP_HDR_BIT_SVIF);
-
 	if (proto == RTE_FLOW_ITEM_TYPE_PORT_ID) {
 		dir = ULP_UTIL_CHF_IDX_RD(params,
 					  BNXT_ULP_CHF_IDX_DIRECTION);
@@ -192,6 +190,8 @@ ulp_rte_parser_svif_set(struct ulp_rte_parser_params *params,
 	memcpy(hdr_field->spec, &svif, sizeof(svif));
 	memcpy(hdr_field->mask, &mask, sizeof(mask));
 	hdr_field->size = sizeof(svif);
+	ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_SVIF,
+			    rte_be_to_cpu_16(svif));
 	return BNXT_TF_RC_SUCCESS;
 }
 
@@ -202,7 +202,8 @@ ulp_rte_parser_svif_process(struct ulp_rte_parser_params *params)
 	uint16_t port_id = 0;
 	uint16_t svif_mask = 0xFFFF;
 
-	if (ULP_BITMAP_ISSET(params->hdr_bitmap.bits, BNXT_ULP_HDR_BIT_SVIF))
+	if (ULP_UTIL_CHF_IDX_RD(params, BNXT_ULP_CHF_IDX_SVIF) !=
+	    BNXT_ULP_INVALID_SVIF_VAL)
 		return BNXT_TF_RC_SUCCESS;
 
 	/* SVIF not set. So get the port id */
@@ -421,41 +422,39 @@ ulp_rte_vlan_hdr_handler(const struct rte_flow_item *item,
 	/* Update the hdr_bitmap of the vlans */
 	hdr_bit = &params->hdr_bitmap;
 	if (ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_O_ETH) &&
-	    !ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_OO_VLAN)) {
-		/* Set the outer vlan bit and update the vlan tag num */
-		ULP_BITMAP_SET(hdr_bit->bits, BNXT_ULP_HDR_BIT_OO_VLAN);
+	    !outer_vtag_num) {
+		/* Update the vlan tag num */
 		outer_vtag_num++;
 		ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_VTAG_NUM,
 				    outer_vtag_num);
 		ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_VTAG_PRESENT, 1);
 	} else if (ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_O_ETH) &&
-		   ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_OO_VLAN) &&
-		   !ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_OI_VLAN)) {
-		/* Set the outer vlan bit and update the vlan tag num */
-		ULP_BITMAP_SET(hdr_bit->bits, BNXT_ULP_HDR_BIT_OI_VLAN);
+		   ULP_UTIL_CHF_IDX_RD(params,
+				       BNXT_ULP_CHF_IDX_O_VTAG_PRESENT) &&
+		   outer_vtag_num == 1) {
+		/* update the vlan tag num */
 		outer_vtag_num++;
 		ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_VTAG_NUM,
 				    outer_vtag_num);
 		ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_O_TWO_VTAGS, 1);
 	} else if (ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_O_ETH) &&
-		   ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_OO_VLAN) &&
-		   ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_OI_VLAN) &&
+		   ULP_UTIL_CHF_IDX_RD(params,
+				       BNXT_ULP_CHF_IDX_O_VTAG_PRESENT) &&
 		   ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_I_ETH) &&
-		   !ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_IO_VLAN)) {
-		/* Set the inner vlan bit and update the vlan tag num */
-		ULP_BITMAP_SET(hdr_bit->bits, BNXT_ULP_HDR_BIT_IO_VLAN);
+		   !inner_vtag_num) {
+		/* update the vlan tag num */
 		inner_vtag_num++;
 		ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_VTAG_NUM,
 				    inner_vtag_num);
 		ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_VTAG_PRESENT, 1);
 	} else if (ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_O_ETH) &&
-		   ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_OO_VLAN) &&
-		   ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_OI_VLAN) &&
+		   ULP_UTIL_CHF_IDX_RD(params,
+				       BNXT_ULP_CHF_IDX_O_VTAG_PRESENT) &&
 		   ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_I_ETH) &&
-		   ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_IO_VLAN) &&
-		   !ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_II_VLAN)) {
-		/* Set the inner vlan bit and update the vlan tag num */
-		ULP_BITMAP_SET(hdr_bit->bits, BNXT_ULP_HDR_BIT_II_VLAN);
+		   ULP_UTIL_CHF_IDX_RD(params,
+				       BNXT_ULP_CHF_IDX_O_VTAG_PRESENT) &&
+		   inner_vtag_num == 1) {
+		/* update the vlan tag num */
 		inner_vtag_num++;
 		ULP_UTIL_CHF_IDX_WR(params, BNXT_ULP_CHF_IDX_I_VTAG_NUM,
 				    inner_vtag_num);
diff --git a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h
index cbc8a43..868e6dc 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h
+++ b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h
@@ -19,6 +19,7 @@
 #define BNXT_ULP_ENCAP_IPV4_SIZE		12
 #define BNXT_ULP_ENCAP_IPV6_SIZE		8
 #define BNXT_ULP_ENCAP_UDP_SIZE			4
+#define BNXT_ULP_INVALID_SVIF_VAL		-1U
 
 /* Function to handle the parsing of the RTE port id. */
 int32_t
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db.c b/drivers/net/bnxt/tf_ulp/ulp_template_db.c
index e89aefa..f06fbc0 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db.c
@@ -3,10 +3,6 @@
  * All rights reserved.
  */
 
-/*
- * date: Mon Mar  9 02:37:53 2020
- * version: 0.0
- */
 
 #include "ulp_template_db.h"
 #include "ulp_template_field_db.h"
@@ -538,12 +534,12 @@ uint32_t bnxt_ulp_encap_vtag_map[] = {
 };
 
 uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = {
-	[BNXT_ULP_CLASS_HID_0092] = 1
+	[BNXT_ULP_CLASS_HID_0013] = 1
 };
 
 struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
 	[1] = {
-	.class_hid = BNXT_ULP_CLASS_HID_0092,
+	.class_hid = BNXT_ULP_CLASS_HID_0013,
 	.hdr_sig = { .bits =
 		BNXT_ULP_HDR_BIT_O_ETH |
 		BNXT_ULP_HDR_BIT_O_IPV4 |
@@ -833,15 +829,17 @@ struct bnxt_ulp_mapper_class_key_field_info ulp_class_key_field_list[] = {
 	.spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
-	/* class template id: 0, wh_plus, table: profile_tcam_cache_0 */
 	{
 	.field_bit_size = 1,
 	.mask_opcode = BNXT_ULP_MASK_OPC_SET_TO_CONSTANT,
 	.mask_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
-	.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT,
-	.spec_operand = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+	.spec_opcode = BNXT_ULP_SPEC_OPC_SET_TO_COMP_HDR_FIELD,
+	.spec_operand = {
+		(BNXT_ULP_CHF_IDX_O_VTAG_NUM >> 8) & 0xff,
+		BNXT_ULP_CHF_IDX_O_VTAG_NUM & 0xff,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
 	},
 	{
 	.field_bit_size = 7,
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db.h b/drivers/net/bnxt/tf_ulp/ulp_template_db.h
index e6065d2..212068f 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db.h
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db.h
@@ -3,10 +3,6 @@
  * All rights reserved.
  */
 
-/*
- * date: Mon Mar  9 02:37:53 2020
- * version: 0.0
- */
 
 #ifndef ULP_TEMPLATE_DB_H_
 #define ULP_TEMPLATE_DB_H_
@@ -64,24 +60,19 @@ enum bnxt_ulp_action_bit {
 };
 
 enum bnxt_ulp_hdr_bit {
-	BNXT_ULP_HDR_BIT_SVIF                = 0x0000000000000001,
-	BNXT_ULP_HDR_BIT_O_ETH               = 0x0000000000000002,
-	BNXT_ULP_HDR_BIT_OO_VLAN             = 0x0000000000000004,
-	BNXT_ULP_HDR_BIT_OI_VLAN             = 0x0000000000000008,
-	BNXT_ULP_HDR_BIT_O_IPV4              = 0x0000000000000010,
-	BNXT_ULP_HDR_BIT_O_IPV6              = 0x0000000000000020,
-	BNXT_ULP_HDR_BIT_O_TCP               = 0x0000000000000040,
-	BNXT_ULP_HDR_BIT_O_UDP               = 0x0000000000000080,
-	BNXT_ULP_HDR_BIT_T_VXLAN             = 0x0000000000000100,
-	BNXT_ULP_HDR_BIT_T_GRE               = 0x0000000000000200,
-	BNXT_ULP_HDR_BIT_I_ETH               = 0x0000000000000400,
-	BNXT_ULP_HDR_BIT_IO_VLAN             = 0x0000000000000800,
-	BNXT_ULP_HDR_BIT_II_VLAN             = 0x0000000000001000,
-	BNXT_ULP_HDR_BIT_I_IPV4              = 0x0000000000002000,
-	BNXT_ULP_HDR_BIT_I_IPV6              = 0x0000000000004000,
-	BNXT_ULP_HDR_BIT_I_TCP               = 0x0000000000008000,
-	BNXT_ULP_HDR_BIT_I_UDP               = 0x0000000000010000,
-	BNXT_ULP_HDR_BIT_LAST                = 0x0000000000020000
+	BNXT_ULP_HDR_BIT_O_ETH               = 0x0000000000000001,
+	BNXT_ULP_HDR_BIT_O_IPV4              = 0x0000000000000002,
+	BNXT_ULP_HDR_BIT_O_IPV6              = 0x0000000000000004,
+	BNXT_ULP_HDR_BIT_O_TCP               = 0x0000000000000008,
+	BNXT_ULP_HDR_BIT_O_UDP               = 0x0000000000000010,
+	BNXT_ULP_HDR_BIT_T_VXLAN             = 0x0000000000000020,
+	BNXT_ULP_HDR_BIT_T_GRE               = 0x0000000000000040,
+	BNXT_ULP_HDR_BIT_I_ETH               = 0x0000000000000080,
+	BNXT_ULP_HDR_BIT_I_IPV4              = 0x0000000000000100,
+	BNXT_ULP_HDR_BIT_I_IPV6              = 0x0000000000000200,
+	BNXT_ULP_HDR_BIT_I_TCP               = 0x0000000000000400,
+	BNXT_ULP_HDR_BIT_I_UDP               = 0x0000000000000800,
+	BNXT_ULP_HDR_BIT_LAST                = 0x0000000000001000
 };
 
 enum bnxt_ulp_act_type {
@@ -232,10 +223,11 @@ enum bnxt_ulp_search_before_alloc {
 enum bnxt_ulp_spec_opc {
 	BNXT_ULP_SPEC_OPC_SET_TO_CONSTANT = 0,
 	BNXT_ULP_SPEC_OPC_SET_TO_HDR_FIELD = 1,
-	BNXT_ULP_SPEC_OPC_SET_TO_REGFILE = 2,
-	BNXT_ULP_SPEC_OPC_SET_TO_DEF_REGFILE = 3,
-	BNXT_ULP_SPEC_OPC_ADD_PAD = 4,
-	BNXT_ULP_SPEC_OPC_LAST = 5
+	BNXT_ULP_SPEC_OPC_SET_TO_COMP_HDR_FIELD = 2,
+	BNXT_ULP_SPEC_OPC_SET_TO_REGFILE = 3,
+	BNXT_ULP_SPEC_OPC_SET_TO_DEF_REGFILE = 4,
+	BNXT_ULP_SPEC_OPC_ADD_PAD = 5,
+	BNXT_ULP_SPEC_OPC_LAST = 6
 };
 
 enum bnxt_ulp_encap_vtag_encoding {
@@ -445,12 +437,13 @@ enum bnxt_ulp_act_prop_idx {
 	BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN = 236,
 	BNXT_ULP_ACT_PROP_IDX_LAST = 268
 };
+
 enum bnxt_ulp_class_hid {
-	BNXT_ULP_CLASS_HID_0092 = 0x0092
+	BNXT_ULP_CLASS_HID_0013 = 0x0013
 };
 
 enum bnxt_ulp_act_hid {
 	BNXT_ULP_ACT_HID_0029 = 0x0029
 };
 
-#endif /* _ULP_TEMPLATE_DB_H_ */
+#endif
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h b/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h
index 587de8a..2655b83 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_field_db.h
@@ -60,4 +60,4 @@ enum bnxt_ulp_hf_bitmask0 {
 	BNXT_ULP_HF0_BITMASK_O_UDP_CSUM          = 0x0000010000000000
 };
 
-#endif /* _ULP_HDR_FIELD_ENUMS_H_ */
+#endif
diff --git a/drivers/net/bnxt/tf_ulp/ulp_utils.c b/drivers/net/bnxt/tf_ulp/ulp_utils.c
index 0150c1d..bd267b6 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_utils.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_utils.c
@@ -310,6 +310,40 @@ ulp_blob_push_64(struct ulp_blob *blob,
 }
 
 /*
+ * Add data to the binary blob at the current offset.
+ *
+ * blob [in] The blob that data is added to.  The blob must
+ * be initialized prior to pushing data.
+ *
+ * data [in] 32-bit value to be added to the blob.
+ *
+ * datalen [in] The number of bits to be added ot the blob.
+ *
+ * The offset of the data is updated after each push of data.
+ * NULL returned on error, pointer pushed value otherwise.
+ */
+uint8_t *
+ulp_blob_push_32(struct ulp_blob *blob,
+		 uint32_t *data,
+		 uint32_t datalen)
+{
+	uint8_t *val = (uint8_t *)data;
+	uint32_t rc;
+	uint32_t size = ULP_BITS_2_BYTE(datalen);
+
+	if (!data || size > sizeof(uint32_t)) {
+		BNXT_TF_DBG(ERR, "invalid argument\n");
+		return 0;
+	}
+
+	rc = ulp_blob_push(blob, &val[sizeof(uint32_t) - size], datalen);
+	if (!rc)
+		return 0;
+
+	return &val[sizeof(uint32_t) - size];
+}
+
+/*
  * Add encap data to the binary blob at the current offset.
  *
  * blob [in] The blob that data is added to.  The blob must
diff --git a/drivers/net/bnxt/tf_ulp/ulp_utils.h b/drivers/net/bnxt/tf_ulp/ulp_utils.h
index 5db3933..b8de4b4 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_utils.h
+++ b/drivers/net/bnxt/tf_ulp/ulp_utils.h
@@ -179,6 +179,24 @@ ulp_blob_push_64(struct ulp_blob *blob,
 		 uint32_t datalen);
 
 /*
+ * Add data to the binary blob at the current offset.
+ *
+ * blob [in] The blob that data is added to.  The blob must
+ * be initialized prior to pushing data.
+ *
+ * data [in] 32-bit value to be added to the blob.
+ *
+ * datalen [in] The number of bits to be added ot the blob.
+ *
+ * The offset of the data is updated after each push of data.
+ * NULL returned on error, pointer pushed value otherwise.
+ */
+uint8_t *
+ulp_blob_push_32(struct ulp_blob *blob,
+		 uint32_t *data,
+		 uint32_t datalen);
+
+/*
  * Add encap data to the binary blob at the current offset.
  *
  * blob [in] The blob that data is added to.  The blob must
-- 
2.7.4


  parent reply	other threads:[~2020-06-10 11:49 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-10 11:43 [dpdk-dev] [PATCH 00/36] bnxt patches Somnath Kotur
2020-06-10 11:43 ` [dpdk-dev] [PATCH 01/36] net/bnxt: Makefile changes Somnath Kotur
2020-06-10 11:43 ` Somnath Kotur [this message]
2020-06-10 11:43 ` [dpdk-dev] [PATCH 03/36] net/bnxt: add vfr flag to the mark manager Somnath Kotur
2020-06-10 11:43 ` [dpdk-dev] [PATCH 04/36] net/bnxt: support for mark action for LFID rules Somnath Kotur
2020-06-10 11:43 ` [dpdk-dev] [PATCH 05/36] net/bnxt: remove mem field from mapper class table Somnath Kotur
2020-06-10 11:43 ` [dpdk-dev] [PATCH 06/36] net/bnxt: support more resource functions in flow database Somnath Kotur
2020-06-10 11:43 ` [dpdk-dev] [PATCH 07/36] net/bnxt: rename the ulp action bitmap enumeration values Somnath Kotur
2020-06-10 11:43 ` [dpdk-dev] [PATCH 08/36] net/bnxt: add support for computed header field in result opcode Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 09/36] net/bnxt: updated compute field list and access macros Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 10/36] net/bnxt: extend default identifier list to be global resource list Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 11/36] net/bnxt: add resource sub type to class and action tables Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 12/36] net/bnxt: remove cache tbl id from the mapper class table Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 13/36] net/bnxt: move vfr flag from computed field list to " Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 14/36] net/bnxt: add support for action bitmap opcode in result field processing Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 15/36] net/bnxt: direction bit needs to be added to the action bitmap Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 16/36] net/bnxt: remove cache_tbl_id enums Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 17/36] net/bnxt: extend index table processing to process action templates Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 18/36] net/bnxt: use vport in the phy port act handler Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 19/36] net/bnxt: add enum to the critical resource Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 20/36] net/bnxt: rename regfile_wr_idx to regfile_idx Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 21/36] net/bnxt: remove unused enum in regfile index Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 22/36] net/bnxt: rename an enum in the " Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 23/36] net/bnxt: rename the enums in the bnxt_ulp_resource_sub_type Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 24/36] net/bnxt: add a devarg to set max flow count Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 25/36] net/bnxt: add support for vxlan encap and decap templates Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 26/36] net/bnxt: flow db api to get vf rep action record Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 27/36] net/bnxt: parse ipv6 vtc_flow field for more granularly Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 28/36] net/bnxt: remove the implicit bitset update for vnic action Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 29/36] net/bnxt: divide the ulp template db file to smaller modules Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 30/36] net/bnxt: unify the mapper opcodes into single enum Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 31/36] net/bnxt: change opcode for adding pad to setting zero for common usage Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 32/36] net/bnxt: optimized key/mask/result fields to use set to zero opcode Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 33/36] net/bnxt: add support for internal exact match flows Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 34/36] net/bnxt: enable vfr flag processing with mark db opcode Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 35/36] net/bnxt: rename fields in the device params structure Somnath Kotur
2020-06-10 11:44 ` [dpdk-dev] [PATCH 36/36] net/bnxt: update ulp template database for new opcodes Somnath Kotur
  -- strict thread matches above, loose matches on Subject: below --
2020-06-12 12:49 [dpdk-dev] [PATCH v3 00/36] bnxt patches Somnath Kotur
2020-06-12 12:49 ` [dpdk-dev] [PATCH 02/36] net/bnxt: remove svif and vlan information from header bitmap Somnath Kotur
2020-06-10  6:56 [dpdk-dev] [PATCH 00/36] bnxt fixes and enhancements Somnath Kotur
2020-06-10  6:56 ` [dpdk-dev] [PATCH 02/36] net/bnxt: remove svif and vlan information from header bitmap Somnath Kotur

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