From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7C180A00BE; Fri, 12 Jun 2020 23:26:40 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id AF0DD1BF71; Fri, 12 Jun 2020 23:26:23 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id BEB8A1BED2 for ; Fri, 12 Jun 2020 23:26:19 +0200 (CEST) IronPort-SDR: oFmTETsnjAEHxq0wv2VNnPfPZ/i/PqHYaJakY9ZmV3hQIWubmqYniNgzUpSyHo8swZ2dbpbMcv IsTsh1RI5NtQ== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Jun 2020 14:26:18 -0700 IronPort-SDR: 3r5Vy+gbjRwXK+AYexyJgaGBoxaV8z+FnFTQiAY4v3xvdF9HTPZnxJEU2bz3LM5Xdy2AJbtI9C 0/qx1CMxaQMg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,504,1583222400"; d="scan'208";a="272035759" Received: from txasoft-yocto.an.intel.com ([10.123.72.192]) by orsmga003.jf.intel.com with ESMTP; 12 Jun 2020 14:26:18 -0700 From: "McDaniel, Timothy" To: jerinj@marvell.com Cc: dev@dpdk.org, gage.eads@intel.com, harry.van.haaren@intel.com Date: Fri, 12 Jun 2020 16:24:08 -0500 Message-Id: <20200612212434.6852-2-timothy.mcdaniel@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200612212434.6852-1-timothy.mcdaniel@intel.com> References: <20200612212434.6852-1-timothy.mcdaniel@intel.com> Subject: [dpdk-dev] [PATCH 01/27] eventdev: dlb upstream prerequisites X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The DLB hardware does not conform exactly to the eventdev interface. 1) It has a limit on the number of queues that may be linked to a port. 2) Some ports a further restricted to a maximum of 1 linked queue. 3) It does not (currently) have the ability to carry the flow_id as part of the event (QE) payload. Due to the above, we would like to propose the following enhancements. 1) Add new fields to the rte_event_dev_info struct. These fields allow the device to advertize its capabilities so that applications can take the appropriate actions based on those capabilities. struct rte_event_dev_info { uint32_t max_event_port_links; /**< Maximum number of queues that can be linked to a single event * port by this device. */ uint8_t max_single_link_event_port_queue_pairs; /**< Maximum number of event ports and queues that are optimized for * (and only capable of) single-link configurations supported by this * device. These ports and queues are not accounted for in * max_event_ports or max_event_queues. */ } 2) Add a new field to the rte_event_dev_config struct. This field allows the application to specify how many of its ports are limited to a single link, or will be used in single link mode. /** Event device configuration structure */ struct rte_event_dev_config { uint8_t nb_single_link_event_port_queues; /**< Number of event ports and queues that will be singly-linked to * each other. These are a subset of the overall event ports and * queues; this value cannot exceed *nb_event_ports* or * *nb_event_queues*. If the device has ports and queues that are * optimized for single-link usage, this field is a hint for how many * to allocate; otherwise, regular event ports and queues can be used. */ } 3) Replace the dedicated implicit_release_disabled field with a bit field of explicit port capabilities. The implicit_release_disable functionality is assiged to one bit, and a port-is-single-link-only attribute is assigned to other, with the remaining bits available for future assignment. * Event port configuration bitmap flags */ #define RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL (1ULL << 0) /**< Configure the port not to release outstanding events in * rte_event_dev_dequeue_burst(). If set, all events received through * the port must be explicitly released with RTE_EVENT_OP_RELEASE or * RTE_EVENT_OP_FORWARD. Must be unset if the device is not * RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE capable. */ #define RTE_EVENT_PORT_CFG_SINGLE_LINK (1ULL << 1) /**< This event port links only to a single event queue. * * @see rte_event_port_setup(), rte_event_port_link() */ #define RTE_EVENT_PORT_ATTR_IMPLICIT_RELEASE_DISABLE 3 /** * The implicit release disable attribute of the port */ struct rte_event_port_conf { uint32_t event_port_cfg; /**< Port cfg flags(EVENT_PORT_CFG_) */ } 4) Add UMWAIT/UMONITOR bit to rte_cpuflags 5) Added a new API that is useful for probing PCI devices. /** * @internal * Wrapper for use by pci drivers as a .probe function to attach to a event * interface. Same as rte_event_pmd_pci_probe, except caller can specify * the name. */ static inline int rte_event_pmd_pci_probe_named(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev, size_t private_data_size, eventdev_pmd_pci_callback_t devinit, const char *name); Change-Id: I4cf00015296e2b3feca9886895765554730594be Signed-off-by: McDaniel, Timothy --- app/test-eventdev/evt_common.h | 1 + app/test-eventdev/test_order_atq.c | 4 ++ app/test-eventdev/test_order_common.c | 6 ++- app/test-eventdev/test_order_queue.c | 4 ++ app/test-eventdev/test_perf_atq.c | 1 + app/test-eventdev/test_perf_queue.c | 1 + app/test-eventdev/test_pipeline_atq.c | 1 + app/test-eventdev/test_pipeline_queue.c | 1 + app/test/test_eventdev.c | 4 +- drivers/event/dpaa2/dpaa2_eventdev.c | 2 +- drivers/event/octeontx/ssovf_evdev.c | 2 +- drivers/event/skeleton/skeleton_eventdev.c | 2 +- drivers/event/sw/sw_evdev.c | 5 +- drivers/event/sw/sw_evdev_selftest.c | 9 ++-- .../eventdev_pipeline/pipeline_worker_generic.c | 8 ++- examples/eventdev_pipeline/pipeline_worker_tx.c | 3 ++ examples/l2fwd-event/l2fwd_event_generic.c | 5 +- examples/l2fwd-event/l2fwd_event_internal_port.c | 5 +- examples/l3fwd/l3fwd_event_generic.c | 5 +- examples/l3fwd/l3fwd_event_internal_port.c | 5 +- lib/librte_eal/x86/include/rte_cpuflags.h | 1 + lib/librte_eal/x86/rte_cpuflags.c | 1 + lib/librte_eventdev/rte_event_eth_tx_adapter.c | 2 +- lib/librte_eventdev/rte_eventdev.c | 62 +++++++++++++++++++--- lib/librte_eventdev/rte_eventdev.h | 51 +++++++++++++++--- lib/librte_eventdev/rte_eventdev_pmd_pci.h | 54 +++++++++++++++++++ 26 files changed, 208 insertions(+), 37 deletions(-) diff --git a/app/test-eventdev/evt_common.h b/app/test-eventdev/evt_common.h index f9d7378d3..120c27b33 100644 --- a/app/test-eventdev/evt_common.h +++ b/app/test-eventdev/evt_common.h @@ -169,6 +169,7 @@ evt_configure_eventdev(struct evt_options *opt, uint8_t nb_queues, .dequeue_timeout_ns = opt->deq_tmo_nsec, .nb_event_queues = nb_queues, .nb_event_ports = nb_ports, + .nb_single_link_event_port_queues = 0, .nb_events_limit = info.max_num_events, .nb_event_queue_flows = opt->nb_flows, .nb_event_port_dequeue_depth = diff --git a/app/test-eventdev/test_order_atq.c b/app/test-eventdev/test_order_atq.c index 3366cfce9..8246b96f0 100644 --- a/app/test-eventdev/test_order_atq.c +++ b/app/test-eventdev/test_order_atq.c @@ -34,6 +34,8 @@ order_atq_worker(void *arg) continue; } + ev.flow_id = ev.mbuf->udata64; + if (ev.sub_event_type == 0) { /* stage 0 from producer */ order_atq_process_stage_0(&ev); while (rte_event_enqueue_burst(dev_id, port, &ev, 1) @@ -68,6 +70,8 @@ order_atq_worker_burst(void *arg) } for (i = 0; i < nb_rx; i++) { + ev[i].flow_id = ev[i].mbuf->udata64; + if (ev[i].sub_event_type == 0) { /*stage 0 */ order_atq_process_stage_0(&ev[i]); } else if (ev[i].sub_event_type == 1) { /* stage 1 */ diff --git a/app/test-eventdev/test_order_common.c b/app/test-eventdev/test_order_common.c index 4190f9ade..c6fcd0509 100644 --- a/app/test-eventdev/test_order_common.c +++ b/app/test-eventdev/test_order_common.c @@ -49,6 +49,7 @@ order_producer(void *arg) const uint32_t flow = (uintptr_t)m % nb_flows; /* Maintain seq number per flow */ m->seqn = producer_flow_seq[flow]++; + m->udata64 = flow; ev.flow_id = flow; ev.mbuf = m; @@ -318,10 +319,11 @@ order_event_dev_port_setup(struct evt_test *test, struct evt_options *opt, opt->wkr_deq_dep = dev_info.max_event_port_dequeue_depth; /* port configuration */ - const struct rte_event_port_conf p_conf = { + struct rte_event_port_conf p_conf = { .dequeue_depth = opt->wkr_deq_dep, .enqueue_depth = dev_info.max_event_port_dequeue_depth, .new_event_threshold = dev_info.max_num_events, + .event_port_cfg = 0, }; /* setup one port per worker, linking to all queues */ @@ -351,6 +353,8 @@ order_event_dev_port_setup(struct evt_test *test, struct evt_options *opt, p->queue_id = 0; p->t = t; + p_conf.new_event_threshold /= 2; + ret = rte_event_port_setup(opt->dev_id, port, &p_conf); if (ret) { evt_err("failed to setup producer port %d", port); diff --git a/app/test-eventdev/test_order_queue.c b/app/test-eventdev/test_order_queue.c index 495efd92f..a0a2187a2 100644 --- a/app/test-eventdev/test_order_queue.c +++ b/app/test-eventdev/test_order_queue.c @@ -34,6 +34,8 @@ order_queue_worker(void *arg) continue; } + ev.flow_id = ev.mbuf->udata64; + if (ev.queue_id == 0) { /* from ordered queue */ order_queue_process_stage_0(&ev); while (rte_event_enqueue_burst(dev_id, port, &ev, 1) @@ -68,6 +70,8 @@ order_queue_worker_burst(void *arg) } for (i = 0; i < nb_rx; i++) { + ev[i].flow_id = ev[i].mbuf->udata64; + if (ev[i].queue_id == 0) { /* from ordered queue */ order_queue_process_stage_0(&ev[i]); } else if (ev[i].queue_id == 1) {/* from atomic queue */ diff --git a/app/test-eventdev/test_perf_atq.c b/app/test-eventdev/test_perf_atq.c index 8fd51004e..10846f202 100644 --- a/app/test-eventdev/test_perf_atq.c +++ b/app/test-eventdev/test_perf_atq.c @@ -204,6 +204,7 @@ perf_atq_eventdev_setup(struct evt_test *test, struct evt_options *opt) .dequeue_depth = opt->wkr_deq_dep, .enqueue_depth = dev_info.max_event_port_dequeue_depth, .new_event_threshold = dev_info.max_num_events, + .event_port_cfg = 0, }; ret = perf_event_dev_port_setup(test, opt, 1 /* stride */, nb_queues, diff --git a/app/test-eventdev/test_perf_queue.c b/app/test-eventdev/test_perf_queue.c index f4ea3a795..a0119da60 100644 --- a/app/test-eventdev/test_perf_queue.c +++ b/app/test-eventdev/test_perf_queue.c @@ -219,6 +219,7 @@ perf_queue_eventdev_setup(struct evt_test *test, struct evt_options *opt) .dequeue_depth = opt->wkr_deq_dep, .enqueue_depth = dev_info.max_event_port_dequeue_depth, .new_event_threshold = dev_info.max_num_events, + .event_port_cfg = 0, }; ret = perf_event_dev_port_setup(test, opt, nb_stages /* stride */, diff --git a/app/test-eventdev/test_pipeline_atq.c b/app/test-eventdev/test_pipeline_atq.c index 8e8686c14..a95ec0aa5 100644 --- a/app/test-eventdev/test_pipeline_atq.c +++ b/app/test-eventdev/test_pipeline_atq.c @@ -356,6 +356,7 @@ pipeline_atq_eventdev_setup(struct evt_test *test, struct evt_options *opt) .dequeue_depth = opt->wkr_deq_dep, .enqueue_depth = info.max_event_port_dequeue_depth, .new_event_threshold = info.max_num_events, + .event_port_cfg = 0, }; if (!t->internal_port) diff --git a/app/test-eventdev/test_pipeline_queue.c b/app/test-eventdev/test_pipeline_queue.c index 7bebac34f..30817dc78 100644 --- a/app/test-eventdev/test_pipeline_queue.c +++ b/app/test-eventdev/test_pipeline_queue.c @@ -379,6 +379,7 @@ pipeline_queue_eventdev_setup(struct evt_test *test, struct evt_options *opt) .dequeue_depth = opt->wkr_deq_dep, .enqueue_depth = info.max_event_port_dequeue_depth, .new_event_threshold = info.max_num_events, + .event_port_cfg = 0, }; if (!t->internal_port) { diff --git a/app/test/test_eventdev.c b/app/test/test_eventdev.c index 43ccb1ce9..62019c185 100644 --- a/app/test/test_eventdev.c +++ b/app/test/test_eventdev.c @@ -559,10 +559,10 @@ test_eventdev_port_setup(void) if (!(info.event_dev_cap & RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE)) { pconf.enqueue_depth = info.max_event_port_enqueue_depth; - pconf.disable_implicit_release = 1; + pconf.event_port_cfg = RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL; ret = rte_event_port_setup(TEST_DEV_ID, 0, &pconf); TEST_ASSERT(ret == -EINVAL, "Expected -EINVAL, %d", ret); - pconf.disable_implicit_release = 0; + pconf.event_port_cfg = 0; } ret = rte_event_port_setup(TEST_DEV_ID, info.max_event_ports, diff --git a/drivers/event/dpaa2/dpaa2_eventdev.c b/drivers/event/dpaa2/dpaa2_eventdev.c index a196ad4c6..8568bfcfc 100644 --- a/drivers/event/dpaa2/dpaa2_eventdev.c +++ b/drivers/event/dpaa2/dpaa2_eventdev.c @@ -537,7 +537,7 @@ dpaa2_eventdev_port_def_conf(struct rte_eventdev *dev, uint8_t port_id, DPAA2_EVENT_MAX_PORT_DEQUEUE_DEPTH; port_conf->enqueue_depth = DPAA2_EVENT_MAX_PORT_ENQUEUE_DEPTH; - port_conf->disable_implicit_release = 0; + port_conf->event_port_cfg = 0; } static int diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c index 1b1a5d939..99c0b2efb 100644 --- a/drivers/event/octeontx/ssovf_evdev.c +++ b/drivers/event/octeontx/ssovf_evdev.c @@ -224,7 +224,7 @@ ssovf_port_def_conf(struct rte_eventdev *dev, uint8_t port_id, port_conf->new_event_threshold = edev->max_num_events; port_conf->dequeue_depth = 1; port_conf->enqueue_depth = 1; - port_conf->disable_implicit_release = 0; + port_conf->event_port_cfg = 0; } static void diff --git a/drivers/event/skeleton/skeleton_eventdev.c b/drivers/event/skeleton/skeleton_eventdev.c index c889220e0..37d569b8c 100644 --- a/drivers/event/skeleton/skeleton_eventdev.c +++ b/drivers/event/skeleton/skeleton_eventdev.c @@ -209,7 +209,7 @@ skeleton_eventdev_port_def_conf(struct rte_eventdev *dev, uint8_t port_id, port_conf->new_event_threshold = 32 * 1024; port_conf->dequeue_depth = 16; port_conf->enqueue_depth = 16; - port_conf->disable_implicit_release = 0; + port_conf->event_port_cfg = 0; } static void diff --git a/drivers/event/sw/sw_evdev.c b/drivers/event/sw/sw_evdev.c index fb8e8bebb..0b3dd9c1c 100644 --- a/drivers/event/sw/sw_evdev.c +++ b/drivers/event/sw/sw_evdev.c @@ -175,7 +175,8 @@ sw_port_setup(struct rte_eventdev *dev, uint8_t port_id, } p->inflight_max = conf->new_event_threshold; - p->implicit_release = !conf->disable_implicit_release; + p->implicit_release = !(conf->event_port_cfg & + RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL); /* check if ring exists, same as rx_worker above */ snprintf(buf, sizeof(buf), "sw%d_p%u, %s", dev->data->dev_id, @@ -508,7 +509,7 @@ sw_port_def_conf(struct rte_eventdev *dev, uint8_t port_id, port_conf->new_event_threshold = 1024; port_conf->dequeue_depth = 16; port_conf->enqueue_depth = 16; - port_conf->disable_implicit_release = 0; + port_conf->event_port_cfg = 0; } static int diff --git a/drivers/event/sw/sw_evdev_selftest.c b/drivers/event/sw/sw_evdev_selftest.c index 38c21fa0f..a78d6cd0d 100644 --- a/drivers/event/sw/sw_evdev_selftest.c +++ b/drivers/event/sw/sw_evdev_selftest.c @@ -172,7 +172,7 @@ create_ports(struct test *t, int num_ports) .new_event_threshold = 1024, .dequeue_depth = 32, .enqueue_depth = 64, - .disable_implicit_release = 0, + .event_port_cfg = 0, }; if (num_ports > MAX_PORTS) return -1; @@ -1227,7 +1227,7 @@ port_reconfig_credits(struct test *t) .new_event_threshold = 128, .dequeue_depth = 32, .enqueue_depth = 64, - .disable_implicit_release = 0, + .event_port_cfg = 0, }; if (rte_event_port_setup(evdev, 0, &port_conf) < 0) { printf("%d Error setting up port\n", __LINE__); @@ -1317,7 +1317,7 @@ port_single_lb_reconfig(struct test *t) .new_event_threshold = 128, .dequeue_depth = 32, .enqueue_depth = 64, - .disable_implicit_release = 0, + .event_port_cfg = 0, }; if (rte_event_port_setup(evdev, 0, &port_conf) < 0) { printf("%d Error setting up port\n", __LINE__); @@ -3079,7 +3079,8 @@ worker_loopback(struct test *t, uint8_t disable_implicit_release) * only be initialized once - and this needs to be set for multiple runs */ conf.new_event_threshold = 512; - conf.disable_implicit_release = disable_implicit_release; + conf.event_port_cfg = disable_implicit_release ? + RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL : 0; if (rte_event_port_setup(evdev, 0, &conf) < 0) { printf("Error setting up RX port\n"); diff --git a/examples/eventdev_pipeline/pipeline_worker_generic.c b/examples/eventdev_pipeline/pipeline_worker_generic.c index 42ff4eeb9..a091da3ba 100644 --- a/examples/eventdev_pipeline/pipeline_worker_generic.c +++ b/examples/eventdev_pipeline/pipeline_worker_generic.c @@ -129,6 +129,7 @@ setup_eventdev_generic(struct worker_data *worker_data) struct rte_event_dev_config config = { .nb_event_queues = nb_queues, .nb_event_ports = nb_ports, + .nb_single_link_event_port_queues = 1, .nb_events_limit = 4096, .nb_event_queue_flows = 1024, .nb_event_port_dequeue_depth = 128, @@ -138,12 +139,13 @@ setup_eventdev_generic(struct worker_data *worker_data) .dequeue_depth = cdata.worker_cq_depth, .enqueue_depth = 64, .new_event_threshold = 4096, + .event_port_cfg = 0, }; struct rte_event_queue_conf wkr_q_conf = { .schedule_type = cdata.queue_type, .priority = RTE_EVENT_DEV_PRIORITY_NORMAL, .nb_atomic_flows = 1024, - .nb_atomic_order_sequences = 1024, + .nb_atomic_order_sequences = 1024, }; struct rte_event_queue_conf tx_q_conf = { .priority = RTE_EVENT_DEV_PRIORITY_HIGHEST, @@ -167,7 +169,8 @@ setup_eventdev_generic(struct worker_data *worker_data) disable_implicit_release = (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE); - wkr_p_conf.disable_implicit_release = disable_implicit_release; + wkr_p_conf.event_port_cfg = disable_implicit_release ? + RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL : 0; if (dev_info.max_num_events < config.nb_events_limit) config.nb_events_limit = dev_info.max_num_events; @@ -417,6 +420,7 @@ init_adapters(uint16_t nb_ports) .dequeue_depth = cdata.worker_cq_depth, .enqueue_depth = 64, .new_event_threshold = 4096, + .event_port_cfg = 0, }; if (adptr_p_conf.new_event_threshold > dev_info.max_num_events) diff --git a/examples/eventdev_pipeline/pipeline_worker_tx.c b/examples/eventdev_pipeline/pipeline_worker_tx.c index 55bb2f762..e8a9652aa 100644 --- a/examples/eventdev_pipeline/pipeline_worker_tx.c +++ b/examples/eventdev_pipeline/pipeline_worker_tx.c @@ -436,6 +436,7 @@ setup_eventdev_worker_tx_enq(struct worker_data *worker_data) struct rte_event_dev_config config = { .nb_event_queues = nb_queues, .nb_event_ports = nb_ports, + .nb_single_link_event_port_queues = 0, .nb_events_limit = 4096, .nb_event_queue_flows = 1024, .nb_event_port_dequeue_depth = 128, @@ -445,6 +446,7 @@ setup_eventdev_worker_tx_enq(struct worker_data *worker_data) .dequeue_depth = cdata.worker_cq_depth, .enqueue_depth = 64, .new_event_threshold = 4096, + .event_port_cfg = 0, }; struct rte_event_queue_conf wkr_q_conf = { .schedule_type = cdata.queue_type, @@ -746,6 +748,7 @@ init_adapters(uint16_t nb_ports) .dequeue_depth = cdata.worker_cq_depth, .enqueue_depth = 64, .new_event_threshold = 4096, + .event_port_cfg = 0, }; init_ports(nb_ports); diff --git a/examples/l2fwd-event/l2fwd_event_generic.c b/examples/l2fwd-event/l2fwd_event_generic.c index 2dc95e5f7..e01df0435 100644 --- a/examples/l2fwd-event/l2fwd_event_generic.c +++ b/examples/l2fwd-event/l2fwd_event_generic.c @@ -126,8 +126,9 @@ l2fwd_event_port_setup_generic(struct l2fwd_resources *rsrc) if (def_p_conf.enqueue_depth < event_p_conf.enqueue_depth) event_p_conf.enqueue_depth = def_p_conf.enqueue_depth; - event_p_conf.disable_implicit_release = - evt_rsrc->disable_implicit_release; + event_p_conf.event_port_cfg = 0; + if (evt_rsrc->disable_implicit_release) + event_p_conf.event_port_cfg |= RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL; evt_rsrc->deq_depth = def_p_conf.dequeue_depth; for (event_p_id = 0; event_p_id < evt_rsrc->evp.nb_ports; diff --git a/examples/l2fwd-event/l2fwd_event_internal_port.c b/examples/l2fwd-event/l2fwd_event_internal_port.c index 63d57b46c..f54327b4f 100644 --- a/examples/l2fwd-event/l2fwd_event_internal_port.c +++ b/examples/l2fwd-event/l2fwd_event_internal_port.c @@ -123,8 +123,9 @@ l2fwd_event_port_setup_internal_port(struct l2fwd_resources *rsrc) if (def_p_conf.enqueue_depth < event_p_conf.enqueue_depth) event_p_conf.enqueue_depth = def_p_conf.enqueue_depth; - event_p_conf.disable_implicit_release = - evt_rsrc->disable_implicit_release; + event_p_conf.event_port_cfg = 0; + if (evt_rsrc->disable_implicit_release) + event_p_conf.event_port_cfg |= RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL; for (event_p_id = 0; event_p_id < evt_rsrc->evp.nb_ports; event_p_id++) { diff --git a/examples/l3fwd/l3fwd_event_generic.c b/examples/l3fwd/l3fwd_event_generic.c index f8c98435d..409a4107e 100644 --- a/examples/l3fwd/l3fwd_event_generic.c +++ b/examples/l3fwd/l3fwd_event_generic.c @@ -115,8 +115,9 @@ l3fwd_event_port_setup_generic(void) if (def_p_conf.enqueue_depth < event_p_conf.enqueue_depth) event_p_conf.enqueue_depth = def_p_conf.enqueue_depth; - event_p_conf.disable_implicit_release = - evt_rsrc->disable_implicit_release; + event_p_conf.event_port_cfg = 0; + if (evt_rsrc->disable_implicit_release) + event_p_conf.event_port_cfg |= RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL; evt_rsrc->deq_depth = def_p_conf.dequeue_depth; for (event_p_id = 0; event_p_id < evt_rsrc->evp.nb_ports; diff --git a/examples/l3fwd/l3fwd_event_internal_port.c b/examples/l3fwd/l3fwd_event_internal_port.c index 03ac581d6..df410f10f 100644 --- a/examples/l3fwd/l3fwd_event_internal_port.c +++ b/examples/l3fwd/l3fwd_event_internal_port.c @@ -113,8 +113,9 @@ l3fwd_event_port_setup_internal_port(void) if (def_p_conf.enqueue_depth < event_p_conf.enqueue_depth) event_p_conf.enqueue_depth = def_p_conf.enqueue_depth; - event_p_conf.disable_implicit_release = - evt_rsrc->disable_implicit_release; + event_p_conf.event_port_cfg = 0; + if (evt_rsrc->disable_implicit_release) + event_p_conf.event_port_cfg |= RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL; for (event_p_id = 0; event_p_id < evt_rsrc->evp.nb_ports; event_p_id++) { diff --git a/lib/librte_eal/x86/include/rte_cpuflags.h b/lib/librte_eal/x86/include/rte_cpuflags.h index c1d20364d..ab2c3b379 100644 --- a/lib/librte_eal/x86/include/rte_cpuflags.h +++ b/lib/librte_eal/x86/include/rte_cpuflags.h @@ -130,6 +130,7 @@ enum rte_cpu_flag_t { RTE_CPUFLAG_CLDEMOTE, /**< Cache Line Demote */ RTE_CPUFLAG_MOVDIRI, /**< Direct Store Instructions */ RTE_CPUFLAG_MOVDIR64B, /**< Direct Store Instructions 64B */ + RTE_CPUFLAG_UMWAIT, /**< UMONITOR/UMWAIT */ RTE_CPUFLAG_AVX512VP2INTERSECT, /**< AVX512 Two Register Intersection */ /* The last item */ diff --git a/lib/librte_eal/x86/rte_cpuflags.c b/lib/librte_eal/x86/rte_cpuflags.c index 30439e795..69ac0dbce 100644 --- a/lib/librte_eal/x86/rte_cpuflags.c +++ b/lib/librte_eal/x86/rte_cpuflags.c @@ -137,6 +137,7 @@ const struct feature_entry rte_cpu_feature_table[] = { FEAT_DEF(CLDEMOTE, 0x00000007, 0, RTE_REG_ECX, 25) FEAT_DEF(MOVDIRI, 0x00000007, 0, RTE_REG_ECX, 27) FEAT_DEF(MOVDIR64B, 0x00000007, 0, RTE_REG_ECX, 28) + FEAT_DEF(UMWAIT, 0x00000007, 0, RTE_REG_ECX, 5) FEAT_DEF(AVX512VP2INTERSECT, 0x00000007, 0, RTE_REG_EDX, 8) }; diff --git a/lib/librte_eventdev/rte_event_eth_tx_adapter.c b/lib/librte_eventdev/rte_event_eth_tx_adapter.c index bb21dc407..8a72256de 100644 --- a/lib/librte_eventdev/rte_event_eth_tx_adapter.c +++ b/lib/librte_eventdev/rte_event_eth_tx_adapter.c @@ -286,7 +286,7 @@ txa_service_conf_cb(uint8_t __rte_unused id, uint8_t dev_id, return ret; } - pc->disable_implicit_release = 0; + pc->event_port_cfg = 0; ret = rte_event_port_setup(dev_id, port_id, pc); if (ret) { RTE_EDEV_LOG_ERR("failed to setup event port %u\n", diff --git a/lib/librte_eventdev/rte_eventdev.c b/lib/librte_eventdev/rte_eventdev.c index 82c177c73..4955ab1a0 100644 --- a/lib/librte_eventdev/rte_eventdev.c +++ b/lib/librte_eventdev/rte_eventdev.c @@ -437,9 +437,29 @@ rte_event_dev_configure(uint8_t dev_id, dev_id); return -EINVAL; } - if (dev_conf->nb_event_queues > info.max_event_queues) { - RTE_EDEV_LOG_ERR("%d nb_event_queues=%d > max_event_queues=%d", - dev_id, dev_conf->nb_event_queues, info.max_event_queues); + if (dev_conf->nb_event_queues > info.max_event_queues + + info.max_single_link_event_port_queue_pairs) { + RTE_EDEV_LOG_ERR("%d nb_event_queues=%d > max_event_queues=%d + max_single_link_event_port_queue_pairs=%d", + dev_id, dev_conf->nb_event_queues, + info.max_event_queues, + info.max_single_link_event_port_queue_pairs); + return -EINVAL; + } + if (dev_conf->nb_event_queues - + dev_conf->nb_single_link_event_port_queues > + info.max_event_queues) { + RTE_EDEV_LOG_ERR("id%d nb_event_queues=%d - nb_single_link_event_port_queues=%d > max_event_queues=%d", + dev_id, dev_conf->nb_event_queues, + dev_conf->nb_single_link_event_port_queues, + info.max_event_queues); + return -EINVAL; + } + if (dev_conf->nb_single_link_event_port_queues > + dev_conf->nb_event_queues) { + RTE_EDEV_LOG_ERR("dev%d nb_single_link_event_port_queues=%d > nb_event_queues=%d", + dev_id, + dev_conf->nb_single_link_event_port_queues, + dev_conf->nb_event_queues); return -EINVAL; } @@ -448,9 +468,31 @@ rte_event_dev_configure(uint8_t dev_id, RTE_EDEV_LOG_ERR("dev%d nb_event_ports cannot be zero", dev_id); return -EINVAL; } - if (dev_conf->nb_event_ports > info.max_event_ports) { - RTE_EDEV_LOG_ERR("id%d nb_event_ports=%d > max_event_ports= %d", - dev_id, dev_conf->nb_event_ports, info.max_event_ports); + if (dev_conf->nb_event_ports > info.max_event_ports + + info.max_single_link_event_port_queue_pairs) { + RTE_EDEV_LOG_ERR("id%d nb_event_ports=%d > max_event_ports=%d + max_single_link_event_port_queue_pairs=%d", + dev_id, dev_conf->nb_event_ports, + info.max_event_ports, + info.max_single_link_event_port_queue_pairs); + return -EINVAL; + } + if (dev_conf->nb_event_ports - + dev_conf->nb_single_link_event_port_queues + > info.max_event_ports) { + RTE_EDEV_LOG_ERR("id%d nb_event_ports=%d - nb_single_link_event_port_queues=%d > max_event_ports=%d", + dev_id, dev_conf->nb_event_ports, + dev_conf->nb_single_link_event_port_queues, + info.max_event_ports); + return -EINVAL; + } + + if (dev_conf->nb_single_link_event_port_queues > + dev_conf->nb_event_ports) { + RTE_EDEV_LOG_ERR( + "dev%d nb_single_link_event_port_queues=%d > nb_event_ports=%d", + dev_id, + dev_conf->nb_single_link_event_port_queues, + dev_conf->nb_event_ports); return -EINVAL; } @@ -737,7 +779,8 @@ rte_event_port_setup(uint8_t dev_id, uint8_t port_id, return -EINVAL; } - if (port_conf && port_conf->disable_implicit_release && + if (port_conf && + (port_conf->event_port_cfg & RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL) && !(dev->data->event_dev_cap & RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE)) { RTE_EDEV_LOG_ERR( @@ -809,6 +852,7 @@ rte_event_port_attr_get(uint8_t dev_id, uint8_t port_id, uint32_t attr_id, uint32_t *attr_value) { struct rte_eventdev *dev; + uint32_t config; if (!attr_value) return -EINVAL; @@ -830,6 +874,10 @@ rte_event_port_attr_get(uint8_t dev_id, uint8_t port_id, uint32_t attr_id, case RTE_EVENT_PORT_ATTR_NEW_EVENT_THRESHOLD: *attr_value = dev->data->ports_cfg[port_id].new_event_threshold; break; + case RTE_EVENT_PORT_ATTR_IMPLICIT_RELEASE_DISABLE: + config = dev->data->ports_cfg[port_id].event_port_cfg; + *attr_value = !!(config & RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL); + break; default: return -EINVAL; }; diff --git a/lib/librte_eventdev/rte_eventdev.h b/lib/librte_eventdev/rte_eventdev.h index 7dc832353..7f7a8a275 100644 --- a/lib/librte_eventdev/rte_eventdev.h +++ b/lib/librte_eventdev/rte_eventdev.h @@ -291,6 +291,13 @@ struct rte_event; * single queue to each port or map a single queue to many port. */ +#define RTE_EVENT_DEV_CAP_CARRY_FLOW_ID (1ULL << 9) +/**< Event device is capable of carrying the flow ID from the enqueued + * event to the dequeued event. If the flag is set, the dequeued event's flow + * ID matches the corresponding enqueued event's flow ID. If the flag is not + * set, the dequeued event's flow ID field is uninitialized. + */ + /* Event device priority levels */ #define RTE_EVENT_DEV_PRIORITY_HIGHEST 0 /**< Highest priority expressed across eventdev subsystem @@ -380,6 +387,10 @@ struct rte_event_dev_info { * event port by this device. * A device that does not support bulk enqueue will set this as 1. */ + uint32_t max_event_port_links; + /**< Maximum number of queues that can be linked to a single event + * port by this device. + */ int32_t max_num_events; /**< A *closed system* event dev has a limit on the number of events it * can manage at a time. An *open system* event dev does not have a @@ -387,6 +398,12 @@ struct rte_event_dev_info { */ uint32_t event_dev_cap; /**< Event device capabilities(RTE_EVENT_DEV_CAP_)*/ + uint8_t max_single_link_event_port_queue_pairs; + /**< Maximum number of event ports and queues that are optimized for + * (and only capable of) single-link configurations supported by this + * device. These ports and queues are not accounted for in + * max_event_ports or max_event_queues. + */ }; /** @@ -494,6 +511,14 @@ struct rte_event_dev_config { */ uint32_t event_dev_cfg; /**< Event device config flags(RTE_EVENT_DEV_CFG_)*/ + uint8_t nb_single_link_event_port_queues; + /**< Number of event ports and queues that will be singly-linked to + * each other. These are a subset of the overall event ports and + * queues; this value cannot exceed *nb_event_ports* or + * *nb_event_queues*. If the device has ports and queues that are + * optimized for single-link usage, this field is a hint for how many + * to allocate; otherwise, regular event ports and queues can be used. + */ }; /** @@ -671,6 +696,20 @@ rte_event_queue_attr_get(uint8_t dev_id, uint8_t queue_id, uint32_t attr_id, /* Event port specific APIs */ +/* Event port configuration bitmap flags */ +#define RTE_EVENT_PORT_CFG_DISABLE_IMPL_REL (1ULL << 0) +/**< Configure the port not to release outstanding events in + * rte_event_dev_dequeue_burst(). If set, all events received through + * the port must be explicitly released with RTE_EVENT_OP_RELEASE or + * RTE_EVENT_OP_FORWARD. Must be unset if the device is not + * RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE capable. + */ +#define RTE_EVENT_PORT_CFG_SINGLE_LINK (1ULL << 1) +/**< This event port links only to a single event queue. + * + * @see rte_event_port_setup(), rte_event_port_link() + */ + /** Event port configuration structure */ struct rte_event_port_conf { int32_t new_event_threshold; @@ -698,13 +737,7 @@ struct rte_event_port_conf { * which previously supplied to rte_event_dev_configure(). * Ignored when device is not RTE_EVENT_DEV_CAP_BURST_MODE capable. */ - uint8_t disable_implicit_release; - /**< Configure the port not to release outstanding events in - * rte_event_dev_dequeue_burst(). If true, all events received through - * the port must be explicitly released with RTE_EVENT_OP_RELEASE or - * RTE_EVENT_OP_FORWARD. Must be false when the device is not - * RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE capable. - */ + uint32_t event_port_cfg; /**< Port cfg flags(EVENT_PORT_CFG_) */ }; /** @@ -769,6 +802,10 @@ rte_event_port_setup(uint8_t dev_id, uint8_t port_id, * The new event threshold of the port */ #define RTE_EVENT_PORT_ATTR_NEW_EVENT_THRESHOLD 2 +/** + * The implicit release disable attribute of the port + */ +#define RTE_EVENT_PORT_ATTR_IMPLICIT_RELEASE_DISABLE 3 /** * Get an attribute from a port. diff --git a/lib/librte_eventdev/rte_eventdev_pmd_pci.h b/lib/librte_eventdev/rte_eventdev_pmd_pci.h index 443cd38c2..157299983 100644 --- a/lib/librte_eventdev/rte_eventdev_pmd_pci.h +++ b/lib/librte_eventdev/rte_eventdev_pmd_pci.h @@ -88,6 +88,60 @@ rte_event_pmd_pci_probe(struct rte_pci_driver *pci_drv, return -ENXIO; } +/** + * @internal + * Wrapper for use by pci drivers as a .probe function to attach to a event + * interface. Same as rte_event_pmd_pci_probe, except caller can specify + * the name. + */ +static inline int +rte_event_pmd_pci_probe_named(struct rte_pci_driver *pci_drv, + struct rte_pci_device *pci_dev, + size_t private_data_size, + eventdev_pmd_pci_callback_t devinit, + const char *name) +{ + struct rte_eventdev *eventdev; + + int retval; + + if (devinit == NULL) + return -EINVAL; + + eventdev = rte_event_pmd_allocate(name, + pci_dev->device.numa_node); + if (eventdev == NULL) + return -ENOMEM; + + if (rte_eal_process_type() == RTE_PROC_PRIMARY) { + eventdev->data->dev_private = + rte_zmalloc_socket( + "eventdev private structure", + private_data_size, + RTE_CACHE_LINE_SIZE, + rte_socket_id()); + + if (eventdev->data->dev_private == NULL) + rte_panic("Cannot allocate memzone for private " + "device data"); + } + + eventdev->dev = &pci_dev->device; + + /* Invoke PMD device initialization function */ + retval = devinit(eventdev); + if (retval == 0) + return 0; + + RTE_EDEV_LOG_ERR("driver %s: (vendor_id=0x%x device_id=0x%x)" + " failed", pci_drv->driver.name, + (unsigned int) pci_dev->id.vendor_id, + (unsigned int) pci_dev->id.device_id); + + rte_event_pmd_release(eventdev); + + return -ENXIO; +} /** * @internal -- 2.13.6