DPDK patches and discussions
 help / color / mirror / Atom feed
* [dpdk-dev] [PATCH 00/52] net/ice: base code update
@ 2020-06-03  2:39 Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 01/52] net/ice/base: add support for non-IP Layer2 protocol Qi Zhang
                   ` (53 more replies)
  0 siblings, 54 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang

Upgrade base with below main changes

1. add more protocol support - L2TPv3/ESP/AH/PFCP.
2. Add IPv6 prefix RSS support.
3. support GENEVE and VXLAN rules with VLAN.
4. Add E823L device IDs
5. couple bug fixes and code clean.

Qi Zhang (52):
  net/ice/base: add support for non-IP Layer2 protocol
  net/ice/base: add FDIR program status WB macro
  net/ice/base: disable profile merge for FDIR
  net/ice/base: avoid undefined behavior
  net/ice/base: consolidate implementation of MAC config set
  net/ice/base: report AOC PHY Types as Fiber
  net/ice/base: gate devices from FW link override
  net/ice/base: improve VSI filters rebuild
  net/ice/base: add AUI media type
  net/ice/base: fix variable type for ACL
  net/ice/base: update PHY type high max index value
  net/ice/base: consolidate VF Promiscuous mode
  net/ice/base: refactor flow director filter swap
  net/ice/base: change IPV6 training packet
  net/ice/base: group function protoypes together
  net/ice/base: cleanup comment formatting
  net/ice/base: add FDIR support for L2TPV3 ESP AH and PFCP
  net/ice/base: add FD completion report option
  net/ice/base: initialize Set PHY Configuration FEC fields
  net/ice/baes: add NVM help functions
  net/ice/base: allow GENEVE and VXLAN rules with VLAN
  net/ice/base: increase timeout after PFR
  net/ice/base: remove unnecessary braces
  net/ice/base: adjust function signature style format
  net/ice/base: add RSS support for IPv6 prefix
  net/ice/base: use macro for sizeof
  net/ice/base: add debug logs
  net/ice/base: return correct error code
  net/ice/base: remove unnecessary code
  net/ice/base: add support for more PPPoE packet type
  net/ice/base: reset flags when all rules are deleted
  net/ice/base: reset capabilities before parsing
  net/ice/base: add RL profile bit mask check
  net/ice/base: update the vsi handle to remaining VSI
  net/ice/base: correct return value
  net/ice/base: remove unneeded variable
  net/ice/base: fix for memory leak
  net/ice/base: add entries in Profile TCAM with priority
  net/ice/base: remove unimplemented function prototypes
  net/ice/base: add new API to check all autoneg enable bits
  net/ice/base: avoid PPPoE ipv4 overlap
  net/ice/base: initialize AQ failure variable when set fc
  net/ice/base: adjust scheduler default BW weight
  net/ice/base: distribute Tx queues evenly
  net/ice/base: add a new command to LLDP commands
  net/ice/base: remove unused code for VSI list free
  net/ice/base: fix reference count when update VSI list
  net/ice/base: add more tunnel type for IPv4 and IPv6
  net/ice/base: fix uninitialized flag
  net/ice/base: add more device ID support
  net/ice/base: add 1G SGMII PHY type
  net/ice/base: update IPV4 and IPV6 flow ptype masks

 drivers/net/ice/base/ice_acl.c           |  25 +-
 drivers/net/ice/base/ice_acl_ctrl.c      |  26 +-
 drivers/net/ice/base/ice_adminq_cmd.h    |  67 ++--
 drivers/net/ice/base/ice_bitops.h        |  10 +-
 drivers/net/ice/base/ice_common.c        | 309 ++++++++++++----
 drivers/net/ice/base/ice_common.h        |   6 +-
 drivers/net/ice/base/ice_controlq.c      |  48 +--
 drivers/net/ice/base/ice_dcb.c           |   3 +-
 drivers/net/ice/base/ice_devids.h        |  10 +
 drivers/net/ice/base/ice_fdir.c          | 338 ++++++++++++++++--
 drivers/net/ice/base/ice_fdir.h          | 106 +++---
 drivers/net/ice/base/ice_flex_pipe.c     |  92 +++--
 drivers/net/ice/base/ice_flow.c          | 275 +++++++++++----
 drivers/net/ice/base/ice_flow.h          |  44 ++-
 drivers/net/ice/base/ice_hw_autogen.h    |   4 +-
 drivers/net/ice/base/ice_lan_tx_rx.h     |  46 ++-
 drivers/net/ice/base/ice_nvm.c           |  72 +++-
 drivers/net/ice/base/ice_nvm.h           |  10 +
 drivers/net/ice/base/ice_protocol_type.h |  18 +-
 drivers/net/ice/base/ice_sched.c         | 104 ++++--
 drivers/net/ice/base/ice_switch.c        | 589 ++++++++++++++++++++++++++-----
 drivers/net/ice/base/ice_switch.h        |  36 +-
 drivers/net/ice/base/ice_type.h          |  20 +-
 drivers/net/ice/ice_ethdev.c             |   5 +
 drivers/net/ice/ice_fdir_filter.c        |  63 ++--
 drivers/net/ice/ice_hash.c               |  22 +-
 drivers/net/ice/ice_rxtx.c               |   4 +-
 27 files changed, 1816 insertions(+), 536 deletions(-)

-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 01/52] net/ice/base: add support for non-IP Layer2 protocol
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 02/52] net/ice/base: add FDIR program status WB macro Qi Zhang
                   ` (52 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Yahui Cao, Paul M . Stillwell Jr

FDIR can forward Ethernet packets with non-IP ethertype.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_fdir.c | 15 +++++++++++++++
 drivers/net/ice/base/ice_fdir.h |  2 ++
 drivers/net/ice/base/ice_flow.c | 29 ++++++++++++++++++++++-------
 drivers/net/ice/base/ice_flow.h |  1 +
 drivers/net/ice/base/ice_type.h |  1 +
 5 files changed, 41 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index 4e9aafc39..c92533223 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -102,6 +102,12 @@ static const u8 ice_fdir_ipv4_gtpu4_pkt[] = {
 	0x00, 0x00,
 };
 
+static const u8 ice_fdir_non_ip_l2_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
 static const u8 ice_fdir_tcpv6_pkt[] = {
 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
@@ -329,6 +335,11 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
 		ice_fdir_ipv4_gtpu4_pkt,
 	},
 	{
+		ICE_FLTR_PTYPE_NON_IP_L2,
+		sizeof(ice_fdir_non_ip_l2_pkt), ice_fdir_non_ip_l2_pkt,
+		sizeof(ice_fdir_non_ip_l2_pkt), ice_fdir_non_ip_l2_pkt,
+	},
+	{
 		ICE_FLTR_PTYPE_NONF_IPV6_TCP,
 		sizeof(ice_fdir_tcpv6_pkt), ice_fdir_tcpv6_pkt,
 		sizeof(ice_fdir_tcp6_tun_pkt), ice_fdir_tcp6_tun_pkt,
@@ -819,6 +830,10 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		ice_pkt_insert_u6_qfi(loc, ICE_IPV4_GTPU_QFI_OFFSET,
 				      input->gtpu_data.qfi);
 		break;
+	case ICE_FLTR_PTYPE_NON_IP_L2:
+		ice_pkt_insert_u16(loc, ICE_MAC_ETHTYPE_OFFSET,
+				   input->ext_data.ether_type);
+		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
 		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
 					 input->ip.v6.dst_ip);
diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
index 18656c55f..97553c8e7 100644
--- a/drivers/net/ice/base/ice_fdir.h
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -79,6 +79,7 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw);
 #define ICE_IPV6_SCTP_SRC_PORT_OFFSET	54
 #define ICE_IPV6_SCTP_DST_PORT_OFFSET	56
 
+#define ICE_MAC_ETHTYPE_OFFSET		12
 #define ICE_IPV4_TOS_OFFSET		15
 #define ICE_IPV4_TTL_OFFSET		22
 #define ICE_IPV6_TC_OFFSET		14
@@ -165,6 +166,7 @@ struct ice_fdir_udp_gtp {
 
 struct ice_fdir_extra {
 	u8 dst_mac[ETH_ALEN];	/* dest MAC address */
+	__be16 ether_type;      /* for NON_IP_L2 */
 	u32 usr_def[2];		/* user data */
 	__be16 vlan_type;	/* VLAN ethertype */
 	__be16 vlan_tag;	/* VLAN tag info */
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index e741f5940..90302a6cb 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -63,7 +63,7 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = {
 	/* ICE_FLOW_FIELD_IDX_C_VLAN */
 	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_VLAN, 14, ICE_FLOW_FLD_SZ_VLAN),
 	/* ICE_FLOW_FIELD_IDX_ETH_TYPE */
-	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_ETH, 12, ICE_FLOW_FLD_SZ_ETH_TYPE),
+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_ETH, 0, ICE_FLOW_FLD_SZ_ETH_TYPE),
 	/* IPv4 / IPv6 */
 	/* ICE_FLOW_FIELD_IDX_IPV4_DSCP */
 	ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_IPV4, 0, ICE_FLOW_FLD_SZ_IP_DSCP,
@@ -532,6 +532,17 @@ static const u32 ice_ptypes_nat_t_esp[] = {
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 };
 
+static const u32 ice_ptypes_mac_non_ip_ofos[] = {
+	0x00000846, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00400000, 0x03FFF000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+};
+
 /* Manage parameters and info. used during the creation of a flow profile */
 struct ice_flow_prof_params {
 	enum ice_block blk;
@@ -683,12 +694,6 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
 				       ICE_FLOW_PTYPE_MAX);
 		}
 
-		if (hdrs & ICE_FLOW_SEG_HDR_PPPOE) {
-			src = (const ice_bitmap_t *)ice_ptypes_pppoe;
-			ice_and_bitmap(params->ptypes, params->ptypes, src,
-				       ICE_FLOW_PTYPE_MAX);
-		}
-
 		if (hdrs & ICE_FLOW_SEG_HDR_IPV4) {
 			src = !i ? (const ice_bitmap_t *)ice_ptypes_ipv4_ofos :
 				(const ice_bitmap_t *)ice_ptypes_ipv4_il;
@@ -731,6 +736,16 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
 			}
 		}
 
+		if (hdrs & ICE_FLOW_SEG_HDR_ETH_NON_IP) {
+			src = (const ice_bitmap_t *)ice_ptypes_mac_non_ip_ofos;
+			ice_and_bitmap(params->ptypes, params->ptypes,
+				       src, ICE_FLOW_PTYPE_MAX);
+		} else if (hdrs & ICE_FLOW_SEG_HDR_PPPOE) {
+			src = (const ice_bitmap_t *)ice_ptypes_pppoe;
+			ice_and_bitmap(params->ptypes, params->ptypes, src,
+				       ICE_FLOW_PTYPE_MAX);
+		}
+
 		if (hdrs & ICE_FLOW_SEG_HDR_ICMP) {
 			src = !i ? (const ice_bitmap_t *)ice_ptypes_icmp_of :
 				(const ice_bitmap_t *)ice_ptypes_icmp_il;
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index c8a0483e3..9fb60a6d2 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -148,6 +148,7 @@ enum ice_flow_seg_hdr {
 	ICE_FLOW_SEG_HDR_ESP		= 0x00100000,
 	ICE_FLOW_SEG_HDR_AH		= 0x00200000,
 	ICE_FLOW_SEG_HDR_NAT_T_ESP	= 0x00400000,
+	ICE_FLOW_SEG_HDR_ETH_NON_IP	= 0x00800000,
 };
 
 /* These segements all have the same PTYPES, but are otherwise distinguished by
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 94ea44265..cf622178e 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -295,6 +295,7 @@ enum ice_fltr_ptype {
 	ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP,
 	ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP,
 	ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER,
+	ICE_FLTR_PTYPE_NON_IP_L2,
 	ICE_FLTR_PTYPE_FRAG_IPV4,
 	ICE_FLTR_PTYPE_NONF_IPV6_UDP,
 	ICE_FLTR_PTYPE_NONF_IPV6_TCP,
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 02/52] net/ice/base: add FDIR program status WB macro
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 01/52] net/ice/base: add support for non-IP Layer2 protocol Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 03/52] net/ice/base: disable profile merge for FDIR Qi Zhang
                   ` (51 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Yahui Cao, Paul M . Stillwell Jr

Add descriptor field offset and mask definition. It is used to parse
FDIR rx descriptor field value.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_lan_tx_rx.h | 44 ++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index a0e284a8d..99edcc8ae 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -175,6 +175,50 @@ struct ice_fltr_desc {
 			(0xFFFFFFFFULL << ICE_FXD_FLTR_QW1_FDID_S)
 #define ICE_FXD_FLTR_QW1_FDID_ZERO	0x0ULL
 
+/* definition for FD filter programming status descriptor WB format */
+#define ICE_FXD_FLTR_WB_QW0_BUKT_LEN_S	28
+#define ICE_FXD_FLTR_WB_QW0_BUKT_LEN_M	\
+			(0xFULL << ICE_FXD_FLTR_WB_QW0_BUKT_LEN_S)
+
+#define ICE_FXD_FLTR_WB_QW0_FLTR_STAT_S	32
+#define ICE_FXD_FLTR_WB_QW0_FLTR_STAT_M	\
+			(0xFFFFFFFFULL << ICE_FXD_FLTR_WB_QW0_FLTR_STAT_S)
+
+#define ICE_FXD_FLTR_WB_QW1_DD_S	0
+#define ICE_FXD_FLTR_WB_QW1_DD_M	(0x1ULL << ICE_FXD_FLTR_WB_QW1_DD_S)
+#define ICE_FXD_FLTR_WB_QW1_DD_YES	0x1ULL
+
+#define ICE_FXD_FLTR_WB_QW1_PROG_ID_S	1
+#define ICE_FXD_FLTR_WB_QW1_PROG_ID_M	\
+				(0x3ULL << ICE_FXD_FLTR_WB_QW1_PROG_ID_S)
+#define ICE_FXD_FLTR_WB_QW1_PROG_ADD	0x0ULL
+#define ICE_FXD_FLTR_WB_QW1_PROG_DEL	0x1ULL
+
+#define ICE_FXD_FLTR_WB_QW1_FAIL_S	4
+#define ICE_FXD_FLTR_WB_QW1_FAIL_M	(0x1ULL << ICE_FXD_FLTR_WB_QW1_FAIL_S)
+#define ICE_FXD_FLTR_WB_QW1_FAIL_YES	0x1ULL
+
+#define ICE_FXD_FLTR_WB_QW1_FAIL_PROF_S	5
+#define ICE_FXD_FLTR_WB_QW1_FAIL_PROF_M	\
+				(0x1ULL << ICE_FXD_FLTR_WB_QW1_FAIL_PROF_S)
+#define ICE_FXD_FLTR_WB_QW1_FAIL_PROF_YES	0x1ULL
+
+#define ICE_FXD_FLTR_WB_QW1_FLT_ADDR_S	8
+#define ICE_FXD_FLTR_WB_QW1_FLT_ADDR_M	\
+				(0x3FFFULL << ICE_FXD_FLTR_WB_QW1_FLT_ADDR_S)
+
+#define ICE_FXD_FLTR_WB_QW1_PKT_PROF_S	28
+#define ICE_FXD_FLTR_WB_QW1_PKT_PROF_M	\
+				(0x7FULL << ICE_FXD_FLTR_WB_QW1_PKT_PROF_S)
+
+#define ICE_FXD_FLTR_WB_QW1_BUKT_HASH_S	38
+#define ICE_FXD_FLTR_WB_QW1_BUKT_HASH_M	\
+				(0x3FFFFFF << ICE_FXD_FLTR_WB_QW1_BUKT_HASH_S)
+
+#define ICE_FXD_FLTR_WB_QW1_FAIL_PROF_M	\
+				(0x1ULL << ICE_FXD_FLTR_WB_QW1_FAIL_PROF_S)
+#define ICE_FXD_FLTR_WB_QW1_FAIL_PROF_YES	0x1ULL
+
 enum ice_rx_desc_status_bits {
 	/* Note: These are predefined bit offsets */
 	ICE_RX_DESC_STATUS_DD_S			= 0,
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 03/52] net/ice/base: disable profile merge for FDIR
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 01/52] net/ice/base: add support for non-IP Layer2 protocol Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 02/52] net/ice/base: add FDIR program status WB macro Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  6:42   ` Yang, Qiming
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 04/52] net/ice/base: avoid undefined behavior Qi Zhang
                   ` (50 subsequent siblings)
  53 siblings, 1 reply; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Yahui Cao, Paul M . Stillwell Jr

For Flow Director, we don't want to re-use a existed profile with the
same field vector and mask. Merging two different flow_type’s field
vector will also make them sharing trained rule and cause rule
interference.

For example:
issue rule A: IPV4_TCP matching tcp src&dst port 80  to queue 8
issue rule B: IPV6_TCP matching tcp src&dst port 200 to queue 20
Below behavior is found but not expected:
IPV4_TCP pkt with src&dst port 200 hits rule B and goes to queue 20
IPV6_TCP pkt with src&dst port 80  hits rule A and goes to queue 8

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flex_pipe.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 512ced6b8..2a7b74207 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2811,6 +2811,12 @@ ice_find_prof_id_with_mask(struct ice_hw *hw, enum ice_block blk,
 	struct ice_es *es = &hw->blk[blk].es;
 	u8 i;
 
+	/* For FD, we don't want to re-use a existed profile with the same
+	 * field vector and mask. This will cause rule interference.
+	 */
+	if (blk == ICE_BLK_FD)
+		return ICE_ERR_DOES_NOT_EXIST;
+
 	for (i = 0; i < (u8)es->count; i++) {
 		u16 off = i * es->fvw;
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 04/52] net/ice/base: avoid undefined behavior
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (2 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 03/52] net/ice/base: disable profile merge for FDIR Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 05/52] net/ice/base: consolidate implementation of MAC config set Qi Zhang
                   ` (49 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Bruce Allan, Paul M . Stillwell Jr

When writing the driver's struct ice_tlan_ctx structure, do not write the
8-bit element int_q_state with the associated internal-to-hardware field
which is 122-bits, otherwise the helper function ice_write_byte() will use
undefined behavior when setting the mask used for that write.  This should
not cause any functional change and will avoid use of undefined behavior.
Also, update a comment to highlight this structure element is not written.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c    | 17 +++++++++++++----
 drivers/net/ice/base/ice_common.h    |  4 +++-
 drivers/net/ice/base/ice_lan_tx_rx.h |  2 +-
 drivers/net/ice/ice_rxtx.c           |  4 ++--
 4 files changed, 19 insertions(+), 8 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 17ffdee00..4b4555f6f 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -996,7 +996,7 @@ ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
 
 	rlan_ctx->prefena = 1;
 
-	ice_set_ctx((u8 *)rlan_ctx, ctx_buf, ice_rlan_ctx_info);
+	ice_set_ctx(hw, (u8 *)rlan_ctx, ctx_buf, ice_rlan_ctx_info);
 	return ice_copy_rxq_ctx_to_hw(hw, ctx_buf, rxq_index);
 }
 
@@ -1119,7 +1119,7 @@ ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
 {
 	u8 ctx_buf[ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS * sizeof(u32)] = { 0 };
 
-	ice_set_ctx((u8 *)tx_cmpltnq_ctx, ctx_buf, ice_tx_cmpltnq_ctx_info);
+	ice_set_ctx(hw, (u8 *)tx_cmpltnq_ctx, ctx_buf, ice_tx_cmpltnq_ctx_info);
 	return ice_copy_tx_cmpltnq_ctx_to_hw(hw, ctx_buf, tx_cmpltnq_index);
 }
 
@@ -1210,7 +1210,8 @@ ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
 {
 	u8 ctx_buf[ICE_TX_DRBELL_Q_CTX_SIZE_DWORDS * sizeof(u32)] = { 0 };
 
-	ice_set_ctx((u8 *)tx_drbell_q_ctx, ctx_buf, ice_tx_drbell_q_ctx_info);
+	ice_set_ctx(hw, (u8 *)tx_drbell_q_ctx, ctx_buf,
+		    ice_tx_drbell_q_ctx_info);
 	return ice_copy_tx_drbell_q_ctx_to_hw(hw, ctx_buf, tx_drbell_q_index);
 }
 
@@ -3565,12 +3566,14 @@ ice_write_qword(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
 
 /**
  * ice_set_ctx - set context bits in packed structure
+ * @hw: pointer to the hardware structure
  * @src_ctx:  pointer to a generic non-packed context structure
  * @dest_ctx: pointer to memory for the packed structure
  * @ce_info:  a description of the structure to be transformed
  */
 enum ice_status
-ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
+ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,
+	    const struct ice_ctx_ele *ce_info)
 {
 	int f;
 
@@ -3579,6 +3582,12 @@ ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
 		 * using the correct size so that we are correct regardless
 		 * of the endianness of the machine.
 		 */
+		if (ce_info[f].width > (ce_info[f].size_of * BITS_PER_BYTE)) {
+			ice_debug(hw, ICE_DBG_QCTX,
+				  "Field %d width of %d bits larger than size of %d byte(s) ... skipping write\n",
+				  f, ce_info[f].width, ce_info[f].size_of);
+			continue;
+		}
 		switch (ce_info[f].size_of) {
 		case sizeof(u8):
 			ice_write_byte(src_ctx, dest_ctx, &ce_info[f]);
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 2a1077b90..6d971a644 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -114,7 +114,9 @@ enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
 void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode);
 extern const struct ice_ctx_ele ice_tlan_ctx_info[];
 enum ice_status
-ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info);
+ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,
+	    const struct ice_ctx_ele *ce_info);
+
 enum ice_status
 ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc,
 		void *buf, u16 buf_size, struct ice_sq_cd *cd);
diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index 99edcc8ae..012d129df 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -1135,7 +1135,7 @@ struct ice_tlan_ctx {
 	u8 drop_ena;
 	u8 cache_prof_idx;
 	u8 pkt_shaper_prof_idx;
-	u8 int_q_state;	/* width not needed - internal do not write */
+	u8 int_q_state;	/* width not needed - internal - DO NOT WRITE!!! */
 };
 
 /* LAN Tx Completion Queue data */
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index 1c9f31efd..5d6f693c5 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -481,7 +481,7 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
 	tx_ctx.tso_qnum = txq->reg_idx; /* index for tso state structure */
 	tx_ctx.legacy_int = 1; /* Legacy or Advanced Host Interface */
 
-	ice_set_ctx((uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,
+	ice_set_ctx(hw, (uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,
 		    ice_tlan_ctx_info);
 
 	txq->qtx_tail = hw->hw_addr + QTX_COMM_DBELL(txq->reg_idx);
@@ -653,7 +653,7 @@ ice_fdir_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
 	tx_ctx.tso_qnum = txq->reg_idx; /* index for tso state structure */
 	tx_ctx.legacy_int = 1; /* Legacy or Advanced Host Interface */
 
-	ice_set_ctx((uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,
+	ice_set_ctx(hw, (uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,
 		    ice_tlan_ctx_info);
 
 	txq->qtx_tail = hw->hw_addr + QTX_COMM_DBELL(txq->reg_idx);
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 05/52] net/ice/base: consolidate implementation of MAC config set
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (3 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 04/52] net/ice/base: avoid undefined behavior Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 06/52] net/ice/base: report AOC PHY Types as Fiber Qi Zhang
                   ` (48 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Anirudh Venkataramanan, Jeb Cramer,
	Paul M . Stillwell Jr

Consolidate implementation of ice_aq_set_mac_cfg for switch mode
and NIC mode. As per the specification, the driver needs to call
set_mac_cfg (opcode 0x0603) to be able to exercise jumbo frames.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c     | 65 ++++++++++++++++++++++-------------
 drivers/net/ice/base/ice_hw_autogen.h |  4 +--
 2 files changed, 44 insertions(+), 25 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 4b4555f6f..051eb8c64 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -410,6 +410,43 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
 }
 
 /**
+ * ice_fill_tx_timer_and_fc_thresh
+ * @hw: pointer to the HW struct
+ * @cmd: pointer to MAC cfg structure
+ *
+ * Add Tx timer and FC refresh threshold info to Set MAC Config AQ command
+ * descriptor
+ */
+static void
+ice_fill_tx_timer_and_fc_thresh(struct ice_hw *hw,
+				struct ice_aqc_set_mac_cfg *cmd)
+{
+	u16 fc_thres_val, tx_timer_val;
+	u32 val;
+
+	/* We read back the transmit timer and fc threshold value of
+	 * LFC. Thus, we will use index =
+	 * PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX.
+	 *
+	 * Also, because we are opearating on transmit timer and fc
+	 * threshold of LFC, we don't turn on any bit in tx_tmr_priority
+	 */
+#define IDX_OF_LFC PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX
+
+	/* Retrieve the transmit timer */
+	val = rd32(hw, PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA(IDX_OF_LFC));
+	tx_timer_val = val &
+		PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_HSEC_CTL_TX_PAUSE_QUANTA_M;
+	cmd->tx_tmr_value = CPU_TO_LE16(tx_timer_val);
+
+	/* Retrieve the fc threshold */
+	val = rd32(hw, PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(IDX_OF_LFC));
+	fc_thres_val = val & PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_M;
+
+	cmd->fc_refresh_threshold = CPU_TO_LE16(fc_thres_val);
+}
+
+/**
  * ice_aq_set_mac_cfg
  * @hw: pointer to the HW struct
  * @max_frame_size: Maximum Frame Size to be supported
@@ -420,10 +457,8 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
 enum ice_status
 ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd)
 {
-	u16 fc_threshold_val, tx_timer_val;
 	struct ice_aqc_set_mac_cfg *cmd;
 	struct ice_aq_desc desc;
-	u32 reg_val;
 
 	cmd = &desc.params.set_mac_cfg;
 
@@ -434,27 +469,7 @@ ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd)
 
 	cmd->max_frame_size = CPU_TO_LE16(max_frame_size);
 
-	/* We read back the transmit timer and fc threshold value of
-	 * LFC. Thus, we will use index =
-	 * PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX.
-	 *
-	 * Also, because we are opearating on transmit timer and fc
-	 * threshold of LFC, we don't turn on any bit in tx_tmr_priority
-	 */
-#define IDX_OF_LFC PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX
-
-	/* Retrieve the transmit timer */
-	reg_val = rd32(hw,
-		       PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA(IDX_OF_LFC));
-	tx_timer_val = reg_val &
-		PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_HSEC_CTL_TX_PAUSE_QUANTA_M;
-	cmd->tx_tmr_value = CPU_TO_LE16(tx_timer_val);
-
-	/* Retrieve the fc threshold */
-	reg_val = rd32(hw,
-		       PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(IDX_OF_LFC));
-	fc_threshold_val = reg_val & MAKEMASK(0xFFFF, 0);
-	cmd->fc_refresh_threshold = CPU_TO_LE16(fc_threshold_val);
+	ice_fill_tx_timer_and_fc_thresh(hw, cmd);
 
 	return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
 }
@@ -721,6 +736,10 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
 
 	if (status)
 		goto err_unroll_fltr_mgmt_struct;
+	/* enable jumbo frame support at MAC level */
+	status = ice_aq_set_mac_cfg(hw, ICE_AQ_SET_MAC_FRAME_SIZE_MAX, NULL);
+	if (status)
+		goto err_unroll_fltr_mgmt_struct;
 	/* Obtain counter base index which would be used by flow director */
 	status = ice_alloc_fd_res_cntr(hw, &hw->fd_ctr_base);
 	if (status)
diff --git a/drivers/net/ice/base/ice_hw_autogen.h b/drivers/net/ice/base/ice_hw_autogen.h
index 1c9c84dfb..572f481b7 100644
--- a/drivers/net/ice/base/ice_hw_autogen.h
+++ b/drivers/net/ice/base/ice_hw_autogen.h
@@ -5232,8 +5232,8 @@
 #define PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_HSEC_CTL_TX_PAUSE_QUANTA_M MAKEMASK(0xFFFF, 0)
 #define PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(_i) (0x001E3800 + ((_i) * 32)) /* _i=0...8 */ /* Reset Source: GLOBR */
 #define PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_MAX_INDEX 8
-#define PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_S 0
-#define PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_M MAKEMASK(0xFFFF, 0)
+#define PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_S 0
+#define PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_M MAKEMASK(0xFFFF, 0)
 #define PRTMAC_HSEC_CTL_TX_SA_PART1		0x001E3960 /* Reset Source: GLOBR */
 #define PRTMAC_HSEC_CTL_TX_SA_PART1_HSEC_CTL_TX_SA_PART1_S 0
 #define PRTMAC_HSEC_CTL_TX_SA_PART1_HSEC_CTL_TX_SA_PART1_M MAKEMASK(0xFFFFFFFF, 0)
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 06/52] net/ice/base: report AOC PHY Types as Fiber
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (4 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 05/52] net/ice/base: consolidate implementation of MAC config set Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 07/52] net/ice/base: gate devices from FW link override Qi Zhang
                   ` (47 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Doug Dziggel, Paul M . Stillwell Jr

Report AOC types as fiber instead of unknown

Signed-off-by: Doug Dziggel <douglas.a.dziggel@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 051eb8c64..38ffd5203 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -256,6 +256,15 @@ static enum ice_media_type ice_get_media_type(struct ice_port_info *pi)
 		case ICE_PHY_TYPE_LOW_100GBASE_SR2:
 		case ICE_PHY_TYPE_LOW_100GBASE_DR:
 			return ICE_MEDIA_FIBER;
+		case ICE_PHY_TYPE_LOW_10G_SFI_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_25G_AUI_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_40G_XLAUI_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_50G_LAUI2_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_50G_AUI2_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_50G_AUI1_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_100G_CAUI4_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_100G_AUI4_AOC_ACC:
+			return ICE_MEDIA_FIBER;
 		case ICE_PHY_TYPE_LOW_100BASE_TX:
 		case ICE_PHY_TYPE_LOW_1000BASE_T:
 		case ICE_PHY_TYPE_LOW_2500BASE_T:
@@ -307,6 +316,9 @@ static enum ice_media_type ice_get_media_type(struct ice_port_info *pi)
 			/* fall-through */
 		case ICE_PHY_TYPE_HIGH_100GBASE_KR2_PAM4:
 			return ICE_MEDIA_BACKPLANE;
+		case ICE_PHY_TYPE_HIGH_100G_CAUI2_AOC_ACC:
+		case ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC:
+			return ICE_MEDIA_FIBER;
 		}
 	}
 	return ICE_MEDIA_UNKNOWN;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 07/52] net/ice/base: gate devices from FW link override
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (5 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 06/52] net/ice/base: report AOC PHY Types as Fiber Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 08/52] net/ice/base: improve VSI filters rebuild Qi Zhang
                   ` (46 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Jeb Cramer, Paul M . Stillwell Jr

Currently, the FW link override feature is only permitted for E810
devices.  However, the ice_fw_supports_link_override() guards against FW
versions irrespective of the device. This assumes FW versions between
the families are aligned, which is not the case.

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 38ffd5203..499653c21 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -4357,6 +4357,10 @@ enum ice_fw_modes ice_get_fw_mode(struct ice_hw *hw)
  */
 bool ice_fw_supports_link_override(struct ice_hw *hw)
 {
+	/* Currently, only supported for E810 devices */
+	if (hw->mac_type != ICE_MAC_E810)
+		return false;
+
 	if (hw->api_maj_ver == ICE_FW_API_LINK_OVERRIDE_MAJ) {
 		if (hw->api_min_ver > ICE_FW_API_LINK_OVERRIDE_MIN)
 			return true;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 08/52] net/ice/base: improve VSI filters rebuild
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (6 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 07/52] net/ice/base: gate devices from FW link override Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 09/52] net/ice/base: add AUI media type Qi Zhang
                   ` (45 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Grzegorz Nitka, Paul M . Stillwell Jr

This change improve VSI filter configuration rebuild for
multiport configuration, ie. where 1 PF includes more than
one logical port. For some functions, association between
port and corresponding switch_info or port_info structure
has been lost because by default the pointer to the first
element of array (switch, port etc.) is passed as function
argument. With this change, pointer to proper element is
added an extra argument in relevant functions.

Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 59 +++++++++++++++++++++++++++++++--------
 drivers/net/ice/base/ice_switch.c | 38 ++++++++++++++++++-------
 drivers/net/ice/base/ice_switch.h |  5 +++-
 3 files changed, 79 insertions(+), 23 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 499653c21..aab560504 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -493,6 +493,7 @@ ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd)
 enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
 {
 	struct ice_switch_info *sw;
+	enum ice_status status;
 
 	hw->switch_info = (struct ice_switch_info *)
 			  ice_malloc(hw, sizeof(*hw->switch_info));
@@ -504,27 +505,36 @@ enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
 
 	INIT_LIST_HEAD(&sw->vsi_list_map_head);
 
-	return ice_init_def_sw_recp(hw, &hw->switch_info->recp_list);
+	status = ice_init_def_sw_recp(hw, &hw->switch_info->recp_list);
+	if (status) {
+		ice_free(hw, hw->switch_info);
+		return status;
+	}
+	return ICE_SUCCESS;
 }
 
 /**
- * ice_cleanup_fltr_mgmt_struct - cleanup filter management list and locks
+ * ice_cleanup_fltr_mgmt_single - clears single filter mngt struct
  * @hw: pointer to the HW struct
+ * @sw: pointer to switch info struct for which function clears filters
  */
-void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
+static void
+ice_cleanup_fltr_mgmt_single(struct ice_hw *hw, struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	struct ice_vsi_list_map_info *v_pos_map;
 	struct ice_vsi_list_map_info *v_tmp_map;
 	struct ice_sw_recipe *recps;
 	u8 i;
 
+	if (!sw)
+		return;
+
 	LIST_FOR_EACH_ENTRY_SAFE(v_pos_map, v_tmp_map, &sw->vsi_list_map_head,
 				 ice_vsi_list_map_info, list_entry) {
 		LIST_DEL(&v_pos_map->list_entry);
 		ice_free(hw, v_pos_map);
 	}
-	recps = hw->switch_info->recp_list;
+	recps = sw->recp_list;
 	for (i = 0; i < ICE_MAX_NUM_RECIPES; i++) {
 		struct ice_recp_grp_entry *rg_entry, *tmprg_entry;
 
@@ -564,12 +574,21 @@ void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
 		if (recps[i].root_buf)
 			ice_free(hw, recps[i].root_buf);
 	}
-	ice_rm_all_sw_replay_rule_info(hw);
+	ice_rm_sw_replay_rule_info(hw, sw);
 	ice_free(hw, sw->recp_list);
 	ice_free(hw, sw);
 }
 
 /**
+ * ice_cleanup_all_fltr_mgmt - cleanup filter management list and locks
+ * @hw: pointer to the HW struct
+ */
+void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
+{
+	ice_cleanup_fltr_mgmt_single(hw, hw->switch_info);
+}
+
+/**
  * ice_get_itr_intrl_gran
  * @hw: pointer to the HW struct
  *
@@ -4104,18 +4123,32 @@ ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
 }
 
 /**
+ * ice_is_main_vsi - checks whether the VSI is main VSI
+ * @hw: pointer to the HW struct
+ * @vsi_handle: VSI handle
+ *
+ * Checks whether the VSI is the main VSI (the first PF VSI created on
+ * given PF).
+ */
+static bool ice_is_main_vsi(struct ice_hw *hw, u16 vsi_handle)
+{
+	return vsi_handle == ICE_MAIN_VSI_HANDLE && hw->vsi_ctx[vsi_handle];
+}
+
+/**
  * ice_replay_pre_init - replay pre initialization
  * @hw: pointer to the HW struct
+ * @sw: pointer to switch info struct for which function initializes filters
  *
  * Initializes required config data for VSI, FD, ACL, and RSS before replay.
  */
-static enum ice_status ice_replay_pre_init(struct ice_hw *hw)
+static enum ice_status
+ice_replay_pre_init(struct ice_hw *hw, struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	u8 i;
 
 	/* Delete old entries from replay filter list head if there is any */
-	ice_rm_all_sw_replay_rule_info(hw);
+	ice_rm_sw_replay_rule_info(hw, sw);
 	/* In start of replay, move entries into replay_rules list, it
 	 * will allow adding rules entries back to filt_rules list,
 	 * which is operational list.
@@ -4138,14 +4171,16 @@ static enum ice_status ice_replay_pre_init(struct ice_hw *hw)
  */
 enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle)
 {
+	struct ice_switch_info *sw = hw->switch_info;
+	struct ice_port_info *pi = hw->port_info;
 	enum ice_status status;
 
 	if (!ice_is_vsi_valid(hw, vsi_handle))
 		return ICE_ERR_PARAM;
 
 	/* Replay pre-initialization if there is any */
-	if (vsi_handle == ICE_MAIN_VSI_HANDLE) {
-		status = ice_replay_pre_init(hw);
+	if (ice_is_main_vsi(hw, vsi_handle)) {
+		status = ice_replay_pre_init(hw, sw);
 		if (status)
 			return status;
 	}
@@ -4154,7 +4189,7 @@ enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle)
 	if (status)
 		return status;
 	/* Replay per VSI all filters */
-	status = ice_replay_vsi_all_fltr(hw, vsi_handle);
+	status = ice_replay_vsi_all_fltr(hw, pi, vsi_handle);
 	if (!status)
 		status = ice_replay_vsi_agg(hw, vsi_handle);
 	return status;
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 5b968b7ce..910fb5236 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -7460,6 +7460,8 @@ enum ice_status ice_replay_all_fltr(struct ice_hw *hw)
 /**
  * ice_replay_vsi_fltr - Replay filters for requested VSI
  * @hw: pointer to the hardware structure
+ * @pi: pointer to port information structure
+ * @sw: pointer to switch info struct for which function replays filters
  * @vsi_handle: driver VSI handle
  * @recp_id: Recipe ID for which rules need to be replayed
  * @list_head: list for which filters need to be replayed
@@ -7468,7 +7470,8 @@ enum ice_status ice_replay_all_fltr(struct ice_hw *hw)
  * It is required to pass valid VSI handle.
  */
 static enum ice_status
-ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
+ice_replay_vsi_fltr(struct ice_hw *hw, struct ice_port_info *pi,
+		    struct ice_switch_info *sw, u16 vsi_handle, u8 recp_id,
 		    struct LIST_HEAD_TYPE *list_head)
 {
 	struct ice_fltr_mgmt_list_entry *itr;
@@ -7478,7 +7481,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
 
 	if (LIST_EMPTY(list_head))
 		return status;
-	recp_list = &hw->switch_info->recp_list[recp_id];
+	recp_list = &sw->recp_list[recp_id];
 	hw_vsi_id = ice_get_hw_vsi_num(hw, vsi_handle);
 
 	LIST_FOR_EACH_ENTRY(itr, list_head, ice_fltr_mgmt_list_entry,
@@ -7492,7 +7495,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
 			if (f_entry.fltr_info.src_id == ICE_SRC_ID_VSI)
 				f_entry.fltr_info.src = hw_vsi_id;
 			status = ice_add_rule_internal(hw, recp_list,
-						       hw->port_info->lport,
+						       pi->lport,
 						       &f_entry);
 			if (status != ICE_SUCCESS)
 				goto end;
@@ -7512,7 +7515,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
 			status = ice_add_vlan_internal(hw, recp_list, &f_entry);
 		else
 			status = ice_add_rule_internal(hw, recp_list,
-						       hw->port_info->lport,
+						       pi->lport,
 						       &f_entry);
 		if (status != ICE_SUCCESS)
 			goto end;
@@ -7557,11 +7560,14 @@ ice_replay_vsi_adv_rule(struct ice_hw *hw, u16 vsi_handle,
 /**
  * ice_replay_vsi_all_fltr - replay all filters stored in bookkeeping lists
  * @hw: pointer to the hardware structure
+ * @pi: pointer to port information structure
  * @vsi_handle: driver VSI handle
  *
  * Replays filters for requested VSI via vsi_handle.
  */
-enum ice_status ice_replay_vsi_all_fltr(struct ice_hw *hw, u16 vsi_handle)
+enum ice_status
+ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi,
+			u16 vsi_handle)
 {
 	struct ice_switch_info *sw = hw->switch_info;
 	enum ice_status status;
@@ -7573,7 +7579,8 @@ enum ice_status ice_replay_vsi_all_fltr(struct ice_hw *hw, u16 vsi_handle)
 
 		head = &sw->recp_list[i].filt_replay_rules;
 		if (!sw->recp_list[i].adv_rule)
-			status = ice_replay_vsi_fltr(hw, vsi_handle, i, head);
+			status = ice_replay_vsi_fltr(hw, pi, sw, vsi_handle, i,
+						     head);
 		else
 			status = ice_replay_vsi_adv_rule(hw, vsi_handle, head);
 		if (status != ICE_SUCCESS)
@@ -7584,14 +7591,14 @@ enum ice_status ice_replay_vsi_all_fltr(struct ice_hw *hw, u16 vsi_handle)
 }
 
 /**
- * ice_rm_all_sw_replay_rule_info - deletes filter replay rules
+ * ice_rm_all_sw_replay_rule - helper function to delete filter replay rules
  * @hw: pointer to the HW struct
+ * @sw: pointer to switch info struct for which function removes filters
  *
- * Deletes the filter replay rules.
+ * Deletes the filter replay rules for given switch
  */
-void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw)
+void ice_rm_sw_replay_rule_info(struct ice_hw *hw, struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	u8 i;
 
 	if (!sw)
@@ -7609,3 +7616,14 @@ void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw)
 		}
 	}
 }
+
+/**
+ * ice_rm_all_sw_replay_rule_info - deletes filter replay rules
+ * @hw: pointer to the HW struct
+ *
+ * Deletes the filter replay rules.
+ */
+void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw)
+{
+	ice_rm_sw_replay_rule_info(hw, hw->switch_info);
+}
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 6bd50518f..ba7c56f44 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -485,7 +485,10 @@ ice_init_def_sw_recp(struct ice_hw *hw, struct ice_sw_recipe **recp_list);
 u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle);
 bool ice_is_vsi_valid(struct ice_hw *hw, u16 vsi_handle);
 
-enum ice_status ice_replay_vsi_all_fltr(struct ice_hw *hw, u16 vsi_handle);
+enum ice_status
+ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi,
+			u16 vsi_handle);
+void ice_rm_sw_replay_rule_info(struct ice_hw *hw, struct ice_switch_info *sw);
 void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw);
 bool ice_is_prof_rule(enum ice_sw_tunnel_type type);
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 09/52] net/ice/base: add AUI media type
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (7 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 08/52] net/ice/base: improve VSI filters rebuild Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 10/52] net/ice/base: fix variable type for ACL Qi Zhang
                   ` (44 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Doug Dziggel, Paul M . Stillwell Jr

Add and report AUI PHY types as an AUI media type

Signed-off-by: Doug Dziggel <douglas.a.dziggel@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 5 +++--
 drivers/net/ice/base/ice_type.h   | 1 +
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index aab560504..e266ba56c 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -291,7 +291,7 @@ static enum ice_media_type ice_get_media_type(struct ice_port_info *pi)
 		case ICE_PHY_TYPE_LOW_100G_AUI4:
 		case ICE_PHY_TYPE_LOW_100G_CAUI4:
 			if (ice_is_media_cage_present(pi))
-				return ICE_MEDIA_DA;
+				return ICE_MEDIA_AUI;
 			/* fall-through */
 		case ICE_PHY_TYPE_LOW_1000BASE_KX:
 		case ICE_PHY_TYPE_LOW_2500BASE_KX:
@@ -311,8 +311,9 @@ static enum ice_media_type ice_get_media_type(struct ice_port_info *pi)
 	} else {
 		switch (hw_link_info->phy_type_high) {
 		case ICE_PHY_TYPE_HIGH_100G_AUI2:
+		case ICE_PHY_TYPE_HIGH_100G_CAUI2:
 			if (ice_is_media_cage_present(pi))
-				return ICE_MEDIA_DA;
+				return ICE_MEDIA_AUI;
 			/* fall-through */
 		case ICE_PHY_TYPE_HIGH_100GBASE_KR2_PAM4:
 			return ICE_MEDIA_BACKPLANE;
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index cf622178e..3280d48d0 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -218,6 +218,7 @@ enum ice_media_type {
 	ICE_MEDIA_BASET,
 	ICE_MEDIA_BACKPLANE,
 	ICE_MEDIA_DA,
+	ICE_MEDIA_AUI,
 };
 
 /* Software VSI types. */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 10/52] net/ice/base: fix variable type for ACL
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (8 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 09/52] net/ice/base: add AUI media type Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 11/52] net/ice/base: update PHY type high max index value Qi Zhang
                   ` (43 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, stable, Paul M Stillwell Jr

The commit ef92cee94cdb ("ice-shared: Fix remaining minor casting
issues") changed the idx variable within ice_acl_add_entry() from
a u16 to a u8. This causes the code to truncate the values greater
than 255 to 255 or less when calling ice_aq_program_acl_entry()
resulting in the wrong TCAM index being programmed for the specified
rule. The result is that the rule action doesn't work correctly
(packets don't get routed to the correct queue or dropped if that
is the action). Fix the issue by changing the variable to be a u16
again.

Fixes: f3202a097f12 ("net/ice/base: add ACL module")
Cc: stable@dpdk.org

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_acl_ctrl.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_acl_ctrl.c b/drivers/net/ice/base/ice_acl_ctrl.c
index e67605141..39b399dd4 100644
--- a/drivers/net/ice/base/ice_acl_ctrl.c
+++ b/drivers/net/ice/base/ice_acl_ctrl.c
@@ -934,9 +934,10 @@ ice_acl_add_entry(struct ice_hw *hw, struct ice_acl_scen *scen,
 		  enum ice_acl_entry_prior prior, u8 *keys, u8 *inverts,
 		  struct ice_acl_act_entry *acts, u8 acts_cnt, u16 *entry_idx)
 {
-	u8 i, entry_tcam, num_cscd, idx, offset;
+	u8 i, entry_tcam, num_cscd, offset;
 	struct ice_aqc_acl_data buf;
 	enum ice_status status = ICE_SUCCESS;
+	u16 idx;
 
 	if (!scen)
 		return ICE_ERR_DOES_NOT_EXIST;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 11/52] net/ice/base: update PHY type high max index value
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (9 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 10/52] net/ice/base: fix variable type for ACL Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 12/52] net/ice/base: consolidate VF Promiscuous mode Qi Zhang
                   ` (42 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Chinh T Cao, Paul M . Stillwell Jr

As currently, we are supporting only 5 PHY_SPEEDs for phy_type_high.
Thus, we should adjust the value of ICE_PHY_TYPE_HIGH_MAX_INDEX to 5.

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_adminq_cmd.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 57a785508..a5d689dc8 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1331,7 +1331,7 @@ struct ice_aqc_get_phy_caps {
 #define ICE_PHY_TYPE_HIGH_100G_CAUI2		BIT_ULL(2)
 #define ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC	BIT_ULL(3)
 #define ICE_PHY_TYPE_HIGH_100G_AUI2		BIT_ULL(4)
-#define ICE_PHY_TYPE_HIGH_MAX_INDEX		19
+#define ICE_PHY_TYPE_HIGH_MAX_INDEX		5
 
 struct ice_aqc_get_phy_caps_data {
 	__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 12/52] net/ice/base: consolidate VF Promiscuous mode
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (10 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 11/52] net/ice/base: update PHY type high max index value Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 13/52] net/ice/base: refactor flow director filter swap Qi Zhang
                   ` (41 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Shibin Koikkara Reeny, Paul M . Stillwell Jr

Consolidate the Promiscuous rule for SMBM on the chosen logical port.

Signed-off-by: Shibin Koikkara Reeny <shibin.koikkara.reeny@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 145 ++++++++++++++++++++++++++++++--------
 1 file changed, 115 insertions(+), 30 deletions(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 910fb5236..f5dd86bf4 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -4354,17 +4354,17 @@ static u8 ice_determine_promisc_mask(struct ice_fltr_info *fi)
 }
 
 /**
- * ice_get_vsi_promisc - get promiscuous mode of given VSI
+ * _ice_get_vsi_promisc - get promiscuous mode of given VSI
  * @hw: pointer to the hardware structure
  * @vsi_handle: VSI handle to retrieve info from
  * @promisc_mask: pointer to mask to be filled in
  * @vid: VLAN ID of promisc VLAN VSI
+ * @sw: pointer to switch info struct for which function add rule
  */
-enum ice_status
-ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
-		    u16 *vid)
+static enum ice_status
+_ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+		     u16 *vid, struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	struct ice_fltr_mgmt_list_entry *itr;
 	struct LIST_HEAD_TYPE *rule_head;
 	struct ice_lock *rule_lock;	/* Lock to protect filter rule list */
@@ -4394,17 +4394,32 @@ ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
 }
 
 /**
- * ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI
+ * ice_get_vsi_promisc - get promiscuous mode of given VSI
  * @hw: pointer to the hardware structure
  * @vsi_handle: VSI handle to retrieve info from
  * @promisc_mask: pointer to mask to be filled in
  * @vid: VLAN ID of promisc VLAN VSI
  */
 enum ice_status
-ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
-			 u16 *vid)
+ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+		    u16 *vid)
+{
+	return _ice_get_vsi_promisc(hw, vsi_handle, promisc_mask,
+				    vid, hw->switch_info);
+}
+
+/**
+ * ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to retrieve info from
+ * @promisc_mask: pointer to mask to be filled in
+ * @vid: VLAN ID of promisc VLAN VSI
+ * @sw: pointer to switch info struct for which function add rule
+ */
+static enum ice_status
+_ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+			  u16 *vid, struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	struct ice_fltr_mgmt_list_entry *itr;
 	struct LIST_HEAD_TYPE *rule_head;
 	struct ice_lock *rule_lock;	/* Lock to protect filter rule list */
@@ -4434,6 +4449,21 @@ ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
 }
 
 /**
+ * ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to retrieve info from
+ * @promisc_mask: pointer to mask to be filled in
+ * @vid: VLAN ID of promisc VLAN VSI
+ */
+enum ice_status
+ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+			 u16 *vid)
+{
+	return _ice_get_vsi_vlan_promisc(hw, vsi_handle, promisc_mask,
+					 vid, hw->switch_info);
+}
+
+/**
  * ice_remove_promisc - Remove promisc based filter rules
  * @hw: pointer to the hardware structure
  * @recp_id: recipe ID for which the rule needs to removed
@@ -4458,17 +4488,17 @@ ice_remove_promisc(struct ice_hw *hw, u8 recp_id,
 }
 
 /**
- * ice_clear_vsi_promisc - clear specified promiscuous mode(s) for given VSI
+ * _ice_clear_vsi_promisc - clear specified promiscuous mode(s)
  * @hw: pointer to the hardware structure
  * @vsi_handle: VSI handle to clear mode
  * @promisc_mask: mask of promiscuous config bits to clear
  * @vid: VLAN ID to clear VLAN promiscuous
+ * @sw: pointer to switch info struct for which function add rule
  */
-enum ice_status
-ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
-		      u16 vid)
+static enum ice_status
+_ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
+		       u16 vid, struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	struct ice_fltr_list_entry *fm_entry, *tmp;
 	struct LIST_HEAD_TYPE remove_list_head;
 	struct ice_fltr_mgmt_list_entry *itr;
@@ -4533,14 +4563,32 @@ ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
 }
 
 /**
- * ice_set_vsi_promisc - set given VSI to given promiscuous mode(s)
+ * ice_clear_vsi_promisc - clear specified promiscuous mode(s) for given VSI
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to clear mode
+ * @promisc_mask: mask of promiscuous config bits to clear
+ * @vid: VLAN ID to clear VLAN promiscuous
+ */
+enum ice_status
+ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,
+		      u8 promisc_mask, u16 vid)
+{
+	return _ice_clear_vsi_promisc(hw, vsi_handle, promisc_mask,
+				      vid, hw->switch_info);
+}
+
+/**
+ * _ice_set_vsi_promisc - set given VSI to given promiscuous mode(s)
  * @hw: pointer to the hardware structure
  * @vsi_handle: VSI handle to configure
  * @promisc_mask: mask of promiscuous config bits
  * @vid: VLAN ID to set VLAN promiscuous
+ * @lport: logical port number to configure promisc mode
+ * @sw: pointer to switch info struct for which function add rule
  */
-enum ice_status
-ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask, u16 vid)
+static enum ice_status
+_ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
+		     u16 vid, u8 lport, struct ice_switch_info *sw)
 {
 	enum { UCAST_FLTR = 1, MCAST_FLTR, BCAST_FLTR };
 	struct ice_fltr_list_entry f_list_entry;
@@ -4631,17 +4679,16 @@ ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask, u16 vid)
 			new_fltr.src = hw_vsi_id;
 		} else {
 			new_fltr.flag |= ICE_FLTR_RX;
-			new_fltr.src = hw->port_info->lport;
+			new_fltr.src = lport;
 		}
 
 		new_fltr.fltr_act = ICE_FWD_TO_VSI;
 		new_fltr.vsi_handle = vsi_handle;
 		new_fltr.fwd_id.hw_vsi_id = hw_vsi_id;
 		f_list_entry.fltr_info = new_fltr;
-		recp_list = &hw->switch_info->recp_list[recipe_id];
+		recp_list = &sw->recp_list[recipe_id];
 
-		status = ice_add_rule_internal(hw, recp_list,
-					       hw->port_info->lport,
+		status = ice_add_rule_internal(hw, recp_list, lport,
 					       &f_list_entry);
 		if (status != ICE_SUCCESS)
 			goto set_promisc_exit;
@@ -4652,19 +4699,37 @@ ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask, u16 vid)
 }
 
 /**
- * ice_set_vlan_vsi_promisc
+ * ice_set_vsi_promisc - set given VSI to given promiscuous mode(s)
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to configure
+ * @promisc_mask: mask of promiscuous config bits
+ * @vid: VLAN ID to set VLAN promiscuous
+ */
+enum ice_status
+ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
+		    u16 vid)
+{
+	return _ice_set_vsi_promisc(hw, vsi_handle, promisc_mask, vid,
+				    hw->port_info->lport,
+				    hw->switch_info);
+}
+
+/**
+ * _ice_set_vlan_vsi_promisc
  * @hw: pointer to the hardware structure
  * @vsi_handle: VSI handle to configure
  * @promisc_mask: mask of promiscuous config bits
  * @rm_vlan_promisc: Clear VLANs VSI promisc mode
+ * @lport: logical port number to configure promisc mode
+ * @sw: pointer to switch info struct for which function add rule
  *
  * Configure VSI with all associated VLANs to given promiscuous mode(s)
  */
-enum ice_status
-ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
-			 bool rm_vlan_promisc)
+static enum ice_status
+_ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
+			  bool rm_vlan_promisc, u8 lport,
+			  struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	struct ice_fltr_list_entry *list_itr, *tmp;
 	struct LIST_HEAD_TYPE vsi_list_head;
 	struct LIST_HEAD_TYPE *vlan_head;
@@ -4686,11 +4751,13 @@ ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
 			    list_entry) {
 		vlan_id = list_itr->fltr_info.l_data.vlan.vlan_id;
 		if (rm_vlan_promisc)
-			status = ice_clear_vsi_promisc(hw, vsi_handle,
-						       promisc_mask, vlan_id);
+			status =  _ice_clear_vsi_promisc(hw, vsi_handle,
+							 promisc_mask,
+							 vlan_id, sw);
 		else
-			status = ice_set_vsi_promisc(hw, vsi_handle,
-						     promisc_mask, vlan_id);
+			status =  _ice_set_vsi_promisc(hw, vsi_handle,
+						       promisc_mask, vlan_id,
+						       lport, sw);
 		if (status)
 			break;
 	}
@@ -4705,6 +4772,24 @@ ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
 }
 
 /**
+ * ice_set_vlan_vsi_promisc
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to configure
+ * @promisc_mask: mask of promiscuous config bits
+ * @rm_vlan_promisc: Clear VLANs VSI promisc mode
+ *
+ * Configure VSI with all associated VLANs to given promiscuous mode(s)
+ */
+enum ice_status
+ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
+			 bool rm_vlan_promisc)
+{
+	return _ice_set_vlan_vsi_promisc(hw, vsi_handle, promisc_mask,
+					 rm_vlan_promisc, hw->port_info->lport,
+					 hw->switch_info);
+}
+
+/**
  * ice_remove_vsi_lkup_fltr - Remove lookup type filters for a VSI
  * @hw: pointer to the hardware structure
  * @vsi_handle: VSI handle to remove filters from
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 13/52] net/ice/base: refactor flow director filter swap
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (11 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 12/52] net/ice/base: consolidate VF Promiscuous mode Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 14/52] net/ice/base: change IPV6 training packet Qi Zhang
                   ` (40 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Henry Tieman, Paul M . Stillwell Jr

Move the swap of flow director addresses and ports into training packet
generation. This reduces the code written for ACL.

Signed-off-by: Henry Tieman <henry.w.tieman@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_fdir.c   | 59 ++++++++++++++++++++-------------------
 drivers/net/ice/ice_fdir_filter.c | 32 ++++++++++-----------
 2 files changed, 47 insertions(+), 44 deletions(-)

diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index c92533223..2257eba60 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -764,16 +764,19 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		loc = &pkt[ICE_FDIR_TUN_PKT_OFF];
 	}
 
+	/* Reverse the src and dst, since the HW expects them to be from Tx
+	 * perspective. The input from user is from Rx filter perspective.
+	 */
 	switch (flow) {
 	case ICE_FLTR_PTYPE_NONF_IPV4_TCP:
 		ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET,
-				   input->ip.v4.dst_ip);
+				   input->ip.v4.src_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV4_TCP_DST_PORT_OFFSET,
-				   input->ip.v4.dst_port);
+				   input->ip.v4.src_port);
 		ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
-				   input->ip.v4.src_ip);
+				   input->ip.v4.dst_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV4_TCP_SRC_PORT_OFFSET,
-				   input->ip.v4.src_port);
+				   input->ip.v4.dst_port);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl);
 		ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac);
@@ -782,35 +785,35 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV4_UDP:
 		ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET,
-				   input->ip.v4.dst_ip);
+				   input->ip.v4.src_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV4_UDP_DST_PORT_OFFSET,
-				   input->ip.v4.dst_port);
+				   input->ip.v4.src_port);
 		ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
-				   input->ip.v4.src_ip);
+				   input->ip.v4.dst_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV4_UDP_SRC_PORT_OFFSET,
-				   input->ip.v4.src_port);
+				   input->ip.v4.dst_port);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl);
 		ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV4_SCTP:
 		ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET,
-				   input->ip.v4.dst_ip);
+				   input->ip.v4.src_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_DST_PORT_OFFSET,
-				   input->ip.v4.dst_port);
+				   input->ip.v4.src_port);
 		ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
-				   input->ip.v4.src_ip);
+				   input->ip.v4.dst_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_SRC_PORT_OFFSET,
-				   input->ip.v4.src_port);
+				   input->ip.v4.dst_port);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl);
 		ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV4_OTHER:
 		ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET,
-				   input->ip.v4.dst_ip);
-		ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
 				   input->ip.v4.src_ip);
+		ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
+				   input->ip.v4.dst_ip);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl);
 		ice_pkt_insert_u8(loc, ICE_IPV4_PROTO_OFFSET,
@@ -836,48 +839,48 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
 		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
-					 input->ip.v6.dst_ip);
-		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
 					 input->ip.v6.src_ip);
+		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
+					 input->ip.v6.dst_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV6_TCP_DST_PORT_OFFSET,
-				   input->ip.v6.dst_port);
-		ice_pkt_insert_u16(loc, ICE_IPV6_TCP_SRC_PORT_OFFSET,
 				   input->ip.v6.src_port);
+		ice_pkt_insert_u16(loc, ICE_IPV6_TCP_SRC_PORT_OFFSET,
+				   input->ip.v6.dst_port);
 		ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc);
 		ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim);
 		ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_UDP:
 		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
-					 input->ip.v6.dst_ip);
-		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
 					 input->ip.v6.src_ip);
+		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
+					 input->ip.v6.dst_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV6_UDP_DST_PORT_OFFSET,
-				   input->ip.v6.dst_port);
-		ice_pkt_insert_u16(loc, ICE_IPV6_UDP_SRC_PORT_OFFSET,
 				   input->ip.v6.src_port);
+		ice_pkt_insert_u16(loc, ICE_IPV6_UDP_SRC_PORT_OFFSET,
+				   input->ip.v6.dst_port);
 		ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc);
 		ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim);
 		ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_SCTP:
 		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
-					 input->ip.v6.dst_ip);
-		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
 					 input->ip.v6.src_ip);
+		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
+					 input->ip.v6.dst_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_DST_PORT_OFFSET,
-				   input->ip.v6.dst_port);
-		ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_SRC_PORT_OFFSET,
 				   input->ip.v6.src_port);
+		ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_SRC_PORT_OFFSET,
+				   input->ip.v6.dst_port);
 		ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc);
 		ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim);
 		ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_OTHER:
 		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
-					 input->ip.v6.dst_ip);
-		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
 					 input->ip.v6.src_ip);
+		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
+					 input->ip.v6.dst_ip);
 		ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc);
 		ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim);
 		ice_pkt_insert_u8(loc, ICE_IPV6_PROTO_OFFSET,
diff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c
index 69c714c59..19fa41afc 100644
--- a/drivers/net/ice/ice_fdir_filter.c
+++ b/drivers/net/ice/ice_fdir_filter.c
@@ -1676,9 +1676,9 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
 					input_set |= ICE_INSET_IPV4_PROTO;
 
 				filter->input.ip.v4.dst_ip =
-					ipv4_spec->hdr.src_addr;
-				filter->input.ip.v4.src_ip =
 					ipv4_spec->hdr.dst_addr;
+				filter->input.ip.v4.src_ip =
+					ipv4_spec->hdr.src_addr;
 				filter->input.ip.v4.tos =
 					ipv4_spec->hdr.type_of_service;
 				filter->input.ip.v4.ttl =
@@ -1723,9 +1723,9 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
 					input_set |= ICE_INSET_IPV6_HOP_LIMIT;
 
 				rte_memcpy(filter->input.ip.v6.dst_ip,
-					   ipv6_spec->hdr.src_addr, 16);
-				rte_memcpy(filter->input.ip.v6.src_ip,
 					   ipv6_spec->hdr.dst_addr, 16);
+				rte_memcpy(filter->input.ip.v6.src_ip,
+					   ipv6_spec->hdr.src_addr, 16);
 
 				vtc_flow_cpu =
 				      rte_be_to_cpu_32(ipv6_spec->hdr.vtc_flow);
@@ -1777,14 +1777,14 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
 				/* Get filter info */
 				if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
 					filter->input.ip.v4.dst_port =
-						tcp_spec->hdr.src_port;
-					filter->input.ip.v4.src_port =
 						tcp_spec->hdr.dst_port;
+					filter->input.ip.v4.src_port =
+						tcp_spec->hdr.src_port;
 				} else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
 					filter->input.ip.v6.dst_port =
-						tcp_spec->hdr.src_port;
-					filter->input.ip.v6.src_port =
 						tcp_spec->hdr.dst_port;
+					filter->input.ip.v6.src_port =
+						tcp_spec->hdr.src_port;
 				}
 			}
 			break;
@@ -1820,14 +1820,14 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
 				/* Get filter info */
 				if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
 					filter->input.ip.v4.dst_port =
-						udp_spec->hdr.src_port;
-					filter->input.ip.v4.src_port =
 						udp_spec->hdr.dst_port;
+					filter->input.ip.v4.src_port =
+						udp_spec->hdr.src_port;
 				} else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
 					filter->input.ip.v6.src_port =
-						udp_spec->hdr.dst_port;
-					filter->input.ip.v6.dst_port =
 						udp_spec->hdr.src_port;
+					filter->input.ip.v6.dst_port =
+						udp_spec->hdr.dst_port;
 				}
 			}
 			break;
@@ -1862,14 +1862,14 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
 				/* Get filter info */
 				if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
 					filter->input.ip.v4.dst_port =
-						sctp_spec->hdr.src_port;
-					filter->input.ip.v4.src_port =
 						sctp_spec->hdr.dst_port;
+					filter->input.ip.v4.src_port =
+						sctp_spec->hdr.src_port;
 				} else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
 					filter->input.ip.v6.dst_port =
-						sctp_spec->hdr.src_port;
-					filter->input.ip.v6.src_port =
 						sctp_spec->hdr.dst_port;
+					filter->input.ip.v6.src_port =
+						sctp_spec->hdr.src_port;
 				}
 			}
 			break;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 14/52] net/ice/base: change IPV6 training packet
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (12 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 13/52] net/ice/base: refactor flow director filter swap Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 15/52] net/ice/base: group function protoypes together Qi Zhang
                   ` (39 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M . Stillwell Jr

Add additional UDP payload to allow for additional headers such as ESP.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index f5dd86bf4..600e1126c 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -446,7 +446,7 @@ static const u8 dummy_udp_ipv6_packet[] = {
 	0x86, 0xDD,		/* ICE_ETYPE_OL 12 */
 
 	0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 40 */
-	0x00, 0x08, 0x11, 0x00, /* Next header UDP*/
+	0x00, 0x10, 0x11, 0x00, /* Next header UDP */
 	0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00,
@@ -457,7 +457,10 @@ static const u8 dummy_udp_ipv6_packet[] = {
 	0x00, 0x00, 0x00, 0x00,
 
 	0x00, 0x00, 0x00, 0x00, /* ICE_UDP_ILOS 54 */
-	0x00, 0x08, 0x00, 0x00,
+	0x00, 0x10, 0x00, 0x00,
+
+	0x00, 0x00, 0x00, 0x00, /* needed for ESP packets */
+	0x00, 0x00, 0x00, 0x00,
 
 	0x00, 0x00, /* 2 bytes for 4 byte alignment */
 };
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 15/52] net/ice/base: group function protoypes together
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (13 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 14/52] net/ice/base: change IPV6 training packet Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 16/52] net/ice/base: cleanup comment formatting Qi Zhang
                   ` (38 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Tony Nguyen, Paul M . Stillwell Jr

There are some function prototypes at the beginning of the file and
some at the end, group them all together so that they are in one
consistent location.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_fdir.h | 83 ++++++++++++++++++++---------------------
 1 file changed, 41 insertions(+), 42 deletions(-)

diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
index 97553c8e7..b39ce0bbf 100644
--- a/drivers/net/ice/base/ice_fdir.h
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -7,47 +7,6 @@
 
 #include "ice_common.h"
 
-/* Flow Director (FD) Filter Programming descriptor */
-struct ice_fd_fltr_desc_ctx {
-	u32 fdid;
-	u16 qindex;
-	u16 cnt_index;
-	u16 fd_vsi;
-	u16 flex_val;
-	u8 comp_q;
-	u8 comp_report;
-	u8 fd_space;
-	u8 cnt_ena;
-	u8 evict_ena;
-	u8 toq;
-	u8 toq_prio;
-	u8 dpu_recipe;
-	u8 drop;
-	u8 flex_prio;
-	u8 flex_mdid;
-	u8 dtype;
-	u8 pcmd;
-	u8 desc_prof_prio;
-	u8 desc_prof;
-	u8 swap;
-	u8 fdid_prio;
-	u8 fdid_mdid;
-};
-
-enum ice_status ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id);
-enum ice_status ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id);
-void ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx);
-enum ice_status
-ice_alloc_fd_guar_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
-enum ice_status
-ice_free_fd_guar_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
-enum ice_status
-ice_alloc_fd_shrd_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
-enum ice_status
-ice_free_fd_shrd_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
-enum ice_status ice_clear_vsi_fd_table(struct ice_hw *hw, u16 vsi_num);
-enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw);
-
 #define ICE_FDIR_IP_PROTOCOLS
 #define ICE_IP_PROTO_TCP		6
 #define ICE_IP_PROTO_UDP		17
@@ -111,6 +70,33 @@ enum ice_fltr_prgm_desc_fd_status {
 	ICE_FLTR_PRGM_DESC_FD_STATUS_8FLEX_BYTES,
 };
 
+/* Flow Director (FD) Filter Programming descriptor */
+struct ice_fd_fltr_desc_ctx {
+	u32 fdid;
+	u16 qindex;
+	u16 cnt_index;
+	u16 fd_vsi;
+	u16 flex_val;
+	u8 comp_q;
+	u8 comp_report;
+	u8 fd_space;
+	u8 cnt_ena;
+	u8 evict_ena;
+	u8 toq;
+	u8 toq_prio;
+	u8 dpu_recipe;
+	u8 drop;
+	u8 flex_prio;
+	u8 flex_mdid;
+	u8 dtype;
+	u8 pcmd;
+	u8 desc_prof_prio;
+	u8 desc_prof;
+	u8 swap;
+	u8 fdid_prio;
+	u8 fdid_mdid;
+};
+
 #define ICE_FLTR_PRGM_FLEX_WORD_SIZE	sizeof(__be16)
 
 struct ice_rx_flow_userdef {
@@ -207,7 +193,7 @@ struct ice_fdir_fltr {
 	bool acl_fltr;
 };
 
-/* Dummy packet filter definition structure. */
+/* Dummy packet filter definition structure */
 struct ice_fdir_base_pkt {
 	enum ice_fltr_ptype flow;
 	u16 pkt_len;
@@ -216,6 +202,19 @@ struct ice_fdir_base_pkt {
 	const u8 *tun_pkt;
 };
 
+enum ice_status ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id);
+enum ice_status ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id);
+void ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx);
+enum ice_status
+ice_alloc_fd_guar_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
+enum ice_status
+ice_free_fd_guar_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
+enum ice_status
+ice_alloc_fd_shrd_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
+enum ice_status
+ice_free_fd_shrd_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
+enum ice_status ice_clear_vsi_fd_table(struct ice_hw *hw, u16 vsi_num);
+enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw);
 void
 ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		       struct ice_fltr_desc *fdesc, bool add);
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 16/52] net/ice/base: cleanup comment formatting
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (14 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 15/52] net/ice/base: group function protoypes together Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 17/52] net/ice/base: add FDIR support for L2TPV3 ESP AH and PFCP Qi Zhang
                   ` (37 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Bruce Allan, Paul M . Stillwell Jr

Add missing space between end of comment text and comment terminator,
and remove unnecessary punctuation.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_acl.c        | 25 +++++++++---------
 drivers/net/ice/base/ice_acl_ctrl.c   | 23 ++++++++--------
 drivers/net/ice/base/ice_adminq_cmd.h | 50 +++++++++++++++++++----------------
 drivers/net/ice/base/ice_bitops.h     | 10 +++----
 drivers/net/ice/base/ice_common.c     |  4 +--
 drivers/net/ice/base/ice_fdir.c       |  3 +--
 drivers/net/ice/base/ice_flex_pipe.c  | 12 ++++-----
 drivers/net/ice/base/ice_flow.c       | 34 ++++++++++++------------
 drivers/net/ice/base/ice_flow.h       |  4 +--
 drivers/net/ice/base/ice_sched.c      | 17 ++++++------
 drivers/net/ice/base/ice_switch.c     |  8 +++---
 drivers/net/ice/base/ice_switch.h     |  3 +--
 drivers/net/ice/base/ice_type.h       |  4 +--
 13 files changed, 97 insertions(+), 100 deletions(-)

diff --git a/drivers/net/ice/base/ice_acl.c b/drivers/net/ice/base/ice_acl.c
index 31244cb4b..fd12507d7 100644
--- a/drivers/net/ice/base/ice_acl.c
+++ b/drivers/net/ice/base/ice_acl.c
@@ -123,7 +123,7 @@ ice_aq_program_acl_entry(struct ice_hw *hw, u8 tcam_idx, u16 entry_idx,
  * @buf: address of indirect data buffer
  * @cd: pointer to command details structure or NULL
  *
- *  Query ACL entry (direct 0x0C24)
+ * Query ACL entry (direct 0x0C24)
  *
  * NOTE: Caller of this API to parse 'buf' appropriately since it contains
  * response (key and key invert)
@@ -250,7 +250,7 @@ ice_aq_query_actpair(struct ice_hw *hw, u8 act_mem_idx, u16 act_entry_idx,
  * @hw: pointer to the HW struct
  * @cd: pointer to command details structure or NULL
  *
- * ACL - de-allocate (direct 0x0C1A) resources. Used by SW to release all the
+ * De-allocate ACL resources (direct 0x0C1A). Used by SW to release all the
  * resources allocated for it using a single command
  */
 enum ice_status ice_aq_dealloc_acl_res(struct ice_hw *hw, struct ice_sq_cd *cd)
@@ -263,7 +263,7 @@ enum ice_status ice_aq_dealloc_acl_res(struct ice_hw *hw, struct ice_sq_cd *cd)
 }
 
 /**
- * ice_acl_prof_aq_send - sending acl profile aq commands
+ * ice_acl_prof_aq_send - sending ACL profile AQ commands
  * @hw: pointer to the HW struct
  * @opc: command opcode
  * @prof_id: profile ID
@@ -294,7 +294,7 @@ ice_acl_prof_aq_send(struct ice_hw *hw, u16 opc, u8 prof_id,
  * @buf: ptr to buffer
  * @cd: pointer to command details structure or NULL
  *
- * ACL - program ACL profile extraction (indirect 0x0C1D)
+ * Program ACL profile extraction (indirect 0x0C1D)
  */
 enum ice_status
 ice_prgm_acl_prof_extrt(struct ice_hw *hw, u8 prof_id,
@@ -312,7 +312,7 @@ ice_prgm_acl_prof_extrt(struct ice_hw *hw, u8 prof_id,
  * @buf: ptr to buffer (which will contain response of this command)
  * @cd: pointer to command details structure or NULL
  *
- * ACL - query ACL profile (indirect 0x0C21)
+ * Query ACL profile (indirect 0x0C21)
  */
 enum ice_status
 ice_query_acl_prof(struct ice_hw *hw, u8 prof_id,
@@ -354,7 +354,7 @@ static enum ice_status ice_aq_acl_cntrs_chk_params(struct ice_acl_cntrs *cntrs)
 			status = ICE_ERR_OUT_OF_RANGE;
 		break;
 	default:
-		/* Unspecified counter type - Invalid or error*/
+		/* Unspecified counter type - Invalid or error */
 		status = ICE_ERR_PARAM;
 	}
 
@@ -367,7 +367,7 @@ static enum ice_status ice_aq_acl_cntrs_chk_params(struct ice_acl_cntrs *cntrs)
  * @cntrs: ptr to buffer describing input and output params
  * @cd: pointer to command details structure or NULL
  *
- * ACL - allocate (indirect 0x0C16) counters. This function attempts to
+ * Allocate ACL counters (indirect 0x0C16). This function attempts to
  * allocate a contiguous block of counters. In case of failures, caller can
  * attempt to allocate a smaller chunk. The allocation is considered
  * unsuccessful if returned counter value is invalid. In this case it returns
@@ -410,8 +410,7 @@ ice_aq_alloc_acl_cntrs(struct ice_hw *hw, struct ice_acl_cntrs *cntrs,
  * @cntrs: ptr to buffer describing input and output params
  * @cd: pointer to command details structure or NULL
  *
- * ACL - de-allocate (direct 0x0C17) counters.
- * This function deallocate ACL counters.
+ * De-allocate ACL counters (direct 0x0C17)
  */
 enum ice_status
 ice_aq_dealloc_acl_cntrs(struct ice_hw *hw, struct ice_acl_cntrs *cntrs,
@@ -443,7 +442,7 @@ ice_aq_dealloc_acl_cntrs(struct ice_hw *hw, struct ice_acl_cntrs *cntrs,
  * @cntr_val: pointer to counter or packet counter value
  * @cd: pointer to command details structure or NULL
  *
- * ACL - query ACL counter (direct 0x0C27)
+ * Query ACL counter (direct 0x0C27)
  */
 enum ice_status
 ice_aq_query_acl_cntrs(struct ice_hw *hw, u8 bank, u16 index, u64 *cntr_val,
@@ -478,7 +477,7 @@ ice_aq_query_acl_cntrs(struct ice_hw *hw, u8 bank, u16 index, u64 *cntr_val,
  * @buf: pointer to input buffer
  * @cd: pointer to command details structure or NULL
  *
- * ACL - program ACL profile ranges (indirect 0x0C1E)
+ * Program ACL profile ranges (indirect 0x0C1E)
  */
 enum ice_status
 ice_prog_acl_prof_ranges(struct ice_hw *hw, u8 prof_id,
@@ -501,7 +500,7 @@ ice_prog_acl_prof_ranges(struct ice_hw *hw, u8 prof_id,
  * @buf: pointer to response buffer
  * @cd: pointer to command details structure or NULL
  *
- * ACL - query ACL profile ranges (indirect 0x0C22)
+ * Query ACL profile ranges (indirect 0x0C22)
  */
 enum ice_status
 ice_query_acl_prof_ranges(struct ice_hw *hw, u8 prof_id,
@@ -571,7 +570,7 @@ ice_aq_dealloc_acl_scen(struct ice_hw *hw, u16 scen_id, struct ice_sq_cd *cd)
 /**
  * ice_aq_update_query_scen - update or query ACL scenario
  * @hw: pointer to the HW struct
- * @opcode: aq command opcode for either query or update scenario
+ * @opcode: AQ command opcode for either query or update scenario
  * @scen_id: scen_id to be updated or queried
  * @buf: address of indirect data buffer
  * @cd: pointer to command details structure or NULL
diff --git a/drivers/net/ice/base/ice_acl_ctrl.c b/drivers/net/ice/base/ice_acl_ctrl.c
index 39b399dd4..5310b9d9f 100644
--- a/drivers/net/ice/base/ice_acl_ctrl.c
+++ b/drivers/net/ice/base/ice_acl_ctrl.c
@@ -12,6 +12,7 @@
 #define ICE_ACL_TBL_TCAM_ENTRY_IDX(e) ((e) % ICE_AQC_ACL_TCAM_DEPTH)
 
 #define ICE_ACL_SCEN_ENTRY_INVAL 0xFFFF
+
 /**
  * ice_acl_init_entry
  * @scen: pointer to the scenario struct
@@ -20,8 +21,7 @@
  */
 static void ice_acl_init_entry(struct ice_acl_scen *scen)
 {
-	/**
-	 * low priority: start from the highest index, 25% of total entries
+	/* low priority: start from the highest index, 25% of total entries
 	 * normal priority: start from the highest index, 50% of total entries
 	 * high priority: start from the lowest index, 25% of total entries
 	 */
@@ -44,8 +44,9 @@ static void ice_acl_init_entry(struct ice_acl_scen *scen)
  * Returns ICE_ACL_SCEN_ENTRY_INVAL if fails
  * Returns index on success
  */
-static u16 ice_acl_scen_assign_entry_idx(struct ice_acl_scen *scen,
-					 enum ice_acl_entry_prior prior)
+static u16
+ice_acl_scen_assign_entry_idx(struct ice_acl_scen *scen,
+			      enum ice_acl_entry_prior prior)
 {
 	u16 first_idx, last_idx, i;
 	s8 step;
@@ -198,7 +199,7 @@ static enum ice_status ice_acl_init_tbl(struct ice_hw *hw)
 
 /**
  * ice_acl_assign_act_mems_to_tcam
- * @tbl: pointer to acl table structure
+ * @tbl: pointer to ACL table structure
  * @cur_tcam: Index of current TCAM. Value = 0 to (ICE_AQC_ACL_SLICES - 1)
  * @cur_mem_idx: Index of current action memory bank. Value = 0 to
  *		 (ICE_AQC_MAX_ACTION_MEMORIES - 1)
@@ -229,7 +230,7 @@ ice_acl_assign_act_mems_to_tcam(struct ice_acl_tbl *tbl, u8 cur_tcam,
 
 /**
  * ice_acl_divide_act_mems_to_tcams
- * @tbl: pointer to acl table structure
+ * @tbl: pointer to ACL table structure
  *
  * Figure out how to divide given action memory banks to given TCAMs. This
  * division is for SW book keeping. In the time when scenario is created,
@@ -351,7 +352,7 @@ ice_acl_create_tbl(struct ice_hw *hw, struct ice_acl_tbl_params *params)
 				CPU_TO_LE16(params->dep_tbls[i]);
 	}
 
-	/* call the aq command to create the ACL table with these values */
+	/* call the AQ command to create the ACL table with these values */
 	status = ice_aq_alloc_acl_tbl(hw, &tbl_alloc, NULL);
 
 	if (status) {
@@ -660,7 +661,7 @@ ice_acl_set_scen_chnk_msk(struct ice_aqc_acl_scen *scen_buf,
 
 /**
  * ice_acl_assign_act_mem_for_scen
- * @tbl: pointer to acl table structure
+ * @tbl: pointer to ACL table structure
  * @scen: pointer to the scenario struct
  * @scen_buf: pointer to the available space for the scenario
  * @current_tcam_idx: theoretical index of the TCAM that we associated those
@@ -897,7 +898,7 @@ enum ice_status ice_acl_destroy_tbl(struct ice_hw *hw)
 		}
 	}
 
-	/* call the aq command to destroy the ACL table */
+	/* call the AQ command to destroy the ACL table */
 	status = ice_aq_dealloc_acl_tbl(hw, hw->acl_tbl->id, &resp_buf, NULL);
 
 	if (status) {
@@ -1107,7 +1108,7 @@ ice_acl_rem_entry(struct ice_hw *hw, struct ice_acl_scen *scen, u16 entry_idx)
 						  NULL);
 		if (status)
 			ice_debug(hw, ICE_DBG_ACL,
-				  "aq program acl entry failed status: %d\n",
+				  "AQ program ACL entry failed status: %d\n",
 				  status);
 	}
 
@@ -1164,7 +1165,7 @@ enum ice_status ice_acl_destroy_scen(struct ice_hw *hw, u16 scen_id)
 			}
 		}
 
-	/* Call the aq command to destroy the targeted scenario */
+	/* Call the AQ command to destroy the targeted scenario */
 	status = ice_aq_dealloc_acl_scen(hw, scen_id, NULL);
 
 	if (status) {
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index a5d689dc8..dec4c38cf 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -533,7 +533,7 @@ struct ice_aqc_vsi_props {
 	u8 q_opt_reserved[3];
 	/* outer up section */
 	__le32 outer_up_table; /* same structure and defines as ingress tbl */
-	/* acl section */
+	/* ACL section */
 	__le16 acl_def_act;
 #define ICE_AQ_VSI_ACL_DEF_RX_PROF_S	0
 #define ICE_AQ_VSI_ACL_DEF_RX_PROF_M	(0xF << ICE_AQ_VSI_ACL_DEF_RX_PROF_S)
@@ -675,7 +675,7 @@ struct ice_aqc_storm_cfg {
 
 #define ICE_MAX_NUM_RECIPES 64
 
-/* Add/Get Recipe (indirect 0x0290/0x0292)*/
+/* Add/Get Recipe (indirect 0x0290/0x0292) */
 struct ice_aqc_add_get_recipe {
 	__le16 num_sub_recipes;	/* Input in Add cmd, Output in Get cmd */
 	__le16 return_index;	/* Input, used for Get cmd only */
@@ -2020,7 +2020,7 @@ struct ice_aqc_clear_fd_table {
 	u8 reserved[12];
 };
 
-/* ACL - allocate (indirect 0x0C10) table */
+/* Allocate ACL table (indirect 0x0C10) */
 #define ICE_AQC_ACL_KEY_WIDTH		40
 #define ICE_AQC_ACL_KEY_WIDTH_BYTES	5
 #define ICE_AQC_ACL_TCAM_DEPTH		512
@@ -2065,9 +2065,9 @@ struct ice_aqc_acl_alloc_table_data {
 	__le16 alloc_ids[ICE_AQC_MAX_CONCURRENT_ACL_TBL];
 };
 
-/* ACL - deallocate (indirect 0x0C11) table
- * ACL - allocate (indirect 0x0C12) action-pair
- * ACL - deallocate (indirect 0x0C13) action-pair
+/* Deallocate ACL table (indirect 0x0C11)
+ * Allocate ACL action-pair (indirect 0x0C12)
+ * Deallocate ACL action-pair (indirect 0x0C13)
  */
 
 /* Following structure is common and used in case of deallocation
@@ -2126,7 +2126,7 @@ struct ice_aqc_acl_generic {
 	u8 act_mem[ICE_AQC_MAX_ACTION_MEMORIES];
 };
 
-/* ACL - allocate (indirect 0x0C14) scenario. This command doesn't have separate
+/* Allocate ACL scenario (indirect 0x0C14). This command doesn't have separate
  * response buffer since original command buffer gets updated with
  * 'scen_id' in case of success
  */
@@ -2144,7 +2144,7 @@ struct ice_aqc_acl_alloc_scen {
 	__le32 addr_low;
 };
 
-/* ACL - de-allocate (direct 0x0C15) scenario. This command doesn't need
+/* De-allocate ACL scenario (direct 0x0C15). This command doesn't need
  * separate response buffer since nothing to be returned as a response
  * except status.
  */
@@ -2153,8 +2153,9 @@ struct ice_aqc_acl_dealloc_scen {
 	u8 reserved[14];
 };
 
-/* ACL - update (direct 0x0C1B) scenario */
-/* ACL - query (direct 0x0C23) scenario */
+/* Update ACL scenario (direct 0x0C1B)
+ * Query ACL scenario (direct 0x0C23)
+ */
 struct ice_aqc_acl_update_query_scen {
 	__le16 scen_id;
 	u8 reserved[6];
@@ -2202,7 +2203,7 @@ struct ice_aqc_acl_scen {
 	u8 act_mem_cfg[ICE_AQC_MAX_ACTION_MEMORIES];
 };
 
-/* ACL - allocate (indirect 0x0C16) counters */
+/* Allocate ACL counters (indirect 0x0C16) */
 struct ice_aqc_acl_alloc_counters {
 	/* Amount of contiguous counters requested. Min value is 1 and
 	 * max value is 255
@@ -2253,7 +2254,7 @@ struct ice_aqc_acl_alloc_counters {
 	} ops;
 };
 
-/* ACL - de-allocate (direct 0x0C17) counters */
+/* De-allocate ACL counters (direct 0x0C17) */
 struct ice_aqc_acl_dealloc_counters {
 	/* first counter being released */
 	__le16 first_counter;
@@ -2266,15 +2267,16 @@ struct ice_aqc_acl_dealloc_counters {
 	u8 reserved[10];
 };
 
-/* ACL - de-allocate (direct 0x0C1A) resources. Used by SW to release all the
+/* De-allocate ACL resources (direct 0x0C1A). Used by SW to release all the
  * resources allocated for it using a single command
  */
 struct ice_aqc_acl_dealloc_res {
 	u8 reserved[16];
 };
 
-/* ACL - program actionpair (indirect 0x0C1C) */
-/* ACL - query actionpair (indirect 0x0C25) */
+/* Program ACL actionpair (indirect 0x0C1C)
+ * Query ACL actionpair (indirect 0x0C25)
+ */
 struct ice_aqc_acl_actpair {
 	/* action mem index to program/update */
 	u8 act_mem_index;
@@ -2349,10 +2351,11 @@ struct ice_aqc_acl_prof_generic_frmt {
 	u8 pf_scenario_num[ICE_AQC_ACL_PROF_PF_SCEN_NUM_ELEMS];
 };
 
-/* ACL - program ACL profile extraction (indirect 0x0C1D) */
-/* ACL - program ACL profile ranges (indirect 0x0C1E) */
-/* ACL - query ACL profile (indirect 0x0C21) */
-/* ACL - query ACL profile ranges (indirect 0x0C22) */
+/* Program ACL profile extraction (indirect 0x0C1D)
+ * Program ACL profile ranges (indirect 0x0C1E)
+ * Query ACL profile (indirect 0x0C21)
+ * Query ACL profile ranges (indirect 0x0C22)
+ */
 struct ice_aqc_acl_profile {
 	u8 profile_id; /* Programmed/Updated profile ID */
 	u8 reserved[7];
@@ -2389,8 +2392,9 @@ struct ice_aqc_acl_profile_ranges {
 	struct ice_acl_rng_data checker_cfg[ICE_AQC_ACL_PROF_RANGES_NUM_CFG];
 };
 
-/* ACL - program ACL entry (indirect 0x0C20) */
-/* ACL - query ACL entry (indirect 0x0C24) */
+/* Program ACL entry (indirect 0x0C20)
+ * Query ACL entry (indirect 0x0C24)
+ */
 struct ice_aqc_acl_entry {
 	u8 tcam_index; /* Updated TCAM block index */
 	u8 reserved;
@@ -2414,7 +2418,7 @@ struct ice_aqc_acl_data {
 	} entry_key, entry_key_invert;
 };
 
-/* ACL - query ACL counter (direct 0x0C27) */
+/* Query ACL counter (direct 0x0C27) */
 struct ice_aqc_acl_query_counter {
 	/* Queried counter index */
 	__le16 counter_index;
@@ -2556,7 +2560,7 @@ struct ice_aqc_move_txqs_data {
 };
 
 /* Download Package (indirect 0x0C40) */
-/* Also used for Update Package (indirect 0x0C42) */
+/* Also used for Update Package (indirect 0x0C42 and 0x0C41) */
 struct ice_aqc_download_pkg {
 	u8 flags;
 #define ICE_AQC_DOWNLOAD_PKG_LAST_BUF	0x01
diff --git a/drivers/net/ice/base/ice_bitops.h b/drivers/net/ice/base/ice_bitops.h
index 87f47b238..3022116a4 100644
--- a/drivers/net/ice/base/ice_bitops.h
+++ b/drivers/net/ice/base/ice_bitops.h
@@ -214,7 +214,7 @@ ice_or_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
 	ice_bitmap_t mask;
 	u16 i;
 
-	/* Handle all but last chunk*/
+	/* Handle all but last chunk */
 	for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
 		dst[i] = bmp1[i] | bmp2[i];
 
@@ -245,7 +245,7 @@ ice_xor_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
 	ice_bitmap_t mask;
 	u16 i;
 
-	/* Handle all but last chunk*/
+	/* Handle all but last chunk */
 	for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
 		dst[i] = bmp1[i] ^ bmp2[i];
 
@@ -276,7 +276,7 @@ ice_andnot_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
 	ice_bitmap_t mask;
 	u16 i;
 
-	/* Handle all but last chunk*/
+	/* Handle all but last chunk */
 	for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
 		dst[i] = bmp1[i] & ~bmp2[i];
 
@@ -389,12 +389,12 @@ ice_cmp_bitmap(ice_bitmap_t *bmp1, ice_bitmap_t *bmp2, u16 size)
 	ice_bitmap_t mask;
 	u16 i;
 
-	/* Handle all but last chunk*/
+	/* Handle all but last chunk */
 	for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
 		if (bmp1[i] != bmp2[i])
 			return false;
 
-	/* We want to only compare bits within the size.*/
+	/* We want to only compare bits within the size */
 	mask = LAST_CHUNK_MASK(size);
 	if ((bmp1[i] & mask) != (bmp2[i] & mask))
 		return false;
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index e266ba56c..908ef9085 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -747,7 +747,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
 	/* Initialize max burst size */
 	if (!hw->max_burst_size)
 		ice_cfg_rl_burst_size(hw, ICE_SCHED_DFLT_BURST_SIZE);
-
 	status = ice_init_fltr_mgmt_struct(hw);
 	if (status)
 		goto err_unroll_sched;
@@ -1901,6 +1900,7 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
 			}
 			if (func_p) {
 				u32 reg_val, val;
+
 				if (hw->dcf_enabled)
 					break;
 				reg_val = rd32(hw, GLQF_FD_SIZE);
@@ -2611,7 +2611,7 @@ ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, bool ena_auto_link_update)
 
 	ice_copy_phy_caps_to_cfg(pi, pcaps, &cfg);
 
-	/* Configure the set phy data */
+	/* Configure the set PHY data */
 	status = ice_cfg_phy_fc(pi, &cfg, pi->fc.req_mode);
 	if (status) {
 		if (status != ICE_ERR_BAD_PTR)
diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index 2257eba60..0155597bc 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -495,7 +495,7 @@ ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		fdir_fltr_ctx.toq_prio = 0;
 	else
 		fdir_fltr_ctx.toq_prio = 3;
-	fdir_fltr_ctx.pcmd = (add) ? ICE_FXD_FLTR_QW1_PCMD_ADD :
+	fdir_fltr_ctx.pcmd = add ? ICE_FXD_FLTR_QW1_PCMD_ADD :
 		ICE_FXD_FLTR_QW1_PCMD_REMOVE;
 	fdir_fltr_ctx.swap = ICE_FXD_FLTR_QW1_SWAP_NOT_SET;
 	fdir_fltr_ctx.comp_q = ICE_FXD_FLTR_QW0_COMP_Q_ZERO;
@@ -684,7 +684,6 @@ static void ice_pkt_insert_u32(u8 *pkt, int offset, __be32 data)
 /**
  * ice_pkt_insert_mac_addr - insert a MAC addr into a memory buffer.
  * @pkt: packet buffer
- * @offset: offset into buffer
  * @addr: MAC address to convert and insert into pkt at offset
  */
 static void ice_pkt_insert_mac_addr(u8 *pkt, u8 *addr)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 2a7b74207..563b75b0d 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -648,7 +648,7 @@ static bool ice_bits_max_set(const u8 *mask, u16 size, u16 max)
  * This function generates a key from a value, a don't care mask and a never
  * match mask.
  * upd, dc, and nm are optional parameters, and can be NULL:
- *	upd == NULL --> udp mask is all 1's (update all bits)
+ *	upd == NULL --> upd mask is all 1's (update all bits)
  *	dc == NULL --> dc mask is all 0's (no don't care bits)
  *	nm == NULL --> nm mask is all 0's (no never match bits)
  */
@@ -2738,7 +2738,7 @@ ice_vsig_add_mv_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
  * @blk: HW block
  * @prof: profile to check
  * @idx: profile index to check
- * @masks: masks to match
+ * @mask: mask to match
  */
 static bool
 ice_prof_has_mask_idx(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 idx,
@@ -3264,7 +3264,6 @@ static void ice_shutdown_prof_masks(struct ice_hw *hw, enum ice_block blk)
 /**
  * ice_shutdown_all_prof_masks - releases all locks for masking
  * @hw: pointer to the HW struct
- * @blk: hardware block
  *
  * This should be called before unloading the driver
  */
@@ -3279,12 +3278,11 @@ void ice_shutdown_all_prof_masks(struct ice_hw *hw)
  * @hw: pointer to the HW struct
  * @blk: hardware block
  * @prof_id: profile ID
- * @es: field vector
  * @masks: masks
  */
 static enum ice_status
 ice_update_prof_masking(struct ice_hw *hw, enum ice_block blk, u16 prof_id,
-			struct ice_fv_word *es, u16 *masks)
+			u16 *masks)
 {
 	bool err = false;
 	u32 ena_mask = 0;
@@ -3986,7 +3984,7 @@ ice_prof_gen_key(struct ice_hw *hw, enum ice_block blk, u8 ptg, u16 vsig,
  * @prof_id: profile ID
  * @ptg: packet type group (PTG) portion of key
  * @vsig: VSIG portion of key
- * @cdid: CDID: portion of key
+ * @cdid: CDID portion of key
  * @flags: flag portion of key
  * @vl_msk: valid mask
  * @dc_msk: don't care mask
@@ -4628,7 +4626,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
 			if (status)
 				goto err_ice_add_prof;
 		}
-		status = ice_update_prof_masking(hw, blk, prof_id, es, masks);
+		status = ice_update_prof_masking(hw, blk, prof_id, masks);
 		if (status)
 			goto err_ice_add_prof;
 
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 90302a6cb..00f58697f 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1489,13 +1489,13 @@ ice_dealloc_flow_entry(struct ice_hw *hw, struct ice_flow_entry *entry)
 #define ICE_ACL_INVALID_SCEN	0x3f
 
 /**
- * ice_flow_acl_is_prof_in_use - Verify if the profile is associated to any pf
+ * ice_flow_acl_is_prof_in_use - Verify if the profile is associated to any PF
  * @hw: pointer to the hardware structure
  * @prof: pointer to flow profile
- * @buf: destination buffer function writes partial xtrct sequence to
+ * @buf: destination buffer function writes partial extraction sequence to
  *
- * returns ICE_SUCCESS if no pf is associated to the given profile
- * returns ICE_ERR_IN_USE if at least one pf is associated to the given profile
+ * returns ICE_SUCCESS if no PF is associated to the given profile
+ * returns ICE_ERR_IN_USE if at least one PF is associated to the given profile
  * returns other error code for real error
  */
 static enum ice_status
@@ -1513,7 +1513,7 @@ ice_flow_acl_is_prof_in_use(struct ice_hw *hw, struct ice_flow_prof *prof,
 	if (status)
 		return status;
 
-	/* If all pf's associated scenarios are all 0 or all
+	/* If all PF's associated scenarios are all 0 or all
 	 * ICE_ACL_INVALID_SCEN (63) for the given profile then the latter has
 	 * not been configured yet.
 	 */
@@ -1537,7 +1537,7 @@ ice_flow_acl_is_prof_in_use(struct ice_hw *hw, struct ice_flow_prof *prof,
 }
 
 /**
- * ice_flow_acl_free_act_cntr - Free the acl rule's actions
+ * ice_flow_acl_free_act_cntr - Free the ACL rule's actions
  * @hw: pointer to the hardware structure
  * @acts: array of actions to be performed on a match
  * @acts_cnt: number of actions
@@ -1575,11 +1575,11 @@ ice_flow_acl_free_act_cntr(struct ice_hw *hw, struct ice_flow_action *acts,
 }
 
 /**
- * ice_flow_acl_disassoc_scen - Disassociate the scenario to the Profile
+ * ice_flow_acl_disassoc_scen - Disassociate the scenario from the profile
  * @hw: pointer to the hardware structure
  * @prof: pointer to flow profile
  *
- * Disassociate the scenario to the Profile for the PF of the VSI.
+ * Disassociate the scenario from the profile for the PF of the VSI.
  */
 static enum ice_status
 ice_flow_acl_disassoc_scen(struct ice_hw *hw, struct ice_flow_prof *prof)
@@ -1598,7 +1598,7 @@ ice_flow_acl_disassoc_scen(struct ice_hw *hw, struct ice_flow_prof *prof)
 	if (status)
 		return status;
 
-	/* Clear scenario for this pf */
+	/* Clear scenario for this PF */
 	buf.pf_scenario_num[hw->pf_id] = ICE_ACL_INVALID_SCEN;
 	status = ice_prgm_acl_prof_extrt(hw, prof_id, &buf, NULL);
 
@@ -1773,7 +1773,7 @@ ice_flow_rem_prof_sync(struct ice_hw *hw, enum ice_block blk,
 		struct ice_aqc_acl_prof_generic_frmt buf;
 		u8 prof_id = 0;
 
-		/* Deassociate the scenario to the Profile for the PF */
+		/* Disassociate the scenario from the profile for the PF */
 		status = ice_flow_acl_disassoc_scen(hw, prof);
 		if (status)
 			return status;
@@ -2140,11 +2140,11 @@ u64 ice_flow_find_entry(struct ice_hw *hw, enum ice_block blk, u64 entry_id)
 }
 
 /**
- * ice_flow_acl_check_actions - Checks the acl rule's actions
+ * ice_flow_acl_check_actions - Checks the ACL rule's actions
  * @hw: pointer to the hardware structure
  * @acts: array of actions to be performed on a match
  * @acts_cnt: number of actions
- * @cnt_alloc: indicates if a ACL counter has been allocated.
+ * @cnt_alloc: indicates if an ACL counter has been allocated.
  */
 static enum ice_status
 ice_flow_acl_check_actions(struct ice_hw *hw, struct ice_flow_action *acts,
@@ -2203,7 +2203,7 @@ ice_flow_acl_check_actions(struct ice_hw *hw, struct ice_flow_action *acts,
 }
 
 /**
- * ice_flow_acl_frmt_entry_range - Format an acl range checker for a given field
+ * ice_flow_acl_frmt_entry_range - Format an ACL range checker for a given field
  * @fld: number of the given field
  * @info: info about field
  * @range_buf: range checker configuration buffer
@@ -2244,7 +2244,7 @@ ice_flow_acl_frmt_entry_range(u16 fld, struct ice_flow_fld_info *info,
 }
 
 /**
- * ice_flow_acl_frmt_entry_fld - Partially format acl entry for a given field
+ * ice_flow_acl_frmt_entry_fld - Partially format ACL entry for a given field
  * @fld: number of the given field
  * @info: info about the field
  * @buf: buffer containing the entry
@@ -2316,7 +2316,7 @@ ice_flow_acl_frmt_entry_fld(u16 fld, struct ice_flow_fld_info *info, u8 *buf,
 }
 
 /**
- * ice_flow_acl_frmt_entry - Format acl entry
+ * ice_flow_acl_frmt_entry - Format ACL entry
  * @hw: pointer to the hardware structure
  * @prof: pointer to flow profile
  * @e: pointer to the flow entry
@@ -2326,7 +2326,7 @@ ice_flow_acl_frmt_entry_fld(u16 fld, struct ice_flow_fld_info *info, u8 *buf,
  *
  * Formats the key (and key_inverse) to be matched from the data passed in,
  * along with data from the flow profile. This key/key_inverse pair makes up
- * the 'entry' for an acl flow entry.
+ * the 'entry' for an ACL flow entry.
  */
 static enum ice_status
 ice_flow_acl_frmt_entry(struct ice_hw *hw, struct ice_flow_prof *prof,
@@ -3447,7 +3447,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
 	}
 
 	/* Check if a flow profile exists with the same protocol headers and
-	 * associated with the input VSI. If so disasscociate the VSI from
+	 * associated with the input VSI. If so disassociate the VSI from
 	 * this profile. The VSI will be added to a new profile created with
 	 * the protocol header and new hash field configuration.
 	 */
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 9fb60a6d2..93043acc8 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -471,8 +471,8 @@ ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
 		   u64 entry_id, u16 vsi, enum ice_flow_priority prio,
 		   void *data, struct ice_flow_action *acts, u8 acts_cnt,
 		   u64 *entry_h);
-enum ice_status ice_flow_rem_entry(struct ice_hw *hw, enum ice_block blk,
-				   u64 entry_h);
+enum ice_status
+ice_flow_rem_entry(struct ice_hw *hw, enum ice_block blk, u64 entry_h);
 void
 ice_flow_set_fld(struct ice_flow_seg_info *seg, enum ice_flow_field fld,
 		 u16 val_loc, u16 mask_loc, u16 last_loc, bool range);
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index af42fadfe..0a46dd40b 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -171,7 +171,7 @@ ice_sched_add_node(struct ice_port_info *pi, u8 layer,
 		return ICE_ERR_PARAM;
 	}
 
-	/* query the current node information from FW  before additing it
+	/* query the current node information from FW before adding it
 	 * to the SW DB
 	 */
 	status = ice_sched_query_elem(hw, LE32_TO_CPU(info->node_teid), &elem);
@@ -599,14 +599,14 @@ ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
 /**
  * ice_aq_rl_profile - performs a rate limiting task
  * @hw: pointer to the HW struct
- * @opcode:opcode for add, query, or remove profile(s)
+ * @opcode: opcode for add, query, or remove profile(s)
  * @num_profiles: the number of profiles
  * @buf: pointer to buffer
  * @buf_size: buffer size in bytes
  * @num_processed: number of processed add or remove profile(s) to return
  * @cd: pointer to command details structure
  *
- * Rl profile function to add, query, or remove profile(s)
+ * RL profile function to add, query, or remove profile(s)
  */
 static enum ice_status
 ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
@@ -789,7 +789,7 @@ void ice_sched_clear_agg(struct ice_hw *hw)
 }
 
 /**
- * ice_sched_clear_tx_topo - clears the schduler tree nodes
+ * ice_sched_clear_tx_topo - clears the scheduler tree nodes
  * @pi: port information structure
  *
  * This function removes all the nodes from HW as well as from SW DB.
@@ -2114,7 +2114,7 @@ ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
  * This function validates aggregator ID. The function returns info if
  * aggregator ID is present in list otherwise it returns null.
  */
-static struct ice_sched_agg_info*
+static struct ice_sched_agg_info *
 ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
 {
 	struct ice_sched_agg_info *agg_info;
@@ -2697,7 +2697,7 @@ ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type,
  * The function returns aggregator VSI info based on VSI handle. This function
  * needs to be called with scheduler lock held.
  */
-static struct ice_sched_agg_vsi_info*
+static struct ice_sched_agg_vsi_info *
 ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
 {
 	struct ice_sched_agg_vsi_info *agg_vsi_info;
@@ -2719,7 +2719,7 @@ ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
  * VSI has in this case a different aggregator than the default one. This
  * function needs to be called with scheduler lock held.
  */
-static struct ice_sched_agg_info*
+static struct ice_sched_agg_info *
 ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
 {
 	struct ice_sched_agg_info *agg_info;
@@ -3471,7 +3471,6 @@ ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
  * @pi: port information structure
  * @num_qs: number of VSI queues
  * @q_ids: queue IDs array
- * @q_ids: queue IDs array
  * @q_prio: queue priority array
  *
  * This function configures the queue node priority (Sibling Priority) of the
@@ -5128,7 +5127,7 @@ enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
 	return ICE_SUCCESS;
 }
 
-/*
+/**
  * ice_sched_replay_node_prio - re-configure node priority
  * @hw: pointer to the HW struct
  * @node: sched node to configure
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 600e1126c..b4aab6780 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2166,15 +2166,13 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)
  */
 static void ice_fill_sw_info(struct ice_hw *hw, struct ice_fltr_info *fi)
 {
-	fi->lb_en = false;
-	fi->lan_en = false;
-
 	if ((fi->flag & ICE_FLTR_RX) &&
 	    (fi->fltr_act == ICE_FWD_TO_VSI ||
 	     fi->fltr_act == ICE_FWD_TO_VSI_LIST) &&
 	    fi->lkup_type == ICE_SW_LKUP_LAST)
 		fi->lan_en = true;
-
+	fi->lb_en = false;
+	fi->lan_en = false;
 	if ((fi->flag & ICE_FLTR_TX) &&
 	    (fi->fltr_act == ICE_FWD_TO_VSI ||
 	     fi->fltr_act == ICE_FWD_TO_VSI_LIST ||
@@ -5351,7 +5349,7 @@ static u16 ice_find_recp(struct ice_hw *hw, struct ice_prot_lkup_ext *lkup_exts,
 			u8 pe, qr;
 
 			/* ar, cr, and qr are related to the recipe words, while
-			 * be, de and pe are related to the lookup words
+			 * be, de, and pe are related to the lookup words
 			 */
 			for (pe = 0; pe < lkup_exts->n_val_words; pe++) {
 				for (qr = 0; qr < recp[i].lkup_exts.n_val_words;
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index ba7c56f44..7317d17ef 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -261,8 +261,7 @@ struct ice_sw_recipe {
 	/* Profiles this recipe is associated with */
 	u8 num_profs, *prof_ids;
 
-	/* Possible result indexes are 44, 45, 46 and 47 */
-#define ICE_POSSIBLE_RES_IDX 0x0000F00000000000ULL
+	/* Bit map for possible result indexes */
 	ice_declare_bitmap(res_idxs, ICE_MAX_FV_WORDS);
 
 	/* This allows user to specify the recipe priority.
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 3280d48d0..8f01a96b1 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -497,7 +497,7 @@ struct ice_nvm_info {
 	u32 flash_size;			/* Size of available flash in bytes */
 	u8 major_ver;			/* major version of dev starter */
 	u8 minor_ver;			/* minor version of dev starter */
-	u8 blank_nvm_mode;		/* is NVM empty (no FW present)*/
+	u8 blank_nvm_mode;		/* is NVM empty (no FW present) */
 };
 
 struct ice_link_default_override_tlv {
@@ -1053,7 +1053,7 @@ enum ice_sw_fwd_act_type {
 #define ICE_SR_1ST_SCRATCH_PAD_PTR		0x41
 #define ICE_SR_1ST_NVM_BANK_PTR			0x42
 #define ICE_SR_NVM_BANK_SIZE			0x43
-#define ICE_SR_1ND_OROM_BANK_PTR		0x44
+#define ICE_SR_1ST_OROM_BANK_PTR		0x44
 #define ICE_SR_OROM_BANK_SIZE			0x45
 #define ICE_SR_NETLIST_BANK_PTR			0x46
 #define ICE_SR_NETLIST_BANK_SIZE		0x47
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 17/52] net/ice/base: add FDIR support for L2TPV3 ESP AH and PFCP
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (15 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 16/52] net/ice/base: cleanup comment formatting Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 18/52] net/ice/base: add FD completion report option Qi Zhang
                   ` (36 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Yahui Cao, Paul M . Stillwell Jr

FDIR can forward:
- L2TPV3 packets with session id.
- IPSEC ESP packets with security parameter index.
- IPSEC AH packets with security parameter index.
- NAT_T ESP packets with security parameter index.
- PFCP packets with s field value.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_fdir.c | 254 ++++++++++++++++++++++++++++++++++++++++
 drivers/net/ice/base/ice_fdir.h |  15 +++
 drivers/net/ice/base/ice_type.h |  12 ++
 3 files changed, 281 insertions(+)

diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index 0155597bc..38aad1904 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -102,6 +102,138 @@ static const u8 ice_fdir_ipv4_gtpu4_pkt[] = {
 	0x00, 0x00,
 };
 
+static const u8 ice_fdir_ipv4_l2tpv3_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+	0x00, 0x14, 0x00, 0x00, 0x40, 0x00, 0x40, 0x73,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv6_l2tpv3_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x73, 0x40, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv4_esp_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+	0x00, 0x14, 0x00, 0x00, 0x40, 0x00, 0x40, 0x32,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00
+};
+
+static const u8 ice_fdir_ipv6_esp_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x32, 0x40, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv4_ah_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+	0x00, 0x14, 0x00, 0x00, 0x40, 0x00, 0x40, 0x33,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00
+};
+
+static const u8 ice_fdir_ipv6_ah_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x33, 0x40, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv4_nat_t_esp_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+	0x00, 0x1C, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x11, 0x94, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv6_nat_t_esp_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+	0x00, 0x00, 0x00, 0x08, 0x11, 0x40, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x11, 0x94, 0x00, 0x00, 0x00, 0x08,
+};
+
+static const u8 ice_fdir_ipv4_pfcp_node_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+	0x00, 0x2C, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x22, 0x65, 0x22, 0x65, 0x00, 0x00,
+	0x00, 0x00, 0x20, 0x00, 0x00, 0x10, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv4_pfcp_session_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+	0x00, 0x2C, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x22, 0x65, 0x22, 0x65, 0x00, 0x00,
+	0x00, 0x00, 0x21, 0x00, 0x00, 0x10, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv6_pfcp_node_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+	0x00, 0x00, 0x00, 0x18, 0x11, 0x40, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x65,
+	0x22, 0x65, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00,
+	0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv6_pfcp_session_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+	0x00, 0x00, 0x00, 0x18, 0x11, 0x40, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x65,
+	0x22, 0x65, 0x00, 0x00, 0x00, 0x00, 0x21, 0x00,
+	0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
 static const u8 ice_fdir_non_ip_l2_pkt[] = {
 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -335,6 +467,78 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
 		ice_fdir_ipv4_gtpu4_pkt,
 	},
 	{
+		ICE_FLTR_PTYPE_NONF_IPV4_L2TPV3,
+		sizeof(ice_fdir_ipv4_l2tpv3_pkt), ice_fdir_ipv4_l2tpv3_pkt,
+		sizeof(ice_fdir_ipv4_l2tpv3_pkt), ice_fdir_ipv4_l2tpv3_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV6_L2TPV3,
+		sizeof(ice_fdir_ipv6_l2tpv3_pkt), ice_fdir_ipv6_l2tpv3_pkt,
+		sizeof(ice_fdir_ipv6_l2tpv3_pkt), ice_fdir_ipv6_l2tpv3_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV4_ESP,
+		sizeof(ice_fdir_ipv4_esp_pkt), ice_fdir_ipv4_esp_pkt,
+		sizeof(ice_fdir_ipv4_esp_pkt), ice_fdir_ipv4_esp_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV6_ESP,
+		sizeof(ice_fdir_ipv6_esp_pkt), ice_fdir_ipv6_esp_pkt,
+		sizeof(ice_fdir_ipv6_esp_pkt), ice_fdir_ipv6_esp_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV4_AH,
+		sizeof(ice_fdir_ipv4_ah_pkt), ice_fdir_ipv4_ah_pkt,
+		sizeof(ice_fdir_ipv4_ah_pkt), ice_fdir_ipv4_ah_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV6_AH,
+		sizeof(ice_fdir_ipv6_ah_pkt), ice_fdir_ipv6_ah_pkt,
+		sizeof(ice_fdir_ipv6_ah_pkt), ice_fdir_ipv6_ah_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV4_NAT_T_ESP,
+		sizeof(ice_fdir_ipv4_nat_t_esp_pkt),
+		ice_fdir_ipv4_nat_t_esp_pkt,
+		sizeof(ice_fdir_ipv4_nat_t_esp_pkt),
+		ice_fdir_ipv4_nat_t_esp_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV6_NAT_T_ESP,
+		sizeof(ice_fdir_ipv6_nat_t_esp_pkt),
+		ice_fdir_ipv6_nat_t_esp_pkt,
+		sizeof(ice_fdir_ipv6_nat_t_esp_pkt),
+		ice_fdir_ipv6_nat_t_esp_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV4_PFCP_NODE,
+		sizeof(ice_fdir_ipv4_pfcp_node_pkt),
+		ice_fdir_ipv4_pfcp_node_pkt,
+		sizeof(ice_fdir_ipv4_pfcp_node_pkt),
+		ice_fdir_ipv4_pfcp_node_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV4_PFCP_SESSION,
+		sizeof(ice_fdir_ipv4_pfcp_session_pkt),
+		ice_fdir_ipv4_pfcp_session_pkt,
+		sizeof(ice_fdir_ipv4_pfcp_session_pkt),
+		ice_fdir_ipv4_pfcp_session_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV6_PFCP_NODE,
+		sizeof(ice_fdir_ipv6_pfcp_node_pkt),
+		ice_fdir_ipv6_pfcp_node_pkt,
+		sizeof(ice_fdir_ipv6_pfcp_node_pkt),
+		ice_fdir_ipv6_pfcp_node_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV6_PFCP_SESSION,
+		sizeof(ice_fdir_ipv6_pfcp_session_pkt),
+		ice_fdir_ipv6_pfcp_session_pkt,
+		sizeof(ice_fdir_ipv6_pfcp_session_pkt),
+		ice_fdir_ipv6_pfcp_session_pkt,
+	},
+	{
 		ICE_FLTR_PTYPE_NON_IP_L2,
 		sizeof(ice_fdir_non_ip_l2_pkt), ice_fdir_non_ip_l2_pkt,
 		sizeof(ice_fdir_non_ip_l2_pkt), ice_fdir_non_ip_l2_pkt,
@@ -832,6 +1036,56 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		ice_pkt_insert_u6_qfi(loc, ICE_IPV4_GTPU_QFI_OFFSET,
 				      input->gtpu_data.qfi);
 		break;
+	case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV3:
+		ice_pkt_insert_u32(loc, ICE_IPV4_L2TPV3_SESS_ID_OFFSET,
+				   input->l2tpv3_data.session_id);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV6_L2TPV3:
+		ice_pkt_insert_u32(loc, ICE_IPV6_L2TPV3_SESS_ID_OFFSET,
+				   input->l2tpv3_data.session_id);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV4_ESP:
+		ice_pkt_insert_u32(loc, ICE_IPV4_ESP_SPI_OFFSET,
+				   input->ip.v4.sec_parm_idx);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV6_ESP:
+		ice_pkt_insert_u32(loc, ICE_IPV6_ESP_SPI_OFFSET,
+				   input->ip.v6.sec_parm_idx);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV4_AH:
+		ice_pkt_insert_u32(loc, ICE_IPV4_AH_SPI_OFFSET,
+				   input->ip.v4.sec_parm_idx);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV6_AH:
+		ice_pkt_insert_u32(loc, ICE_IPV6_AH_SPI_OFFSET,
+				   input->ip.v6.sec_parm_idx);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV4_NAT_T_ESP:
+		ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET,
+				   input->ip.v4.src_ip);
+		ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
+				   input->ip.v4.dst_ip);
+		ice_pkt_insert_u32(loc, ICE_IPV4_NAT_T_ESP_SPI_OFFSET,
+				   input->ip.v4.sec_parm_idx);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV6_NAT_T_ESP:
+		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
+					 input->ip.v6.src_ip);
+		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
+					 input->ip.v6.dst_ip);
+		ice_pkt_insert_u32(loc, ICE_IPV6_NAT_T_ESP_SPI_OFFSET,
+				   input->ip.v6.sec_parm_idx);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV4_PFCP_NODE:
+	case ICE_FLTR_PTYPE_NONF_IPV4_PFCP_SESSION:
+		ice_pkt_insert_u16(loc, ICE_IPV4_UDP_SRC_PORT_OFFSET,
+				   input->ip.v4.dst_port);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV6_PFCP_NODE:
+	case ICE_FLTR_PTYPE_NONF_IPV6_PFCP_SESSION:
+		ice_pkt_insert_u16(loc, ICE_IPV6_UDP_SRC_PORT_OFFSET,
+				   input->ip.v6.dst_port);
+		break;
 	case ICE_FLTR_PTYPE_NON_IP_L2:
 		ice_pkt_insert_u16(loc, ICE_MAC_ETHTYPE_OFFSET,
 				   input->ext_data.ether_type);
diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
index b39ce0bbf..2d41ec360 100644
--- a/drivers/net/ice/base/ice_fdir.h
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -46,6 +46,14 @@
 #define ICE_IPV6_PROTO_OFFSET		20
 #define ICE_IPV4_GTPU_TEID_OFFSET	46
 #define ICE_IPV4_GTPU_QFI_OFFSET	56
+#define ICE_IPV4_L2TPV3_SESS_ID_OFFSET	34
+#define ICE_IPV6_L2TPV3_SESS_ID_OFFSET	54
+#define ICE_IPV4_ESP_SPI_OFFSET		34
+#define ICE_IPV6_ESP_SPI_OFFSET		54
+#define ICE_IPV4_AH_SPI_OFFSET		38
+#define ICE_IPV6_AH_SPI_OFFSET		58
+#define ICE_IPV4_NAT_T_ESP_SPI_OFFSET	42
+#define ICE_IPV6_NAT_T_ESP_SPI_OFFSET	62
 
 #define ICE_FDIR_MAX_FLTRS		16384
 
@@ -150,6 +158,10 @@ struct ice_fdir_udp_gtp {
 	u8 next_ext;
 };
 
+struct ice_fdir_l2tpv3 {
+	__be32 session_id;
+};
+
 struct ice_fdir_extra {
 	u8 dst_mac[ETH_ALEN];	/* dest MAC address */
 	__be16 ether_type;      /* for NON_IP_L2 */
@@ -170,6 +182,9 @@ struct ice_fdir_fltr {
 	struct ice_fdir_udp_gtp gtpu_data;
 	struct ice_fdir_udp_gtp gtpu_mask;
 
+	struct ice_fdir_l2tpv3 l2tpv3_data;
+	struct ice_fdir_l2tpv3 l2tpv3_mask;
+
 	struct ice_fdir_extra ext_data;
 	struct ice_fdir_extra ext_mask;
 
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 8f01a96b1..a6dece9c1 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -296,6 +296,18 @@ enum ice_fltr_ptype {
 	ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP,
 	ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP,
 	ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER,
+	ICE_FLTR_PTYPE_NONF_IPV4_L2TPV3,
+	ICE_FLTR_PTYPE_NONF_IPV6_L2TPV3,
+	ICE_FLTR_PTYPE_NONF_IPV4_ESP,
+	ICE_FLTR_PTYPE_NONF_IPV6_ESP,
+	ICE_FLTR_PTYPE_NONF_IPV4_AH,
+	ICE_FLTR_PTYPE_NONF_IPV6_AH,
+	ICE_FLTR_PTYPE_NONF_IPV4_NAT_T_ESP,
+	ICE_FLTR_PTYPE_NONF_IPV6_NAT_T_ESP,
+	ICE_FLTR_PTYPE_NONF_IPV4_PFCP_NODE,
+	ICE_FLTR_PTYPE_NONF_IPV4_PFCP_SESSION,
+	ICE_FLTR_PTYPE_NONF_IPV6_PFCP_NODE,
+	ICE_FLTR_PTYPE_NONF_IPV6_PFCP_SESSION,
 	ICE_FLTR_PTYPE_NON_IP_L2,
 	ICE_FLTR_PTYPE_FRAG_IPV4,
 	ICE_FLTR_PTYPE_NONF_IPV6_UDP,
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 18/52] net/ice/base: add FD completion report option
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (16 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 17/52] net/ice/base: add FDIR support for L2TPV3 ESP AH and PFCP Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 19/52] net/ice/base: initialize Set PHY Configuration FEC fields Qi Zhang
                   ` (35 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Yahui Cao, Paul M . Stillwell Jr

This patch introduces comp_report variable so that the called can
determine whether to report completion on error or on all cases.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_fdir.c   | 2 +-
 drivers/net/ice/base/ice_fdir.h   | 1 +
 drivers/net/ice/ice_fdir_filter.c | 1 +
 3 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index 38aad1904..a62e6eeba 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -703,7 +703,7 @@ ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		ICE_FXD_FLTR_QW1_PCMD_REMOVE;
 	fdir_fltr_ctx.swap = ICE_FXD_FLTR_QW1_SWAP_NOT_SET;
 	fdir_fltr_ctx.comp_q = ICE_FXD_FLTR_QW0_COMP_Q_ZERO;
-	fdir_fltr_ctx.comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW;
+	fdir_fltr_ctx.comp_report = input->comp_report;
 	fdir_fltr_ctx.fdid_prio = input->fdid_prio;
 	fdir_fltr_ctx.desc_prof = 1;
 	fdir_fltr_ctx.desc_prof_prio = 3;
diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
index 2d41ec360..5b75fed34 100644
--- a/drivers/net/ice/base/ice_fdir.h
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -204,6 +204,7 @@ struct ice_fdir_fltr {
 	u16 cnt_index;
 	u32 fltr_id;
 	u8 fdid_prio;
+	u8 comp_report;
 	/* Set to true for an ACL filter */
 	bool acl_fltr;
 };
diff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c
index 19fa41afc..77e2da9fc 100644
--- a/drivers/net/ice/ice_fdir_filter.c
+++ b/drivers/net/ice/ice_fdir_filter.c
@@ -1120,6 +1120,7 @@ ice_fdir_add_del_filter(struct ice_pf *pf,
 	filter->input.dest_vsi = pf->main_vsi->idx;
 
 	memset(&desc, 0, sizeof(desc));
+	filter->input.comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW;
 	ice_fdir_get_prgm_desc(hw, &filter->input, &desc, add);
 
 	is_tun = ice_fdir_is_tunnel_profile(filter->tunnel_type);
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 19/52] net/ice/base: initialize Set PHY Configuration FEC fields
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (17 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 18/52] net/ice/base: add FD completion report option Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 20/52] net/ice/baes: add NVM help functions Qi Zhang
                   ` (34 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Paul Greenwalt, Paul M . Stillwell Jr

Currently the caller needs to initialize the ice_cfg_phy_fec() parameter
ice_aqc_set_phy_cfg_data FEC fields before calling. However, this is not
necessary since ice_cfg_phy_fec() calls Get PHY Capabilities.

Initialize ice_aqc_set_phy_cfg_data FEC capabilities and FEC option fields
from Get PHY Capabilities with media/topology in ice_cfg_phy_fec().

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 908ef9085..8ba603242 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2762,6 +2762,9 @@ ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
 	if (status)
 		goto out;
 
+	cfg->caps |= (pcaps->caps & ICE_AQC_PHY_EN_AUTO_FEC);
+	cfg->link_fec_opt = pcaps->link_fec_options;
+
 	switch (fec) {
 	case ICE_FEC_BASER:
 		/* Clear RS bits, and AND BASE-R ability
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 20/52] net/ice/baes: add NVM help functions
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (18 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 19/52] net/ice/base: initialize Set PHY Configuration FEC fields Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 21/52] net/ice/base: allow GENEVE and VXLAN rules with VLAN Qi Zhang
                   ` (33 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr

Add couple functions that DPDK would like to use for accessing the
NVM.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.h |  1 -
 drivers/net/ice/base/ice_nvm.c    | 67 +++++++++++++++++++++++++++++++++++++--
 drivers/net/ice/base/ice_nvm.h    | 10 ++++++
 3 files changed, 74 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 6d971a644..46741a3f1 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -18,7 +18,6 @@ enum ice_fw_modes {
 	ICE_FW_MODE_ROLLBACK
 };
 
-enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw);
 enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw);
 void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw);
 enum ice_status ice_init_hw(struct ice_hw *hw);
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index d5e6215de..bedfbcbb4 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -17,7 +17,7 @@
  *
  * Read the NVM using the admin queue commands (0x0701)
  */
-static enum ice_status
+enum ice_status
 ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,
 		void *data, bool last_command, bool read_shadow_ram,
 		struct ice_sq_cd *cd)
@@ -186,7 +186,7 @@ ice_read_sr_buf_aq(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
  *
  * This function will request NVM ownership.
  */
-static enum ice_status
+enum ice_status
 ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access)
 {
 	ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -203,7 +203,7 @@ ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access)
  *
  * This function will release NVM ownership.
  */
-static void ice_release_nvm(struct ice_hw *hw)
+void ice_release_nvm(struct ice_hw *hw)
 {
 	ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
 
@@ -301,6 +301,67 @@ ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len,
 }
 
 /**
+ * ice_read_pba_string - Reads part number string from NVM
+ * @hw: pointer to hardware structure
+ * @pba_num: stores the part number string from the NVM
+ * @pba_num_size: part number string buffer length
+ *
+ * Reads the part number string from the NVM.
+ */
+enum ice_status
+ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size)
+{
+	u16 pba_tlv, pba_tlv_len;
+	enum ice_status status;
+	u16 pba_word, pba_size;
+	u16 i;
+
+	status = ice_get_pfa_module_tlv(hw, &pba_tlv, &pba_tlv_len,
+					ICE_SR_PBA_BLOCK_PTR);
+	if (status != ICE_SUCCESS) {
+		ice_debug(hw, ICE_DBG_INIT, "Failed to read PBA Block TLV.\n");
+		return status;
+	}
+
+	/* pba_size is the next word */
+	status = ice_read_sr_word(hw, (pba_tlv + 2), &pba_size);
+	if (status != ICE_SUCCESS) {
+		ice_debug(hw, ICE_DBG_INIT, "Failed to read PBA Section size.\n");
+		return status;
+	}
+
+	if (pba_tlv_len < pba_size) {
+		ice_debug(hw, ICE_DBG_INIT, "Invalid PBA Block TLV size.\n");
+		return ICE_ERR_INVAL_SIZE;
+	}
+
+	/* Subtract one to get PBA word count (PBA Size word is included in
+	 * total size)
+	 */
+	pba_size--;
+	if (pba_num_size < (((u32)pba_size * 2) + 1)) {
+		ice_debug(hw, ICE_DBG_INIT,
+			  "Buffer too small for PBA data.\n");
+		return ICE_ERR_PARAM;
+	}
+
+	for (i = 0; i < pba_size; i++) {
+		status = ice_read_sr_word(hw, (pba_tlv + 2 + 1) + i, &pba_word);
+		if (status != ICE_SUCCESS) {
+			ice_debug(hw, ICE_DBG_INIT,
+				  "Failed to read PBA Block word %d.\n", i);
+			return status;
+		}
+
+		pba_num[(i * 2)] = (pba_word >> 8) & 0xFF;
+		pba_num[(i * 2) + 1] = pba_word & 0xFF;
+	}
+	pba_num[(pba_size * 2)] = '\0';
+
+	return status;
+}
+
+/**
  * ice_get_orom_ver_info - Read Option ROM version information
  * @hw: pointer to the HW struct
  *
diff --git a/drivers/net/ice/base/ice_nvm.h b/drivers/net/ice/base/ice_nvm.h
index 9a61d4153..8e2eb4df1 100644
--- a/drivers/net/ice/base/ice_nvm.h
+++ b/drivers/net/ice/base/ice_nvm.h
@@ -85,13 +85,23 @@ enum ice_status
 ice_handle_nvm_access(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
 		      union ice_nvm_access_data *data);
 enum ice_status
+ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access);
+void ice_release_nvm(struct ice_hw *hw);
+enum ice_status
+ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,
+		void *data, bool last_command, bool read_shadow_ram,
+		struct ice_sq_cd *cd);
+enum ice_status
 ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,
 		  bool read_shadow_ram);
 enum ice_status
 ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len,
 		       u16 module_type);
+enum ice_status
+ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size);
 enum ice_status ice_init_nvm(struct ice_hw *hw);
 enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data);
 enum ice_status
 ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data);
+enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw);
 #endif /* _ICE_NVM_H_ */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 21/52] net/ice/base: allow GENEVE and VXLAN rules with VLAN
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (19 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 20/52] net/ice/baes: add NVM help functions Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 22/52] net/ice/base: increase timeout after PFR Qi Zhang
                   ` (32 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M . Stillwell Jr

When programming GENEVE and VXLAN switch rules, there are some instances
where both VLAN tagged packets plus non-VLAN tagged packets are needed
to match the rule.

In order to perform this action in one rule, the switch code needs
to setup the packet flag mask to ignore the VLAN packet flag. This
will allow the rule to match both VLAN and non-VLAN packets.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_protocol_type.h |  7 ++++--
 drivers/net/ice/base/ice_switch.c        | 41 +++++++++++++++++++-------------
 2 files changed, 29 insertions(+), 19 deletions(-)

diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index b75a340aa..964561d23 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -58,8 +58,10 @@ enum ice_sw_tunnel_type {
 	ICE_NON_TUN = 0,
 	ICE_SW_TUN_AND_NON_TUN,
 	ICE_SW_TUN_VXLAN_GPE,
-	ICE_SW_TUN_GENEVE,
-	ICE_SW_TUN_VXLAN,
+	ICE_SW_TUN_GENEVE,      /* GENEVE matches only non-VLAN pkts */
+	ICE_SW_TUN_GENEVE_VLAN, /* GENEVE matches both VLAN and non-VLAN pkts */
+	ICE_SW_TUN_VXLAN,	/* VXLAN matches only non-VLAN pkts */
+	ICE_SW_TUN_VXLAN_VLAN,  /* VXLAN matches both VLAN and non-VLAN pkts */
 	ICE_SW_TUN_NVGRE,
 	ICE_SW_TUN_UDP, /* This means all "UDP" tunnel types: VXLAN-GPE, VXLAN
 			 * and GENEVE
@@ -165,6 +167,7 @@ enum ice_prot_id {
 #define ICE_TUN_FLAG_MDID 21
 #define ICE_TUN_FLAG_MDID_OFF (ICE_MDID_SIZE * ICE_TUN_FLAG_MDID)
 #define ICE_TUN_FLAG_MASK 0xFF
+#define ICE_TUN_FLAG_VLAN_MASK 0x01
 #define ICE_TUN_FLAG_FV_IND 2
 
 #define ICE_PROTOCOL_MAX_ENTRIES 16
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index b4aab6780..ab8b44de7 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -5651,12 +5651,12 @@ ice_find_free_recp_res_idx(struct ice_hw *hw, const ice_bitmap_t *profiles,
  * ice_add_sw_recipe - function to call AQ calls to create switch recipe
  * @hw: pointer to hardware structure
  * @rm: recipe management list entry
- * @match_tun: if field vector index for tunnel needs to be programmed
- * @profiles: bitmap of profiles that will be assocated.
+ * @match_tun_mask: tunnel mask that needs to be programmed
+ * @profiles: bitmap of profiles that will be associated.
  */
 static enum ice_status
 ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm,
-		  bool match_tun, ice_bitmap_t *profiles)
+		  u16 match_tun_mask, ice_bitmap_t *profiles)
 {
 	ice_declare_bitmap(result_idx_bm, ICE_MAX_FV_WORDS);
 	struct ice_aqc_recipe_data_elem *tmp;
@@ -5874,10 +5874,10 @@ ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm,
 		/* To differentiate among different UDP tunnels, a meta data ID
 		 * flag is used.
 		 */
-		if (match_tun) {
+		if (match_tun_mask) {
 			buf[recps].content.lkup_indx[i] = ICE_TUN_FLAG_FV_IND;
 			buf[recps].content.mask[i] =
-				CPU_TO_LE16(ICE_TUN_FLAG_MASK);
+				CPU_TO_LE16(match_tun_mask);
 		}
 
 		recps++;
@@ -6038,12 +6038,19 @@ static bool ice_tun_type_match_word(enum ice_sw_tunnel_type tun_type, u16 *mask)
 {
 	switch (tun_type) {
 	case ICE_SW_TUN_VXLAN_GPE:
+	case ICE_SW_TUN_GENEVE:
+	case ICE_SW_TUN_VXLAN:
 	case ICE_SW_TUN_NVGRE:
 	case ICE_SW_TUN_UDP:
 	case ICE_ALL_TUNNELS:
 		*mask = ICE_TUN_FLAG_MASK;
 		return true;
 
+	case ICE_SW_TUN_GENEVE_VLAN:
+	case ICE_SW_TUN_VXLAN_VLAN:
+		*mask = ICE_TUN_FLAG_MASK & ~ICE_TUN_FLAG_VLAN_MASK;
+		return true;
+
 	default:
 		*mask = 0;
 		return false;
@@ -6101,7 +6108,9 @@ ice_get_compat_fv_bitmap(struct ice_hw *hw, struct ice_adv_rule_info *rinfo,
 		break;
 	case ICE_SW_TUN_VXLAN_GPE:
 	case ICE_SW_TUN_GENEVE:
+	case ICE_SW_TUN_GENEVE_VLAN:
 	case ICE_SW_TUN_VXLAN:
+	case ICE_SW_TUN_VXLAN_VLAN:
 	case ICE_SW_TUN_UDP:
 	case ICE_SW_TUN_GTP:
 		prof_type = ICE_PROF_TUN_UDP;
@@ -6209,7 +6218,7 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
 	struct ice_sw_fv_list_entry *tmp;
 	enum ice_status status = ICE_SUCCESS;
 	struct ice_sw_recipe *rm;
-	bool match_tun = false;
+	u16 match_tun_mask = 0;
 	u16 mask;
 	u8 i;
 
@@ -6272,9 +6281,9 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
 	 * differentiate different tunnel types. A separate recipe needs to be
 	 * used for the metadata.
 	 */
-	if (ice_tun_type_match_word(rinfo->tun_type,  &mask) &&
+	if (ice_tun_type_match_word(rinfo->tun_type, &mask) &&
 	    rm->n_grp_count > 1)
-		match_tun = mask;
+		match_tun_mask = mask;
 
 	/* set the recipe priority if specified */
 	rm->priority = (u8)rinfo->priority;
@@ -6329,7 +6338,7 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
 
 	rm->tun_type = rinfo->tun_type;
 	/* Recipe we need does not exist, add a recipe */
-	status = ice_add_sw_recipe(hw, rm, match_tun, profiles);
+	status = ice_add_sw_recipe(hw, rm, match_tun_mask, profiles);
 	if (status)
 		goto err_unroll;
 
@@ -6510,6 +6519,7 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
 		*offsets = dummy_udp_gtp_packet_offsets;
 		return;
 	}
+
 	if (tun_type == ICE_SW_TUN_PPPOE && ipv6) {
 		*pkt = dummy_pppoe_ipv6_packet;
 		*pkt_len = sizeof(dummy_pppoe_ipv6_packet);
@@ -6544,7 +6554,9 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
 	}
 
 	if (tun_type == ICE_SW_TUN_VXLAN || tun_type == ICE_SW_TUN_GENEVE ||
-	    tun_type == ICE_SW_TUN_VXLAN_GPE || tun_type == ICE_SW_TUN_UDP) {
+	    tun_type == ICE_SW_TUN_VXLAN_GPE || tun_type == ICE_SW_TUN_UDP ||
+	    tun_type == ICE_SW_TUN_GENEVE_VLAN ||
+	    tun_type == ICE_SW_TUN_VXLAN_VLAN) {
 		if (tcp) {
 			*pkt = dummy_udp_tun_tcp_packet;
 			*pkt_len = sizeof(dummy_udp_tun_tcp_packet);
@@ -6751,12 +6763,14 @@ ice_fill_adv_packet_tun(struct ice_hw *hw, enum ice_sw_tunnel_type tun_type,
 	case ICE_SW_TUN_AND_NON_TUN:
 	case ICE_SW_TUN_VXLAN_GPE:
 	case ICE_SW_TUN_VXLAN:
+	case ICE_SW_TUN_VXLAN_VLAN:
 	case ICE_SW_TUN_UDP:
 		if (!ice_get_open_tunnel_port(hw, TNL_VXLAN, &open_port))
 			return ICE_ERR_CFG;
 		break;
 
 	case ICE_SW_TUN_GENEVE:
+	case ICE_SW_TUN_GENEVE_VLAN:
 		if (!ice_get_open_tunnel_port(hw, TNL_GENEVE, &open_port))
 			return ICE_ERR_CFG;
 		break;
@@ -6865,13 +6879,6 @@ ice_adv_add_update_vsi_list(struct ice_hw *hw,
 	     cur_fltr->sw_act.fltr_act == ICE_FWD_TO_VSI_LIST))
 		return ICE_ERR_NOT_IMPL;
 
-	/* Workaround fix for unexpected rule deletion by kernel PF
-	 * during VF reset.
-	 */
-	if (new_fltr->sw_act.fltr_act == ICE_FWD_TO_VSI &&
-	    cur_fltr->sw_act.fltr_act == ICE_FWD_TO_VSI)
-		return ICE_ERR_NOT_IMPL;
-
 	if (m_entry->vsi_count < 2 && !m_entry->vsi_list_info) {
 		 /* Only one entry existed in the mapping and it was not already
 		  * a part of a VSI list. So, create a VSI list with the old and
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 22/52] net/ice/base: increase timeout after PFR
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (20 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 21/52] net/ice/base: allow GENEVE and VXLAN rules with VLAN Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 23/52] net/ice/base: remove unnecessary braces Qi Zhang
                   ` (31 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M . Stillwell Jr

To allow for resets during package download, increase the timeout period
after performing a PFR. The time waited is the global config lock
timeout plus the normal PFSWR timeout.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 8ba603242..a617643b6 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -912,7 +912,12 @@ static enum ice_status ice_pf_reset(struct ice_hw *hw)
 
 	wr32(hw, PFGEN_CTRL, (reg | PFGEN_CTRL_PFSWR_M));
 
-	for (cnt = 0; cnt < ICE_PF_RESET_WAIT_COUNT; cnt++) {
+	/* Wait for the PFR to complete. The wait time is the global config lock
+	 * timeout plus the PFR timeout which will account for a possible reset
+	 * that is occurring during a download package operation.
+	 */
+	for (cnt = 0; cnt < ICE_GLOBAL_CFG_LOCK_TIMEOUT +
+	     ICE_PF_RESET_WAIT_COUNT; cnt++) {
 		reg = rd32(hw, PFGEN_CTRL);
 		if (!(reg & PFGEN_CTRL_PFSWR_M))
 			break;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 23/52] net/ice/base: remove unnecessary braces
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (21 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 22/52] net/ice/base: increase timeout after PFR Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 24/52] net/ice/base: adjust function signature style format Qi Zhang
                   ` (30 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Tony Nguyen, Paul M . Stillwell Jr

This patch mainly does cleanups related to unnecessary braces.

A few other minor fixes are included which include fixing a typo,
pulling up some lines, and fixing RCT.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flex_pipe.c | 54 ++++++++++++------------------------
 drivers/net/ice/base/ice_flow.c      | 15 ++++------
 drivers/net/ice/base/ice_flow.h      |  1 +
 3 files changed, 24 insertions(+), 46 deletions(-)

diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 563b75b0d..340a855d3 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2428,12 +2428,10 @@ ice_match_prop_lst(struct LIST_HEAD_TYPE *list1, struct LIST_HEAD_TYPE *list2)
 	u16 count = 0;
 
 	/* compare counts */
-	LIST_FOR_EACH_ENTRY(tmp1, list1, ice_vsig_prof, list) {
+	LIST_FOR_EACH_ENTRY(tmp1, list1, ice_vsig_prof, list)
 		count++;
-	}
-	LIST_FOR_EACH_ENTRY(tmp2, list2, ice_vsig_prof, list) {
+	LIST_FOR_EACH_ENTRY(tmp2, list2, ice_vsig_prof, list)
 		chk_count++;
-	}
 	if (!count || count != chk_count)
 		return false;
 
@@ -2542,13 +2540,12 @@ ice_find_dup_props_vsig(struct ice_hw *hw, enum ice_block blk,
 	struct ice_xlt2 *xlt2 = &hw->blk[blk].xlt2;
 	u16 i;
 
-	for (i = 0; i < xlt2->count; i++) {
+	for (i = 0; i < xlt2->count; i++)
 		if (xlt2->vsig_tbl[i].in_use &&
 		    ice_match_prop_lst(chs, &xlt2->vsig_tbl[i].prop_lst)) {
 			*vsig = ICE_VSIG_VALUE(i, hw->pf_id);
 			return ICE_SUCCESS;
 		}
-	}
 
 	return ICE_ERR_DOES_NOT_EXIST;
 }
@@ -4051,10 +4048,9 @@ ice_has_prof_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl)
 	struct ice_vsig_prof *ent;
 
 	LIST_FOR_EACH_ENTRY(ent, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
-			    ice_vsig_prof, list) {
+			    ice_vsig_prof, list)
 		if (ent->profile_cookie == hdl)
 			return true;
-	}
 
 	ice_debug(hw, ICE_DBG_INIT,
 		  "Characteristic list for VSI group %d not found.\n",
@@ -4076,7 +4072,7 @@ ice_prof_bld_es(struct ice_hw *hw, enum ice_block blk,
 	u16 vec_size = hw->blk[blk].es.fvw * sizeof(struct ice_fv_word);
 	struct ice_chs_chg *tmp;
 
-	LIST_FOR_EACH_ENTRY(tmp, chgs, ice_chs_chg, list_entry) {
+	LIST_FOR_EACH_ENTRY(tmp, chgs, ice_chs_chg, list_entry)
 		if (tmp->type == ICE_PTG_ES_ADD && tmp->add_prof) {
 			u16 off = tmp->prof_id * hw->blk[blk].es.fvw;
 			struct ice_pkg_es *p;
@@ -4097,7 +4093,6 @@ ice_prof_bld_es(struct ice_hw *hw, enum ice_block blk,
 			ice_memcpy(p->es, &hw->blk[blk].es.t[off], vec_size,
 				   ICE_NONDMA_TO_NONDMA);
 		}
-	}
 
 	return ICE_SUCCESS;
 }
@@ -4115,7 +4110,7 @@ ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
 {
 	struct ice_chs_chg *tmp;
 
-	LIST_FOR_EACH_ENTRY(tmp, chgs, ice_chs_chg, list_entry) {
+	LIST_FOR_EACH_ENTRY(tmp, chgs, ice_chs_chg, list_entry)
 		if (tmp->type == ICE_TCAM_ADD && tmp->add_tcam_idx) {
 			struct ice_prof_id_section *p;
 			u32 id;
@@ -4136,7 +4131,6 @@ ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
 				   sizeof(hw->blk[blk].prof.t->key),
 				   ICE_NONDMA_TO_NONDMA);
 		}
-	}
 
 	return ICE_SUCCESS;
 }
@@ -4153,7 +4147,7 @@ ice_prof_bld_xlt1(enum ice_block blk, struct ice_buf_build *bld,
 {
 	struct ice_chs_chg *tmp;
 
-	LIST_FOR_EACH_ENTRY(tmp, chgs, ice_chs_chg, list_entry) {
+	LIST_FOR_EACH_ENTRY(tmp, chgs, ice_chs_chg, list_entry)
 		if (tmp->type == ICE_PTG_ES_ADD && tmp->add_ptg) {
 			struct ice_xlt1_section *p;
 			u32 id;
@@ -4169,7 +4163,6 @@ ice_prof_bld_xlt1(enum ice_block blk, struct ice_buf_build *bld,
 			p->offset = CPU_TO_LE16(tmp->ptype);
 			p->value[0] = tmp->ptg;
 		}
-	}
 
 	return ICE_SUCCESS;
 }
@@ -4400,13 +4393,12 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es)
 		    ICE_PROT_INVALID)
 			first_free = i - 1;
 
-		for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++) {
+		for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++)
 			if (es[i].prot_id == ice_fd_pairs[j].prot_id &&
 			    es[i].off == ice_fd_pairs[j].off) {
 				ice_set_bit(j, pair_list);
 				pair_start[j] = i;
 			}
-		}
 	}
 
 	orig_free = first_free;
@@ -4463,7 +4455,7 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es)
 		}
 
 		/* check for a swap location */
-		for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++) {
+		for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++)
 			if (es[si].prot_id == ice_fd_pairs[j].prot_id &&
 			    es[si].off == ice_fd_pairs[j].off) {
 				u8 idx;
@@ -4479,7 +4471,6 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es)
 
 				break;
 			}
-		}
 
 		si -= indexes_used;
 	}
@@ -4732,12 +4723,11 @@ ice_search_prof_id_low(struct ice_hw *hw, enum ice_block blk, u64 id)
 	struct ice_prof_map *map;
 
 	LIST_FOR_EACH_ENTRY(map, &hw->blk[blk].es.prof_map, ice_prof_map,
-			    list) {
+			    list)
 		if (map->profile_cookie == id) {
 			entry = map;
 			break;
 		}
-	}
 
 	return entry;
 }
@@ -4775,9 +4765,8 @@ ice_vsig_prof_id_count(struct ice_hw *hw, enum ice_block blk, u16 vsig)
 	struct ice_vsig_prof *p;
 
 	LIST_FOR_EACH_ENTRY(p, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
-			    ice_vsig_prof, list) {
+			    ice_vsig_prof, list)
 		count++;
-	}
 
 	return count;
 }
@@ -4822,7 +4811,7 @@ ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk,
 	enum ice_status status;
 	u16 i;
 
-	for (i = 0; i < prof->tcam_count; i++) {
+	for (i = 0; i < prof->tcam_count; i++)
 		if (prof->tcam[i].in_use) {
 			prof->tcam[i].in_use = false;
 			status = ice_rel_tcam_idx(hw, blk,
@@ -4830,7 +4819,6 @@ ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk,
 			if (status)
 				return ICE_ERR_HW_TABLE;
 		}
-	}
 
 	return ICE_SUCCESS;
 }
@@ -4868,7 +4856,7 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
 	/* If the VSIG has at least 1 VSI then iterate through the list
 	 * and remove the VSIs before deleting the group.
 	 */
-	if (vsi_cur) {
+	if (vsi_cur)
 		do {
 			struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
 			struct ice_chs_chg *p;
@@ -4886,7 +4874,6 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
 
 			vsi_cur = tmp;
 		} while (vsi_cur);
-	}
 
 	return ice_vsig_free(hw, blk, vsig);
 }
@@ -4909,7 +4896,7 @@ ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
 
 	LIST_FOR_EACH_ENTRY_SAFE(p, t,
 				 &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
-				 ice_vsig_prof, list) {
+				 ice_vsig_prof, list)
 		if (p->profile_cookie == hdl) {
 			if (ice_vsig_prof_id_count(hw, blk, vsig) == 1)
 				/* this is the last profile, remove the VSIG */
@@ -4922,7 +4909,6 @@ ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
 			}
 			return status;
 		}
-	}
 
 	return ICE_ERR_DOES_NOT_EXIST;
 }
@@ -4943,7 +4929,7 @@ ice_rem_flow_all(struct ice_hw *hw, enum ice_block blk, u64 id)
 
 	INIT_LIST_HEAD(&chg);
 
-	for (i = 1; i < ICE_MAX_VSIGS; i++) {
+	for (i = 1; i < ICE_MAX_VSIGS; i++)
 		if (hw->blk[blk].xlt2.vsig_tbl[i].in_use) {
 			if (ice_has_prof_vsig(hw, blk, i, id)) {
 				status = ice_rem_prof_id_vsig(hw, blk, i, id,
@@ -4952,7 +4938,6 @@ ice_rem_flow_all(struct ice_hw *hw, enum ice_block blk, u64 id)
 					goto err_ice_rem_flow_all;
 			}
 		}
-	}
 
 	status = ice_upd_prof_hw(hw, blk, &chg);
 
@@ -5024,7 +5009,7 @@ ice_get_prof(struct ice_hw *hw, enum ice_block blk, u64 hdl,
 	if (!map)
 		return ICE_ERR_DOES_NOT_EXIST;
 
-	for (i = 0; i < map->ptg_cnt; i++) {
+	for (i = 0; i < map->ptg_cnt; i++)
 		if (!hw->blk[blk].es.written[map->prof_id]) {
 			/* add ES to change list */
 			p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
@@ -5044,7 +5029,6 @@ ice_get_prof(struct ice_hw *hw, enum ice_block blk, u64 hdl,
 
 			LIST_ADD(&p->list_entry, chg);
 		}
-	}
 
 	return ICE_SUCCESS;
 
@@ -5196,12 +5180,11 @@ ice_rem_chg_tcam_ent(struct ice_hw *hw, u16 idx, struct LIST_HEAD_TYPE *chg)
 {
 	struct ice_chs_chg *pos, *tmp;
 
-	LIST_FOR_EACH_ENTRY_SAFE(tmp, pos, chg, ice_chs_chg, list_entry) {
+	LIST_FOR_EACH_ENTRY_SAFE(tmp, pos, chg, ice_chs_chg, list_entry)
 		if (tmp->type == ICE_TCAM_ADD && tmp->tcam_idx == idx) {
 			LIST_DEL(&tmp->list_entry);
 			ice_free(hw, tmp);
 		}
-	}
 }
 
 /**
@@ -5814,13 +5797,12 @@ ice_rem_prof_from_list(struct ice_hw *hw, struct LIST_HEAD_TYPE *lst, u64 hdl)
 {
 	struct ice_vsig_prof *ent, *tmp;
 
-	LIST_FOR_EACH_ENTRY_SAFE(ent, tmp, lst, ice_vsig_prof, list) {
+	LIST_FOR_EACH_ENTRY_SAFE(ent, tmp, lst, ice_vsig_prof, list)
 		if (ent->profile_cookie == hdl) {
 			LIST_DEL(&ent->list);
 			ice_free(hw, ent);
 			return ICE_SUCCESS;
 		}
-	}
 
 	return ICE_ERR_DOES_NOT_EXIST;
 }
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 00f58697f..dfa351ff2 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1387,7 +1387,7 @@ ice_flow_find_prof_conds(struct ice_hw *hw, enum ice_block blk,
 	struct ice_flow_prof *p, *prof = NULL;
 
 	ice_acquire_lock(&hw->fl_profs_locks[blk]);
-	LIST_FOR_EACH_ENTRY(p, &hw->fl_profs[blk], ice_flow_prof, l_entry) {
+	LIST_FOR_EACH_ENTRY(p, &hw->fl_profs[blk], ice_flow_prof, l_entry)
 		if ((p->dir == dir || conds & ICE_FLOW_FIND_PROF_NOT_CHK_DIR) &&
 		    segs_cnt && segs_cnt == p->segs_cnt) {
 			u8 i;
@@ -1413,7 +1413,6 @@ ice_flow_find_prof_conds(struct ice_hw *hw, enum ice_block blk,
 				break;
 			}
 		}
-	}
 	ice_release_lock(&hw->fl_profs_locks[blk]);
 
 	return prof;
@@ -1450,10 +1449,9 @@ ice_flow_find_prof_id(struct ice_hw *hw, enum ice_block blk, u64 prof_id)
 {
 	struct ice_flow_prof *p;
 
-	LIST_FOR_EACH_ENTRY(p, &hw->fl_profs[blk], ice_flow_prof, l_entry) {
+	LIST_FOR_EACH_ENTRY(p, &hw->fl_profs[blk], ice_flow_prof, l_entry)
 		if (p->id == prof_id)
 			return p;
-	}
 
 	return NULL;
 }
@@ -3159,13 +3157,12 @@ void ice_rem_vsi_rss_list(struct ice_hw *hw, u16 vsi_handle)
 
 	ice_acquire_lock(&hw->rss_locks);
 	LIST_FOR_EACH_ENTRY_SAFE(r, tmp, &hw->rss_list_head,
-				 ice_rss_cfg, l_entry) {
+				 ice_rss_cfg, l_entry)
 		if (ice_test_and_clear_bit(vsi_handle, r->vsis))
 			if (!ice_is_any_bit_set(r->vsis, ICE_MAX_VSI)) {
 				LIST_DEL(&r->l_entry);
 				ice_free(hw, r);
 			}
-	}
 	ice_release_lock(&hw->rss_locks);
 }
 
@@ -3192,7 +3189,7 @@ enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
 
 	ice_acquire_lock(&hw->fl_profs_locks[blk]);
 	LIST_FOR_EACH_ENTRY_SAFE(p, t, &hw->fl_profs[blk], ice_flow_prof,
-				 l_entry) {
+				 l_entry)
 		if (ice_is_bit_set(p->vsis, vsi_handle)) {
 			status = ice_flow_disassoc_prof(hw, blk, p, vsi_handle);
 			if (status)
@@ -3204,7 +3201,6 @@ enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
 					break;
 			}
 		}
-	}
 	ice_release_lock(&hw->fl_profs_locks[blk]);
 
 	return status;
@@ -3228,7 +3224,7 @@ ice_rem_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof)
 	 * remove from the RSS entry list of the VSI context and delete entry.
 	 */
 	LIST_FOR_EACH_ENTRY_SAFE(r, tmp, &hw->rss_list_head,
-				 ice_rss_cfg, l_entry) {
+				 ice_rss_cfg, l_entry)
 		if (r->hashed_flds == prof->segs[prof->segs_cnt - 1].match &&
 		    r->packet_hdr == prof->segs[prof->segs_cnt - 1].hdrs) {
 			ice_clear_bit(vsi_handle, r->vsis);
@@ -3238,7 +3234,6 @@ ice_rem_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof)
 			}
 			return;
 		}
-	}
 }
 
 /**
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 93043acc8..88c369a33 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -7,6 +7,7 @@
 
 #include "ice_flex_type.h"
 #include "ice_acl.h"
+
 #define ICE_IPV4_MAKE_PREFIX_MASK(prefix) ((u32)(~0) << (32 - (prefix)))
 #define ICE_FLOW_PROF_ID_INVAL		0xfffffffffffffffful
 #define ICE_FLOW_PROF_ID_BYPASS		0
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 24/52] net/ice/base: adjust function signature style format
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (22 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 23/52] net/ice/base: remove unnecessary braces Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 25/52] net/ice/base: add RSS support for IPv6 prefix Qi Zhang
                   ` (29 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Bruce Allan, Paul M . Stillwell Jr

Where possible, cuddle multiple lines of function signatures to be
consistent throughout the code.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c   |  3 +--
 drivers/net/ice/base/ice_controlq.c |  9 +++------
 drivers/net/ice/base/ice_dcb.c      |  3 +--
 drivers/net/ice/base/ice_fdir.c     |  5 ++---
 drivers/net/ice/base/ice_sched.c    | 21 +++++++--------------
 drivers/net/ice/base/ice_switch.c   | 17 ++++++-----------
 6 files changed, 20 insertions(+), 38 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index a617643b6..d8d583bdf 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1720,8 +1720,7 @@ ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res)
  * @num: number of resources
  * @res: pointer to array that contains the resources to free
  */
-enum ice_status
-ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)
+enum ice_status ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)
 {
 	struct ice_aqc_alloc_free_res_elem *buf;
 	enum ice_status status;
diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c
index 47dde2f7c..3ef86fa03 100644
--- a/drivers/net/ice/base/ice_controlq.c
+++ b/drivers/net/ice/base/ice_controlq.c
@@ -742,8 +742,7 @@ enum ice_status ice_create_all_ctrlq(struct ice_hw *hw)
  *
  * Destroys the send and receive queue locks for a given control queue.
  */
-static void
-ice_destroy_ctrlq_locks(struct ice_ctl_q_info *cq)
+static void ice_destroy_ctrlq_locks(struct ice_ctl_q_info *cq)
 {
 	ice_destroy_lock(&cq->sq_lock);
 	ice_destroy_lock(&cq->rq_lock);
@@ -1040,8 +1039,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 	if (!cmd_completed) {
 		if (rd32(hw, cq->rq.len) & cq->rq.len_crit_mask ||
 		    rd32(hw, cq->sq.len) & cq->sq.len_crit_mask) {
-			ice_debug(hw, ICE_DBG_AQ_MSG,
-				  "Critical FW error.\n");
+			ice_debug(hw, ICE_DBG_AQ_MSG, "Critical FW error.\n");
 			status = ICE_ERR_AQ_FW_CRITICAL;
 		} else {
 			ice_debug(hw, ICE_DBG_AQ_MSG,
@@ -1167,8 +1165,7 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 
 	ice_debug(hw, ICE_DBG_AQ_DESC, "ARQ: desc and buffer:\n");
 
-	ice_debug_cq(hw, (void *)desc, e->msg_buf,
-		     cq->rq_buf_size);
+	ice_debug_cq(hw, (void *)desc, e->msg_buf, cq->rq_buf_size);
 
 	/* Restore the original datalen and buffer address in the desc,
 	 * FW updates datalen to indicate the event message size
diff --git a/drivers/net/ice/base/ice_dcb.c b/drivers/net/ice/base/ice_dcb.c
index 50634a145..6bdec18c0 100644
--- a/drivers/net/ice/base/ice_dcb.c
+++ b/drivers/net/ice/base/ice_dcb.c
@@ -631,8 +631,7 @@ ice_parse_org_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
  *
  * Parse DCB configuration from the LLDPDU
  */
-enum ice_status
-ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg)
+enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg)
 {
 	struct ice_lldp_org_tlv *tlv;
 	enum ice_status ret = ICE_SUCCESS;
diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index a62e6eeba..466e0ee36 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -571,8 +571,7 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
  * ice_set_dflt_val_fd_desc
  * @fd_fltr_ctx: pointer to fd filter descriptor
  */
-void
-ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx)
+void ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx)
 {
 	fd_fltr_ctx->comp_q = ICE_FXD_FLTR_QW0_COMP_Q_ZERO;
 	fd_fltr_ctx->comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW_FAIL;
@@ -681,7 +680,7 @@ ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_YES;
 		fdir_fltr_ctx.qindex = 0;
 	} else if (input->dest_ctl ==
-			ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_OTHER) {
+		   ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_OTHER) {
 		fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_NO;
 		fdir_fltr_ctx.qindex = 0;
 	} else {
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 0a46dd40b..2541103ad 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -1932,8 +1932,7 @@ ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
  * This function removes single aggregator VSI info entry from
  * aggregator list.
  */
-static void
-ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle)
+static void ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle)
 {
 	struct ice_sched_agg_info *agg_info;
 	struct ice_sched_agg_info *atmp;
@@ -3079,8 +3078,7 @@ ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
  *
  * Save or clear CIR bandwidth (BW) in the passed param bw_t_info.
  */
-static void
-ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
+static void ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
 {
 	if (bw == ICE_SCHED_DFLT_BW) {
 		ice_clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
@@ -3099,8 +3097,7 @@ ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
  *
  * Save or clear EIR bandwidth (BW) in the passed param bw_t_info.
  */
-static void
-ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
+static void ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
 {
 	if (bw == ICE_SCHED_DFLT_BW) {
 		ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
@@ -3125,8 +3122,7 @@ ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
  *
  * Save or clear shared bandwidth (BW) in the passed param bw_t_info.
  */
-static void
-ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
+static void ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
 {
 	if (bw == ICE_SCHED_DFLT_BW) {
 		ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
@@ -3188,8 +3184,7 @@ ice_sched_save_vsi_bw(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
  *
  * Save or clear priority (prio) in the passed param bw_t_info.
  */
-static void
-ice_set_clear_prio(struct ice_bw_type_info *bw_t_info, u8 prio)
+static void ice_set_clear_prio(struct ice_bw_type_info *bw_t_info, u8 prio)
 {
 	bw_t_info->generic = prio;
 	if (bw_t_info->generic)
@@ -5355,8 +5350,7 @@ void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
  *
  * This function replay TC nodes.
  */
-enum ice_status
-ice_sched_replay_tc_node_bw(struct ice_port_info *pi)
+enum ice_status ice_sched_replay_tc_node_bw(struct ice_port_info *pi)
 {
 	enum ice_status status = ICE_SUCCESS;
 	u8 tc;
@@ -5479,8 +5473,7 @@ ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
  * This function replays association of VSI to aggregator type nodes, and
  * node bandwidth information.
  */
-enum ice_status
-ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
+enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
 {
 	struct ice_port_info *pi = hw->port_info;
 	enum ice_status status;
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index ab8b44de7..6387f9b84 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1007,8 +1007,7 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,
  * this array is the recipe ID and the element is the mapping of which profiles
  * is this recipe mapped to.
  */
-static void
-ice_get_recp_to_prof_map(struct ice_hw *hw)
+static void ice_get_recp_to_prof_map(struct ice_hw *hw)
 {
 	ice_declare_bitmap(r_bitmap, ICE_MAX_NUM_RECIPES);
 	u16 i;
@@ -3511,8 +3510,7 @@ ice_add_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list,
  *
  * Function add MAC rule for logical port from HW struct
  */
-enum ice_status
-ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
+enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
 {
 	if (!m_list || !hw)
 		return ICE_ERR_PARAM;
@@ -3710,8 +3708,7 @@ ice_add_vlan_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list,
  *
  * Function add VLAN rule for logical port from HW struct
  */
-enum ice_status
-ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list)
+enum ice_status ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list)
 {
 	if (!v_list || !hw)
 		return ICE_ERR_PARAM;
@@ -3814,7 +3811,6 @@ ice_add_eth_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list,
 	return ICE_SUCCESS;
 }
 
-enum ice_status
 /**
  * ice_add_eth_mac - Add a ethertype based filter rule
  * @hw: pointer to the hardware structure
@@ -3822,6 +3818,7 @@ enum ice_status
  *
  * Function add ethertype rule for logical port from HW struct
  */
+enum ice_status
 ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)
 {
 	if (!em_list || !hw)
@@ -4124,8 +4121,7 @@ ice_remove_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list,
  * @m_list: list of MAC addresses and forwarding information
  *
  */
-enum ice_status
-ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
+enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
 {
 	struct ice_sw_recipe *recp_list;
 
@@ -7415,8 +7411,7 @@ ice_rem_adv_rule_by_id(struct ice_hw *hw,
  * as removing a rule fails, it will return immediately with the error code,
  * else it will return ICE_SUCCESS
  */
-enum ice_status
-ice_rem_adv_rule_for_vsi(struct ice_hw *hw, u16 vsi_handle)
+enum ice_status ice_rem_adv_rule_for_vsi(struct ice_hw *hw, u16 vsi_handle)
 {
 	struct ice_adv_fltr_mgmt_list_entry *list_itr;
 	struct ice_vsi_list_map_info *map_info;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 25/52] net/ice/base: add RSS support for IPv6 prefix
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (23 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 24/52] net/ice/base: adjust function signature style format Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 26/52] net/ice/base: use macro for sizeof Qi Zhang
                   ` (28 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M . Stillwell Jr

Some IPv6 prefix related fields are defined in this patch, so that we
can use prefixes instead of full IPv6 address for RSS. These prefixes
include the first 32, 48, 64 bits of both SRC and DST IPV6 address.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flow.c | 27 +++++++++++++++++++++++++++
 drivers/net/ice/base/ice_flow.h | 34 ++++++++++++++++++++++++++++++++++
 2 files changed, 61 insertions(+)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index dfa351ff2..030a55ba7 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -10,6 +10,9 @@
 #define ICE_FLOW_FLD_SZ_VLAN		2
 #define ICE_FLOW_FLD_SZ_IPV4_ADDR	4
 #define ICE_FLOW_FLD_SZ_IPV6_ADDR	16
+#define ICE_FLOW_FLD_SZ_IPV6_PRE32_ADDR	4
+#define ICE_FLOW_FLD_SZ_IPV6_PRE48_ADDR	6
+#define ICE_FLOW_FLD_SZ_IPV6_PRE64_ADDR	8
 #define ICE_FLOW_FLD_SZ_IP_DSCP		1
 #define ICE_FLOW_FLD_SZ_IP_TTL		1
 #define ICE_FLOW_FLD_SZ_IP_PROT		1
@@ -91,6 +94,24 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = {
 	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 8, ICE_FLOW_FLD_SZ_IPV6_ADDR),
 	/* ICE_FLOW_FIELD_IDX_IPV6_DA */
 	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 24, ICE_FLOW_FLD_SZ_IPV6_ADDR),
+	/* ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA */
+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 8,
+			  ICE_FLOW_FLD_SZ_IPV6_PRE32_ADDR),
+	/* ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA */
+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 24,
+			  ICE_FLOW_FLD_SZ_IPV6_PRE32_ADDR),
+	/* ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA */
+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 8,
+			  ICE_FLOW_FLD_SZ_IPV6_PRE48_ADDR),
+	/* ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA */
+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 24,
+			  ICE_FLOW_FLD_SZ_IPV6_PRE48_ADDR),
+	/* ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA */
+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 8,
+			  ICE_FLOW_FLD_SZ_IPV6_PRE64_ADDR),
+	/* ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA */
+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 24,
+			  ICE_FLOW_FLD_SZ_IPV6_PRE64_ADDR),
 	/* Transport */
 	/* ICE_FLOW_FIELD_IDX_TCP_SRC_PORT */
 	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_TCP, 0, ICE_FLOW_FLD_SZ_PORT),
@@ -959,6 +980,12 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
 		break;
 	case ICE_FLOW_FIELD_IDX_IPV6_SA:
 	case ICE_FLOW_FIELD_IDX_IPV6_DA:
+	case ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA:
+	case ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA:
+	case ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA:
+	case ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA:
+	case ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA:
+	case ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA:
 		prot_id = seg == 0 ? ICE_PROT_IPV6_OF_OR_S : ICE_PROT_IPV6_IL;
 		break;
 	case ICE_FLOW_FIELD_IDX_TCP_SRC_PORT:
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 88c369a33..6e4257123 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -26,6 +26,15 @@
 #define ICE_FLOW_HASH_IPV6	\
 	(BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA) | \
 	 BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_DA))
+#define ICE_FLOW_HASH_IPV6_PRE32	\
+	(BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA) | \
+	 BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA))
+#define ICE_FLOW_HASH_IPV6_PRE48	\
+	(BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA) | \
+	 BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA))
+#define ICE_FLOW_HASH_IPV6_PRE64	\
+	(BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA) | \
+	 BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA))
 #define ICE_FLOW_HASH_TCP_PORT	\
 	(BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT) | \
 	 BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT))
@@ -44,6 +53,25 @@
 #define ICE_HASH_SCTP_IPV4	(ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_SCTP_PORT)
 #define ICE_HASH_SCTP_IPV6	(ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_SCTP_PORT)
 
+#define ICE_HASH_TCP_IPV6_PRE32	 \
+	(ICE_FLOW_HASH_IPV6_PRE32 | ICE_FLOW_HASH_TCP_PORT)
+#define ICE_HASH_UDP_IPV6_PRE32	 \
+	(ICE_FLOW_HASH_IPV6_PRE32 | ICE_FLOW_HASH_UDP_PORT)
+#define ICE_HASH_SCTP_IPV6_PRE32 \
+	(ICE_FLOW_HASH_IPV6_PRE32 | ICE_FLOW_HASH_SCTP_PORT)
+#define ICE_HASH_TCP_IPV6_PRE48	 \
+	(ICE_FLOW_HASH_IPV6_PRE48 | ICE_FLOW_HASH_TCP_PORT)
+#define ICE_HASH_UDP_IPV6_PRE48	 \
+	(ICE_FLOW_HASH_IPV6_PRE48 | ICE_FLOW_HASH_UDP_PORT)
+#define ICE_HASH_SCTP_IPV6_PRE48 \
+	(ICE_FLOW_HASH_IPV6_PRE48 | ICE_FLOW_HASH_SCTP_PORT)
+#define ICE_HASH_TCP_IPV6_PRE64	 \
+	(ICE_FLOW_HASH_IPV6_PRE64 | ICE_FLOW_HASH_TCP_PORT)
+#define ICE_HASH_UDP_IPV6_PRE64	 \
+	(ICE_FLOW_HASH_IPV6_PRE64 | ICE_FLOW_HASH_UDP_PORT)
+#define ICE_HASH_SCTP_IPV6_PRE64 \
+	(ICE_FLOW_HASH_IPV6_PRE64 | ICE_FLOW_HASH_SCTP_PORT)
+
 #define ICE_FLOW_HASH_GTP_TEID \
 	(BIT_ULL(ICE_FLOW_FIELD_IDX_GTPC_TEID))
 
@@ -186,6 +214,12 @@ enum ice_flow_field {
 	ICE_FLOW_FIELD_IDX_IPV4_DA,
 	ICE_FLOW_FIELD_IDX_IPV6_SA,
 	ICE_FLOW_FIELD_IDX_IPV6_DA,
+	ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA,
+	ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA,
+	ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA,
+	ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA,
+	ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA,
+	ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA,
 	/* L4 */
 	ICE_FLOW_FIELD_IDX_TCP_SRC_PORT,
 	ICE_FLOW_FIELD_IDX_TCP_DST_PORT,
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 26/52] net/ice/base: use macro for sizeof
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (24 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 25/52] net/ice/base: add RSS support for IPv6 prefix Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 27/52] net/ice/base: add debug logs Qi Zhang
                   ` (27 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Jacob Keller, Paul M . Stillwell Jr

The definition of ICE_SW_RULE_RX_TX_ETH_HDR_SIZE open codes the size of
a structure field. Replace this with the use of FIELD_SIZEOF.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.h | 17 ++++++++---------
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 7317d17ef..8c7e98bfa 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -32,24 +32,24 @@
 #define DUMMY_ETH_HDR_LEN		16
 #define ICE_SW_RULE_RX_TX_ETH_HDR_SIZE \
 	(sizeof(struct ice_aqc_sw_rules_elem) - \
-	 sizeof(((struct ice_aqc_sw_rules_elem *)0)->pdata) + \
+	 FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \
 	 sizeof(struct ice_sw_rule_lkup_rx_tx) + DUMMY_ETH_HDR_LEN - 1)
 #define ICE_SW_RULE_RX_TX_NO_HDR_SIZE \
 	(sizeof(struct ice_aqc_sw_rules_elem) - \
-	 sizeof(((struct ice_aqc_sw_rules_elem *)0)->pdata) + \
+	 FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \
 	 sizeof(struct ice_sw_rule_lkup_rx_tx) - 1)
 #define ICE_SW_RULE_LG_ACT_SIZE(n) \
 	(sizeof(struct ice_aqc_sw_rules_elem) - \
-	 sizeof(((struct ice_aqc_sw_rules_elem *)0)->pdata) + \
+	 FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \
 	 sizeof(struct ice_sw_rule_lg_act) - \
-	 sizeof(((struct ice_sw_rule_lg_act *)0)->act) + \
-	 ((n) * sizeof(((struct ice_sw_rule_lg_act *)0)->act)))
+	 FIELD_SIZEOF(struct ice_sw_rule_lg_act, act) + \
+	 ((n) * FIELD_SIZEOF(struct ice_sw_rule_lg_act, act)))
 #define ICE_SW_RULE_VSI_LIST_SIZE(n) \
 	(sizeof(struct ice_aqc_sw_rules_elem) - \
-	 sizeof(((struct ice_aqc_sw_rules_elem *)0)->pdata) + \
+	 FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \
 	 sizeof(struct ice_sw_rule_vsi_list) - \
-	 sizeof(((struct ice_sw_rule_vsi_list *)0)->vsi) + \
-	 ((n) * sizeof(((struct ice_sw_rule_vsi_list *)0)->vsi)))
+	 FIELD_SIZEOF(struct ice_sw_rule_vsi_list, vsi) + \
+	 ((n) * FIELD_SIZEOF(struct ice_sw_rule_vsi_list, vsi)))
 
 /* Worst case buffer length for ice_aqc_opc_get_res_alloc */
 #define ICE_MAX_RES_TYPES 0x80
@@ -490,5 +490,4 @@ ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi,
 void ice_rm_sw_replay_rule_info(struct ice_hw *hw, struct ice_switch_info *sw);
 void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw);
 bool ice_is_prof_rule(enum ice_sw_tunnel_type type);
-
 #endif /* _ICE_SWITCH_H_ */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 27/52] net/ice/base: add debug logs
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (25 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 26/52] net/ice/base: use macro for sizeof Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 28/52] net/ice/base: return correct error code Qi Zhang
                   ` (26 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Paul Greenwalt, Paul M . Stillwell Jr

Add debug logs for ice_aq_get_phy_caps(), and format
ice_aq_set_phy_cfg() and ice_aq_get_link_info() debug logs to make them
more readable.

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 69 +++++++++++++++++++++++++++++----------
 1 file changed, 51 insertions(+), 18 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index d8d583bdf..e1181a102 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -147,11 +147,13 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
 	u16 pcaps_size = sizeof(*pcaps);
 	struct ice_aq_desc desc;
 	enum ice_status status;
+	struct ice_hw *hw;
 
 	cmd = &desc.params.get_phy;
 
 	if (!pcaps || (report_mode & ~ICE_AQC_REPORT_MODE_M) || !pi)
 		return ICE_ERR_PARAM;
+	hw = pi->hw;
 
 	ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_phy_caps);
 
@@ -159,7 +161,33 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
 		cmd->param0 |= CPU_TO_LE16(ICE_AQC_GET_PHY_RQM);
 
 	cmd->param0 |= CPU_TO_LE16(report_mode);
-	status = ice_aq_send_cmd(pi->hw, &desc, pcaps, pcaps_size, cd);
+	status = ice_aq_send_cmd(hw, &desc, pcaps, pcaps_size, cd);
+
+	ice_debug(hw, ICE_DBG_LINK, "get phy caps - report_mode = 0x%x\n",
+		  report_mode);
+	ice_debug(hw, ICE_DBG_LINK, "	phy_type_low = 0x%llx\n",
+		  (unsigned long long)LE64_TO_CPU(pcaps->phy_type_low));
+	ice_debug(hw, ICE_DBG_LINK, "	phy_type_high = 0x%llx\n",
+		  (unsigned long long)LE64_TO_CPU(pcaps->phy_type_high));
+	ice_debug(hw, ICE_DBG_LINK, "	caps = 0x%x\n", pcaps->caps);
+	ice_debug(hw, ICE_DBG_LINK, "	low_power_ctrl_an = 0x%x\n",
+		  pcaps->low_power_ctrl_an);
+	ice_debug(hw, ICE_DBG_LINK, "	eee_cap = 0x%x\n", pcaps->eee_cap);
+	ice_debug(hw, ICE_DBG_LINK, "	eeer_value = 0x%x\n",
+		  pcaps->eeer_value);
+	ice_debug(hw, ICE_DBG_LINK, "	link_fec_options = 0x%x\n",
+		  pcaps->link_fec_options);
+	ice_debug(hw, ICE_DBG_LINK, "	module_compliance_enforcement = 0x%x\n",
+		  pcaps->module_compliance_enforcement);
+	ice_debug(hw, ICE_DBG_LINK, "   extended_compliance_code = 0x%x\n",
+		  pcaps->extended_compliance_code);
+	ice_debug(hw, ICE_DBG_LINK, "   module_type[0] = 0x%x\n",
+		  pcaps->module_type[0]);
+	ice_debug(hw, ICE_DBG_LINK, "   module_type[1] = 0x%x\n",
+		  pcaps->module_type[1]);
+	ice_debug(hw, ICE_DBG_LINK, "   module_type[2] = 0x%x\n",
+		  pcaps->module_type[2]);
+
 
 	if (status == ICE_SUCCESS && report_mode == ICE_AQC_REPORT_TOPO_CAP) {
 		pi->phy.phy_type_low = LE64_TO_CPU(pcaps->phy_type_low);
@@ -399,18 +427,21 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
 
 	li->lse_ena = !!(resp->cmd_flags & CPU_TO_LE16(ICE_AQ_LSE_IS_ENABLED));
 
-	ice_debug(hw, ICE_DBG_LINK, "link_speed = 0x%x\n", li->link_speed);
-	ice_debug(hw, ICE_DBG_LINK, "phy_type_low = 0x%llx\n",
+	ice_debug(hw, ICE_DBG_LINK, "get link info\n");
+	ice_debug(hw, ICE_DBG_LINK, "	link_speed = 0x%x\n", li->link_speed);
+	ice_debug(hw, ICE_DBG_LINK, "	phy_type_low = 0x%llx\n",
 		  (unsigned long long)li->phy_type_low);
-	ice_debug(hw, ICE_DBG_LINK, "phy_type_high = 0x%llx\n",
+	ice_debug(hw, ICE_DBG_LINK, "	phy_type_high = 0x%llx\n",
 		  (unsigned long long)li->phy_type_high);
-	ice_debug(hw, ICE_DBG_LINK, "media_type = 0x%x\n", *hw_media_type);
-	ice_debug(hw, ICE_DBG_LINK, "link_info = 0x%x\n", li->link_info);
-	ice_debug(hw, ICE_DBG_LINK, "an_info = 0x%x\n", li->an_info);
-	ice_debug(hw, ICE_DBG_LINK, "ext_info = 0x%x\n", li->ext_info);
-	ice_debug(hw, ICE_DBG_LINK, "lse_ena = 0x%x\n", li->lse_ena);
-	ice_debug(hw, ICE_DBG_LINK, "max_frame = 0x%x\n", li->max_frame_size);
-	ice_debug(hw, ICE_DBG_LINK, "pacing = 0x%x\n", li->pacing);
+	ice_debug(hw, ICE_DBG_LINK, "	media_type = 0x%x\n", *hw_media_type);
+	ice_debug(hw, ICE_DBG_LINK, "	link_info = 0x%x\n", li->link_info);
+	ice_debug(hw, ICE_DBG_LINK, "	an_info = 0x%x\n", li->an_info);
+	ice_debug(hw, ICE_DBG_LINK, "	ext_info = 0x%x\n", li->ext_info);
+	ice_debug(hw, ICE_DBG_LINK, "	fec_info = 0x%x\n", li->fec_info);
+	ice_debug(hw, ICE_DBG_LINK, "	lse_ena = 0x%x\n", li->lse_ena);
+	ice_debug(hw, ICE_DBG_LINK, "	max_frame = 0x%x\n",
+		  li->max_frame_size);
+	ice_debug(hw, ICE_DBG_LINK, "	pacing = 0x%x\n", li->pacing);
 
 	/* save link status information */
 	if (link)
@@ -2377,16 +2408,18 @@ ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,
 	desc.params.set_phy.lport_num = pi->lport;
 	desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
 
-	ice_debug(hw, ICE_DBG_LINK, "phy_type_low = 0x%llx\n",
+	ice_debug(hw, ICE_DBG_LINK, "set phy cfg\n");
+	ice_debug(hw, ICE_DBG_LINK, "	phy_type_low = 0x%llx\n",
 		  (unsigned long long)LE64_TO_CPU(cfg->phy_type_low));
-	ice_debug(hw, ICE_DBG_LINK, "phy_type_high = 0x%llx\n",
+	ice_debug(hw, ICE_DBG_LINK, "	phy_type_high = 0x%llx\n",
 		  (unsigned long long)LE64_TO_CPU(cfg->phy_type_high));
-	ice_debug(hw, ICE_DBG_LINK, "caps = 0x%x\n", cfg->caps);
-	ice_debug(hw, ICE_DBG_LINK, "low_power_ctrl_an = 0x%x\n",
+	ice_debug(hw, ICE_DBG_LINK, "	caps = 0x%x\n", cfg->caps);
+	ice_debug(hw, ICE_DBG_LINK, "	low_power_ctrl_an = 0x%x\n",
 		  cfg->low_power_ctrl_an);
-	ice_debug(hw, ICE_DBG_LINK, "eee_cap = 0x%x\n", cfg->eee_cap);
-	ice_debug(hw, ICE_DBG_LINK, "eeer_value = 0x%x\n", cfg->eeer_value);
-	ice_debug(hw, ICE_DBG_LINK, "link_fec_opt = 0x%x\n", cfg->link_fec_opt);
+	ice_debug(hw, ICE_DBG_LINK, "	eee_cap = 0x%x\n", cfg->eee_cap);
+	ice_debug(hw, ICE_DBG_LINK, "	eeer_value = 0x%x\n", cfg->eeer_value);
+	ice_debug(hw, ICE_DBG_LINK, "	link_fec_opt = 0x%x\n",
+		  cfg->link_fec_opt);
 
 	status = ice_aq_send_cmd(hw, &desc, cfg, sizeof(*cfg), cd);
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 28/52] net/ice/base: return correct error code
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (26 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 27/52] net/ice/base: add debug logs Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:47   ` Patil, Kiran
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 29/52] net/ice/base: remove unnecessary code Qi Zhang
                   ` (25 subsequent siblings)
  53 siblings, 1 reply; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Kiran Patil, Paul M . Stillwell Jr

Return ICE_ERR_DOES_NOT_EXIST return code if admin command error code is
ICE_AQ_RC_ENOENT (not exist). ice_aq_sw_rules is used when switch
rule is getting added/deleted/updated. In case of delete/update
switch rule, admin command can return ICE_AQ_RC_ENOENT error code
if such rule does not exist, hence return ICE_ERR_DOES_NOT_EXIST error
code from ice_aq_sw_rule, so that caller of this fucnction can decide
how to handle ICE_ERR_DOES_NOT_EXIST.

Allow proper cleanup of internal data structures from ice_rem_adv_rule
function if ice_aq_sw_rules return error code ICE_ERR_DOES_NOT_EXIST
otherwise per recipe:rule list will never become empty.

Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 6387f9b84..fa3a59e51 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1868,6 +1868,7 @@ ice_aq_sw_rules(struct ice_hw *hw, void *rule_list, u16 rule_list_sz,
 		u8 num_rules, enum ice_adminq_opc opc, struct ice_sq_cd *cd)
 {
 	struct ice_aq_desc desc;
+	enum ice_status status;
 
 	ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
 
@@ -1881,7 +1882,12 @@ ice_aq_sw_rules(struct ice_hw *hw, void *rule_list, u16 rule_list_sz,
 	desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
 	desc.params.sw_rules.num_rules_fltr_entry_index =
 		CPU_TO_LE16(num_rules);
-	return ice_aq_send_cmd(hw, &desc, rule_list, rule_list_sz, cd);
+	status = ice_aq_send_cmd(hw, &desc, rule_list, rule_list_sz, cd);
+	if (opc != ice_aqc_opc_add_sw_rules &&
+	    hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT)
+		status = ICE_ERR_DOES_NOT_EXIST;
+
+	return status;
 }
 
 /**
@@ -7354,7 +7360,7 @@ ice_rem_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
 		status = ice_aq_sw_rules(hw, (struct ice_aqc_sw_rules *)s_rule,
 					 rule_buf_sz, 1,
 					 ice_aqc_opc_remove_sw_rules, NULL);
-		if (status == ICE_SUCCESS) {
+		if (status == ICE_SUCCESS || status == ICE_ERR_DOES_NOT_EXIST) {
 			ice_acquire_lock(rule_lock);
 			LIST_DEL(&list_elem->list_entry);
 			ice_free(hw, list_elem->lkups);
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 29/52] net/ice/base: remove unnecessary code
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (27 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 28/52] net/ice/base: return correct error code Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 30/52] net/ice/base: add support for more PPPoE packet type Qi Zhang
                   ` (24 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang

Remove unncessary case branch.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flow.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 030a55ba7..53ff5f4be 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1384,7 +1384,6 @@ ice_flow_proc_segs(struct ice_hw *hw, struct ice_flow_prof_params *params)
 		if (status)
 			return status;
 		break;
-	case ICE_BLK_SW:
 	default:
 		return ICE_ERR_NOT_IMPL;
 	}
@@ -2915,8 +2914,6 @@ ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
 			goto out;
 
 		break;
-	case ICE_BLK_SW:
-	case ICE_BLK_PE:
 	default:
 		status = ICE_ERR_NOT_IMPL;
 		goto out;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 30/52] net/ice/base: add support for more PPPoE packet type
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (28 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 29/52] net/ice/base: remove unnecessary code Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 31/52] net/ice/base: reset flags when all rules are deleted Qi Zhang
                   ` (23 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Wei Zhao, Paul M . Stillwell Jr

This patch add more dummy packet type for pppoe packet,
it enable tcp/udp layer of ipv4/ipv6 for pppoe payload,
so we can use L4 dst/src port as input set for switch
filter.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_protocol_type.h |   7 +
 drivers/net/ice/base/ice_switch.c        | 252 ++++++++++++++++++++++++++++++-
 drivers/net/ice/base/ice_switch.h        |   7 +
 3 files changed, 265 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index 964561d23..85af7513c 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -68,6 +68,13 @@ enum ice_sw_tunnel_type {
 			 */
 	ICE_SW_TUN_GTP,
 	ICE_SW_TUN_PPPOE,
+	ICE_SW_TUN_PPPOE_PAY,
+	ICE_SW_TUN_PPPOE_IPV4,
+	ICE_SW_TUN_PPPOE_IPV4_TCP,
+	ICE_SW_TUN_PPPOE_IPV4_UDP,
+	ICE_SW_TUN_PPPOE_IPV6,
+	ICE_SW_TUN_PPPOE_IPV6_TCP,
+	ICE_SW_TUN_PPPOE_IPV6_UDP,
 	ICE_SW_TUN_IPV4_ESP,
 	ICE_SW_TUN_IPV6_ESP,
 	ICE_SW_TUN_IPV4_AH,
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index fa3a59e51..94268d560 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -542,6 +542,15 @@ static const struct ice_dummy_pkt_offsets dummy_pppoe_packet_offsets[] = {
 	{ ICE_PROTOCOL_LAST,	0 },
 };
 
+static const struct ice_dummy_pkt_offsets dummy_pppoe_packet_ipv4_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_ETYPE_OL,		12 },
+	{ ICE_VLAN_OFOS,	14},
+	{ ICE_PPPOE,		18 },
+	{ ICE_IPV4_OFOS,	26 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
 static const u8 dummy_pppoe_ipv4_packet[] = {
 	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
 	0x00, 0x00, 0x00, 0x00,
@@ -565,6 +574,92 @@ static const u8 dummy_pppoe_ipv4_packet[] = {
 	0x00, 0x00,		/* 2 bytes for 4 bytes alignment */
 };
 
+static const
+struct ice_dummy_pkt_offsets dummy_pppoe_ipv4_tcp_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_ETYPE_OL,		12 },
+	{ ICE_VLAN_OFOS,	14},
+	{ ICE_PPPOE,		18 },
+	{ ICE_IPV4_OFOS,	26 },
+	{ ICE_TCP_IL,		46 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_pppoe_ipv4_tcp_packet[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x81, 0x00,		/* ICE_ETYPE_OL 12 */
+
+	0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 14 */
+
+	0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */
+	0x00, 0x16,
+
+	0x00, 0x21,		/* PPP Link Layer 24 */
+
+	0x45, 0x00, 0x00, 0x28, /* ICE_IPV4_OFOS 26 */
+	0x00, 0x01, 0x00, 0x00,
+	0x00, 0x06, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00, 0x00, 0x00, /* ICE_TCP_IL 46 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x50, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00,		/* 2 bytes for 4 bytes alignment */
+};
+
+static const
+struct ice_dummy_pkt_offsets dummy_pppoe_ipv4_udp_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_ETYPE_OL,		12 },
+	{ ICE_VLAN_OFOS,	14},
+	{ ICE_PPPOE,		18 },
+	{ ICE_IPV4_OFOS,	26 },
+	{ ICE_UDP_ILOS,		46 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_pppoe_ipv4_udp_packet[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x81, 0x00,		/* ICE_ETYPE_OL 12 */
+
+	0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 14 */
+
+	0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */
+	0x00, 0x16,
+
+	0x00, 0x21,		/* PPP Link Layer 24 */
+
+	0x45, 0x00, 0x00, 0x1c, /* ICE_IPV4_OFOS 26 */
+	0x00, 0x01, 0x00, 0x00,
+	0x00, 0x11, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00, 0x00, 0x00, /* ICE_UDP_ILOS 46 */
+	0x00, 0x08, 0x00, 0x00,
+
+	0x00, 0x00,		/* 2 bytes for 4 bytes alignment */
+};
+
+static const struct ice_dummy_pkt_offsets dummy_pppoe_packet_ipv6_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_ETYPE_OL,		12 },
+	{ ICE_VLAN_OFOS,	14},
+	{ ICE_PPPOE,		18 },
+	{ ICE_IPV6_OFOS,	26 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
 static const u8 dummy_pppoe_ipv6_packet[] = {
 	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
 	0x00, 0x00, 0x00, 0x00,
@@ -593,6 +688,93 @@ static const u8 dummy_pppoe_ipv6_packet[] = {
 	0x00, 0x00,		/* 2 bytes for 4 bytes alignment */
 };
 
+static const
+struct ice_dummy_pkt_offsets dummy_pppoe_packet_ipv6_tcp_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_ETYPE_OL,		12 },
+	{ ICE_VLAN_OFOS,	14},
+	{ ICE_PPPOE,		18 },
+	{ ICE_IPV6_OFOS,	26 },
+	{ ICE_TCP_IL,		66 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_pppoe_ipv6_tcp_packet[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x81, 0x00,		/* ICE_ETYPE_OL 12 */
+
+	0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 14 */
+
+	0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */
+	0x00, 0x2a,
+
+	0x00, 0x57,		/* PPP Link Layer 24 */
+
+	0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 26 */
+	0x00, 0x14, 0x06, 0x00, /* Next header is TCP */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00, 0x00, 0x00, /* ICE_TCP_IL 66 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x50, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00,		/* 2 bytes for 4 bytes alignment */
+};
+
+static const
+struct ice_dummy_pkt_offsets dummy_pppoe_packet_ipv6_udp_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_ETYPE_OL,		12 },
+	{ ICE_VLAN_OFOS,	14},
+	{ ICE_PPPOE,		18 },
+	{ ICE_IPV6_OFOS,	26 },
+	{ ICE_UDP_ILOS,		66 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_pppoe_ipv6_udp_packet[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x81, 0x00,		/* ICE_ETYPE_OL 12 */
+
+	0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 14 */
+
+	0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */
+	0x00, 0x2a,
+
+	0x00, 0x57,		/* PPP Link Layer 24 */
+
+	0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 26 */
+	0x00, 0x08, 0x11, 0x00, /* Next header UDP*/
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00, 0x00, 0x00, /* ICE_UDP_ILOS 66 */
+	0x00, 0x08, 0x00, 0x00,
+
+	0x00, 0x00,		/* 2 bytes for 4 bytes alignment */
+};
+
 static const struct ice_dummy_pkt_offsets dummy_ipv4_esp_packet_offsets[] = {
 	{ ICE_MAC_OFOS,		0 },
 	{ ICE_IPV4_OFOS,	14 },
@@ -6123,6 +6305,31 @@ ice_get_compat_fv_bitmap(struct ice_hw *hw, struct ice_adv_rule_info *rinfo,
 	case ICE_SW_TUN_PPPOE:
 		prof_type = ICE_PROF_TUN_PPPOE;
 		break;
+	case ICE_SW_TUN_PPPOE_PAY:
+		ice_set_bit(ICE_PROFID_PPPOE_PAY, bm);
+		return;
+	case ICE_SW_TUN_PPPOE_IPV4:
+		ice_set_bit(ICE_PROFID_PPPOE_IPV4_OTHER, bm);
+		ice_set_bit(ICE_PROFID_PPPOE_IPV4_UDP, bm);
+		ice_set_bit(ICE_PROFID_PPPOE_IPV4_TCP, bm);
+		return;
+	case ICE_SW_TUN_PPPOE_IPV4_TCP:
+		ice_set_bit(ICE_PROFID_PPPOE_IPV4_TCP, bm);
+		return;
+	case ICE_SW_TUN_PPPOE_IPV4_UDP:
+		ice_set_bit(ICE_PROFID_PPPOE_IPV4_UDP, bm);
+		return;
+	case ICE_SW_TUN_PPPOE_IPV6:
+		ice_set_bit(ICE_PROFID_PPPOE_IPV6_OTHER, bm);
+		ice_set_bit(ICE_PROFID_PPPOE_IPV6_UDP, bm);
+		ice_set_bit(ICE_PROFID_PPPOE_IPV6_TCP, bm);
+		return;
+	case ICE_SW_TUN_PPPOE_IPV6_TCP:
+		ice_set_bit(ICE_PROFID_PPPOE_IPV6_TCP, bm);
+		return;
+	case ICE_SW_TUN_PPPOE_IPV6_UDP:
+		ice_set_bit(ICE_PROFID_PPPOE_IPV6_UDP, bm);
+		return;
 	case ICE_SW_TUN_PROFID_IPV6_ESP:
 	case ICE_SW_TUN_IPV6_ESP:
 		ice_set_bit(ICE_PROFID_IPV6_ESP, bm);
@@ -6527,13 +6734,56 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
 		*pkt_len = sizeof(dummy_pppoe_ipv6_packet);
 		*offsets = dummy_pppoe_packet_offsets;
 		return;
-	} else if (tun_type == ICE_SW_TUN_PPPOE) {
+	} else if (tun_type == ICE_SW_TUN_PPPOE ||
+		tun_type == ICE_SW_TUN_PPPOE_PAY) {
 		*pkt = dummy_pppoe_ipv4_packet;
 		*pkt_len = sizeof(dummy_pppoe_ipv4_packet);
 		*offsets = dummy_pppoe_packet_offsets;
 		return;
 	}
 
+	if (tun_type == ICE_SW_TUN_PPPOE_IPV4) {
+		*pkt = dummy_pppoe_ipv4_packet;
+		*pkt_len = sizeof(dummy_pppoe_ipv4_packet);
+		*offsets = dummy_pppoe_packet_ipv4_offsets;
+		return;
+	}
+
+	if (tun_type == ICE_SW_TUN_PPPOE_IPV4_TCP) {
+		*pkt = dummy_pppoe_ipv4_tcp_packet;
+		*pkt_len = sizeof(dummy_pppoe_ipv4_tcp_packet);
+		*offsets = dummy_pppoe_ipv4_tcp_packet_offsets;
+		return;
+	}
+
+	if (tun_type == ICE_SW_TUN_PPPOE_IPV4_UDP) {
+		*pkt = dummy_pppoe_ipv4_udp_packet;
+		*pkt_len = sizeof(dummy_pppoe_ipv4_udp_packet);
+		*offsets = dummy_pppoe_ipv4_udp_packet_offsets;
+		return;
+	}
+
+	if (tun_type == ICE_SW_TUN_PPPOE_IPV6) {
+		*pkt = dummy_pppoe_ipv6_packet;
+		*pkt_len = sizeof(dummy_pppoe_ipv6_packet);
+		*offsets = dummy_pppoe_packet_ipv6_offsets;
+		return;
+	}
+
+	if (tun_type == ICE_SW_TUN_PPPOE_IPV6_TCP) {
+		*pkt = dummy_pppoe_ipv6_tcp_packet;
+		*pkt_len = sizeof(dummy_pppoe_ipv6_tcp_packet);
+		*offsets = dummy_pppoe_packet_ipv6_tcp_offsets;
+		return;
+	}
+
+	if (tun_type == ICE_SW_TUN_PPPOE_IPV6_UDP) {
+		*pkt = dummy_pppoe_ipv6_udp_packet;
+		*pkt_len = sizeof(dummy_pppoe_ipv6_udp_packet);
+		*offsets = dummy_pppoe_packet_ipv6_udp_offsets;
+		return;
+	}
+
 	if (tun_type == ICE_ALL_TUNNELS) {
 		*pkt = dummy_gre_udp_packet;
 		*pkt_len = sizeof(dummy_gre_udp_packet);
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 8c7e98bfa..bd634f98f 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -16,6 +16,13 @@
 #define ICE_FLTR_TX_RX (ICE_FLTR_RX | ICE_FLTR_TX)
 
 /* Switch Profile IDs for Profile related switch rules */
+#define ICE_PROFID_PPPOE_PAY		34
+#define ICE_PROFID_PPPOE_IPV4_TCP	35
+#define ICE_PROFID_PPPOE_IPV4_UDP	36
+#define ICE_PROFID_PPPOE_IPV4_OTHER	37
+#define ICE_PROFID_PPPOE_IPV6_TCP	38
+#define ICE_PROFID_PPPOE_IPV6_UDP	39
+#define ICE_PROFID_PPPOE_IPV6_OTHER	40
 #define ICE_PROFID_IPV4_ESP		71
 #define ICE_PROFID_IPV6_ESP		72
 #define ICE_PROFID_IPV4_AH		73
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 31/52] net/ice/base: reset flags when all rules are deleted
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (29 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 30/52] net/ice/base: add support for more PPPoE packet type Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:47   ` Patil, Kiran
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 32/52] net/ice/base: reset capabilities before parsing Qi Zhang
                   ` (22 subsequent siblings)
  53 siblings, 1 reply; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Kiran Patil, Paul M . Stillwell Jr

To avoid having stale information about "adv_rule" per recipe, when all
rules associated to a given recipe are deleted, reset the "adv_rule"
flag otherwise it causes problem later on when decisions about filter
rules being present or not are made based on "adv_rule" flag.

Removed setting "adv_rule = 1" when recipe is created. It is set correctly
when advanced switch rule is added referring to the recipe which was
created as a result of adding advanced switch rule.

Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 94268d560..f379a5f5d 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -4122,6 +4122,9 @@ void ice_rem_all_sw_rules_info(struct ice_hw *hw)
 			ice_rem_sw_rule_info(hw, rule_head);
 		else
 			ice_rem_adv_rule_info(hw, rule_head);
+		if (sw->recp_list[i].adv_rule &&
+		    LIST_EMPTY(&sw->recp_list[i].filt_rules))
+			sw->recp_list[i].adv_rule = false;
 	}
 }
 
@@ -6130,7 +6133,6 @@ ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm,
 		recp->n_grp_count = rm->n_grp_count;
 		recp->tun_type = rm->tun_type;
 		recp->recp_created = true;
-		recp->adv_rule = 1;
 	}
 	rm->root_buf = buf;
 	ice_free(hw, tmp);
@@ -7611,11 +7613,15 @@ ice_rem_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
 					 rule_buf_sz, 1,
 					 ice_aqc_opc_remove_sw_rules, NULL);
 		if (status == ICE_SUCCESS || status == ICE_ERR_DOES_NOT_EXIST) {
+			struct ice_switch_info *sw = hw->switch_info;
+
 			ice_acquire_lock(rule_lock);
 			LIST_DEL(&list_elem->list_entry);
 			ice_free(hw, list_elem->lkups);
 			ice_free(hw, list_elem);
 			ice_release_lock(rule_lock);
+			if (LIST_EMPTY(&sw->recp_list[rid].filt_rules))
+				sw->recp_list[rid].adv_rule = false;
 		}
 		ice_free(hw, s_rule);
 	}
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 32/52] net/ice/base: reset capabilities before parsing
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (30 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 31/52] net/ice/base: reset flags when all rules are deleted Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 33/52] net/ice/base: add RL profile bit mask check Qi Zhang
                   ` (21 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Jacob Keller, Paul M . Stillwell Jr

The capability flags used to report whether an NVM component has
a pending update are stored as simple booleans. If ice_parse_caps finds
the relevant capability then the boolean is set to true.

If the capability is not provided by firmware, then the boolean value
will be left alone. This works during initialization because the
capabilities structure is zero-initialized.

However, this does not work if capabilities are updated by calling
ice_get_caps again after driver load. For example, consider if firmware
had a pending update, and then an EMPR was triggered. The update will
complete, and firmware will no longer report these capabilities.

However, the device driver will have already set the pending flags.
After an EMPR, new capabilities are read. However, because the pending
flags in the dev_caps.common_cap structure have already been set, they
will remain true.

Fix this by clearing the capabilities structures in ice_parse_caps
before processing any capabilities.

This ensures that the capabilities structure will always be refreshed to
match the state of the device or function capabilities reported by
firmware.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index e1181a102..e2e7f1137 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1828,10 +1828,16 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
 	if (opc == ice_aqc_opc_list_dev_caps) {
 		dev_p = &hw->dev_caps;
 		caps = &dev_p->common_cap;
+
+		ice_memset(dev_p, 0, sizeof(*dev_p), ICE_NONDMA_MEM);
+
 		prefix = "dev cap";
 	} else if (opc == ice_aqc_opc_list_func_caps) {
 		func_p = &hw->func_caps;
 		caps = &func_p->common_cap;
+
+		ice_memset(func_p, 0, sizeof(*func_p), ICE_NONDMA_MEM);
+
 		prefix = "func cap";
 	} else {
 		ice_debug(hw, ICE_DBG_INIT, "wrong opcode\n");
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 33/52] net/ice/base: add RL profile bit mask check
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (31 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 32/52] net/ice/base: reset capabilities before parsing Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 34/52] net/ice/base: update the vsi handle to remaining VSI Qi Zhang
                   ` (20 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Tarun Singh, Paul M . Stillwell Jr

Mask bits before accessing the profile type field.

Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_sched.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 2541103ad..f48c971c8 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -3856,8 +3856,8 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
 	hw = pi->hw;
 	LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
 			    ice_aqc_rl_profile_info, list_entry)
-		if (rl_prof_elem->profile.flags == profile_type &&
-		    rl_prof_elem->bw == bw)
+		if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
+		    profile_type && rl_prof_elem->bw == bw)
 			/* Return existing profile ID info */
 			return rl_prof_elem;
 
@@ -4088,7 +4088,8 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
 	/* Check the existing list for RL profile */
 	LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
 			    ice_aqc_rl_profile_info, list_entry)
-		if (rl_prof_elem->profile.flags == profile_type &&
+		if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
+		    profile_type &&
 		    LE16_TO_CPU(rl_prof_elem->profile.profile_id) ==
 		    profile_id) {
 			if (rl_prof_elem->prof_id_ref)
@@ -4250,8 +4251,8 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
 		return ICE_SUCCESS;
 
 	return ice_sched_rm_rl_profile(pi, layer_num,
-				       rl_prof_info->profile.flags,
-				       old_id);
+				       rl_prof_info->profile.flags &
+				       ICE_AQC_RL_PROFILE_TYPE_M, old_id);
 }
 
 /**
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 34/52] net/ice/base: update the vsi handle to remaining VSI
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (32 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 33/52] net/ice/base: add RL profile bit mask check Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 35/52] net/ice/base: correct return value Qi Zhang
                   ` (19 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Haiyue Wang, Paul M . Stillwell Jr

Needs to update the VSI handle to the last remaining VSI using the
rule for ICE_FWD_TO_VSI. Otherwise it may have error for deleting the
rule.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index f379a5f5d..01dcace55 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -7491,6 +7491,7 @@ ice_adv_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
 			ice_get_hw_vsi_num(hw, rem_vsi_handle);
 		fm_list->rule_info.sw_act.fwd_id.hw_vsi_id =
 			ice_get_hw_vsi_num(hw, rem_vsi_handle);
+		fm_list->rule_info.sw_act.vsi_handle = rem_vsi_handle;
 
 		/* Update the previous switch rule of "MAC forward to VSI" to
 		 * "MAC fwd to VSI list"
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 35/52] net/ice/base: correct return value
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (33 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 34/52] net/ice/base: update the vsi handle to remaining VSI Qi Zhang
@ 2020-06-03  2:39 ` Qi Zhang
  2020-06-03  2:47   ` Patil, Kiran
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 36/52] net/ice/base: remove unneeded variable Qi Zhang
                   ` (18 subsequent siblings)
  53 siblings, 1 reply; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:39 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Kiran Patil, Paul M . Stillwell Jr

Function ice_rem_adv_rule_id return incorrect error code (ICE_ERR_PARAM)
whereas it should have returned ICE_ERR_DOES_NOT_EXIST return code
if filter list is empty or unable to find "rule" in list

Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 01dcace55..5c53b9ec3 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -7661,7 +7661,8 @@ ice_rem_adv_rule_by_id(struct ice_hw *hw,
 						list_itr->lkups_cnt, &rinfo);
 		}
 	}
-	return ICE_ERR_PARAM;
+	/* either list is empty or unable to find rule */
+	return ICE_ERR_DOES_NOT_EXIST;
 }
 
 /**
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 36/52] net/ice/base: remove unneeded variable
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (34 preceding siblings ...)
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 35/52] net/ice/base: correct return value Qi Zhang
@ 2020-06-03  2:40 ` Qi Zhang
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 37/52] net/ice/base: fix for memory leak Qi Zhang
                   ` (17 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:40 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Tony Nguyen, Paul M . Stillwell Jr

The variable 'adj' is initialized to 0 and later used in an addition, but
the value is never changed from 0. Remove the variable since it's doing
nothing.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flow.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 53ff5f4be..fa0b7f54b 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -914,7 +914,6 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
 	struct ice_flow_fld_info *flds;
 	u16 cnt, ese_bits, i;
 	u16 sib_mask = 0;
-	s16 adj = 0;
 	u16 mask;
 	u16 off;
 
@@ -1060,7 +1059,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
 	flds[fld].xtrct.prot_id = prot_id;
 	flds[fld].xtrct.off = (ice_flds_info[fld].off / ese_bits) *
 		ICE_FLOW_FV_EXTRACT_SZ;
-	flds[fld].xtrct.disp = (u8)((ice_flds_info[fld].off + adj) % ese_bits);
+	flds[fld].xtrct.disp = (u8)(ice_flds_info[fld].off % ese_bits);
 	flds[fld].xtrct.idx = params->es_cnt;
 	flds[fld].xtrct.mask = ice_flds_info[fld].mask;
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 37/52] net/ice/base: fix for memory leak
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (35 preceding siblings ...)
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 36/52] net/ice/base: remove unneeded variable Qi Zhang
@ 2020-06-03  2:40 ` Qi Zhang
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 38/52] net/ice/base: add entries in Profile TCAM with priority Qi Zhang
                   ` (16 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:40 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, stable, Surabhi Boob, Paul M . Stillwell Jr

Handles memory leaks during control queue initialization and
buffer allocation failures. The MACRO - ICE_FREE_CQ_BUFS is modified to
re-use for this fix.

Fixes: 6c1f26be50a2 ("net/ice/base: add control queue information")
Cc: stable@dpdk.org

Signed-off-by: Surabhi Boob <surabhi.boob@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_controlq.c | 39 +++++++++++++++++++++++--------------
 1 file changed, 24 insertions(+), 15 deletions(-)

diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c
index 3ef86fa03..f278ef636 100644
--- a/drivers/net/ice/base/ice_controlq.c
+++ b/drivers/net/ice/base/ice_controlq.c
@@ -182,7 +182,9 @@ ice_alloc_rq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
 	i--;
 	for (; i >= 0; i--)
 		ice_free_dma_mem(hw, &cq->rq.r.rq_bi[i]);
+	cq->rq.r.rq_bi = NULL;
 	ice_free(hw, cq->rq.dma_head);
+	cq->rq.dma_head = NULL;
 
 	return ICE_ERR_NO_MEMORY;
 }
@@ -220,7 +222,9 @@ ice_alloc_sq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
 	i--;
 	for (; i >= 0; i--)
 		ice_free_dma_mem(hw, &cq->sq.r.sq_bi[i]);
+	cq->sq.r.sq_bi = NULL;
 	ice_free(hw, cq->sq.dma_head);
+	cq->sq.dma_head = NULL;
 
 	return ICE_ERR_NO_MEMORY;
 }
@@ -279,6 +283,24 @@ ice_cfg_rq_regs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
 	return ICE_SUCCESS;
 }
 
+#define ICE_FREE_CQ_BUFS(hw, qi, ring)					\
+do {									\
+	/* free descriptors */						\
+	if ((qi)->ring.r.ring##_bi) {					\
+		int i;							\
+									\
+		for (i = 0; i < (qi)->num_##ring##_entries; i++)	\
+			if ((qi)->ring.r.ring##_bi[i].pa)		\
+				ice_free_dma_mem((hw),			\
+					&(qi)->ring.r.ring##_bi[i]);	\
+	}								\
+	/* free the buffer info list */					\
+	if ((qi)->ring.cmd_buf)						\
+		ice_free(hw, (qi)->ring.cmd_buf);			\
+	/* free DMA head */						\
+	ice_free(hw, (qi)->ring.dma_head);				\
+} while (0)
+
 /**
  * ice_init_sq - main initialization routine for Control ATQ
  * @hw: pointer to the hardware structure
@@ -334,6 +356,7 @@ static enum ice_status ice_init_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
 	goto init_ctrlq_exit;
 
 init_ctrlq_free_rings:
+	ICE_FREE_CQ_BUFS(hw, cq, sq);
 	ice_free_cq_ring(hw, &cq->sq);
 
 init_ctrlq_exit:
@@ -395,27 +418,13 @@ static enum ice_status ice_init_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
 	goto init_ctrlq_exit;
 
 init_ctrlq_free_rings:
+	ICE_FREE_CQ_BUFS(hw, cq, rq);
 	ice_free_cq_ring(hw, &cq->rq);
 
 init_ctrlq_exit:
 	return ret_code;
 }
 
-#define ICE_FREE_CQ_BUFS(hw, qi, ring)					\
-do {									\
-	int i;								\
-	/* free descriptors */						\
-	for (i = 0; i < (qi)->num_##ring##_entries; i++)		\
-		if ((qi)->ring.r.ring##_bi[i].pa)			\
-			ice_free_dma_mem((hw),				\
-					 &(qi)->ring.r.ring##_bi[i]);	\
-	/* free the buffer info list */					\
-	if ((qi)->ring.cmd_buf)						\
-		ice_free(hw, (qi)->ring.cmd_buf);			\
-	/* free DMA head */						\
-	ice_free(hw, (qi)->ring.dma_head);				\
-} while (0)
-
 /**
  * ice_shutdown_sq - shutdown the Control ATQ
  * @hw: pointer to the hardware structure
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 38/52] net/ice/base: add entries in Profile TCAM with priority
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (36 preceding siblings ...)
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 37/52] net/ice/base: fix for memory leak Qi Zhang
@ 2020-06-03  2:40 ` Qi Zhang
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 39/52] net/ice/base: remove unimplemented function prototypes Qi Zhang
                   ` (15 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:40 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M . Stillwell Jr

The profile TCAM tables are implemented such that entries with a smaller
index in the table have a higher priority. When records to be added to the
table have flags to differentiate between standard PTG and VSIG records,
then these entries need to have higher priority in order to be found and
processed first.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flex_pipe.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 340a855d3..4e69d2dc2 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2893,20 +2893,22 @@ static bool ice_tcam_ent_rsrc_type(enum ice_block blk, u16 *rsrc_type)
  * ice_alloc_tcam_ent - allocate hardware TCAM entry
  * @hw: pointer to the HW struct
  * @blk: the block to allocate the TCAM for
+ * @btm: true to allocate from bottom of table, false to allocate from top
  * @tcam_idx: pointer to variable to receive the TCAM entry
  *
  * This function allocates a new entry in a Profile ID TCAM for a specific
  * block.
  */
 static enum ice_status
-ice_alloc_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 *tcam_idx)
+ice_alloc_tcam_ent(struct ice_hw *hw, enum ice_block blk, bool btm,
+		   u16 *tcam_idx)
 {
 	u16 res_type;
 
 	if (!ice_tcam_ent_rsrc_type(blk, &res_type))
 		return ICE_ERR_PARAM;
 
-	return ice_alloc_hw_res(hw, res_type, 1, true, tcam_idx);
+	return ice_alloc_hw_res(hw, res_type, 1, btm, tcam_idx);
 }
 
 /**
@@ -5225,7 +5227,12 @@ ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,
 	}
 
 	/* for re-enabling, reallocate a TCAM */
-	status = ice_alloc_tcam_ent(hw, blk, &tcam->tcam_idx);
+	/* for entries with empty attribute masks, allocate entry from
+	 * the bottom of the tcam table; otherwise, allocate from the
+	 * top of the table in order to give it higher priority
+	 */
+	status = ice_alloc_tcam_ent(hw, blk, tcam->attr.mask == 0,
+				    &tcam->tcam_idx);
 	if (status)
 		return status;
 
@@ -5426,7 +5433,12 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
 			goto err_ice_add_prof_id_vsig;
 
 		/* allocate the TCAM entry index */
-		status = ice_alloc_tcam_ent(hw, blk, &tcam_idx);
+		/* for entries with empty attribute masks, allocate entry from
+		 * the bottom of the tcam table; otherwise, allocate from the
+		 * top of the table in order to give it higher priority
+		 */
+		status = ice_alloc_tcam_ent(hw, blk, map->attr[i].mask == 0,
+					    &tcam_idx);
 		if (status) {
 			ice_free(hw, p);
 			goto err_ice_add_prof_id_vsig;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 39/52] net/ice/base: remove unimplemented function prototypes
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (37 preceding siblings ...)
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 38/52] net/ice/base: add entries in Profile TCAM with priority Qi Zhang
@ 2020-06-03  2:40 ` Qi Zhang
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 40/52] net/ice/base: add new API to check all autoneg enable bits Qi Zhang
                   ` (14 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:40 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Tony Nguyen, Paul M . Stillwell Jr

There are no implementations for these two functions so remove the
prototypes.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_fdir.h | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
index 5b75fed34..e4f7b1387 100644
--- a/drivers/net/ice/base/ice_fdir.h
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -239,13 +239,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
 			  u8 *pkt, bool frag, bool tun);
 enum ice_status
 ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag);
-enum ice_status
-ice_add_del_fdir(struct ice_hw *hw, struct ice_fdir_fltr *input, bool add);
 int ice_get_fdir_cnt_all(struct ice_hw *hw);
 bool ice_fdir_is_dup_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input);
-enum ice_status
-ice_update_fdir_list_entry(struct ice_hw *hw, struct ice_fdir_fltr *input,
-			   u16 sw_idx);
 bool ice_fdir_has_frag(enum ice_fltr_ptype flow);
 struct ice_fdir_fltr *
 ice_fdir_find_fltr_by_idx(struct ice_hw *hw, u32 fltr_idx);
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 40/52] net/ice/base: add new API to check all autoneg enable bits
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (38 preceding siblings ...)
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 39/52] net/ice/base: remove unimplemented function prototypes Qi Zhang
@ 2020-06-03  2:40 ` Qi Zhang
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 41/52] net/ice/base: avoid PPPoE ipv4 overlap Qi Zhang
                   ` (13 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:40 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Paul Greenwalt, Paul M . Stillwell Jr

struct ice_aqc_get_phy_caps_data has multiple autoneg enable bits.
ice_is_phy_caps_an_enabled checks all bits and returns true if any
autoneg enable bits are set.

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 15 +++++++++++++++
 drivers/net/ice/base/ice_common.h |  1 +
 2 files changed, 16 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index e2e7f1137..8efc4b4cc 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -4533,3 +4533,18 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
 
 	return status;
 }
+
+/**
+ * ice_is_phy_caps_an_enabled - check if PHY capabilities autoneg is enabled
+ * @caps: get PHY capability data
+ */
+bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps)
+{
+	if (caps->caps & ICE_AQC_PHY_AN_MODE ||
+	    caps->low_power_ctrl_an & (ICE_AQC_PHY_AN_EN_CLAUSE28 |
+				       ICE_AQC_PHY_AN_EN_CLAUSE73 |
+				       ICE_AQC_PHY_AN_EN_CLAUSE37))
+		return true;
+
+	return false;
+}
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 46741a3f1..cb41497bc 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -143,6 +143,7 @@ bool ice_fw_supports_link_override(struct ice_hw *hw);
 enum ice_status
 ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
 			      struct ice_port_info *pi);
+bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps);
 
 enum ice_fc_mode ice_caps_to_fc_mode(u8 caps);
 enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options);
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 41/52] net/ice/base: avoid PPPoE ipv4 overlap
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (39 preceding siblings ...)
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 40/52] net/ice/base: add new API to check all autoneg enable bits Qi Zhang
@ 2020-06-03  2:40 ` Qi Zhang
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 42/52] net/ice/base: initialize AQ failure variable when set fc Qi Zhang
                   ` (12 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:40 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Yahui Cao, Paul M . Stillwell Jr

When PPPOE header is not selected, pppoe should not be included in
ipv4 ptype bitmaps.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flow.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index fa0b7f54b..744b2805f 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -198,7 +198,7 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = {
 static const u32 ice_ptypes_mac_ofos[] = {
 	0xFDC00846, 0xBFBF7F7E, 0xF70001DF, 0xFEFDFDFB,
 	0x0000077E, 0x00000000, 0x00000000, 0x00000000,
-	0x00000000, 0x03FFF000, 0x7FFFFFE0, 0x00000000,
+	0x00400000, 0x03FFF000, 0x7FFFFFE0, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -222,7 +222,7 @@ static const u32 ice_ptypes_macvlan_il[] = {
 static const u32 ice_ptypes_ipv4_ofos[] = {
 	0x1DC00000, 0x04000800, 0x00000000, 0x00000000,
 	0x00000000, 0x00000155, 0x00000000, 0x00000000,
-	0x0003000F, 0x000FC000, 0x83E0F800, 0x00000101,
+	0x00000000, 0x000FC000, 0x83E0F800, 0x00000101,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -765,6 +765,10 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
 			src = (const ice_bitmap_t *)ice_ptypes_pppoe;
 			ice_and_bitmap(params->ptypes, params->ptypes, src,
 				       ICE_FLOW_PTYPE_MAX);
+		} else {
+			src = (const ice_bitmap_t *)ice_ptypes_pppoe;
+			ice_andnot_bitmap(params->ptypes, params->ptypes, src,
+					  ICE_FLOW_PTYPE_MAX);
 		}
 
 		if (hdrs & ICE_FLOW_SEG_HDR_ICMP) {
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 42/52] net/ice/base: initialize AQ failure variable when set fc
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (40 preceding siblings ...)
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 41/52] net/ice/base: avoid PPPoE ipv4 overlap Qi Zhang
@ 2020-06-03  2:40 ` Qi Zhang
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 43/52] net/ice/base: adjust scheduler default BW weight Qi Zhang
                   ` (11 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:40 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Anirudh Venkataramanan,
	Paul M . Stillwell Jr

ice_set_fc takes a u8 pointer 'aq_failures' as an input parameter. If
this function encounters an error, in addition to returning an appropriate
ice_status enum code, it also populates aq_failures with a link specific
error value.

If the caller does not initialize this variable to 0 before calling
ice_set_fc, it would appear as if ice_set_fc returned an error code in
this variable. So initialize it to 0.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 8efc4b4cc..d02a047f6 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2637,6 +2637,7 @@ ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, bool ena_auto_link_update)
 	if (!pi || !aq_failures)
 		return ICE_ERR_BAD_PTR;
 
+	*aq_failures = 0;
 	hw = pi->hw;
 
 	pcaps = (struct ice_aqc_get_phy_caps_data *)
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 43/52] net/ice/base: adjust scheduler default BW weight
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (41 preceding siblings ...)
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 42/52] net/ice/base: initialize AQ failure variable when set fc Qi Zhang
@ 2020-06-03  2:40 ` Qi Zhang
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 44/52] net/ice/base: distribute Tx queues evenly Qi Zhang
                   ` (10 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:40 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Tarun Singh, Paul M . Stillwell Jr

By default the queues are configured in legacy mode. The default
BW settings for legacy/advanced modes are different. The existing
code was using the advanced mode default value of 1 which was
incorrect. This caused the unbalanced BW sharing among siblings.
The recommneded default value is applied.

Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 13 ++++++++++++-
 drivers/net/ice/base/ice_type.h   |  2 +-
 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index d02a047f6..54112e8f2 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -4012,7 +4012,18 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
 	 * Without setting the generic section as valid in valid_sections, the
 	 * Admin queue command will fail with error code ICE_AQ_RC_EINVAL.
 	 */
-	buf->txqs[0].info.valid_sections = ICE_AQC_ELEM_VALID_GENERIC;
+	buf->txqs[0].info.valid_sections =
+		ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR |
+		ICE_AQC_ELEM_VALID_EIR;
+	buf->txqs[0].info.generic = 0;
+	buf->txqs[0].info.cir_bw.bw_profile_idx =
+		CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
+	buf->txqs[0].info.cir_bw.bw_alloc =
+		CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
+	buf->txqs[0].info.eir_bw.bw_profile_idx =
+		CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
+	buf->txqs[0].info.eir_bw.bw_alloc =
+		CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
 
 	/* add the LAN queue */
 	status = ice_aq_add_lan_txq(hw, num_qgrps, buf, buf_size, cd);
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index a6dece9c1..41a1912bf 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -610,7 +610,7 @@ enum ice_rl_type {
 #define ICE_SCHED_NO_BW_WT		0
 #define ICE_SCHED_DFLT_RL_PROF_ID	0
 #define ICE_SCHED_NO_SHARED_RL_PROF_ID	0xFFFF
-#define ICE_SCHED_DFLT_BW_WT		1
+#define ICE_SCHED_DFLT_BW_WT		4
 #define ICE_SCHED_INVAL_PROF_ID		0xFFFF
 #define ICE_SCHED_DFLT_BURST_SIZE	(15 * 1024)	/* in bytes (15k) */
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 44/52] net/ice/base: distribute Tx queues evenly
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (42 preceding siblings ...)
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 43/52] net/ice/base: adjust scheduler default BW weight Qi Zhang
@ 2020-06-03  2:40 ` Qi Zhang
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 45/52] net/ice/base: add a new command to LLDP commands Qi Zhang
                   ` (9 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:40 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Victor Raj, Paul M . Stillwell Jr

Distribute the tx queues evenly across all queue groups. This will
help the queues to get more equal sharing among the queues when all
are in use.

In the previous algorithm, the next queue group node will be picked up
only after the previous one filled with max children.
For example: if VSI is configured with 9 queues, the first 8 queues
will be assigned to queue group 1 and the 9th queue will be assigned to
queue group 2.

The 2 queue groups split the bandwidth between them equally (50:50).
The first queue group node will share the 50% bandwidth with all of
its children (8 queues). And the second queue group node will share
the entire 50% bandwidth with its only children.

Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_sched.c | 55 +++++++++++++++++++++++++++++++++++++---
 1 file changed, 51 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index f48c971c8..91847110b 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -1442,6 +1442,53 @@ ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
 }
 
 /**
+ * ice_sched_get_free_qgrp - Scan all Q group siblings and find a free node
+ * @pi: port information structure
+ * @vsi_node: software VSI handle
+ * @qgrp_node: first Q group node identified for scanning
+ * @owner: LAN or RDMA
+ *
+ * This function retrieves a free LAN or RDMA Q group node by scanning
+ * qgrp_node and its siblings for the Q group with the fewest number
+ * of queues currently assigned.
+ */
+static struct ice_sched_node *
+ice_sched_get_free_qgrp(struct ice_port_info *pi,
+			struct ice_sched_node *vsi_node,
+			struct ice_sched_node *qgrp_node, u8 owner)
+{
+	struct ice_sched_node *min_qgrp;
+	u8 min_children;
+
+	if (!qgrp_node)
+		return qgrp_node;
+	min_children = qgrp_node->num_children;
+	if (!min_children)
+		return qgrp_node;
+	min_qgrp = qgrp_node;
+	/* scan all Q groups until find a node which has less than the
+	 * minimum number of children. This way all Q group nodes get
+	 * equal number of shares and active. The bandwidth will be equally
+	 * distributed across all Qs.
+	 */
+	while (qgrp_node) {
+		/* make sure the qgroup node is part of the VSI subtree */
+		if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
+			if (qgrp_node->num_children < min_children &&
+			    qgrp_node->owner == owner) {
+				/* replace the new min Q group node */
+				min_qgrp = qgrp_node;
+				min_children = min_qgrp->num_children;
+				/* break if it has no children, */
+				if (!min_children)
+					break;
+			}
+		qgrp_node = qgrp_node->sibling;
+	}
+	return min_qgrp;
+}
+
+/**
  * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node
  * @pi: port information structure
  * @vsi_handle: software VSI handle
@@ -1454,7 +1501,7 @@ struct ice_sched_node *
 ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
 			   u8 owner)
 {
-	struct ice_sched_node *vsi_node, *qgrp_node = NULL;
+	struct ice_sched_node *vsi_node, *qgrp_node;
 	struct ice_vsi_ctx *vsi_ctx;
 	u16 max_children;
 	u8 qgrp_layer;
@@ -1468,7 +1515,7 @@ ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
 	vsi_node = vsi_ctx->sched.vsi_node[tc];
 	/* validate invalid VSI ID */
 	if (!vsi_node)
-		goto lan_q_exit;
+		return NULL;
 
 	/* get the first queue group node from VSI sub-tree */
 	qgrp_node = ice_sched_get_first_node(pi, vsi_node, qgrp_layer);
@@ -1481,8 +1528,8 @@ ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
 		qgrp_node = qgrp_node->sibling;
 	}
 
-lan_q_exit:
-	return qgrp_node;
+	/* Select the best queue group */
+	return ice_sched_get_free_qgrp(pi, vsi_node, qgrp_node, owner);
 }
 
 /**
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 45/52] net/ice/base: add a new command to LLDP commands
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (43 preceding siblings ...)
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 44/52] net/ice/base: distribute Tx queues evenly Qi Zhang
@ 2020-06-03  2:40 ` Qi Zhang
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 46/52] net/ice/base: remove unused code for VSI list free Qi Zhang
                   ` (8 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:40 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, Sharon Haroni, Paul M . Stillwell Jr

Add support for LLDP forwarding to SW programming in FW
LLDP Filter Control is 0x0A0A.

Signed-off-by: Sharon Haroni <sharon.haroni@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_adminq_cmd.h | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index dec4c38cf..d9d43639f 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1943,6 +1943,18 @@ struct ice_aqc_lldp_stop_start_specific_agent {
 	u8 reserved[15];
 };
 
+/* LLDP Filter Control (direct 0x0A0A) */
+struct ice_aqc_lldp_filter_ctrl {
+	u8 cmd_flags;
+#define ICE_AQC_LLDP_FILTER_ACTION_M		MAKEMASK(3, 0)
+#define ICE_AQC_LLDP_FILTER_ACTION_ADD		0x0
+#define ICE_AQC_LLDP_FILTER_ACTION_DELETE	0x1
+#define ICE_AQC_LLDP_FILTER_ACTION_UPDATE	0x2
+	u8 reserved1;
+	__le16 vsi_num;
+	u8 reserved2[12];
+};
+
 /* Get/Set RSS key (indirect 0x0B04/0x0B02) */
 struct ice_aqc_get_set_rss_key {
 #define ICE_AQC_GSET_RSS_KEY_VSI_VALID	BIT(15)
@@ -2702,6 +2714,7 @@ struct ice_aq_desc {
 		struct ice_aqc_lldp_start lldp_start;
 		struct ice_aqc_lldp_set_local_mib lldp_set_mib;
 		struct ice_aqc_lldp_stop_start_specific_agent lldp_agent_ctrl;
+		struct ice_aqc_lldp_filter_ctrl lldp_filter_ctrl;
 		struct ice_aqc_get_set_rss_lut get_set_rss_lut;
 		struct ice_aqc_get_set_rss_key get_set_rss_key;
 		struct ice_aqc_clear_fd_table clear_fd_table;
@@ -2929,6 +2942,7 @@ enum ice_adminq_opc {
 	ice_aqc_opc_get_cee_dcb_cfg			= 0x0A07,
 	ice_aqc_opc_lldp_set_local_mib			= 0x0A08,
 	ice_aqc_opc_lldp_stop_start_specific_agent	= 0x0A09,
+	ice_aqc_opc_lldp_filter_ctrl			= 0x0A0A,
 
 	/* RSS commands */
 	ice_aqc_opc_set_rss_key				= 0x0B02,
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 46/52] net/ice/base: remove unused code for VSI list free
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (44 preceding siblings ...)
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 45/52] net/ice/base: add a new command to LLDP commands Qi Zhang
@ 2020-06-03  2:40 ` Qi Zhang
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 47/52] net/ice/base: fix reference count when update VSI list Qi Zhang
                   ` (7 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:40 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Wei Zhao, Paul M . Stillwell Jr

When free vsi list resource after vsi list update to empty, some
useless code in function ice_remove_vsi_list_rule() should be deleted.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 17 +----------------
 1 file changed, 1 insertion(+), 16 deletions(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 5c53b9ec3..84102368b 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -3250,26 +3250,11 @@ static enum ice_status
 ice_remove_vsi_list_rule(struct ice_hw *hw, u16 vsi_list_id,
 			 enum ice_sw_lkup_type lkup_type)
 {
-	struct ice_aqc_sw_rules_elem *s_rule;
-	enum ice_status status;
-	u16 s_rule_size;
-
-	s_rule_size = (u16)ICE_SW_RULE_VSI_LIST_SIZE(0);
-	s_rule = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw, s_rule_size);
-	if (!s_rule)
-		return ICE_ERR_NO_MEMORY;
-
-	s_rule->type = CPU_TO_LE16(ICE_AQC_SW_RULES_T_VSI_LIST_CLEAR);
-	s_rule->pdata.vsi_list.index = CPU_TO_LE16(vsi_list_id);
-
 	/* Free the vsi_list resource that we allocated. It is assumed that the
 	 * list is empty at this point.
 	 */
-	status = ice_aq_alloc_free_vsi_list(hw, &vsi_list_id, lkup_type,
+	return ice_aq_alloc_free_vsi_list(hw, &vsi_list_id, lkup_type,
 					    ice_aqc_opc_free_res);
-
-	ice_free(hw, s_rule);
-	return status;
 }
 
 /**
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 47/52] net/ice/base: fix reference count when update VSI list
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (45 preceding siblings ...)
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 46/52] net/ice/base: remove unused code for VSI list free Qi Zhang
@ 2020-06-03  2:40 ` Qi Zhang
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 48/52] net/ice/base: add more tunnel type for IPv4 and IPv6 Qi Zhang
                   ` (6 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:40 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, stable, Wei Zhao, Paul M . Stillwell Jr

The parameter ref_cnt is used for tracking how many
rules are reusing this VSI list, so it can only be
updated when a rule which using this list be deleted.

Fixes: f89aa3affa9e ("net/ice/base: support removing advanced rule")
Cc: stable@dpdk.org

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 84102368b..9c7e55ff9 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -7488,6 +7488,7 @@ ice_adv_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
 				  tmp_fltr.fwd_id.hw_vsi_id, status);
 			return status;
 		}
+		fm_list->vsi_list_info->ref_cnt--;
 
 		/* Remove the VSI list since it is no longer used */
 		status = ice_remove_vsi_list_rule(hw, vsi_list_id, lkup_type);
@@ -7566,7 +7567,6 @@ ice_rem_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
 	if (list_elem->rule_info.sw_act.fltr_act != ICE_FWD_TO_VSI_LIST) {
 		remove_rule = true;
 	} else if (list_elem->vsi_count > 1) {
-		list_elem->vsi_list_info->ref_cnt--;
 		remove_rule = false;
 		vsi_handle = rinfo->sw_act.vsi_handle;
 		status = ice_adv_rem_update_vsi_list(hw, vsi_handle, list_elem);
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 48/52] net/ice/base: add more tunnel type for IPv4 and IPv6
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (46 preceding siblings ...)
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 47/52] net/ice/base: fix reference count when update VSI list Qi Zhang
@ 2020-06-03  2:40 ` Qi Zhang
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 49/52] net/ice/base: fix uninitialized flag Qi Zhang
                   ` (5 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:40 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Wei Zhao, Paul M . Stillwell Jr

This patch add more tunnel type defination ipv4/ipv6 packet,
it enable tcp/udp layer of ipv4/ipv6 as L4 payload but without
L4 dst/src port number as input set for switch filter rule.

For example:
we can download a switch rule to direct ipv4 packet with specific
source and destination ip address to queue index 1.
"eth / ipv4 src is 192.168.0.1 dst is 192.168.0.2 / udp /
end actions queue index 1 / end"
this type of rule will be matched with ipv4/udp file only.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_protocol_type.h |  4 ++++
 drivers/net/ice/base/ice_switch.c        | 40 ++++++++++++++++++++++++++++++++
 drivers/net/ice/base/ice_switch.h        |  4 ++++
 3 files changed, 48 insertions(+)

diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index 85af7513c..7cc44c172 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -66,6 +66,10 @@ enum ice_sw_tunnel_type {
 	ICE_SW_TUN_UDP, /* This means all "UDP" tunnel types: VXLAN-GPE, VXLAN
 			 * and GENEVE
 			 */
+	ICE_SW_IPV4_TCP,
+	ICE_SW_IPV4_UDP,
+	ICE_SW_IPV6_TCP,
+	ICE_SW_IPV6_UDP,
 	ICE_SW_TUN_GTP,
 	ICE_SW_TUN_PPPOE,
 	ICE_SW_TUN_PPPOE_PAY,
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 9c7e55ff9..1b1693dbb 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -6357,6 +6357,18 @@ ice_get_compat_fv_bitmap(struct ice_hw *hw, struct ice_adv_rule_info *rinfo,
 	case ICE_SW_TUN_IPV4_AH:
 		ice_set_bit(ICE_PROFID_IPV4_AH, bm);
 		return;
+	case ICE_SW_IPV4_TCP:
+		ice_set_bit(ICE_PROFID_IPV4_TCP, bm);
+		return;
+	case ICE_SW_IPV4_UDP:
+		ice_set_bit(ICE_PROFID_IPV4_UDP, bm);
+		return;
+	case ICE_SW_IPV6_TCP:
+		ice_set_bit(ICE_PROFID_IPV6_TCP, bm);
+		return;
+	case ICE_SW_IPV6_UDP:
+		ice_set_bit(ICE_PROFID_IPV6_UDP, bm);
+		return;
 	case ICE_SW_TUN_AND_NON_TUN:
 	default:
 		prof_type = ICE_PROF_ALL;
@@ -6771,6 +6783,34 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
 		return;
 	}
 
+	if (tun_type == ICE_SW_IPV4_TCP) {
+		*pkt = dummy_tcp_packet;
+		*pkt_len = sizeof(dummy_tcp_packet);
+		*offsets = dummy_tcp_packet_offsets;
+		return;
+	}
+
+	if (tun_type == ICE_SW_IPV4_UDP) {
+		*pkt = dummy_udp_packet;
+		*pkt_len = sizeof(dummy_udp_packet);
+		*offsets = dummy_udp_packet_offsets;
+		return;
+	}
+
+	if (tun_type == ICE_SW_IPV6_TCP) {
+		*pkt = dummy_tcp_ipv6_packet;
+		*pkt_len = sizeof(dummy_tcp_ipv6_packet);
+		*offsets = dummy_tcp_ipv6_packet_offsets;
+		return;
+	}
+
+	if (tun_type == ICE_SW_IPV6_UDP) {
+		*pkt = dummy_udp_ipv6_packet;
+		*pkt_len = sizeof(dummy_udp_ipv6_packet);
+		*offsets = dummy_udp_ipv6_packet_offsets;
+		return;
+	}
+
 	if (tun_type == ICE_ALL_TUNNELS) {
 		*pkt = dummy_gre_udp_packet;
 		*pkt_len = sizeof(dummy_gre_udp_packet);
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index bd634f98f..1ba85b16b 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -16,6 +16,10 @@
 #define ICE_FLTR_TX_RX (ICE_FLTR_RX | ICE_FLTR_TX)
 
 /* Switch Profile IDs for Profile related switch rules */
+#define ICE_PROFID_IPV4_TCP		4
+#define ICE_PROFID_IPV4_UDP		5
+#define ICE_PROFID_IPV6_TCP		7
+#define ICE_PROFID_IPV6_UDP		8
 #define ICE_PROFID_PPPOE_PAY		34
 #define ICE_PROFID_PPPOE_IPV4_TCP	35
 #define ICE_PROFID_PPPOE_IPV4_UDP	36
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 49/52] net/ice/base: fix uninitialized flag
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (47 preceding siblings ...)
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 48/52] net/ice/base: add more tunnel type for IPv4 and IPv6 Qi Zhang
@ 2020-06-03  2:40 ` Qi Zhang
  2020-06-08  2:51   ` Yang, Qiming
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 50/52] net/ice/base: add more device ID support Qi Zhang
                   ` (4 subsequent siblings)
  53 siblings, 1 reply; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:40 UTC (permalink / raw)
  To: qiming.yang
  Cc: dev, xiaolong.ye, Qi Zhang, stable, Wei Zhao, Paul M . Stillwell Jr

This patch add initialization for prof_res_bm_init flag
to zero in order that the possible resource for fv in the
files can be initialized.

Fixes: 453d087ccaff ("net/ice/base: add common functions")
Cc: stable@dpdk.org

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 54112e8f2..baaeee321 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -536,6 +536,7 @@ enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
 		return ICE_ERR_NO_MEMORY;
 
 	INIT_LIST_HEAD(&sw->vsi_list_map_head);
+	sw->prof_res_bm_init = 0;
 
 	status = ice_init_def_sw_recp(hw, &hw->switch_info->recp_list);
 	if (status) {
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 50/52] net/ice/base: add more device ID support
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (48 preceding siblings ...)
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 49/52] net/ice/base: fix uninitialized flag Qi Zhang
@ 2020-06-03  2:40 ` Qi Zhang
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 51/52] net/ice/base: add 1G SGMII PHY type Qi Zhang
                   ` (3 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:40 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang

Add support for E823L devices.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c |  5 +++++
 drivers/net/ice/base/ice_devids.h | 10 ++++++++++
 drivers/net/ice/base/ice_nvm.c    |  5 +++++
 drivers/net/ice/ice_ethdev.c      |  5 +++++
 4 files changed, 25 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index baaeee321..1d28a1399 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -43,6 +43,11 @@ static enum ice_status ice_set_mac_type(struct ice_hw *hw)
 	case ICE_DEV_ID_E822L_BACKPLANE:
 	case ICE_DEV_ID_E822L_SFP:
 	case ICE_DEV_ID_E822L_SGMII:
+	case ICE_DEV_ID_E823L_10G_BASE_T:
+	case ICE_DEV_ID_E823L_1GBE:
+	case ICE_DEV_ID_E823L_BACKPLANE:
+	case ICE_DEV_ID_E823L_QSFP:
+	case ICE_DEV_ID_E823L_SFP:
 		hw->mac_type = ICE_MAC_GENERIC;
 		break;
 	default:
diff --git a/drivers/net/ice/base/ice_devids.h b/drivers/net/ice/base/ice_devids.h
index e396f445a..84028e990 100644
--- a/drivers/net/ice/base/ice_devids.h
+++ b/drivers/net/ice/base/ice_devids.h
@@ -6,6 +6,16 @@
 #define _ICE_DEVIDS_H_
 
 /* Device IDs */
+/* Intel(R) Ethernet Connection E823-L for backplane */
+#define ICE_DEV_ID_E823L_BACKPLANE	0x124C
+/* Intel(R) Ethernet Connection E823-L for SFP */
+#define ICE_DEV_ID_E823L_SFP		0x124D
+/* Intel(R) Ethernet Connection E823-L/X557-AT 10GBASE-T */
+#define ICE_DEV_ID_E823L_10G_BASE_T	0x124E
+/* Intel(R) Ethernet Connection E823-L 1GbE */
+#define ICE_DEV_ID_E823L_1GBE		0x124F
+/* Intel(R) Ethernet Connection E823-L for QSFP */
+#define ICE_DEV_ID_E823L_QSFP		0x151D
 /* Intel(R) Ethernet Controller E810-C for backplane */
 #define ICE_DEV_ID_E810C_BACKPLANE	0x1591
 /* Intel(R) Ethernet Controller E810-C for QSFP */
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index bedfbcbb4..bfeade6f9 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -549,6 +549,11 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)
 	case ICE_DEV_ID_E822L_SFP:
 	case ICE_DEV_ID_E822L_10G_BASE_T:
 	case ICE_DEV_ID_E822L_SGMII:
+	case ICE_DEV_ID_E823L_BACKPLANE:
+	case ICE_DEV_ID_E823L_SFP:
+	case ICE_DEV_ID_E823L_10G_BASE_T:
+	case ICE_DEV_ID_E823L_1GBE:
+	case ICE_DEV_ID_E823L_QSFP:
 		return status;
 	default:
 		break;
diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index d5110c439..5a89a1955 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -161,6 +161,11 @@ static const struct rte_pci_id pci_id_ice_map[] = {
 	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_SFP) },
 	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_10G_BASE_T) },
 	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_SGMII) },
+	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_BACKPLANE) },
+	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_SFP) },
+	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_10G_BASE_T) },
+	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_1GBE) },
+	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_QSFP) },
 	{ .vendor_id = 0, /* sentinel */ },
 };
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 51/52] net/ice/base: add 1G SGMII PHY type
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (49 preceding siblings ...)
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 50/52] net/ice/base: add more device ID support Qi Zhang
@ 2020-06-03  2:40 ` Qi Zhang
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 52/52] net/ice/base: update IPV4 and IPV6 flow ptype masks Qi Zhang
                   ` (2 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:40 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr

There isn't a case for 1G SGMII in ice_get_media_type() so add
the handling for it.

Also handle the special case where some direct attach
cables may report that they support 1G SGMII, but
that is erroneous since SGMII is supposed to be a
backplane media type (between a MAC and a PHY). If
the driver doesn't handle this special case then a
user could see the 'Port' in ethtool change from
'Direct attach Copper' to 'Backplane' when they have
forced the speed to 1G, but the cable hasn't changed.

Lastly, change ice_aq_get_phy_caps() to save the
module_type info if the function was called with
ICE_AQC_REPORT_TOPO_CAP. This call uses the media
information to populate the module_type. If no
media is present then the values in module_type
will be 0.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_adminq_cmd.h |  1 +
 drivers/net/ice/base/ice_common.c     | 20 ++++++++++++++++----
 2 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index d9d43639f..f480917cd 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1382,6 +1382,7 @@ struct ice_aqc_get_phy_caps_data {
 	u8 module_type[ICE_MODULE_TYPE_TOTAL_BYTE];
 #define ICE_AQC_MOD_TYPE_BYTE0_SFP_PLUS			0xA0
 #define ICE_AQC_MOD_TYPE_BYTE0_QSFP_PLUS		0x80
+#define ICE_AQC_MOD_TYPE_IDENT				1
 #define ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_PASSIVE	BIT(0)
 #define ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_ACTIVE	BIT(1)
 #define ICE_AQC_MOD_TYPE_BYTE1_10G_BASE_SR		BIT(4)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 1d28a1399..2c822d7d4 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -197,6 +197,10 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
 	if (status == ICE_SUCCESS && report_mode == ICE_AQC_REPORT_TOPO_CAP) {
 		pi->phy.phy_type_low = LE64_TO_CPU(pcaps->phy_type_low);
 		pi->phy.phy_type_high = LE64_TO_CPU(pcaps->phy_type_high);
+		ice_memcpy(pi->phy.link_info.module_type, &pcaps->module_type,
+			   sizeof(pi->phy.link_info.module_type),
+			   ICE_NONDMA_TO_NONDMA);
+
 	}
 
 	return status;
@@ -269,6 +273,18 @@ static enum ice_media_type ice_get_media_type(struct ice_port_info *pi)
 		return ICE_MEDIA_UNKNOWN;
 
 	if (hw_link_info->phy_type_low) {
+		/* 1G SGMII is a special case where some DA cable PHYs
+		 * may show this as an option when it really shouldn't
+		 * be since SGMII is meant to be between a MAC and a PHY
+		 * in a backplane. Try to detect this case and handle it
+		 */
+		if (hw_link_info->phy_type_low == ICE_PHY_TYPE_LOW_1G_SGMII &&
+		    (hw_link_info->module_type[ICE_AQC_MOD_TYPE_IDENT] ==
+		    ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_ACTIVE ||
+		    hw_link_info->module_type[ICE_AQC_MOD_TYPE_IDENT] ==
+		    ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_PASSIVE))
+			return ICE_MEDIA_DA;
+
 		switch (hw_link_info->phy_type_low) {
 		case ICE_PHY_TYPE_LOW_1000BASE_SX:
 		case ICE_PHY_TYPE_LOW_1000BASE_LX:
@@ -2474,10 +2490,6 @@ enum ice_status ice_update_link_info(struct ice_port_info *pi)
 
 		status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_TOPO_CAP,
 					     pcaps, NULL);
-		if (status == ICE_SUCCESS)
-			ice_memcpy(li->module_type, &pcaps->module_type,
-				   sizeof(li->module_type),
-				   ICE_NONDMA_TO_NONDMA);
 
 		ice_free(hw, pcaps);
 	}
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH 52/52] net/ice/base: update IPV4 and IPV6 flow ptype masks
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (50 preceding siblings ...)
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 51/52] net/ice/base: add 1G SGMII PHY type Qi Zhang
@ 2020-06-03  2:40 ` Qi Zhang
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
  2020-06-15  2:04 ` [dpdk-dev] [PATCH v3 00/53] " Qi Zhang
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-03  2:40 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M . Stillwell Jr

In the flow API, add ability to add IPV4/IPV6 rules that match on
packets with or without inner L4 protocols.

Also, remove PPPOD packet from PPPOE bitmap.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flow.c   | 166 ++++++++++++++++++++++++++++++--------
 drivers/net/ice/base/ice_flow.h   |   4 +
 drivers/net/ice/ice_fdir_filter.c |  30 ++++---
 drivers/net/ice/ice_hash.c        |  22 +++--
 4 files changed, 170 insertions(+), 52 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 744b2805f..615f1719a 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -218,10 +218,26 @@ static const u32 ice_ptypes_macvlan_il[] = {
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 };
 
-/* Packet types for packets with an Outer/First/Single IPv4 header */
+/* Packet types for packets with an Outer/First/Single IPv4 header, does NOT
+ * include IPV4 other PTYPEs
+ */
 static const u32 ice_ptypes_ipv4_ofos[] = {
 	0x1DC00000, 0x04000800, 0x00000000, 0x00000000,
 	0x00000000, 0x00000155, 0x00000000, 0x00000000,
+	0x00000000, 0x000FC000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+};
+
+/* Packet types for packets with an Outer/First/Single IPv4 header, includes
+ * IPV4 other PTYPEs
+ */
+static const u32 ice_ptypes_ipv4_ofos_all[] = {
+	0x1DC00000, 0x04000800, 0x00000000, 0x00000000,
+	0x00000000, 0x00000155, 0x00000000, 0x00000000,
 	0x00000000, 0x000FC000, 0x83E0F800, 0x00000101,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -242,10 +258,26 @@ static const u32 ice_ptypes_ipv4_il[] = {
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 };
 
-/* Packet types for packets with an Outer/First/Single IPv6 header */
+/* Packet types for packets with an Outer/First/Single IPv6 header, does NOT
+ * include IVP6 other PTYPEs
+ */
 static const u32 ice_ptypes_ipv6_ofos[] = {
 	0x00000000, 0x00000000, 0x77000000, 0x10002000,
 	0x00000000, 0x000002AA, 0x00000000, 0x00000000,
+	0x00000000, 0x03F00000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+};
+
+/* Packet types for packets with an Outer/First/Single IPv6 header, includes
+ * IPV6 other PTYPEs
+ */
+static const u32 ice_ptypes_ipv6_ofos_all[] = {
+	0x00000000, 0x00000000, 0x77000000, 0x10002000,
+	0x00000000, 0x000002AA, 0x00000000, 0x00000000,
 	0x00080F00, 0x03F00000, 0x7C1F0000, 0x00000206,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -266,6 +298,54 @@ static const u32 ice_ptypes_ipv6_il[] = {
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 };
 
+/* Packet types for packets with an Outer/First/Single IPv4 header - no L4 */
+static const u32 ice_ipv4_ofos_no_l4[] = {
+	0x10C00000, 0x04000800, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x000cc000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+};
+
+/* Packet types for packets with an Innermost/Last IPv4 header - no L4 */
+static const u32 ice_ipv4_il_no_l4[] = {
+	0x60000000, 0x18043008, 0x80000002, 0x6010c021,
+	0x00000008, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00139800, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+};
+
+/* Packet types for packets with an Outer/First/Single IPv6 header - no L4 */
+static const u32 ice_ipv6_ofos_no_l4[] = {
+	0x00000000, 0x00000000, 0x43000000, 0x10002000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x02300000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+};
+
+/* Packet types for packets with an Innermost/Last IPv6 header - no L4 */
+static const u32 ice_ipv6_il_no_l4[] = {
+	0x00000000, 0x02180430, 0x0000010c, 0x086010c0,
+	0x00000430, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x4e600000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+};
+
 /* Packet types for packets with an Outermost/First ARP header */
 static const u32 ice_ptypes_arp_of[] = {
 	0x00000800, 0x00000000, 0x00000000, 0x00000000,
@@ -473,7 +553,7 @@ static const u32 ice_ptypes_gtpu[] = {
 static const u32 ice_ptypes_pppoe[] = {
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
-	0x00000000, 0x03FFF000, 0x00000000, 0x00000000,
+	0x00000000, 0x03ffe000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -598,6 +678,9 @@ struct ice_flow_prof_params {
 #define ICE_FLOW_SEG_HDRS_L4_MASK	\
 	(ICE_FLOW_SEG_HDR_ICMP | ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | \
 	 ICE_FLOW_SEG_HDR_SCTP)
+/* mask for L4 protocols that are NOT part of IPV4/6 OTHER PTYPE groups */
+#define ICE_FLOW_SEG_HDRS_L4_MASK_NO_OTHER	\
+	(ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_SCTP)
 
 /**
  * ice_flow_val_hdrs - validates packet segments for valid protocol headers
@@ -715,46 +798,47 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
 				       ICE_FLOW_PTYPE_MAX);
 		}
 
-		if (hdrs & ICE_FLOW_SEG_HDR_IPV4) {
+		if (hdrs & ICE_FLOW_SEG_HDR_PPPOE) {
+			src = (const ice_bitmap_t *)ice_ptypes_pppoe;
+			ice_and_bitmap(params->ptypes, params->ptypes, src,
+				       ICE_FLOW_PTYPE_MAX);
+		}
+		if ((hdrs & ICE_FLOW_SEG_HDR_IPV4) &&
+		    (hdrs & ICE_FLOW_SEG_HDR_IPV_OTHER)) {
+			src = !i ?
+				(const ice_bitmap_t *)ice_ptypes_ipv4_ofos_all :
+				(const ice_bitmap_t *)ice_ptypes_ipv4_il;
+			ice_and_bitmap(params->ptypes, params->ptypes, src,
+				       ICE_FLOW_PTYPE_MAX);
+		} else if ((hdrs & ICE_FLOW_SEG_HDR_IPV6) &&
+			   (hdrs & ICE_FLOW_SEG_HDR_IPV_OTHER)) {
+			src = !i ?
+				(const ice_bitmap_t *)ice_ptypes_ipv6_ofos_all :
+				(const ice_bitmap_t *)ice_ptypes_ipv6_il;
+			ice_and_bitmap(params->ptypes, params->ptypes, src,
+				       ICE_FLOW_PTYPE_MAX);
+		} else if ((hdrs & ICE_FLOW_SEG_HDR_IPV4) &&
+			   !(hdrs & ICE_FLOW_SEG_HDRS_L4_MASK_NO_OTHER)) {
+			src = !i ? (const ice_bitmap_t *)ice_ipv4_ofos_no_l4 :
+				(const ice_bitmap_t *)ice_ipv4_il_no_l4;
+			ice_and_bitmap(params->ptypes, params->ptypes, src,
+				       ICE_FLOW_PTYPE_MAX);
+		} else if (hdrs & ICE_FLOW_SEG_HDR_IPV4) {
 			src = !i ? (const ice_bitmap_t *)ice_ptypes_ipv4_ofos :
 				(const ice_bitmap_t *)ice_ptypes_ipv4_il;
 			ice_and_bitmap(params->ptypes, params->ptypes, src,
 				       ICE_FLOW_PTYPE_MAX);
-			if (hdrs & ICE_FLOW_SEG_HDR_UDP) {
-				src = (const ice_bitmap_t *)ice_ptypes_udp_il;
-				ice_and_bitmap(params->ptypes,
-						params->ptypes, src,
-					       ICE_FLOW_PTYPE_MAX);
-			} else if (hdrs & ICE_FLOW_SEG_HDR_TCP) {
-				ice_and_bitmap(params->ptypes, params->ptypes,
-					       (const ice_bitmap_t *)
-					       ice_ptypes_tcp_il,
-					       ICE_FLOW_PTYPE_MAX);
-			} else if (hdrs & ICE_FLOW_SEG_HDR_SCTP) {
-				src = (const ice_bitmap_t *)ice_ptypes_sctp_il;
-				ice_and_bitmap(params->ptypes, params->ptypes,
-					       src, ICE_FLOW_PTYPE_MAX);
-			}
+		} else if ((hdrs & ICE_FLOW_SEG_HDR_IPV6) &&
+			   !(hdrs & ICE_FLOW_SEG_HDRS_L4_MASK_NO_OTHER)) {
+			src = !i ? (const ice_bitmap_t *)ice_ipv6_ofos_no_l4 :
+				(const ice_bitmap_t *)ice_ipv6_il_no_l4;
+			ice_and_bitmap(params->ptypes, params->ptypes, src,
+				       ICE_FLOW_PTYPE_MAX);
 		} else if (hdrs & ICE_FLOW_SEG_HDR_IPV6) {
 			src = !i ? (const ice_bitmap_t *)ice_ptypes_ipv6_ofos :
 				(const ice_bitmap_t *)ice_ptypes_ipv6_il;
 			ice_and_bitmap(params->ptypes, params->ptypes, src,
 				       ICE_FLOW_PTYPE_MAX);
-			if (hdrs & ICE_FLOW_SEG_HDR_UDP) {
-				src = (const ice_bitmap_t *)ice_ptypes_udp_il;
-				ice_and_bitmap(params->ptypes,
-						params->ptypes, src,
-					       ICE_FLOW_PTYPE_MAX);
-			} else if (hdrs & ICE_FLOW_SEG_HDR_TCP) {
-				ice_and_bitmap(params->ptypes, params->ptypes,
-					       (const ice_bitmap_t *)
-					       ice_ptypes_tcp_il,
-					       ICE_FLOW_PTYPE_MAX);
-			} else if (hdrs & ICE_FLOW_SEG_HDR_SCTP) {
-				src = (const ice_bitmap_t *)ice_ptypes_sctp_il;
-				ice_and_bitmap(params->ptypes, params->ptypes,
-					       src, ICE_FLOW_PTYPE_MAX);
-			}
 		}
 
 		if (hdrs & ICE_FLOW_SEG_HDR_ETH_NON_IP) {
@@ -771,6 +855,20 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
 					  ICE_FLOW_PTYPE_MAX);
 		}
 
+		if (hdrs & ICE_FLOW_SEG_HDR_UDP) {
+			src = (const ice_bitmap_t *)ice_ptypes_udp_il;
+			ice_and_bitmap(params->ptypes, params->ptypes, src,
+				       ICE_FLOW_PTYPE_MAX);
+		} else if (hdrs & ICE_FLOW_SEG_HDR_TCP) {
+			ice_and_bitmap(params->ptypes, params->ptypes,
+				       (const ice_bitmap_t *)ice_ptypes_tcp_il,
+				       ICE_FLOW_PTYPE_MAX);
+		} else if (hdrs & ICE_FLOW_SEG_HDR_SCTP) {
+			src = (const ice_bitmap_t *)ice_ptypes_sctp_il;
+			ice_and_bitmap(params->ptypes, params->ptypes, src,
+				       ICE_FLOW_PTYPE_MAX);
+		}
+
 		if (hdrs & ICE_FLOW_SEG_HDR_ICMP) {
 			src = !i ? (const ice_bitmap_t *)ice_ptypes_icmp_of :
 				(const ice_bitmap_t *)ice_ptypes_icmp_il;
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 6e4257123..92987664e 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -178,6 +178,10 @@ enum ice_flow_seg_hdr {
 	ICE_FLOW_SEG_HDR_AH		= 0x00200000,
 	ICE_FLOW_SEG_HDR_NAT_T_ESP	= 0x00400000,
 	ICE_FLOW_SEG_HDR_ETH_NON_IP	= 0x00800000,
+	/* The following is an additive bit for ICE_FLOW_SEG_HDR_IPV4 and
+	 * ICE_FLOW_SEG_HDR_IPV6 which include the IPV4 other PTYPEs
+	 */
+	ICE_FLOW_SEG_HDR_IPV_OTHER	= 0x20000000,
 };
 
 /* These segements all have the same PTYPES, but are otherwise distinguished by
diff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c
index 77e2da9fc..c3f23a019 100644
--- a/drivers/net/ice/ice_fdir_filter.c
+++ b/drivers/net/ice/ice_fdir_filter.c
@@ -956,33 +956,41 @@ ice_fdir_input_set_conf(struct ice_pf *pf, enum ice_fltr_ptype flow,
 	switch (flow) {
 	case ICE_FLTR_PTYPE_NONF_IPV4_UDP:
 		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_UDP |
-				  ICE_FLOW_SEG_HDR_IPV4);
+				  ICE_FLOW_SEG_HDR_IPV4 |
+				  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV4_TCP:
 		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_TCP |
-				  ICE_FLOW_SEG_HDR_IPV4);
+				  ICE_FLOW_SEG_HDR_IPV4 |
+				  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV4_SCTP:
 		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_SCTP |
-				  ICE_FLOW_SEG_HDR_IPV4);
+				  ICE_FLOW_SEG_HDR_IPV4 |
+				  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV4_OTHER:
-		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV4);
+		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV4 |
+				  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_UDP:
 		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_UDP |
-				  ICE_FLOW_SEG_HDR_IPV6);
+				  ICE_FLOW_SEG_HDR_IPV6 |
+				  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
 		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_TCP |
-				  ICE_FLOW_SEG_HDR_IPV6);
+				  ICE_FLOW_SEG_HDR_IPV6 |
+				  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_SCTP:
 		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_SCTP |
-				  ICE_FLOW_SEG_HDR_IPV6);
+				  ICE_FLOW_SEG_HDR_IPV6 |
+				  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_OTHER:
-		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV6);
+		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV6 |
+				  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP:
 	case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP:
@@ -990,11 +998,13 @@ ice_fdir_input_set_conf(struct ice_pf *pf, enum ice_fltr_ptype flow,
 	case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER:
 		if (ttype == ICE_FDIR_TUNNEL_TYPE_GTPU)
 			ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_IP |
-					  ICE_FLOW_SEG_HDR_IPV4);
+					  ICE_FLOW_SEG_HDR_IPV4 |
+					  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		else if (ttype == ICE_FDIR_TUNNEL_TYPE_GTPU_EH)
 			ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_EH |
 					  ICE_FLOW_SEG_HDR_GTPU_IP |
-					  ICE_FLOW_SEG_HDR_IPV4);
+					  ICE_FLOW_SEG_HDR_IPV4 |
+					  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		else
 			PMD_DRV_LOG(ERR, "not supported tunnel type.");
 		break;
diff --git a/drivers/net/ice/ice_hash.c b/drivers/net/ice/ice_hash.c
index 11435cbfb..3d58b7184 100644
--- a/drivers/net/ice/ice_hash.c
+++ b/drivers/net/ice/ice_hash.c
@@ -79,21 +79,27 @@ ice_hash_parse_pattern_action(struct ice_adapter *ad,
 struct rss_type_match_hdr hint_0 = {
 	ICE_FLOW_SEG_HDR_NONE,	0};
 struct rss_type_match_hdr hint_1 = {
-	ICE_FLOW_SEG_HDR_IPV4,	ETH_RSS_IPV4};
+	ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV_OTHER, ETH_RSS_IPV4};
 struct rss_type_match_hdr hint_2 = {
-	ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_UDP, ETH_RSS_NONFRAG_IPV4_UDP};
+	ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_UDP |
+	ICE_FLOW_SEG_HDR_IPV_OTHER, ETH_RSS_NONFRAG_IPV4_UDP};
 struct rss_type_match_hdr hint_3 = {
-	ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_TCP, ETH_RSS_NONFRAG_IPV4_TCP};
+	ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_TCP |
+	ICE_FLOW_SEG_HDR_IPV_OTHER, ETH_RSS_NONFRAG_IPV4_TCP};
 struct rss_type_match_hdr hint_4 = {
-	ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_SCTP, ETH_RSS_NONFRAG_IPV4_SCTP};
+	ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_SCTP |
+	ICE_FLOW_SEG_HDR_IPV_OTHER, ETH_RSS_NONFRAG_IPV4_SCTP};
 struct rss_type_match_hdr hint_5 = {
-	ICE_FLOW_SEG_HDR_IPV6,	ETH_RSS_IPV6};
+	ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_IPV_OTHER, ETH_RSS_IPV6};
 struct rss_type_match_hdr hint_6 = {
-	ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_UDP, ETH_RSS_NONFRAG_IPV6_UDP};
+	ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_UDP |
+	ICE_FLOW_SEG_HDR_IPV_OTHER, ETH_RSS_NONFRAG_IPV6_UDP};
 struct rss_type_match_hdr hint_7 = {
-	ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_TCP, ETH_RSS_NONFRAG_IPV6_TCP};
+	ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_TCP |
+	ICE_FLOW_SEG_HDR_IPV_OTHER, ETH_RSS_NONFRAG_IPV6_TCP};
 struct rss_type_match_hdr hint_8 = {
-	ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_SCTP, ETH_RSS_NONFRAG_IPV6_SCTP};
+	ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_SCTP |
+	ICE_FLOW_SEG_HDR_IPV_OTHER, ETH_RSS_NONFRAG_IPV6_SCTP};
 struct rss_type_match_hdr hint_9 = {
 	ICE_FLOW_SEG_HDR_GTPU_EH, ETH_RSS_IPV4};
 struct rss_type_match_hdr hint_10 = {
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH 31/52] net/ice/base: reset flags when all rules are deleted
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 31/52] net/ice/base: reset flags when all rules are deleted Qi Zhang
@ 2020-06-03  2:47   ` Patil, Kiran
  0 siblings, 0 replies; 187+ messages in thread
From: Patil, Kiran @ 2020-06-03  2:47 UTC (permalink / raw)
  To: Zhang, Qi Z, Yang, Qiming; +Cc: dev, Ye, Xiaolong, Stillwell Jr, Paul M

ACK

-----Original Message-----
From: Zhang, Qi Z <qi.z.zhang@intel.com> 
Sent: Tuesday, June 2, 2020 7:40 PM
To: Yang, Qiming <qiming.yang@intel.com>
Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>; Patil, Kiran <kiran.patil@intel.com>; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>
Subject: [PATCH 31/52] net/ice/base: reset flags when all rules are deleted

To avoid having stale information about "adv_rule" per recipe, when all rules associated to a given recipe are deleted, reset the "adv_rule"
flag otherwise it causes problem later on when decisions about filter rules being present or not are made based on "adv_rule" flag.

Removed setting "adv_rule = 1" when recipe is created. It is set correctly when advanced switch rule is added referring to the recipe which was created as a result of adding advanced switch rule.

Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 94268d560..f379a5f5d 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -4122,6 +4122,9 @@ void ice_rem_all_sw_rules_info(struct ice_hw *hw)
 			ice_rem_sw_rule_info(hw, rule_head);
 		else
 			ice_rem_adv_rule_info(hw, rule_head);
+		if (sw->recp_list[i].adv_rule &&
+		    LIST_EMPTY(&sw->recp_list[i].filt_rules))
+			sw->recp_list[i].adv_rule = false;
 	}
 }
 
@@ -6130,7 +6133,6 @@ ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm,
 		recp->n_grp_count = rm->n_grp_count;
 		recp->tun_type = rm->tun_type;
 		recp->recp_created = true;
-		recp->adv_rule = 1;
 	}
 	rm->root_buf = buf;
 	ice_free(hw, tmp);
@@ -7611,11 +7613,15 @@ ice_rem_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
 					 rule_buf_sz, 1,
 					 ice_aqc_opc_remove_sw_rules, NULL);
 		if (status == ICE_SUCCESS || status == ICE_ERR_DOES_NOT_EXIST) {
+			struct ice_switch_info *sw = hw->switch_info;
+
 			ice_acquire_lock(rule_lock);
 			LIST_DEL(&list_elem->list_entry);
 			ice_free(hw, list_elem->lkups);
 			ice_free(hw, list_elem);
 			ice_release_lock(rule_lock);
+			if (LIST_EMPTY(&sw->recp_list[rid].filt_rules))
+				sw->recp_list[rid].adv_rule = false;
 		}
 		ice_free(hw, s_rule);
 	}
--
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH 28/52] net/ice/base: return correct error code
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 28/52] net/ice/base: return correct error code Qi Zhang
@ 2020-06-03  2:47   ` Patil, Kiran
  0 siblings, 0 replies; 187+ messages in thread
From: Patil, Kiran @ 2020-06-03  2:47 UTC (permalink / raw)
  To: Zhang, Qi Z, Yang, Qiming; +Cc: dev, Ye, Xiaolong, Stillwell Jr, Paul M

ACK

-----Original Message-----
From: Zhang, Qi Z <qi.z.zhang@intel.com> 
Sent: Tuesday, June 2, 2020 7:40 PM
To: Yang, Qiming <qiming.yang@intel.com>
Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>; Patil, Kiran <kiran.patil@intel.com>; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>
Subject: [PATCH 28/52] net/ice/base: return correct error code

Return ICE_ERR_DOES_NOT_EXIST return code if admin command error code is ICE_AQ_RC_ENOENT (not exist). ice_aq_sw_rules is used when switch rule is getting added/deleted/updated. In case of delete/update switch rule, admin command can return ICE_AQ_RC_ENOENT error code if such rule does not exist, hence return ICE_ERR_DOES_NOT_EXIST error code from ice_aq_sw_rule, so that caller of this fucnction can decide how to handle ICE_ERR_DOES_NOT_EXIST.

Allow proper cleanup of internal data structures from ice_rem_adv_rule function if ice_aq_sw_rules return error code ICE_ERR_DOES_NOT_EXIST otherwise per recipe:rule list will never become empty.

Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 6387f9b84..fa3a59e51 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1868,6 +1868,7 @@ ice_aq_sw_rules(struct ice_hw *hw, void *rule_list, u16 rule_list_sz,
 		u8 num_rules, enum ice_adminq_opc opc, struct ice_sq_cd *cd)  {
 	struct ice_aq_desc desc;
+	enum ice_status status;
 
 	ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
 
@@ -1881,7 +1882,12 @@ ice_aq_sw_rules(struct ice_hw *hw, void *rule_list, u16 rule_list_sz,
 	desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
 	desc.params.sw_rules.num_rules_fltr_entry_index =
 		CPU_TO_LE16(num_rules);
-	return ice_aq_send_cmd(hw, &desc, rule_list, rule_list_sz, cd);
+	status = ice_aq_send_cmd(hw, &desc, rule_list, rule_list_sz, cd);
+	if (opc != ice_aqc_opc_add_sw_rules &&
+	    hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT)
+		status = ICE_ERR_DOES_NOT_EXIST;
+
+	return status;
 }
 
 /**
@@ -7354,7 +7360,7 @@ ice_rem_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
 		status = ice_aq_sw_rules(hw, (struct ice_aqc_sw_rules *)s_rule,
 					 rule_buf_sz, 1,
 					 ice_aqc_opc_remove_sw_rules, NULL);
-		if (status == ICE_SUCCESS) {
+		if (status == ICE_SUCCESS || status == ICE_ERR_DOES_NOT_EXIST) {
 			ice_acquire_lock(rule_lock);
 			LIST_DEL(&list_elem->list_entry);
 			ice_free(hw, list_elem->lkups);
--
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH 35/52] net/ice/base: correct return value
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 35/52] net/ice/base: correct return value Qi Zhang
@ 2020-06-03  2:47   ` Patil, Kiran
  0 siblings, 0 replies; 187+ messages in thread
From: Patil, Kiran @ 2020-06-03  2:47 UTC (permalink / raw)
  To: Zhang, Qi Z, Yang, Qiming; +Cc: dev, Ye, Xiaolong, Stillwell Jr, Paul M

ACK

-----Original Message-----
From: Zhang, Qi Z <qi.z.zhang@intel.com> 
Sent: Tuesday, June 2, 2020 7:40 PM
To: Yang, Qiming <qiming.yang@intel.com>
Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>; Patil, Kiran <kiran.patil@intel.com>; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>
Subject: [PATCH 35/52] net/ice/base: correct return value

Function ice_rem_adv_rule_id return incorrect error code (ICE_ERR_PARAM) whereas it should have returned ICE_ERR_DOES_NOT_EXIST return code if filter list is empty or unable to find "rule" in list

Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 01dcace55..5c53b9ec3 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -7661,7 +7661,8 @@ ice_rem_adv_rule_by_id(struct ice_hw *hw,
 						list_itr->lkups_cnt, &rinfo);
 		}
 	}
-	return ICE_ERR_PARAM;
+	/* either list is empty or unable to find rule */
+	return ICE_ERR_DOES_NOT_EXIST;
 }
 
 /**
--
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH 03/52] net/ice/base: disable profile merge for FDIR
  2020-06-03  2:39 ` [dpdk-dev] [PATCH 03/52] net/ice/base: disable profile merge for FDIR Qi Zhang
@ 2020-06-03  6:42   ` Yang, Qiming
  0 siblings, 0 replies; 187+ messages in thread
From: Yang, Qiming @ 2020-06-03  6:42 UTC (permalink / raw)
  To: Zhang, Qi Z; +Cc: dev, Ye, Xiaolong, Cao, Yahui, Stillwell Jr, Paul M



> -----Original Message-----
> From: Zhang, Qi Z <qi.z.zhang@intel.com>
> Sent: Wednesday, June 3, 2020 10:39
> To: Yang, Qiming <qiming.yang@intel.com>
> Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z
> <qi.z.zhang@intel.com>; Cao, Yahui <yahui.cao@intel.com>; Stillwell Jr, Paul
> M <paul.m.stillwell.jr@intel.com>
> Subject: [PATCH 03/52] net/ice/base: disable profile merge for FDIR
> 
> For Flow Director, we don't want to re-use a existed profile with the same

a/an

> field vector and mask. Merging two different flow_type’s field vector will
> also make them sharing trained rule and cause rule interference.
> 
> For example:
> issue rule A: IPV4_TCP matching tcp src&dst port 80  to queue 8 issue rule B:
> IPV6_TCP matching tcp src&dst port 200 to queue 20 Below behavior is found
> but not expected:
> IPV4_TCP pkt with src&dst port 200 hits rule B and goes to queue 20
> IPV6_TCP pkt with src&dst port 80  hits rule A and goes to queue 8
> 
> Signed-off-by: Yahui Cao <yahui.cao@intel.com>
> Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
> ---
>  drivers/net/ice/base/ice_flex_pipe.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/net/ice/base/ice_flex_pipe.c
> b/drivers/net/ice/base/ice_flex_pipe.c
> index 512ced6b8..2a7b74207 100644
> --- a/drivers/net/ice/base/ice_flex_pipe.c
> +++ b/drivers/net/ice/base/ice_flex_pipe.c
> @@ -2811,6 +2811,12 @@ ice_find_prof_id_with_mask(struct ice_hw *hw,
> enum ice_block blk,
>  	struct ice_es *es = &hw->blk[blk].es;
>  	u8 i;
> 
> +	/* For FD, we don't want to re-use a existed profile with the same

Same as above

> +	 * field vector and mask. This will cause rule interference.
> +	 */
> +	if (blk == ICE_BLK_FD)
> +		return ICE_ERR_DOES_NOT_EXIST;
> +
>  	for (i = 0; i < (u8)es->count; i++) {
>  		u16 off = i * es->fvw;
> 
> --
> 2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH 49/52] net/ice/base: fix uninitialized flag
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 49/52] net/ice/base: fix uninitialized flag Qi Zhang
@ 2020-06-08  2:51   ` Yang, Qiming
  0 siblings, 0 replies; 187+ messages in thread
From: Yang, Qiming @ 2020-06-08  2:51 UTC (permalink / raw)
  To: Zhang, Qi Z; +Cc: dev, Ye, Xiaolong, stable, Zhao1, Wei, Stillwell Jr, Paul M

Hi, Qi

> -----Original Message-----
> From: Zhang, Qi Z <qi.z.zhang@intel.com>
> Sent: Wednesday, June 3, 2020 10:40
> To: Yang, Qiming <qiming.yang@intel.com>
> Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z
> <qi.z.zhang@intel.com>; stable@dpdk.org; Zhao1, Wei
> <wei.zhao1@intel.com>; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>
> Subject: [PATCH 49/52] net/ice/base: fix uninitialized flag
> 
> This patch add initialization for prof_res_bm_init flag to zero in order that the
> possible resource for fv in the files can be initialized.

What's the 'fv' means?
 
> 
> Fixes: 453d087ccaff ("net/ice/base: add common functions")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
> Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
> ---
>  drivers/net/ice/base/ice_common.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/net/ice/base/ice_common.c
> b/drivers/net/ice/base/ice_common.c
> index 54112e8f2..baaeee321 100644
> --- a/drivers/net/ice/base/ice_common.c
> +++ b/drivers/net/ice/base/ice_common.c
> @@ -536,6 +536,7 @@ enum ice_status ice_init_fltr_mgmt_struct(struct
> ice_hw *hw)
>  		return ICE_ERR_NO_MEMORY;
> 
>  	INIT_LIST_HEAD(&sw->vsi_list_map_head);
> +	sw->prof_res_bm_init = 0;
> 
>  	status = ice_init_def_sw_recp(hw, &hw->switch_info->recp_list);
>  	if (status) {
> --
> 2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 00/52] net/ice: base code update
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (51 preceding siblings ...)
  2020-06-03  2:40 ` [dpdk-dev] [PATCH 52/52] net/ice/base: update IPV4 and IPV6 flow ptype masks Qi Zhang
@ 2020-06-09 11:59 ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 01/52] net/ice/base: add support for non-IP Layer2 protocol Qi Zhang
                     ` (53 more replies)
  2020-06-15  2:04 ` [dpdk-dev] [PATCH v3 00/53] " Qi Zhang
  53 siblings, 54 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang

Upgrade base with below main changes

1. add more protocol support - L2TPv3/ESP/AH/PFCP.
2. Add IPv6 prefix RSS support.
3. support GENEVE and VXLAN rules with VLAN.
4. Add E823L device IDs
5. couple bug fixes and code clean.

v2:
- fix a bug in patch that cause RSS fail in patch 52/52
- fix minor commit log issue

Qi Zhang (52):
  net/ice/base: add support for non-IP Layer2 protocol
  net/ice/base: add FDIR program status WB macro
  net/ice/base: disable profile merge for FDIR
  net/ice/base: avoid undefined behavior
  net/ice/base: consolidate implementation of MAC config set
  net/ice/base: report AOC PHY Types as Fiber
  net/ice/base: gate devices from FW link override
  net/ice/base: improve VSI filters rebuild
  net/ice/base: add AUI media type
  net/ice/base: fix variable type for ACL
  net/ice/base: update PHY type high max index value
  net/ice/base: consolidate VF Promiscuous mode
  net/ice/base: refactor flow director filter swap
  net/ice/base: change IPV6 training packet
  net/ice/base: group function protoypes together
  net/ice/base: cleanup comment formatting
  net/ice/base: add FDIR support for L2TPV3 ESP AH and PFCP
  net/ice/base: add FD completion report option
  net/ice/base: initialize Set PHY Configuration FEC fields
  net/ice/baes: add NVM help functions
  net/ice/base: allow GENEVE and VXLAN rules with VLAN
  net/ice/base: increase timeout after PFR
  net/ice/base: remove unnecessary braces
  net/ice/base: adjust function signature style format
  net/ice/base: add RSS support for IPv6 prefix
  net/ice/base: use macro for sizeof
  net/ice/base: add debug logs
  net/ice/base: return correct error code
  net/ice/base: remove unnecessary code
  net/ice/base: add support for more PPPoE packet type
  net/ice/base: reset flags when all rules are deleted
  net/ice/base: reset capabilities before parsing
  net/ice/base: add RL profile bit mask check
  net/ice/base: update the vsi handle to remaining VSI
  net/ice/base: correct return value
  net/ice/base: remove unneeded variable
  net/ice/base: fix for memory leak
  net/ice/base: add entries in Profile TCAM with priority
  net/ice/base: remove unimplemented function prototypes
  net/ice/base: add new API to check all autoneg enable bits
  net/ice/base: avoid PPPoE ipv4 overlap
  net/ice/base: initialize AQ failure variable when set fc
  net/ice/base: adjust scheduler default BW weight
  net/ice/base: distribute Tx queues evenly
  net/ice/base: add a new command to LLDP commands
  net/ice/base: remove unused code for VSI list free
  net/ice/base: fix reference count when update VSI list
  net/ice/base: add more tunnel type for IPv4 and IPv6
  net/ice/base: fix uninitialized flag
  net/ice/base: add more device ID support
  net/ice/base: add 1G SGMII PHY type
  net/ice/base: update IPV4 and IPV6 flow ptype masks

 drivers/net/ice/base/ice_acl.c           |  25 +-
 drivers/net/ice/base/ice_acl_ctrl.c      |  26 +-
 drivers/net/ice/base/ice_adminq_cmd.h    |  67 ++--
 drivers/net/ice/base/ice_bitops.h        |  10 +-
 drivers/net/ice/base/ice_common.c        | 309 ++++++++++++----
 drivers/net/ice/base/ice_common.h        |   6 +-
 drivers/net/ice/base/ice_controlq.c      |  48 +--
 drivers/net/ice/base/ice_dcb.c           |   3 +-
 drivers/net/ice/base/ice_devids.h        |  10 +
 drivers/net/ice/base/ice_fdir.c          | 338 ++++++++++++++++--
 drivers/net/ice/base/ice_fdir.h          | 106 +++---
 drivers/net/ice/base/ice_flex_pipe.c     |  92 +++--
 drivers/net/ice/base/ice_flow.c          | 277 +++++++++++----
 drivers/net/ice/base/ice_flow.h          |  44 ++-
 drivers/net/ice/base/ice_hw_autogen.h    |   4 +-
 drivers/net/ice/base/ice_lan_tx_rx.h     |  46 ++-
 drivers/net/ice/base/ice_nvm.c           |  72 +++-
 drivers/net/ice/base/ice_nvm.h           |  10 +
 drivers/net/ice/base/ice_protocol_type.h |  18 +-
 drivers/net/ice/base/ice_sched.c         | 104 ++++--
 drivers/net/ice/base/ice_switch.c        | 589 ++++++++++++++++++++++++++-----
 drivers/net/ice/base/ice_switch.h        |  36 +-
 drivers/net/ice/base/ice_type.h          |  20 +-
 drivers/net/ice/ice_ethdev.c             |   5 +
 drivers/net/ice/ice_fdir_filter.c        |  63 ++--
 drivers/net/ice/ice_hash.c               |  22 +-
 drivers/net/ice/ice_rxtx.c               |   4 +-
 27 files changed, 1817 insertions(+), 537 deletions(-)

-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 01/52] net/ice/base: add support for non-IP Layer2 protocol
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-11 18:38     ` Ferruh Yigit
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 02/52] net/ice/base: add FDIR program status WB macro Qi Zhang
                     ` (52 subsequent siblings)
  53 siblings, 1 reply; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang, Yahui Cao, Paul M . Stillwell Jr

FDIR can forward Ethernet packets with non-IP ethertype.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_fdir.c | 15 +++++++++++++++
 drivers/net/ice/base/ice_fdir.h |  2 ++
 drivers/net/ice/base/ice_flow.c | 29 ++++++++++++++++++++++-------
 drivers/net/ice/base/ice_flow.h |  1 +
 drivers/net/ice/base/ice_type.h |  1 +
 5 files changed, 41 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index 4e9aafc39..c92533223 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -102,6 +102,12 @@ static const u8 ice_fdir_ipv4_gtpu4_pkt[] = {
 	0x00, 0x00,
 };
 
+static const u8 ice_fdir_non_ip_l2_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
 static const u8 ice_fdir_tcpv6_pkt[] = {
 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
@@ -329,6 +335,11 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
 		ice_fdir_ipv4_gtpu4_pkt,
 	},
 	{
+		ICE_FLTR_PTYPE_NON_IP_L2,
+		sizeof(ice_fdir_non_ip_l2_pkt), ice_fdir_non_ip_l2_pkt,
+		sizeof(ice_fdir_non_ip_l2_pkt), ice_fdir_non_ip_l2_pkt,
+	},
+	{
 		ICE_FLTR_PTYPE_NONF_IPV6_TCP,
 		sizeof(ice_fdir_tcpv6_pkt), ice_fdir_tcpv6_pkt,
 		sizeof(ice_fdir_tcp6_tun_pkt), ice_fdir_tcp6_tun_pkt,
@@ -819,6 +830,10 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		ice_pkt_insert_u6_qfi(loc, ICE_IPV4_GTPU_QFI_OFFSET,
 				      input->gtpu_data.qfi);
 		break;
+	case ICE_FLTR_PTYPE_NON_IP_L2:
+		ice_pkt_insert_u16(loc, ICE_MAC_ETHTYPE_OFFSET,
+				   input->ext_data.ether_type);
+		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
 		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
 					 input->ip.v6.dst_ip);
diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
index 18656c55f..97553c8e7 100644
--- a/drivers/net/ice/base/ice_fdir.h
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -79,6 +79,7 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw);
 #define ICE_IPV6_SCTP_SRC_PORT_OFFSET	54
 #define ICE_IPV6_SCTP_DST_PORT_OFFSET	56
 
+#define ICE_MAC_ETHTYPE_OFFSET		12
 #define ICE_IPV4_TOS_OFFSET		15
 #define ICE_IPV4_TTL_OFFSET		22
 #define ICE_IPV6_TC_OFFSET		14
@@ -165,6 +166,7 @@ struct ice_fdir_udp_gtp {
 
 struct ice_fdir_extra {
 	u8 dst_mac[ETH_ALEN];	/* dest MAC address */
+	__be16 ether_type;      /* for NON_IP_L2 */
 	u32 usr_def[2];		/* user data */
 	__be16 vlan_type;	/* VLAN ethertype */
 	__be16 vlan_tag;	/* VLAN tag info */
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index e741f5940..90302a6cb 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -63,7 +63,7 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = {
 	/* ICE_FLOW_FIELD_IDX_C_VLAN */
 	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_VLAN, 14, ICE_FLOW_FLD_SZ_VLAN),
 	/* ICE_FLOW_FIELD_IDX_ETH_TYPE */
-	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_ETH, 12, ICE_FLOW_FLD_SZ_ETH_TYPE),
+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_ETH, 0, ICE_FLOW_FLD_SZ_ETH_TYPE),
 	/* IPv4 / IPv6 */
 	/* ICE_FLOW_FIELD_IDX_IPV4_DSCP */
 	ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_IPV4, 0, ICE_FLOW_FLD_SZ_IP_DSCP,
@@ -532,6 +532,17 @@ static const u32 ice_ptypes_nat_t_esp[] = {
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 };
 
+static const u32 ice_ptypes_mac_non_ip_ofos[] = {
+	0x00000846, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00400000, 0x03FFF000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+};
+
 /* Manage parameters and info. used during the creation of a flow profile */
 struct ice_flow_prof_params {
 	enum ice_block blk;
@@ -683,12 +694,6 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
 				       ICE_FLOW_PTYPE_MAX);
 		}
 
-		if (hdrs & ICE_FLOW_SEG_HDR_PPPOE) {
-			src = (const ice_bitmap_t *)ice_ptypes_pppoe;
-			ice_and_bitmap(params->ptypes, params->ptypes, src,
-				       ICE_FLOW_PTYPE_MAX);
-		}
-
 		if (hdrs & ICE_FLOW_SEG_HDR_IPV4) {
 			src = !i ? (const ice_bitmap_t *)ice_ptypes_ipv4_ofos :
 				(const ice_bitmap_t *)ice_ptypes_ipv4_il;
@@ -731,6 +736,16 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
 			}
 		}
 
+		if (hdrs & ICE_FLOW_SEG_HDR_ETH_NON_IP) {
+			src = (const ice_bitmap_t *)ice_ptypes_mac_non_ip_ofos;
+			ice_and_bitmap(params->ptypes, params->ptypes,
+				       src, ICE_FLOW_PTYPE_MAX);
+		} else if (hdrs & ICE_FLOW_SEG_HDR_PPPOE) {
+			src = (const ice_bitmap_t *)ice_ptypes_pppoe;
+			ice_and_bitmap(params->ptypes, params->ptypes, src,
+				       ICE_FLOW_PTYPE_MAX);
+		}
+
 		if (hdrs & ICE_FLOW_SEG_HDR_ICMP) {
 			src = !i ? (const ice_bitmap_t *)ice_ptypes_icmp_of :
 				(const ice_bitmap_t *)ice_ptypes_icmp_il;
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index c8a0483e3..9fb60a6d2 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -148,6 +148,7 @@ enum ice_flow_seg_hdr {
 	ICE_FLOW_SEG_HDR_ESP		= 0x00100000,
 	ICE_FLOW_SEG_HDR_AH		= 0x00200000,
 	ICE_FLOW_SEG_HDR_NAT_T_ESP	= 0x00400000,
+	ICE_FLOW_SEG_HDR_ETH_NON_IP	= 0x00800000,
 };
 
 /* These segements all have the same PTYPES, but are otherwise distinguished by
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 94ea44265..cf622178e 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -295,6 +295,7 @@ enum ice_fltr_ptype {
 	ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP,
 	ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP,
 	ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER,
+	ICE_FLTR_PTYPE_NON_IP_L2,
 	ICE_FLTR_PTYPE_FRAG_IPV4,
 	ICE_FLTR_PTYPE_NONF_IPV6_UDP,
 	ICE_FLTR_PTYPE_NONF_IPV6_TCP,
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 02/52] net/ice/base: add FDIR program status WB macro
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 01/52] net/ice/base: add support for non-IP Layer2 protocol Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 03/52] net/ice/base: disable profile merge for FDIR Qi Zhang
                     ` (51 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang, Yahui Cao, Paul M . Stillwell Jr

Add descriptor field offset and mask definition. It is used to parse
FDIR rx descriptor field value.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_lan_tx_rx.h | 44 ++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index a0e284a8d..99edcc8ae 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -175,6 +175,50 @@ struct ice_fltr_desc {
 			(0xFFFFFFFFULL << ICE_FXD_FLTR_QW1_FDID_S)
 #define ICE_FXD_FLTR_QW1_FDID_ZERO	0x0ULL
 
+/* definition for FD filter programming status descriptor WB format */
+#define ICE_FXD_FLTR_WB_QW0_BUKT_LEN_S	28
+#define ICE_FXD_FLTR_WB_QW0_BUKT_LEN_M	\
+			(0xFULL << ICE_FXD_FLTR_WB_QW0_BUKT_LEN_S)
+
+#define ICE_FXD_FLTR_WB_QW0_FLTR_STAT_S	32
+#define ICE_FXD_FLTR_WB_QW0_FLTR_STAT_M	\
+			(0xFFFFFFFFULL << ICE_FXD_FLTR_WB_QW0_FLTR_STAT_S)
+
+#define ICE_FXD_FLTR_WB_QW1_DD_S	0
+#define ICE_FXD_FLTR_WB_QW1_DD_M	(0x1ULL << ICE_FXD_FLTR_WB_QW1_DD_S)
+#define ICE_FXD_FLTR_WB_QW1_DD_YES	0x1ULL
+
+#define ICE_FXD_FLTR_WB_QW1_PROG_ID_S	1
+#define ICE_FXD_FLTR_WB_QW1_PROG_ID_M	\
+				(0x3ULL << ICE_FXD_FLTR_WB_QW1_PROG_ID_S)
+#define ICE_FXD_FLTR_WB_QW1_PROG_ADD	0x0ULL
+#define ICE_FXD_FLTR_WB_QW1_PROG_DEL	0x1ULL
+
+#define ICE_FXD_FLTR_WB_QW1_FAIL_S	4
+#define ICE_FXD_FLTR_WB_QW1_FAIL_M	(0x1ULL << ICE_FXD_FLTR_WB_QW1_FAIL_S)
+#define ICE_FXD_FLTR_WB_QW1_FAIL_YES	0x1ULL
+
+#define ICE_FXD_FLTR_WB_QW1_FAIL_PROF_S	5
+#define ICE_FXD_FLTR_WB_QW1_FAIL_PROF_M	\
+				(0x1ULL << ICE_FXD_FLTR_WB_QW1_FAIL_PROF_S)
+#define ICE_FXD_FLTR_WB_QW1_FAIL_PROF_YES	0x1ULL
+
+#define ICE_FXD_FLTR_WB_QW1_FLT_ADDR_S	8
+#define ICE_FXD_FLTR_WB_QW1_FLT_ADDR_M	\
+				(0x3FFFULL << ICE_FXD_FLTR_WB_QW1_FLT_ADDR_S)
+
+#define ICE_FXD_FLTR_WB_QW1_PKT_PROF_S	28
+#define ICE_FXD_FLTR_WB_QW1_PKT_PROF_M	\
+				(0x7FULL << ICE_FXD_FLTR_WB_QW1_PKT_PROF_S)
+
+#define ICE_FXD_FLTR_WB_QW1_BUKT_HASH_S	38
+#define ICE_FXD_FLTR_WB_QW1_BUKT_HASH_M	\
+				(0x3FFFFFF << ICE_FXD_FLTR_WB_QW1_BUKT_HASH_S)
+
+#define ICE_FXD_FLTR_WB_QW1_FAIL_PROF_M	\
+				(0x1ULL << ICE_FXD_FLTR_WB_QW1_FAIL_PROF_S)
+#define ICE_FXD_FLTR_WB_QW1_FAIL_PROF_YES	0x1ULL
+
 enum ice_rx_desc_status_bits {
 	/* Note: These are predefined bit offsets */
 	ICE_RX_DESC_STATUS_DD_S			= 0,
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 03/52] net/ice/base: disable profile merge for FDIR
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 01/52] net/ice/base: add support for non-IP Layer2 protocol Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 02/52] net/ice/base: add FDIR program status WB macro Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 04/52] net/ice/base: avoid undefined behavior Qi Zhang
                     ` (50 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang, Yahui Cao, Paul M . Stillwell Jr

For Flow Director, we don't want to re-use an existed profile with the
same field vector and mask. Merging two different flow_type’s field
vector will also make them sharing trained rule and cause rule
interference.

For example:
issue rule A: IPV4_TCP matching tcp src&dst port 80  to queue 8
issue rule B: IPV6_TCP matching tcp src&dst port 200 to queue 20
Below behavior is found but not expected:
IPV4_TCP pkt with src&dst port 200 hits rule B and goes to queue 20
IPV6_TCP pkt with src&dst port 80  hits rule A and goes to queue 8

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flex_pipe.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 512ced6b8..1f7a05969 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2811,6 +2811,12 @@ ice_find_prof_id_with_mask(struct ice_hw *hw, enum ice_block blk,
 	struct ice_es *es = &hw->blk[blk].es;
 	u8 i;
 
+	/* For FD, we don't want to re-use an existed profile with the same
+	 * field vector and mask. This will cause rule interference.
+	 */
+	if (blk == ICE_BLK_FD)
+		return ICE_ERR_DOES_NOT_EXIST;
+
 	for (i = 0; i < (u8)es->count; i++) {
 		u16 off = i * es->fvw;
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 04/52] net/ice/base: avoid undefined behavior
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (2 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 03/52] net/ice/base: disable profile merge for FDIR Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 05/52] net/ice/base: consolidate implementation of MAC config set Qi Zhang
                     ` (49 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Bruce Allan, Paul M . Stillwell Jr

When writing the driver's struct ice_tlan_ctx structure, do not write the
8-bit element int_q_state with the associated internal-to-hardware field
which is 122-bits, otherwise the helper function ice_write_byte() will use
undefined behavior when setting the mask used for that write.  This should
not cause any functional change and will avoid use of undefined behavior.
Also, update a comment to highlight this structure element is not written.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c    | 17 +++++++++++++----
 drivers/net/ice/base/ice_common.h    |  4 +++-
 drivers/net/ice/base/ice_lan_tx_rx.h |  2 +-
 drivers/net/ice/ice_rxtx.c           |  4 ++--
 4 files changed, 19 insertions(+), 8 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 17ffdee00..4b4555f6f 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -996,7 +996,7 @@ ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
 
 	rlan_ctx->prefena = 1;
 
-	ice_set_ctx((u8 *)rlan_ctx, ctx_buf, ice_rlan_ctx_info);
+	ice_set_ctx(hw, (u8 *)rlan_ctx, ctx_buf, ice_rlan_ctx_info);
 	return ice_copy_rxq_ctx_to_hw(hw, ctx_buf, rxq_index);
 }
 
@@ -1119,7 +1119,7 @@ ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
 {
 	u8 ctx_buf[ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS * sizeof(u32)] = { 0 };
 
-	ice_set_ctx((u8 *)tx_cmpltnq_ctx, ctx_buf, ice_tx_cmpltnq_ctx_info);
+	ice_set_ctx(hw, (u8 *)tx_cmpltnq_ctx, ctx_buf, ice_tx_cmpltnq_ctx_info);
 	return ice_copy_tx_cmpltnq_ctx_to_hw(hw, ctx_buf, tx_cmpltnq_index);
 }
 
@@ -1210,7 +1210,8 @@ ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
 {
 	u8 ctx_buf[ICE_TX_DRBELL_Q_CTX_SIZE_DWORDS * sizeof(u32)] = { 0 };
 
-	ice_set_ctx((u8 *)tx_drbell_q_ctx, ctx_buf, ice_tx_drbell_q_ctx_info);
+	ice_set_ctx(hw, (u8 *)tx_drbell_q_ctx, ctx_buf,
+		    ice_tx_drbell_q_ctx_info);
 	return ice_copy_tx_drbell_q_ctx_to_hw(hw, ctx_buf, tx_drbell_q_index);
 }
 
@@ -3565,12 +3566,14 @@ ice_write_qword(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
 
 /**
  * ice_set_ctx - set context bits in packed structure
+ * @hw: pointer to the hardware structure
  * @src_ctx:  pointer to a generic non-packed context structure
  * @dest_ctx: pointer to memory for the packed structure
  * @ce_info:  a description of the structure to be transformed
  */
 enum ice_status
-ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
+ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,
+	    const struct ice_ctx_ele *ce_info)
 {
 	int f;
 
@@ -3579,6 +3582,12 @@ ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
 		 * using the correct size so that we are correct regardless
 		 * of the endianness of the machine.
 		 */
+		if (ce_info[f].width > (ce_info[f].size_of * BITS_PER_BYTE)) {
+			ice_debug(hw, ICE_DBG_QCTX,
+				  "Field %d width of %d bits larger than size of %d byte(s) ... skipping write\n",
+				  f, ce_info[f].width, ce_info[f].size_of);
+			continue;
+		}
 		switch (ce_info[f].size_of) {
 		case sizeof(u8):
 			ice_write_byte(src_ctx, dest_ctx, &ce_info[f]);
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 2a1077b90..6d971a644 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -114,7 +114,9 @@ enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
 void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode);
 extern const struct ice_ctx_ele ice_tlan_ctx_info[];
 enum ice_status
-ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info);
+ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,
+	    const struct ice_ctx_ele *ce_info);
+
 enum ice_status
 ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc,
 		void *buf, u16 buf_size, struct ice_sq_cd *cd);
diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index 99edcc8ae..012d129df 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -1135,7 +1135,7 @@ struct ice_tlan_ctx {
 	u8 drop_ena;
 	u8 cache_prof_idx;
 	u8 pkt_shaper_prof_idx;
-	u8 int_q_state;	/* width not needed - internal do not write */
+	u8 int_q_state;	/* width not needed - internal - DO NOT WRITE!!! */
 };
 
 /* LAN Tx Completion Queue data */
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index 1c9f31efd..5d6f693c5 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -481,7 +481,7 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
 	tx_ctx.tso_qnum = txq->reg_idx; /* index for tso state structure */
 	tx_ctx.legacy_int = 1; /* Legacy or Advanced Host Interface */
 
-	ice_set_ctx((uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,
+	ice_set_ctx(hw, (uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,
 		    ice_tlan_ctx_info);
 
 	txq->qtx_tail = hw->hw_addr + QTX_COMM_DBELL(txq->reg_idx);
@@ -653,7 +653,7 @@ ice_fdir_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
 	tx_ctx.tso_qnum = txq->reg_idx; /* index for tso state structure */
 	tx_ctx.legacy_int = 1; /* Legacy or Advanced Host Interface */
 
-	ice_set_ctx((uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,
+	ice_set_ctx(hw, (uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,
 		    ice_tlan_ctx_info);
 
 	txq->qtx_tail = hw->hw_addr + QTX_COMM_DBELL(txq->reg_idx);
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 05/52] net/ice/base: consolidate implementation of MAC config set
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (3 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 04/52] net/ice/base: avoid undefined behavior Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 06/52] net/ice/base: report AOC PHY Types as Fiber Qi Zhang
                     ` (48 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Anirudh Venkataramanan, Jeb Cramer,
	Paul M . Stillwell Jr

Consolidate implementation of ice_aq_set_mac_cfg for switch mode
and NIC mode. As per the specification, the driver needs to call
set_mac_cfg (opcode 0x0603) to be able to exercise jumbo frames.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c     | 65 ++++++++++++++++++++++-------------
 drivers/net/ice/base/ice_hw_autogen.h |  4 +--
 2 files changed, 44 insertions(+), 25 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 4b4555f6f..051eb8c64 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -410,6 +410,43 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
 }
 
 /**
+ * ice_fill_tx_timer_and_fc_thresh
+ * @hw: pointer to the HW struct
+ * @cmd: pointer to MAC cfg structure
+ *
+ * Add Tx timer and FC refresh threshold info to Set MAC Config AQ command
+ * descriptor
+ */
+static void
+ice_fill_tx_timer_and_fc_thresh(struct ice_hw *hw,
+				struct ice_aqc_set_mac_cfg *cmd)
+{
+	u16 fc_thres_val, tx_timer_val;
+	u32 val;
+
+	/* We read back the transmit timer and fc threshold value of
+	 * LFC. Thus, we will use index =
+	 * PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX.
+	 *
+	 * Also, because we are opearating on transmit timer and fc
+	 * threshold of LFC, we don't turn on any bit in tx_tmr_priority
+	 */
+#define IDX_OF_LFC PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX
+
+	/* Retrieve the transmit timer */
+	val = rd32(hw, PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA(IDX_OF_LFC));
+	tx_timer_val = val &
+		PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_HSEC_CTL_TX_PAUSE_QUANTA_M;
+	cmd->tx_tmr_value = CPU_TO_LE16(tx_timer_val);
+
+	/* Retrieve the fc threshold */
+	val = rd32(hw, PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(IDX_OF_LFC));
+	fc_thres_val = val & PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_M;
+
+	cmd->fc_refresh_threshold = CPU_TO_LE16(fc_thres_val);
+}
+
+/**
  * ice_aq_set_mac_cfg
  * @hw: pointer to the HW struct
  * @max_frame_size: Maximum Frame Size to be supported
@@ -420,10 +457,8 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
 enum ice_status
 ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd)
 {
-	u16 fc_threshold_val, tx_timer_val;
 	struct ice_aqc_set_mac_cfg *cmd;
 	struct ice_aq_desc desc;
-	u32 reg_val;
 
 	cmd = &desc.params.set_mac_cfg;
 
@@ -434,27 +469,7 @@ ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd)
 
 	cmd->max_frame_size = CPU_TO_LE16(max_frame_size);
 
-	/* We read back the transmit timer and fc threshold value of
-	 * LFC. Thus, we will use index =
-	 * PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX.
-	 *
-	 * Also, because we are opearating on transmit timer and fc
-	 * threshold of LFC, we don't turn on any bit in tx_tmr_priority
-	 */
-#define IDX_OF_LFC PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX
-
-	/* Retrieve the transmit timer */
-	reg_val = rd32(hw,
-		       PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA(IDX_OF_LFC));
-	tx_timer_val = reg_val &
-		PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_HSEC_CTL_TX_PAUSE_QUANTA_M;
-	cmd->tx_tmr_value = CPU_TO_LE16(tx_timer_val);
-
-	/* Retrieve the fc threshold */
-	reg_val = rd32(hw,
-		       PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(IDX_OF_LFC));
-	fc_threshold_val = reg_val & MAKEMASK(0xFFFF, 0);
-	cmd->fc_refresh_threshold = CPU_TO_LE16(fc_threshold_val);
+	ice_fill_tx_timer_and_fc_thresh(hw, cmd);
 
 	return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
 }
@@ -721,6 +736,10 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
 
 	if (status)
 		goto err_unroll_fltr_mgmt_struct;
+	/* enable jumbo frame support at MAC level */
+	status = ice_aq_set_mac_cfg(hw, ICE_AQ_SET_MAC_FRAME_SIZE_MAX, NULL);
+	if (status)
+		goto err_unroll_fltr_mgmt_struct;
 	/* Obtain counter base index which would be used by flow director */
 	status = ice_alloc_fd_res_cntr(hw, &hw->fd_ctr_base);
 	if (status)
diff --git a/drivers/net/ice/base/ice_hw_autogen.h b/drivers/net/ice/base/ice_hw_autogen.h
index 1c9c84dfb..572f481b7 100644
--- a/drivers/net/ice/base/ice_hw_autogen.h
+++ b/drivers/net/ice/base/ice_hw_autogen.h
@@ -5232,8 +5232,8 @@
 #define PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_HSEC_CTL_TX_PAUSE_QUANTA_M MAKEMASK(0xFFFF, 0)
 #define PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(_i) (0x001E3800 + ((_i) * 32)) /* _i=0...8 */ /* Reset Source: GLOBR */
 #define PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_MAX_INDEX 8
-#define PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_S 0
-#define PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_M MAKEMASK(0xFFFF, 0)
+#define PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_S 0
+#define PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_M MAKEMASK(0xFFFF, 0)
 #define PRTMAC_HSEC_CTL_TX_SA_PART1		0x001E3960 /* Reset Source: GLOBR */
 #define PRTMAC_HSEC_CTL_TX_SA_PART1_HSEC_CTL_TX_SA_PART1_S 0
 #define PRTMAC_HSEC_CTL_TX_SA_PART1_HSEC_CTL_TX_SA_PART1_M MAKEMASK(0xFFFFFFFF, 0)
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 06/52] net/ice/base: report AOC PHY Types as Fiber
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (4 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 05/52] net/ice/base: consolidate implementation of MAC config set Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 07/52] net/ice/base: gate devices from FW link override Qi Zhang
                     ` (47 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Doug Dziggel, Paul M . Stillwell Jr

Report AOC types as fiber instead of unknown

Signed-off-by: Doug Dziggel <douglas.a.dziggel@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 051eb8c64..38ffd5203 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -256,6 +256,15 @@ static enum ice_media_type ice_get_media_type(struct ice_port_info *pi)
 		case ICE_PHY_TYPE_LOW_100GBASE_SR2:
 		case ICE_PHY_TYPE_LOW_100GBASE_DR:
 			return ICE_MEDIA_FIBER;
+		case ICE_PHY_TYPE_LOW_10G_SFI_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_25G_AUI_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_40G_XLAUI_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_50G_LAUI2_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_50G_AUI2_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_50G_AUI1_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_100G_CAUI4_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_100G_AUI4_AOC_ACC:
+			return ICE_MEDIA_FIBER;
 		case ICE_PHY_TYPE_LOW_100BASE_TX:
 		case ICE_PHY_TYPE_LOW_1000BASE_T:
 		case ICE_PHY_TYPE_LOW_2500BASE_T:
@@ -307,6 +316,9 @@ static enum ice_media_type ice_get_media_type(struct ice_port_info *pi)
 			/* fall-through */
 		case ICE_PHY_TYPE_HIGH_100GBASE_KR2_PAM4:
 			return ICE_MEDIA_BACKPLANE;
+		case ICE_PHY_TYPE_HIGH_100G_CAUI2_AOC_ACC:
+		case ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC:
+			return ICE_MEDIA_FIBER;
 		}
 	}
 	return ICE_MEDIA_UNKNOWN;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 07/52] net/ice/base: gate devices from FW link override
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (5 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 06/52] net/ice/base: report AOC PHY Types as Fiber Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 08/52] net/ice/base: improve VSI filters rebuild Qi Zhang
                     ` (46 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang, Jeb Cramer, Paul M . Stillwell Jr

Currently, the FW link override feature is only permitted for E810
devices.  However, the ice_fw_supports_link_override() guards against FW
versions irrespective of the device. This assumes FW versions between
the families are aligned, which is not the case.

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 38ffd5203..499653c21 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -4357,6 +4357,10 @@ enum ice_fw_modes ice_get_fw_mode(struct ice_hw *hw)
  */
 bool ice_fw_supports_link_override(struct ice_hw *hw)
 {
+	/* Currently, only supported for E810 devices */
+	if (hw->mac_type != ICE_MAC_E810)
+		return false;
+
 	if (hw->api_maj_ver == ICE_FW_API_LINK_OVERRIDE_MAJ) {
 		if (hw->api_min_ver > ICE_FW_API_LINK_OVERRIDE_MIN)
 			return true;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 08/52] net/ice/base: improve VSI filters rebuild
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (6 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 07/52] net/ice/base: gate devices from FW link override Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 09/52] net/ice/base: add AUI media type Qi Zhang
                     ` (45 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Grzegorz Nitka, Paul M . Stillwell Jr

This change improve VSI filter configuration rebuild for
multiport configuration, ie. where 1 PF includes more than
one logical port. For some functions, association between
port and corresponding switch_info or port_info structure
has been lost because by default the pointer to the first
element of array (switch, port etc.) is passed as function
argument. With this change, pointer to proper element is
added an extra argument in relevant functions.

Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 59 +++++++++++++++++++++++++++++++--------
 drivers/net/ice/base/ice_switch.c | 38 ++++++++++++++++++-------
 drivers/net/ice/base/ice_switch.h |  5 +++-
 3 files changed, 79 insertions(+), 23 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 499653c21..aab560504 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -493,6 +493,7 @@ ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd)
 enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
 {
 	struct ice_switch_info *sw;
+	enum ice_status status;
 
 	hw->switch_info = (struct ice_switch_info *)
 			  ice_malloc(hw, sizeof(*hw->switch_info));
@@ -504,27 +505,36 @@ enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
 
 	INIT_LIST_HEAD(&sw->vsi_list_map_head);
 
-	return ice_init_def_sw_recp(hw, &hw->switch_info->recp_list);
+	status = ice_init_def_sw_recp(hw, &hw->switch_info->recp_list);
+	if (status) {
+		ice_free(hw, hw->switch_info);
+		return status;
+	}
+	return ICE_SUCCESS;
 }
 
 /**
- * ice_cleanup_fltr_mgmt_struct - cleanup filter management list and locks
+ * ice_cleanup_fltr_mgmt_single - clears single filter mngt struct
  * @hw: pointer to the HW struct
+ * @sw: pointer to switch info struct for which function clears filters
  */
-void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
+static void
+ice_cleanup_fltr_mgmt_single(struct ice_hw *hw, struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	struct ice_vsi_list_map_info *v_pos_map;
 	struct ice_vsi_list_map_info *v_tmp_map;
 	struct ice_sw_recipe *recps;
 	u8 i;
 
+	if (!sw)
+		return;
+
 	LIST_FOR_EACH_ENTRY_SAFE(v_pos_map, v_tmp_map, &sw->vsi_list_map_head,
 				 ice_vsi_list_map_info, list_entry) {
 		LIST_DEL(&v_pos_map->list_entry);
 		ice_free(hw, v_pos_map);
 	}
-	recps = hw->switch_info->recp_list;
+	recps = sw->recp_list;
 	for (i = 0; i < ICE_MAX_NUM_RECIPES; i++) {
 		struct ice_recp_grp_entry *rg_entry, *tmprg_entry;
 
@@ -564,12 +574,21 @@ void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
 		if (recps[i].root_buf)
 			ice_free(hw, recps[i].root_buf);
 	}
-	ice_rm_all_sw_replay_rule_info(hw);
+	ice_rm_sw_replay_rule_info(hw, sw);
 	ice_free(hw, sw->recp_list);
 	ice_free(hw, sw);
 }
 
 /**
+ * ice_cleanup_all_fltr_mgmt - cleanup filter management list and locks
+ * @hw: pointer to the HW struct
+ */
+void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
+{
+	ice_cleanup_fltr_mgmt_single(hw, hw->switch_info);
+}
+
+/**
  * ice_get_itr_intrl_gran
  * @hw: pointer to the HW struct
  *
@@ -4104,18 +4123,32 @@ ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
 }
 
 /**
+ * ice_is_main_vsi - checks whether the VSI is main VSI
+ * @hw: pointer to the HW struct
+ * @vsi_handle: VSI handle
+ *
+ * Checks whether the VSI is the main VSI (the first PF VSI created on
+ * given PF).
+ */
+static bool ice_is_main_vsi(struct ice_hw *hw, u16 vsi_handle)
+{
+	return vsi_handle == ICE_MAIN_VSI_HANDLE && hw->vsi_ctx[vsi_handle];
+}
+
+/**
  * ice_replay_pre_init - replay pre initialization
  * @hw: pointer to the HW struct
+ * @sw: pointer to switch info struct for which function initializes filters
  *
  * Initializes required config data for VSI, FD, ACL, and RSS before replay.
  */
-static enum ice_status ice_replay_pre_init(struct ice_hw *hw)
+static enum ice_status
+ice_replay_pre_init(struct ice_hw *hw, struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	u8 i;
 
 	/* Delete old entries from replay filter list head if there is any */
-	ice_rm_all_sw_replay_rule_info(hw);
+	ice_rm_sw_replay_rule_info(hw, sw);
 	/* In start of replay, move entries into replay_rules list, it
 	 * will allow adding rules entries back to filt_rules list,
 	 * which is operational list.
@@ -4138,14 +4171,16 @@ static enum ice_status ice_replay_pre_init(struct ice_hw *hw)
  */
 enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle)
 {
+	struct ice_switch_info *sw = hw->switch_info;
+	struct ice_port_info *pi = hw->port_info;
 	enum ice_status status;
 
 	if (!ice_is_vsi_valid(hw, vsi_handle))
 		return ICE_ERR_PARAM;
 
 	/* Replay pre-initialization if there is any */
-	if (vsi_handle == ICE_MAIN_VSI_HANDLE) {
-		status = ice_replay_pre_init(hw);
+	if (ice_is_main_vsi(hw, vsi_handle)) {
+		status = ice_replay_pre_init(hw, sw);
 		if (status)
 			return status;
 	}
@@ -4154,7 +4189,7 @@ enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle)
 	if (status)
 		return status;
 	/* Replay per VSI all filters */
-	status = ice_replay_vsi_all_fltr(hw, vsi_handle);
+	status = ice_replay_vsi_all_fltr(hw, pi, vsi_handle);
 	if (!status)
 		status = ice_replay_vsi_agg(hw, vsi_handle);
 	return status;
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 5b968b7ce..910fb5236 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -7460,6 +7460,8 @@ enum ice_status ice_replay_all_fltr(struct ice_hw *hw)
 /**
  * ice_replay_vsi_fltr - Replay filters for requested VSI
  * @hw: pointer to the hardware structure
+ * @pi: pointer to port information structure
+ * @sw: pointer to switch info struct for which function replays filters
  * @vsi_handle: driver VSI handle
  * @recp_id: Recipe ID for which rules need to be replayed
  * @list_head: list for which filters need to be replayed
@@ -7468,7 +7470,8 @@ enum ice_status ice_replay_all_fltr(struct ice_hw *hw)
  * It is required to pass valid VSI handle.
  */
 static enum ice_status
-ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
+ice_replay_vsi_fltr(struct ice_hw *hw, struct ice_port_info *pi,
+		    struct ice_switch_info *sw, u16 vsi_handle, u8 recp_id,
 		    struct LIST_HEAD_TYPE *list_head)
 {
 	struct ice_fltr_mgmt_list_entry *itr;
@@ -7478,7 +7481,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
 
 	if (LIST_EMPTY(list_head))
 		return status;
-	recp_list = &hw->switch_info->recp_list[recp_id];
+	recp_list = &sw->recp_list[recp_id];
 	hw_vsi_id = ice_get_hw_vsi_num(hw, vsi_handle);
 
 	LIST_FOR_EACH_ENTRY(itr, list_head, ice_fltr_mgmt_list_entry,
@@ -7492,7 +7495,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
 			if (f_entry.fltr_info.src_id == ICE_SRC_ID_VSI)
 				f_entry.fltr_info.src = hw_vsi_id;
 			status = ice_add_rule_internal(hw, recp_list,
-						       hw->port_info->lport,
+						       pi->lport,
 						       &f_entry);
 			if (status != ICE_SUCCESS)
 				goto end;
@@ -7512,7 +7515,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
 			status = ice_add_vlan_internal(hw, recp_list, &f_entry);
 		else
 			status = ice_add_rule_internal(hw, recp_list,
-						       hw->port_info->lport,
+						       pi->lport,
 						       &f_entry);
 		if (status != ICE_SUCCESS)
 			goto end;
@@ -7557,11 +7560,14 @@ ice_replay_vsi_adv_rule(struct ice_hw *hw, u16 vsi_handle,
 /**
  * ice_replay_vsi_all_fltr - replay all filters stored in bookkeeping lists
  * @hw: pointer to the hardware structure
+ * @pi: pointer to port information structure
  * @vsi_handle: driver VSI handle
  *
  * Replays filters for requested VSI via vsi_handle.
  */
-enum ice_status ice_replay_vsi_all_fltr(struct ice_hw *hw, u16 vsi_handle)
+enum ice_status
+ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi,
+			u16 vsi_handle)
 {
 	struct ice_switch_info *sw = hw->switch_info;
 	enum ice_status status;
@@ -7573,7 +7579,8 @@ enum ice_status ice_replay_vsi_all_fltr(struct ice_hw *hw, u16 vsi_handle)
 
 		head = &sw->recp_list[i].filt_replay_rules;
 		if (!sw->recp_list[i].adv_rule)
-			status = ice_replay_vsi_fltr(hw, vsi_handle, i, head);
+			status = ice_replay_vsi_fltr(hw, pi, sw, vsi_handle, i,
+						     head);
 		else
 			status = ice_replay_vsi_adv_rule(hw, vsi_handle, head);
 		if (status != ICE_SUCCESS)
@@ -7584,14 +7591,14 @@ enum ice_status ice_replay_vsi_all_fltr(struct ice_hw *hw, u16 vsi_handle)
 }
 
 /**
- * ice_rm_all_sw_replay_rule_info - deletes filter replay rules
+ * ice_rm_all_sw_replay_rule - helper function to delete filter replay rules
  * @hw: pointer to the HW struct
+ * @sw: pointer to switch info struct for which function removes filters
  *
- * Deletes the filter replay rules.
+ * Deletes the filter replay rules for given switch
  */
-void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw)
+void ice_rm_sw_replay_rule_info(struct ice_hw *hw, struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	u8 i;
 
 	if (!sw)
@@ -7609,3 +7616,14 @@ void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw)
 		}
 	}
 }
+
+/**
+ * ice_rm_all_sw_replay_rule_info - deletes filter replay rules
+ * @hw: pointer to the HW struct
+ *
+ * Deletes the filter replay rules.
+ */
+void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw)
+{
+	ice_rm_sw_replay_rule_info(hw, hw->switch_info);
+}
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 6bd50518f..ba7c56f44 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -485,7 +485,10 @@ ice_init_def_sw_recp(struct ice_hw *hw, struct ice_sw_recipe **recp_list);
 u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle);
 bool ice_is_vsi_valid(struct ice_hw *hw, u16 vsi_handle);
 
-enum ice_status ice_replay_vsi_all_fltr(struct ice_hw *hw, u16 vsi_handle);
+enum ice_status
+ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi,
+			u16 vsi_handle);
+void ice_rm_sw_replay_rule_info(struct ice_hw *hw, struct ice_switch_info *sw);
 void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw);
 bool ice_is_prof_rule(enum ice_sw_tunnel_type type);
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 09/52] net/ice/base: add AUI media type
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (7 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 08/52] net/ice/base: improve VSI filters rebuild Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 10/52] net/ice/base: fix variable type for ACL Qi Zhang
                     ` (44 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Doug Dziggel, Paul M . Stillwell Jr

Add and report AUI PHY types as an AUI media type

Signed-off-by: Doug Dziggel <douglas.a.dziggel@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 5 +++--
 drivers/net/ice/base/ice_type.h   | 1 +
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index aab560504..e266ba56c 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -291,7 +291,7 @@ static enum ice_media_type ice_get_media_type(struct ice_port_info *pi)
 		case ICE_PHY_TYPE_LOW_100G_AUI4:
 		case ICE_PHY_TYPE_LOW_100G_CAUI4:
 			if (ice_is_media_cage_present(pi))
-				return ICE_MEDIA_DA;
+				return ICE_MEDIA_AUI;
 			/* fall-through */
 		case ICE_PHY_TYPE_LOW_1000BASE_KX:
 		case ICE_PHY_TYPE_LOW_2500BASE_KX:
@@ -311,8 +311,9 @@ static enum ice_media_type ice_get_media_type(struct ice_port_info *pi)
 	} else {
 		switch (hw_link_info->phy_type_high) {
 		case ICE_PHY_TYPE_HIGH_100G_AUI2:
+		case ICE_PHY_TYPE_HIGH_100G_CAUI2:
 			if (ice_is_media_cage_present(pi))
-				return ICE_MEDIA_DA;
+				return ICE_MEDIA_AUI;
 			/* fall-through */
 		case ICE_PHY_TYPE_HIGH_100GBASE_KR2_PAM4:
 			return ICE_MEDIA_BACKPLANE;
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index cf622178e..3280d48d0 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -218,6 +218,7 @@ enum ice_media_type {
 	ICE_MEDIA_BASET,
 	ICE_MEDIA_BACKPLANE,
 	ICE_MEDIA_DA,
+	ICE_MEDIA_AUI,
 };
 
 /* Software VSI types. */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 10/52] net/ice/base: fix variable type for ACL
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (8 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 09/52] net/ice/base: add AUI media type Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-11 18:35     ` Ferruh Yigit
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 11/52] net/ice/base: update PHY type high max index value Qi Zhang
                     ` (43 subsequent siblings)
  53 siblings, 1 reply; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang, stable, Paul M Stillwell Jr

The commit ef92cee94cdb ("ice-shared: Fix remaining minor casting
issues") changed the idx variable within ice_acl_add_entry() from
a u16 to a u8. This causes the code to truncate the values greater
than 255 to 255 or less when calling ice_aq_program_acl_entry()
resulting in the wrong TCAM index being programmed for the specified
rule. The result is that the rule action doesn't work correctly
(packets don't get routed to the correct queue or dropped if that
is the action). Fix the issue by changing the variable to be a u16
again.

Fixes: f3202a097f12 ("net/ice/base: add ACL module")
Cc: stable@dpdk.org

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_acl_ctrl.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_acl_ctrl.c b/drivers/net/ice/base/ice_acl_ctrl.c
index e67605141..39b399dd4 100644
--- a/drivers/net/ice/base/ice_acl_ctrl.c
+++ b/drivers/net/ice/base/ice_acl_ctrl.c
@@ -934,9 +934,10 @@ ice_acl_add_entry(struct ice_hw *hw, struct ice_acl_scen *scen,
 		  enum ice_acl_entry_prior prior, u8 *keys, u8 *inverts,
 		  struct ice_acl_act_entry *acts, u8 acts_cnt, u16 *entry_idx)
 {
-	u8 i, entry_tcam, num_cscd, idx, offset;
+	u8 i, entry_tcam, num_cscd, offset;
 	struct ice_aqc_acl_data buf;
 	enum ice_status status = ICE_SUCCESS;
+	u16 idx;
 
 	if (!scen)
 		return ICE_ERR_DOES_NOT_EXIST;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 11/52] net/ice/base: update PHY type high max index value
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (9 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 10/52] net/ice/base: fix variable type for ACL Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 12/52] net/ice/base: consolidate VF Promiscuous mode Qi Zhang
                     ` (42 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Chinh T Cao, Paul M . Stillwell Jr

As currently, we are supporting only 5 PHY_SPEEDs for phy_type_high.
Thus, we should adjust the value of ICE_PHY_TYPE_HIGH_MAX_INDEX to 5.

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_adminq_cmd.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 57a785508..a5d689dc8 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1331,7 +1331,7 @@ struct ice_aqc_get_phy_caps {
 #define ICE_PHY_TYPE_HIGH_100G_CAUI2		BIT_ULL(2)
 #define ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC	BIT_ULL(3)
 #define ICE_PHY_TYPE_HIGH_100G_AUI2		BIT_ULL(4)
-#define ICE_PHY_TYPE_HIGH_MAX_INDEX		19
+#define ICE_PHY_TYPE_HIGH_MAX_INDEX		5
 
 struct ice_aqc_get_phy_caps_data {
 	__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 12/52] net/ice/base: consolidate VF Promiscuous mode
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (10 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 11/52] net/ice/base: update PHY type high max index value Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 13/52] net/ice/base: refactor flow director filter swap Qi Zhang
                     ` (41 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Shibin Koikkara Reeny, Paul M . Stillwell Jr

Consolidate the Promiscuous rule for SMBM on the chosen logical port.

Signed-off-by: Shibin Koikkara Reeny <shibin.koikkara.reeny@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 145 ++++++++++++++++++++++++++++++--------
 1 file changed, 115 insertions(+), 30 deletions(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 910fb5236..f5dd86bf4 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -4354,17 +4354,17 @@ static u8 ice_determine_promisc_mask(struct ice_fltr_info *fi)
 }
 
 /**
- * ice_get_vsi_promisc - get promiscuous mode of given VSI
+ * _ice_get_vsi_promisc - get promiscuous mode of given VSI
  * @hw: pointer to the hardware structure
  * @vsi_handle: VSI handle to retrieve info from
  * @promisc_mask: pointer to mask to be filled in
  * @vid: VLAN ID of promisc VLAN VSI
+ * @sw: pointer to switch info struct for which function add rule
  */
-enum ice_status
-ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
-		    u16 *vid)
+static enum ice_status
+_ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+		     u16 *vid, struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	struct ice_fltr_mgmt_list_entry *itr;
 	struct LIST_HEAD_TYPE *rule_head;
 	struct ice_lock *rule_lock;	/* Lock to protect filter rule list */
@@ -4394,17 +4394,32 @@ ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
 }
 
 /**
- * ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI
+ * ice_get_vsi_promisc - get promiscuous mode of given VSI
  * @hw: pointer to the hardware structure
  * @vsi_handle: VSI handle to retrieve info from
  * @promisc_mask: pointer to mask to be filled in
  * @vid: VLAN ID of promisc VLAN VSI
  */
 enum ice_status
-ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
-			 u16 *vid)
+ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+		    u16 *vid)
+{
+	return _ice_get_vsi_promisc(hw, vsi_handle, promisc_mask,
+				    vid, hw->switch_info);
+}
+
+/**
+ * ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to retrieve info from
+ * @promisc_mask: pointer to mask to be filled in
+ * @vid: VLAN ID of promisc VLAN VSI
+ * @sw: pointer to switch info struct for which function add rule
+ */
+static enum ice_status
+_ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+			  u16 *vid, struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	struct ice_fltr_mgmt_list_entry *itr;
 	struct LIST_HEAD_TYPE *rule_head;
 	struct ice_lock *rule_lock;	/* Lock to protect filter rule list */
@@ -4434,6 +4449,21 @@ ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
 }
 
 /**
+ * ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to retrieve info from
+ * @promisc_mask: pointer to mask to be filled in
+ * @vid: VLAN ID of promisc VLAN VSI
+ */
+enum ice_status
+ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+			 u16 *vid)
+{
+	return _ice_get_vsi_vlan_promisc(hw, vsi_handle, promisc_mask,
+					 vid, hw->switch_info);
+}
+
+/**
  * ice_remove_promisc - Remove promisc based filter rules
  * @hw: pointer to the hardware structure
  * @recp_id: recipe ID for which the rule needs to removed
@@ -4458,17 +4488,17 @@ ice_remove_promisc(struct ice_hw *hw, u8 recp_id,
 }
 
 /**
- * ice_clear_vsi_promisc - clear specified promiscuous mode(s) for given VSI
+ * _ice_clear_vsi_promisc - clear specified promiscuous mode(s)
  * @hw: pointer to the hardware structure
  * @vsi_handle: VSI handle to clear mode
  * @promisc_mask: mask of promiscuous config bits to clear
  * @vid: VLAN ID to clear VLAN promiscuous
+ * @sw: pointer to switch info struct for which function add rule
  */
-enum ice_status
-ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
-		      u16 vid)
+static enum ice_status
+_ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
+		       u16 vid, struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	struct ice_fltr_list_entry *fm_entry, *tmp;
 	struct LIST_HEAD_TYPE remove_list_head;
 	struct ice_fltr_mgmt_list_entry *itr;
@@ -4533,14 +4563,32 @@ ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
 }
 
 /**
- * ice_set_vsi_promisc - set given VSI to given promiscuous mode(s)
+ * ice_clear_vsi_promisc - clear specified promiscuous mode(s) for given VSI
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to clear mode
+ * @promisc_mask: mask of promiscuous config bits to clear
+ * @vid: VLAN ID to clear VLAN promiscuous
+ */
+enum ice_status
+ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,
+		      u8 promisc_mask, u16 vid)
+{
+	return _ice_clear_vsi_promisc(hw, vsi_handle, promisc_mask,
+				      vid, hw->switch_info);
+}
+
+/**
+ * _ice_set_vsi_promisc - set given VSI to given promiscuous mode(s)
  * @hw: pointer to the hardware structure
  * @vsi_handle: VSI handle to configure
  * @promisc_mask: mask of promiscuous config bits
  * @vid: VLAN ID to set VLAN promiscuous
+ * @lport: logical port number to configure promisc mode
+ * @sw: pointer to switch info struct for which function add rule
  */
-enum ice_status
-ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask, u16 vid)
+static enum ice_status
+_ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
+		     u16 vid, u8 lport, struct ice_switch_info *sw)
 {
 	enum { UCAST_FLTR = 1, MCAST_FLTR, BCAST_FLTR };
 	struct ice_fltr_list_entry f_list_entry;
@@ -4631,17 +4679,16 @@ ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask, u16 vid)
 			new_fltr.src = hw_vsi_id;
 		} else {
 			new_fltr.flag |= ICE_FLTR_RX;
-			new_fltr.src = hw->port_info->lport;
+			new_fltr.src = lport;
 		}
 
 		new_fltr.fltr_act = ICE_FWD_TO_VSI;
 		new_fltr.vsi_handle = vsi_handle;
 		new_fltr.fwd_id.hw_vsi_id = hw_vsi_id;
 		f_list_entry.fltr_info = new_fltr;
-		recp_list = &hw->switch_info->recp_list[recipe_id];
+		recp_list = &sw->recp_list[recipe_id];
 
-		status = ice_add_rule_internal(hw, recp_list,
-					       hw->port_info->lport,
+		status = ice_add_rule_internal(hw, recp_list, lport,
 					       &f_list_entry);
 		if (status != ICE_SUCCESS)
 			goto set_promisc_exit;
@@ -4652,19 +4699,37 @@ ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask, u16 vid)
 }
 
 /**
- * ice_set_vlan_vsi_promisc
+ * ice_set_vsi_promisc - set given VSI to given promiscuous mode(s)
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to configure
+ * @promisc_mask: mask of promiscuous config bits
+ * @vid: VLAN ID to set VLAN promiscuous
+ */
+enum ice_status
+ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
+		    u16 vid)
+{
+	return _ice_set_vsi_promisc(hw, vsi_handle, promisc_mask, vid,
+				    hw->port_info->lport,
+				    hw->switch_info);
+}
+
+/**
+ * _ice_set_vlan_vsi_promisc
  * @hw: pointer to the hardware structure
  * @vsi_handle: VSI handle to configure
  * @promisc_mask: mask of promiscuous config bits
  * @rm_vlan_promisc: Clear VLANs VSI promisc mode
+ * @lport: logical port number to configure promisc mode
+ * @sw: pointer to switch info struct for which function add rule
  *
  * Configure VSI with all associated VLANs to given promiscuous mode(s)
  */
-enum ice_status
-ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
-			 bool rm_vlan_promisc)
+static enum ice_status
+_ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
+			  bool rm_vlan_promisc, u8 lport,
+			  struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	struct ice_fltr_list_entry *list_itr, *tmp;
 	struct LIST_HEAD_TYPE vsi_list_head;
 	struct LIST_HEAD_TYPE *vlan_head;
@@ -4686,11 +4751,13 @@ ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
 			    list_entry) {
 		vlan_id = list_itr->fltr_info.l_data.vlan.vlan_id;
 		if (rm_vlan_promisc)
-			status = ice_clear_vsi_promisc(hw, vsi_handle,
-						       promisc_mask, vlan_id);
+			status =  _ice_clear_vsi_promisc(hw, vsi_handle,
+							 promisc_mask,
+							 vlan_id, sw);
 		else
-			status = ice_set_vsi_promisc(hw, vsi_handle,
-						     promisc_mask, vlan_id);
+			status =  _ice_set_vsi_promisc(hw, vsi_handle,
+						       promisc_mask, vlan_id,
+						       lport, sw);
 		if (status)
 			break;
 	}
@@ -4705,6 +4772,24 @@ ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
 }
 
 /**
+ * ice_set_vlan_vsi_promisc
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to configure
+ * @promisc_mask: mask of promiscuous config bits
+ * @rm_vlan_promisc: Clear VLANs VSI promisc mode
+ *
+ * Configure VSI with all associated VLANs to given promiscuous mode(s)
+ */
+enum ice_status
+ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
+			 bool rm_vlan_promisc)
+{
+	return _ice_set_vlan_vsi_promisc(hw, vsi_handle, promisc_mask,
+					 rm_vlan_promisc, hw->port_info->lport,
+					 hw->switch_info);
+}
+
+/**
  * ice_remove_vsi_lkup_fltr - Remove lookup type filters for a VSI
  * @hw: pointer to the hardware structure
  * @vsi_handle: VSI handle to remove filters from
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 13/52] net/ice/base: refactor flow director filter swap
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (11 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 12/52] net/ice/base: consolidate VF Promiscuous mode Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 14/52] net/ice/base: change IPV6 training packet Qi Zhang
                     ` (40 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Henry Tieman, Paul M . Stillwell Jr

Move the swap of flow director addresses and ports into training packet
generation. This reduces the code written for ACL.

Signed-off-by: Henry Tieman <henry.w.tieman@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_fdir.c   | 59 ++++++++++++++++++++-------------------
 drivers/net/ice/ice_fdir_filter.c | 32 ++++++++++-----------
 2 files changed, 47 insertions(+), 44 deletions(-)

diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index c92533223..2257eba60 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -764,16 +764,19 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		loc = &pkt[ICE_FDIR_TUN_PKT_OFF];
 	}
 
+	/* Reverse the src and dst, since the HW expects them to be from Tx
+	 * perspective. The input from user is from Rx filter perspective.
+	 */
 	switch (flow) {
 	case ICE_FLTR_PTYPE_NONF_IPV4_TCP:
 		ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET,
-				   input->ip.v4.dst_ip);
+				   input->ip.v4.src_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV4_TCP_DST_PORT_OFFSET,
-				   input->ip.v4.dst_port);
+				   input->ip.v4.src_port);
 		ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
-				   input->ip.v4.src_ip);
+				   input->ip.v4.dst_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV4_TCP_SRC_PORT_OFFSET,
-				   input->ip.v4.src_port);
+				   input->ip.v4.dst_port);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl);
 		ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac);
@@ -782,35 +785,35 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV4_UDP:
 		ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET,
-				   input->ip.v4.dst_ip);
+				   input->ip.v4.src_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV4_UDP_DST_PORT_OFFSET,
-				   input->ip.v4.dst_port);
+				   input->ip.v4.src_port);
 		ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
-				   input->ip.v4.src_ip);
+				   input->ip.v4.dst_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV4_UDP_SRC_PORT_OFFSET,
-				   input->ip.v4.src_port);
+				   input->ip.v4.dst_port);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl);
 		ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV4_SCTP:
 		ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET,
-				   input->ip.v4.dst_ip);
+				   input->ip.v4.src_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_DST_PORT_OFFSET,
-				   input->ip.v4.dst_port);
+				   input->ip.v4.src_port);
 		ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
-				   input->ip.v4.src_ip);
+				   input->ip.v4.dst_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_SRC_PORT_OFFSET,
-				   input->ip.v4.src_port);
+				   input->ip.v4.dst_port);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl);
 		ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV4_OTHER:
 		ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET,
-				   input->ip.v4.dst_ip);
-		ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
 				   input->ip.v4.src_ip);
+		ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
+				   input->ip.v4.dst_ip);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl);
 		ice_pkt_insert_u8(loc, ICE_IPV4_PROTO_OFFSET,
@@ -836,48 +839,48 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
 		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
-					 input->ip.v6.dst_ip);
-		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
 					 input->ip.v6.src_ip);
+		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
+					 input->ip.v6.dst_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV6_TCP_DST_PORT_OFFSET,
-				   input->ip.v6.dst_port);
-		ice_pkt_insert_u16(loc, ICE_IPV6_TCP_SRC_PORT_OFFSET,
 				   input->ip.v6.src_port);
+		ice_pkt_insert_u16(loc, ICE_IPV6_TCP_SRC_PORT_OFFSET,
+				   input->ip.v6.dst_port);
 		ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc);
 		ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim);
 		ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_UDP:
 		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
-					 input->ip.v6.dst_ip);
-		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
 					 input->ip.v6.src_ip);
+		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
+					 input->ip.v6.dst_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV6_UDP_DST_PORT_OFFSET,
-				   input->ip.v6.dst_port);
-		ice_pkt_insert_u16(loc, ICE_IPV6_UDP_SRC_PORT_OFFSET,
 				   input->ip.v6.src_port);
+		ice_pkt_insert_u16(loc, ICE_IPV6_UDP_SRC_PORT_OFFSET,
+				   input->ip.v6.dst_port);
 		ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc);
 		ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim);
 		ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_SCTP:
 		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
-					 input->ip.v6.dst_ip);
-		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
 					 input->ip.v6.src_ip);
+		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
+					 input->ip.v6.dst_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_DST_PORT_OFFSET,
-				   input->ip.v6.dst_port);
-		ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_SRC_PORT_OFFSET,
 				   input->ip.v6.src_port);
+		ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_SRC_PORT_OFFSET,
+				   input->ip.v6.dst_port);
 		ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc);
 		ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim);
 		ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_OTHER:
 		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
-					 input->ip.v6.dst_ip);
-		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
 					 input->ip.v6.src_ip);
+		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
+					 input->ip.v6.dst_ip);
 		ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc);
 		ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim);
 		ice_pkt_insert_u8(loc, ICE_IPV6_PROTO_OFFSET,
diff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c
index 69c714c59..19fa41afc 100644
--- a/drivers/net/ice/ice_fdir_filter.c
+++ b/drivers/net/ice/ice_fdir_filter.c
@@ -1676,9 +1676,9 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
 					input_set |= ICE_INSET_IPV4_PROTO;
 
 				filter->input.ip.v4.dst_ip =
-					ipv4_spec->hdr.src_addr;
-				filter->input.ip.v4.src_ip =
 					ipv4_spec->hdr.dst_addr;
+				filter->input.ip.v4.src_ip =
+					ipv4_spec->hdr.src_addr;
 				filter->input.ip.v4.tos =
 					ipv4_spec->hdr.type_of_service;
 				filter->input.ip.v4.ttl =
@@ -1723,9 +1723,9 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
 					input_set |= ICE_INSET_IPV6_HOP_LIMIT;
 
 				rte_memcpy(filter->input.ip.v6.dst_ip,
-					   ipv6_spec->hdr.src_addr, 16);
-				rte_memcpy(filter->input.ip.v6.src_ip,
 					   ipv6_spec->hdr.dst_addr, 16);
+				rte_memcpy(filter->input.ip.v6.src_ip,
+					   ipv6_spec->hdr.src_addr, 16);
 
 				vtc_flow_cpu =
 				      rte_be_to_cpu_32(ipv6_spec->hdr.vtc_flow);
@@ -1777,14 +1777,14 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
 				/* Get filter info */
 				if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
 					filter->input.ip.v4.dst_port =
-						tcp_spec->hdr.src_port;
-					filter->input.ip.v4.src_port =
 						tcp_spec->hdr.dst_port;
+					filter->input.ip.v4.src_port =
+						tcp_spec->hdr.src_port;
 				} else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
 					filter->input.ip.v6.dst_port =
-						tcp_spec->hdr.src_port;
-					filter->input.ip.v6.src_port =
 						tcp_spec->hdr.dst_port;
+					filter->input.ip.v6.src_port =
+						tcp_spec->hdr.src_port;
 				}
 			}
 			break;
@@ -1820,14 +1820,14 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
 				/* Get filter info */
 				if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
 					filter->input.ip.v4.dst_port =
-						udp_spec->hdr.src_port;
-					filter->input.ip.v4.src_port =
 						udp_spec->hdr.dst_port;
+					filter->input.ip.v4.src_port =
+						udp_spec->hdr.src_port;
 				} else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
 					filter->input.ip.v6.src_port =
-						udp_spec->hdr.dst_port;
-					filter->input.ip.v6.dst_port =
 						udp_spec->hdr.src_port;
+					filter->input.ip.v6.dst_port =
+						udp_spec->hdr.dst_port;
 				}
 			}
 			break;
@@ -1862,14 +1862,14 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
 				/* Get filter info */
 				if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
 					filter->input.ip.v4.dst_port =
-						sctp_spec->hdr.src_port;
-					filter->input.ip.v4.src_port =
 						sctp_spec->hdr.dst_port;
+					filter->input.ip.v4.src_port =
+						sctp_spec->hdr.src_port;
 				} else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
 					filter->input.ip.v6.dst_port =
-						sctp_spec->hdr.src_port;
-					filter->input.ip.v6.src_port =
 						sctp_spec->hdr.dst_port;
+					filter->input.ip.v6.src_port =
+						sctp_spec->hdr.src_port;
 				}
 			}
 			break;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 14/52] net/ice/base: change IPV6 training packet
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (12 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 13/52] net/ice/base: refactor flow director filter swap Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 15/52] net/ice/base: group function protoypes together Qi Zhang
                     ` (39 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang, Dan Nowlin, Paul M . Stillwell Jr

Add additional UDP payload to allow for additional headers such as ESP.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index f5dd86bf4..600e1126c 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -446,7 +446,7 @@ static const u8 dummy_udp_ipv6_packet[] = {
 	0x86, 0xDD,		/* ICE_ETYPE_OL 12 */
 
 	0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 40 */
-	0x00, 0x08, 0x11, 0x00, /* Next header UDP*/
+	0x00, 0x10, 0x11, 0x00, /* Next header UDP */
 	0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00,
@@ -457,7 +457,10 @@ static const u8 dummy_udp_ipv6_packet[] = {
 	0x00, 0x00, 0x00, 0x00,
 
 	0x00, 0x00, 0x00, 0x00, /* ICE_UDP_ILOS 54 */
-	0x00, 0x08, 0x00, 0x00,
+	0x00, 0x10, 0x00, 0x00,
+
+	0x00, 0x00, 0x00, 0x00, /* needed for ESP packets */
+	0x00, 0x00, 0x00, 0x00,
 
 	0x00, 0x00, /* 2 bytes for 4 byte alignment */
 };
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 15/52] net/ice/base: group function protoypes together
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (13 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 14/52] net/ice/base: change IPV6 training packet Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-11 18:37     ` Ferruh Yigit
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 16/52] net/ice/base: cleanup comment formatting Qi Zhang
                     ` (38 subsequent siblings)
  53 siblings, 1 reply; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Tony Nguyen, Paul M . Stillwell Jr

There are some function prototypes at the beginning of the file and
some at the end, group them all together so that they are in one
consistent location.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_fdir.h | 83 ++++++++++++++++++++---------------------
 1 file changed, 41 insertions(+), 42 deletions(-)

diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
index 97553c8e7..b39ce0bbf 100644
--- a/drivers/net/ice/base/ice_fdir.h
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -7,47 +7,6 @@
 
 #include "ice_common.h"
 
-/* Flow Director (FD) Filter Programming descriptor */
-struct ice_fd_fltr_desc_ctx {
-	u32 fdid;
-	u16 qindex;
-	u16 cnt_index;
-	u16 fd_vsi;
-	u16 flex_val;
-	u8 comp_q;
-	u8 comp_report;
-	u8 fd_space;
-	u8 cnt_ena;
-	u8 evict_ena;
-	u8 toq;
-	u8 toq_prio;
-	u8 dpu_recipe;
-	u8 drop;
-	u8 flex_prio;
-	u8 flex_mdid;
-	u8 dtype;
-	u8 pcmd;
-	u8 desc_prof_prio;
-	u8 desc_prof;
-	u8 swap;
-	u8 fdid_prio;
-	u8 fdid_mdid;
-};
-
-enum ice_status ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id);
-enum ice_status ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id);
-void ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx);
-enum ice_status
-ice_alloc_fd_guar_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
-enum ice_status
-ice_free_fd_guar_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
-enum ice_status
-ice_alloc_fd_shrd_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
-enum ice_status
-ice_free_fd_shrd_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
-enum ice_status ice_clear_vsi_fd_table(struct ice_hw *hw, u16 vsi_num);
-enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw);
-
 #define ICE_FDIR_IP_PROTOCOLS
 #define ICE_IP_PROTO_TCP		6
 #define ICE_IP_PROTO_UDP		17
@@ -111,6 +70,33 @@ enum ice_fltr_prgm_desc_fd_status {
 	ICE_FLTR_PRGM_DESC_FD_STATUS_8FLEX_BYTES,
 };
 
+/* Flow Director (FD) Filter Programming descriptor */
+struct ice_fd_fltr_desc_ctx {
+	u32 fdid;
+	u16 qindex;
+	u16 cnt_index;
+	u16 fd_vsi;
+	u16 flex_val;
+	u8 comp_q;
+	u8 comp_report;
+	u8 fd_space;
+	u8 cnt_ena;
+	u8 evict_ena;
+	u8 toq;
+	u8 toq_prio;
+	u8 dpu_recipe;
+	u8 drop;
+	u8 flex_prio;
+	u8 flex_mdid;
+	u8 dtype;
+	u8 pcmd;
+	u8 desc_prof_prio;
+	u8 desc_prof;
+	u8 swap;
+	u8 fdid_prio;
+	u8 fdid_mdid;
+};
+
 #define ICE_FLTR_PRGM_FLEX_WORD_SIZE	sizeof(__be16)
 
 struct ice_rx_flow_userdef {
@@ -207,7 +193,7 @@ struct ice_fdir_fltr {
 	bool acl_fltr;
 };
 
-/* Dummy packet filter definition structure. */
+/* Dummy packet filter definition structure */
 struct ice_fdir_base_pkt {
 	enum ice_fltr_ptype flow;
 	u16 pkt_len;
@@ -216,6 +202,19 @@ struct ice_fdir_base_pkt {
 	const u8 *tun_pkt;
 };
 
+enum ice_status ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id);
+enum ice_status ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id);
+void ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx);
+enum ice_status
+ice_alloc_fd_guar_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
+enum ice_status
+ice_free_fd_guar_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
+enum ice_status
+ice_alloc_fd_shrd_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
+enum ice_status
+ice_free_fd_shrd_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
+enum ice_status ice_clear_vsi_fd_table(struct ice_hw *hw, u16 vsi_num);
+enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw);
 void
 ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		       struct ice_fltr_desc *fdesc, bool add);
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 16/52] net/ice/base: cleanup comment formatting
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (14 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 15/52] net/ice/base: group function protoypes together Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 17/52] net/ice/base: add FDIR support for L2TPV3 ESP AH and PFCP Qi Zhang
                     ` (37 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Bruce Allan, Paul M . Stillwell Jr

Add missing space between end of comment text and comment terminator,
and remove unnecessary punctuation.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_acl.c        | 25 +++++++++---------
 drivers/net/ice/base/ice_acl_ctrl.c   | 23 ++++++++--------
 drivers/net/ice/base/ice_adminq_cmd.h | 50 +++++++++++++++++++----------------
 drivers/net/ice/base/ice_bitops.h     | 10 +++----
 drivers/net/ice/base/ice_common.c     |  4 +--
 drivers/net/ice/base/ice_fdir.c       |  3 +--
 drivers/net/ice/base/ice_flex_pipe.c  | 12 ++++-----
 drivers/net/ice/base/ice_flow.c       | 34 ++++++++++++------------
 drivers/net/ice/base/ice_flow.h       |  4 +--
 drivers/net/ice/base/ice_sched.c      | 17 ++++++------
 drivers/net/ice/base/ice_switch.c     |  8 +++---
 drivers/net/ice/base/ice_switch.h     |  3 +--
 drivers/net/ice/base/ice_type.h       |  4 +--
 13 files changed, 97 insertions(+), 100 deletions(-)

diff --git a/drivers/net/ice/base/ice_acl.c b/drivers/net/ice/base/ice_acl.c
index 31244cb4b..fd12507d7 100644
--- a/drivers/net/ice/base/ice_acl.c
+++ b/drivers/net/ice/base/ice_acl.c
@@ -123,7 +123,7 @@ ice_aq_program_acl_entry(struct ice_hw *hw, u8 tcam_idx, u16 entry_idx,
  * @buf: address of indirect data buffer
  * @cd: pointer to command details structure or NULL
  *
- *  Query ACL entry (direct 0x0C24)
+ * Query ACL entry (direct 0x0C24)
  *
  * NOTE: Caller of this API to parse 'buf' appropriately since it contains
  * response (key and key invert)
@@ -250,7 +250,7 @@ ice_aq_query_actpair(struct ice_hw *hw, u8 act_mem_idx, u16 act_entry_idx,
  * @hw: pointer to the HW struct
  * @cd: pointer to command details structure or NULL
  *
- * ACL - de-allocate (direct 0x0C1A) resources. Used by SW to release all the
+ * De-allocate ACL resources (direct 0x0C1A). Used by SW to release all the
  * resources allocated for it using a single command
  */
 enum ice_status ice_aq_dealloc_acl_res(struct ice_hw *hw, struct ice_sq_cd *cd)
@@ -263,7 +263,7 @@ enum ice_status ice_aq_dealloc_acl_res(struct ice_hw *hw, struct ice_sq_cd *cd)
 }
 
 /**
- * ice_acl_prof_aq_send - sending acl profile aq commands
+ * ice_acl_prof_aq_send - sending ACL profile AQ commands
  * @hw: pointer to the HW struct
  * @opc: command opcode
  * @prof_id: profile ID
@@ -294,7 +294,7 @@ ice_acl_prof_aq_send(struct ice_hw *hw, u16 opc, u8 prof_id,
  * @buf: ptr to buffer
  * @cd: pointer to command details structure or NULL
  *
- * ACL - program ACL profile extraction (indirect 0x0C1D)
+ * Program ACL profile extraction (indirect 0x0C1D)
  */
 enum ice_status
 ice_prgm_acl_prof_extrt(struct ice_hw *hw, u8 prof_id,
@@ -312,7 +312,7 @@ ice_prgm_acl_prof_extrt(struct ice_hw *hw, u8 prof_id,
  * @buf: ptr to buffer (which will contain response of this command)
  * @cd: pointer to command details structure or NULL
  *
- * ACL - query ACL profile (indirect 0x0C21)
+ * Query ACL profile (indirect 0x0C21)
  */
 enum ice_status
 ice_query_acl_prof(struct ice_hw *hw, u8 prof_id,
@@ -354,7 +354,7 @@ static enum ice_status ice_aq_acl_cntrs_chk_params(struct ice_acl_cntrs *cntrs)
 			status = ICE_ERR_OUT_OF_RANGE;
 		break;
 	default:
-		/* Unspecified counter type - Invalid or error*/
+		/* Unspecified counter type - Invalid or error */
 		status = ICE_ERR_PARAM;
 	}
 
@@ -367,7 +367,7 @@ static enum ice_status ice_aq_acl_cntrs_chk_params(struct ice_acl_cntrs *cntrs)
  * @cntrs: ptr to buffer describing input and output params
  * @cd: pointer to command details structure or NULL
  *
- * ACL - allocate (indirect 0x0C16) counters. This function attempts to
+ * Allocate ACL counters (indirect 0x0C16). This function attempts to
  * allocate a contiguous block of counters. In case of failures, caller can
  * attempt to allocate a smaller chunk. The allocation is considered
  * unsuccessful if returned counter value is invalid. In this case it returns
@@ -410,8 +410,7 @@ ice_aq_alloc_acl_cntrs(struct ice_hw *hw, struct ice_acl_cntrs *cntrs,
  * @cntrs: ptr to buffer describing input and output params
  * @cd: pointer to command details structure or NULL
  *
- * ACL - de-allocate (direct 0x0C17) counters.
- * This function deallocate ACL counters.
+ * De-allocate ACL counters (direct 0x0C17)
  */
 enum ice_status
 ice_aq_dealloc_acl_cntrs(struct ice_hw *hw, struct ice_acl_cntrs *cntrs,
@@ -443,7 +442,7 @@ ice_aq_dealloc_acl_cntrs(struct ice_hw *hw, struct ice_acl_cntrs *cntrs,
  * @cntr_val: pointer to counter or packet counter value
  * @cd: pointer to command details structure or NULL
  *
- * ACL - query ACL counter (direct 0x0C27)
+ * Query ACL counter (direct 0x0C27)
  */
 enum ice_status
 ice_aq_query_acl_cntrs(struct ice_hw *hw, u8 bank, u16 index, u64 *cntr_val,
@@ -478,7 +477,7 @@ ice_aq_query_acl_cntrs(struct ice_hw *hw, u8 bank, u16 index, u64 *cntr_val,
  * @buf: pointer to input buffer
  * @cd: pointer to command details structure or NULL
  *
- * ACL - program ACL profile ranges (indirect 0x0C1E)
+ * Program ACL profile ranges (indirect 0x0C1E)
  */
 enum ice_status
 ice_prog_acl_prof_ranges(struct ice_hw *hw, u8 prof_id,
@@ -501,7 +500,7 @@ ice_prog_acl_prof_ranges(struct ice_hw *hw, u8 prof_id,
  * @buf: pointer to response buffer
  * @cd: pointer to command details structure or NULL
  *
- * ACL - query ACL profile ranges (indirect 0x0C22)
+ * Query ACL profile ranges (indirect 0x0C22)
  */
 enum ice_status
 ice_query_acl_prof_ranges(struct ice_hw *hw, u8 prof_id,
@@ -571,7 +570,7 @@ ice_aq_dealloc_acl_scen(struct ice_hw *hw, u16 scen_id, struct ice_sq_cd *cd)
 /**
  * ice_aq_update_query_scen - update or query ACL scenario
  * @hw: pointer to the HW struct
- * @opcode: aq command opcode for either query or update scenario
+ * @opcode: AQ command opcode for either query or update scenario
  * @scen_id: scen_id to be updated or queried
  * @buf: address of indirect data buffer
  * @cd: pointer to command details structure or NULL
diff --git a/drivers/net/ice/base/ice_acl_ctrl.c b/drivers/net/ice/base/ice_acl_ctrl.c
index 39b399dd4..5310b9d9f 100644
--- a/drivers/net/ice/base/ice_acl_ctrl.c
+++ b/drivers/net/ice/base/ice_acl_ctrl.c
@@ -12,6 +12,7 @@
 #define ICE_ACL_TBL_TCAM_ENTRY_IDX(e) ((e) % ICE_AQC_ACL_TCAM_DEPTH)
 
 #define ICE_ACL_SCEN_ENTRY_INVAL 0xFFFF
+
 /**
  * ice_acl_init_entry
  * @scen: pointer to the scenario struct
@@ -20,8 +21,7 @@
  */
 static void ice_acl_init_entry(struct ice_acl_scen *scen)
 {
-	/**
-	 * low priority: start from the highest index, 25% of total entries
+	/* low priority: start from the highest index, 25% of total entries
 	 * normal priority: start from the highest index, 50% of total entries
 	 * high priority: start from the lowest index, 25% of total entries
 	 */
@@ -44,8 +44,9 @@ static void ice_acl_init_entry(struct ice_acl_scen *scen)
  * Returns ICE_ACL_SCEN_ENTRY_INVAL if fails
  * Returns index on success
  */
-static u16 ice_acl_scen_assign_entry_idx(struct ice_acl_scen *scen,
-					 enum ice_acl_entry_prior prior)
+static u16
+ice_acl_scen_assign_entry_idx(struct ice_acl_scen *scen,
+			      enum ice_acl_entry_prior prior)
 {
 	u16 first_idx, last_idx, i;
 	s8 step;
@@ -198,7 +199,7 @@ static enum ice_status ice_acl_init_tbl(struct ice_hw *hw)
 
 /**
  * ice_acl_assign_act_mems_to_tcam
- * @tbl: pointer to acl table structure
+ * @tbl: pointer to ACL table structure
  * @cur_tcam: Index of current TCAM. Value = 0 to (ICE_AQC_ACL_SLICES - 1)
  * @cur_mem_idx: Index of current action memory bank. Value = 0 to
  *		 (ICE_AQC_MAX_ACTION_MEMORIES - 1)
@@ -229,7 +230,7 @@ ice_acl_assign_act_mems_to_tcam(struct ice_acl_tbl *tbl, u8 cur_tcam,
 
 /**
  * ice_acl_divide_act_mems_to_tcams
- * @tbl: pointer to acl table structure
+ * @tbl: pointer to ACL table structure
  *
  * Figure out how to divide given action memory banks to given TCAMs. This
  * division is for SW book keeping. In the time when scenario is created,
@@ -351,7 +352,7 @@ ice_acl_create_tbl(struct ice_hw *hw, struct ice_acl_tbl_params *params)
 				CPU_TO_LE16(params->dep_tbls[i]);
 	}
 
-	/* call the aq command to create the ACL table with these values */
+	/* call the AQ command to create the ACL table with these values */
 	status = ice_aq_alloc_acl_tbl(hw, &tbl_alloc, NULL);
 
 	if (status) {
@@ -660,7 +661,7 @@ ice_acl_set_scen_chnk_msk(struct ice_aqc_acl_scen *scen_buf,
 
 /**
  * ice_acl_assign_act_mem_for_scen
- * @tbl: pointer to acl table structure
+ * @tbl: pointer to ACL table structure
  * @scen: pointer to the scenario struct
  * @scen_buf: pointer to the available space for the scenario
  * @current_tcam_idx: theoretical index of the TCAM that we associated those
@@ -897,7 +898,7 @@ enum ice_status ice_acl_destroy_tbl(struct ice_hw *hw)
 		}
 	}
 
-	/* call the aq command to destroy the ACL table */
+	/* call the AQ command to destroy the ACL table */
 	status = ice_aq_dealloc_acl_tbl(hw, hw->acl_tbl->id, &resp_buf, NULL);
 
 	if (status) {
@@ -1107,7 +1108,7 @@ ice_acl_rem_entry(struct ice_hw *hw, struct ice_acl_scen *scen, u16 entry_idx)
 						  NULL);
 		if (status)
 			ice_debug(hw, ICE_DBG_ACL,
-				  "aq program acl entry failed status: %d\n",
+				  "AQ program ACL entry failed status: %d\n",
 				  status);
 	}
 
@@ -1164,7 +1165,7 @@ enum ice_status ice_acl_destroy_scen(struct ice_hw *hw, u16 scen_id)
 			}
 		}
 
-	/* Call the aq command to destroy the targeted scenario */
+	/* Call the AQ command to destroy the targeted scenario */
 	status = ice_aq_dealloc_acl_scen(hw, scen_id, NULL);
 
 	if (status) {
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index a5d689dc8..dec4c38cf 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -533,7 +533,7 @@ struct ice_aqc_vsi_props {
 	u8 q_opt_reserved[3];
 	/* outer up section */
 	__le32 outer_up_table; /* same structure and defines as ingress tbl */
-	/* acl section */
+	/* ACL section */
 	__le16 acl_def_act;
 #define ICE_AQ_VSI_ACL_DEF_RX_PROF_S	0
 #define ICE_AQ_VSI_ACL_DEF_RX_PROF_M	(0xF << ICE_AQ_VSI_ACL_DEF_RX_PROF_S)
@@ -675,7 +675,7 @@ struct ice_aqc_storm_cfg {
 
 #define ICE_MAX_NUM_RECIPES 64
 
-/* Add/Get Recipe (indirect 0x0290/0x0292)*/
+/* Add/Get Recipe (indirect 0x0290/0x0292) */
 struct ice_aqc_add_get_recipe {
 	__le16 num_sub_recipes;	/* Input in Add cmd, Output in Get cmd */
 	__le16 return_index;	/* Input, used for Get cmd only */
@@ -2020,7 +2020,7 @@ struct ice_aqc_clear_fd_table {
 	u8 reserved[12];
 };
 
-/* ACL - allocate (indirect 0x0C10) table */
+/* Allocate ACL table (indirect 0x0C10) */
 #define ICE_AQC_ACL_KEY_WIDTH		40
 #define ICE_AQC_ACL_KEY_WIDTH_BYTES	5
 #define ICE_AQC_ACL_TCAM_DEPTH		512
@@ -2065,9 +2065,9 @@ struct ice_aqc_acl_alloc_table_data {
 	__le16 alloc_ids[ICE_AQC_MAX_CONCURRENT_ACL_TBL];
 };
 
-/* ACL - deallocate (indirect 0x0C11) table
- * ACL - allocate (indirect 0x0C12) action-pair
- * ACL - deallocate (indirect 0x0C13) action-pair
+/* Deallocate ACL table (indirect 0x0C11)
+ * Allocate ACL action-pair (indirect 0x0C12)
+ * Deallocate ACL action-pair (indirect 0x0C13)
  */
 
 /* Following structure is common and used in case of deallocation
@@ -2126,7 +2126,7 @@ struct ice_aqc_acl_generic {
 	u8 act_mem[ICE_AQC_MAX_ACTION_MEMORIES];
 };
 
-/* ACL - allocate (indirect 0x0C14) scenario. This command doesn't have separate
+/* Allocate ACL scenario (indirect 0x0C14). This command doesn't have separate
  * response buffer since original command buffer gets updated with
  * 'scen_id' in case of success
  */
@@ -2144,7 +2144,7 @@ struct ice_aqc_acl_alloc_scen {
 	__le32 addr_low;
 };
 
-/* ACL - de-allocate (direct 0x0C15) scenario. This command doesn't need
+/* De-allocate ACL scenario (direct 0x0C15). This command doesn't need
  * separate response buffer since nothing to be returned as a response
  * except status.
  */
@@ -2153,8 +2153,9 @@ struct ice_aqc_acl_dealloc_scen {
 	u8 reserved[14];
 };
 
-/* ACL - update (direct 0x0C1B) scenario */
-/* ACL - query (direct 0x0C23) scenario */
+/* Update ACL scenario (direct 0x0C1B)
+ * Query ACL scenario (direct 0x0C23)
+ */
 struct ice_aqc_acl_update_query_scen {
 	__le16 scen_id;
 	u8 reserved[6];
@@ -2202,7 +2203,7 @@ struct ice_aqc_acl_scen {
 	u8 act_mem_cfg[ICE_AQC_MAX_ACTION_MEMORIES];
 };
 
-/* ACL - allocate (indirect 0x0C16) counters */
+/* Allocate ACL counters (indirect 0x0C16) */
 struct ice_aqc_acl_alloc_counters {
 	/* Amount of contiguous counters requested. Min value is 1 and
 	 * max value is 255
@@ -2253,7 +2254,7 @@ struct ice_aqc_acl_alloc_counters {
 	} ops;
 };
 
-/* ACL - de-allocate (direct 0x0C17) counters */
+/* De-allocate ACL counters (direct 0x0C17) */
 struct ice_aqc_acl_dealloc_counters {
 	/* first counter being released */
 	__le16 first_counter;
@@ -2266,15 +2267,16 @@ struct ice_aqc_acl_dealloc_counters {
 	u8 reserved[10];
 };
 
-/* ACL - de-allocate (direct 0x0C1A) resources. Used by SW to release all the
+/* De-allocate ACL resources (direct 0x0C1A). Used by SW to release all the
  * resources allocated for it using a single command
  */
 struct ice_aqc_acl_dealloc_res {
 	u8 reserved[16];
 };
 
-/* ACL - program actionpair (indirect 0x0C1C) */
-/* ACL - query actionpair (indirect 0x0C25) */
+/* Program ACL actionpair (indirect 0x0C1C)
+ * Query ACL actionpair (indirect 0x0C25)
+ */
 struct ice_aqc_acl_actpair {
 	/* action mem index to program/update */
 	u8 act_mem_index;
@@ -2349,10 +2351,11 @@ struct ice_aqc_acl_prof_generic_frmt {
 	u8 pf_scenario_num[ICE_AQC_ACL_PROF_PF_SCEN_NUM_ELEMS];
 };
 
-/* ACL - program ACL profile extraction (indirect 0x0C1D) */
-/* ACL - program ACL profile ranges (indirect 0x0C1E) */
-/* ACL - query ACL profile (indirect 0x0C21) */
-/* ACL - query ACL profile ranges (indirect 0x0C22) */
+/* Program ACL profile extraction (indirect 0x0C1D)
+ * Program ACL profile ranges (indirect 0x0C1E)
+ * Query ACL profile (indirect 0x0C21)
+ * Query ACL profile ranges (indirect 0x0C22)
+ */
 struct ice_aqc_acl_profile {
 	u8 profile_id; /* Programmed/Updated profile ID */
 	u8 reserved[7];
@@ -2389,8 +2392,9 @@ struct ice_aqc_acl_profile_ranges {
 	struct ice_acl_rng_data checker_cfg[ICE_AQC_ACL_PROF_RANGES_NUM_CFG];
 };
 
-/* ACL - program ACL entry (indirect 0x0C20) */
-/* ACL - query ACL entry (indirect 0x0C24) */
+/* Program ACL entry (indirect 0x0C20)
+ * Query ACL entry (indirect 0x0C24)
+ */
 struct ice_aqc_acl_entry {
 	u8 tcam_index; /* Updated TCAM block index */
 	u8 reserved;
@@ -2414,7 +2418,7 @@ struct ice_aqc_acl_data {
 	} entry_key, entry_key_invert;
 };
 
-/* ACL - query ACL counter (direct 0x0C27) */
+/* Query ACL counter (direct 0x0C27) */
 struct ice_aqc_acl_query_counter {
 	/* Queried counter index */
 	__le16 counter_index;
@@ -2556,7 +2560,7 @@ struct ice_aqc_move_txqs_data {
 };
 
 /* Download Package (indirect 0x0C40) */
-/* Also used for Update Package (indirect 0x0C42) */
+/* Also used for Update Package (indirect 0x0C42 and 0x0C41) */
 struct ice_aqc_download_pkg {
 	u8 flags;
 #define ICE_AQC_DOWNLOAD_PKG_LAST_BUF	0x01
diff --git a/drivers/net/ice/base/ice_bitops.h b/drivers/net/ice/base/ice_bitops.h
index 87f47b238..3022116a4 100644
--- a/drivers/net/ice/base/ice_bitops.h
+++ b/drivers/net/ice/base/ice_bitops.h
@@ -214,7 +214,7 @@ ice_or_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
 	ice_bitmap_t mask;
 	u16 i;
 
-	/* Handle all but last chunk*/
+	/* Handle all but last chunk */
 	for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
 		dst[i] = bmp1[i] | bmp2[i];
 
@@ -245,7 +245,7 @@ ice_xor_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
 	ice_bitmap_t mask;
 	u16 i;
 
-	/* Handle all but last chunk*/
+	/* Handle all but last chunk */
 	for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
 		dst[i] = bmp1[i] ^ bmp2[i];
 
@@ -276,7 +276,7 @@ ice_andnot_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
 	ice_bitmap_t mask;
 	u16 i;
 
-	/* Handle all but last chunk*/
+	/* Handle all but last chunk */
 	for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
 		dst[i] = bmp1[i] & ~bmp2[i];
 
@@ -389,12 +389,12 @@ ice_cmp_bitmap(ice_bitmap_t *bmp1, ice_bitmap_t *bmp2, u16 size)
 	ice_bitmap_t mask;
 	u16 i;
 
-	/* Handle all but last chunk*/
+	/* Handle all but last chunk */
 	for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
 		if (bmp1[i] != bmp2[i])
 			return false;
 
-	/* We want to only compare bits within the size.*/
+	/* We want to only compare bits within the size */
 	mask = LAST_CHUNK_MASK(size);
 	if ((bmp1[i] & mask) != (bmp2[i] & mask))
 		return false;
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index e266ba56c..908ef9085 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -747,7 +747,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
 	/* Initialize max burst size */
 	if (!hw->max_burst_size)
 		ice_cfg_rl_burst_size(hw, ICE_SCHED_DFLT_BURST_SIZE);
-
 	status = ice_init_fltr_mgmt_struct(hw);
 	if (status)
 		goto err_unroll_sched;
@@ -1901,6 +1900,7 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
 			}
 			if (func_p) {
 				u32 reg_val, val;
+
 				if (hw->dcf_enabled)
 					break;
 				reg_val = rd32(hw, GLQF_FD_SIZE);
@@ -2611,7 +2611,7 @@ ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, bool ena_auto_link_update)
 
 	ice_copy_phy_caps_to_cfg(pi, pcaps, &cfg);
 
-	/* Configure the set phy data */
+	/* Configure the set PHY data */
 	status = ice_cfg_phy_fc(pi, &cfg, pi->fc.req_mode);
 	if (status) {
 		if (status != ICE_ERR_BAD_PTR)
diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index 2257eba60..0155597bc 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -495,7 +495,7 @@ ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		fdir_fltr_ctx.toq_prio = 0;
 	else
 		fdir_fltr_ctx.toq_prio = 3;
-	fdir_fltr_ctx.pcmd = (add) ? ICE_FXD_FLTR_QW1_PCMD_ADD :
+	fdir_fltr_ctx.pcmd = add ? ICE_FXD_FLTR_QW1_PCMD_ADD :
 		ICE_FXD_FLTR_QW1_PCMD_REMOVE;
 	fdir_fltr_ctx.swap = ICE_FXD_FLTR_QW1_SWAP_NOT_SET;
 	fdir_fltr_ctx.comp_q = ICE_FXD_FLTR_QW0_COMP_Q_ZERO;
@@ -684,7 +684,6 @@ static void ice_pkt_insert_u32(u8 *pkt, int offset, __be32 data)
 /**
  * ice_pkt_insert_mac_addr - insert a MAC addr into a memory buffer.
  * @pkt: packet buffer
- * @offset: offset into buffer
  * @addr: MAC address to convert and insert into pkt at offset
  */
 static void ice_pkt_insert_mac_addr(u8 *pkt, u8 *addr)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 1f7a05969..9703b239b 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -648,7 +648,7 @@ static bool ice_bits_max_set(const u8 *mask, u16 size, u16 max)
  * This function generates a key from a value, a don't care mask and a never
  * match mask.
  * upd, dc, and nm are optional parameters, and can be NULL:
- *	upd == NULL --> udp mask is all 1's (update all bits)
+ *	upd == NULL --> upd mask is all 1's (update all bits)
  *	dc == NULL --> dc mask is all 0's (no don't care bits)
  *	nm == NULL --> nm mask is all 0's (no never match bits)
  */
@@ -2738,7 +2738,7 @@ ice_vsig_add_mv_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
  * @blk: HW block
  * @prof: profile to check
  * @idx: profile index to check
- * @masks: masks to match
+ * @mask: mask to match
  */
 static bool
 ice_prof_has_mask_idx(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 idx,
@@ -3264,7 +3264,6 @@ static void ice_shutdown_prof_masks(struct ice_hw *hw, enum ice_block blk)
 /**
  * ice_shutdown_all_prof_masks - releases all locks for masking
  * @hw: pointer to the HW struct
- * @blk: hardware block
  *
  * This should be called before unloading the driver
  */
@@ -3279,12 +3278,11 @@ void ice_shutdown_all_prof_masks(struct ice_hw *hw)
  * @hw: pointer to the HW struct
  * @blk: hardware block
  * @prof_id: profile ID
- * @es: field vector
  * @masks: masks
  */
 static enum ice_status
 ice_update_prof_masking(struct ice_hw *hw, enum ice_block blk, u16 prof_id,
-			struct ice_fv_word *es, u16 *masks)
+			u16 *masks)
 {
 	bool err = false;
 	u32 ena_mask = 0;
@@ -3986,7 +3984,7 @@ ice_prof_gen_key(struct ice_hw *hw, enum ice_block blk, u8 ptg, u16 vsig,
  * @prof_id: profile ID
  * @ptg: packet type group (PTG) portion of key
  * @vsig: VSIG portion of key
- * @cdid: CDID: portion of key
+ * @cdid: CDID portion of key
  * @flags: flag portion of key
  * @vl_msk: valid mask
  * @dc_msk: don't care mask
@@ -4628,7 +4626,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
 			if (status)
 				goto err_ice_add_prof;
 		}
-		status = ice_update_prof_masking(hw, blk, prof_id, es, masks);
+		status = ice_update_prof_masking(hw, blk, prof_id, masks);
 		if (status)
 			goto err_ice_add_prof;
 
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 90302a6cb..00f58697f 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1489,13 +1489,13 @@ ice_dealloc_flow_entry(struct ice_hw *hw, struct ice_flow_entry *entry)
 #define ICE_ACL_INVALID_SCEN	0x3f
 
 /**
- * ice_flow_acl_is_prof_in_use - Verify if the profile is associated to any pf
+ * ice_flow_acl_is_prof_in_use - Verify if the profile is associated to any PF
  * @hw: pointer to the hardware structure
  * @prof: pointer to flow profile
- * @buf: destination buffer function writes partial xtrct sequence to
+ * @buf: destination buffer function writes partial extraction sequence to
  *
- * returns ICE_SUCCESS if no pf is associated to the given profile
- * returns ICE_ERR_IN_USE if at least one pf is associated to the given profile
+ * returns ICE_SUCCESS if no PF is associated to the given profile
+ * returns ICE_ERR_IN_USE if at least one PF is associated to the given profile
  * returns other error code for real error
  */
 static enum ice_status
@@ -1513,7 +1513,7 @@ ice_flow_acl_is_prof_in_use(struct ice_hw *hw, struct ice_flow_prof *prof,
 	if (status)
 		return status;
 
-	/* If all pf's associated scenarios are all 0 or all
+	/* If all PF's associated scenarios are all 0 or all
 	 * ICE_ACL_INVALID_SCEN (63) for the given profile then the latter has
 	 * not been configured yet.
 	 */
@@ -1537,7 +1537,7 @@ ice_flow_acl_is_prof_in_use(struct ice_hw *hw, struct ice_flow_prof *prof,
 }
 
 /**
- * ice_flow_acl_free_act_cntr - Free the acl rule's actions
+ * ice_flow_acl_free_act_cntr - Free the ACL rule's actions
  * @hw: pointer to the hardware structure
  * @acts: array of actions to be performed on a match
  * @acts_cnt: number of actions
@@ -1575,11 +1575,11 @@ ice_flow_acl_free_act_cntr(struct ice_hw *hw, struct ice_flow_action *acts,
 }
 
 /**
- * ice_flow_acl_disassoc_scen - Disassociate the scenario to the Profile
+ * ice_flow_acl_disassoc_scen - Disassociate the scenario from the profile
  * @hw: pointer to the hardware structure
  * @prof: pointer to flow profile
  *
- * Disassociate the scenario to the Profile for the PF of the VSI.
+ * Disassociate the scenario from the profile for the PF of the VSI.
  */
 static enum ice_status
 ice_flow_acl_disassoc_scen(struct ice_hw *hw, struct ice_flow_prof *prof)
@@ -1598,7 +1598,7 @@ ice_flow_acl_disassoc_scen(struct ice_hw *hw, struct ice_flow_prof *prof)
 	if (status)
 		return status;
 
-	/* Clear scenario for this pf */
+	/* Clear scenario for this PF */
 	buf.pf_scenario_num[hw->pf_id] = ICE_ACL_INVALID_SCEN;
 	status = ice_prgm_acl_prof_extrt(hw, prof_id, &buf, NULL);
 
@@ -1773,7 +1773,7 @@ ice_flow_rem_prof_sync(struct ice_hw *hw, enum ice_block blk,
 		struct ice_aqc_acl_prof_generic_frmt buf;
 		u8 prof_id = 0;
 
-		/* Deassociate the scenario to the Profile for the PF */
+		/* Disassociate the scenario from the profile for the PF */
 		status = ice_flow_acl_disassoc_scen(hw, prof);
 		if (status)
 			return status;
@@ -2140,11 +2140,11 @@ u64 ice_flow_find_entry(struct ice_hw *hw, enum ice_block blk, u64 entry_id)
 }
 
 /**
- * ice_flow_acl_check_actions - Checks the acl rule's actions
+ * ice_flow_acl_check_actions - Checks the ACL rule's actions
  * @hw: pointer to the hardware structure
  * @acts: array of actions to be performed on a match
  * @acts_cnt: number of actions
- * @cnt_alloc: indicates if a ACL counter has been allocated.
+ * @cnt_alloc: indicates if an ACL counter has been allocated.
  */
 static enum ice_status
 ice_flow_acl_check_actions(struct ice_hw *hw, struct ice_flow_action *acts,
@@ -2203,7 +2203,7 @@ ice_flow_acl_check_actions(struct ice_hw *hw, struct ice_flow_action *acts,
 }
 
 /**
- * ice_flow_acl_frmt_entry_range - Format an acl range checker for a given field
+ * ice_flow_acl_frmt_entry_range - Format an ACL range checker for a given field
  * @fld: number of the given field
  * @info: info about field
  * @range_buf: range checker configuration buffer
@@ -2244,7 +2244,7 @@ ice_flow_acl_frmt_entry_range(u16 fld, struct ice_flow_fld_info *info,
 }
 
 /**
- * ice_flow_acl_frmt_entry_fld - Partially format acl entry for a given field
+ * ice_flow_acl_frmt_entry_fld - Partially format ACL entry for a given field
  * @fld: number of the given field
  * @info: info about the field
  * @buf: buffer containing the entry
@@ -2316,7 +2316,7 @@ ice_flow_acl_frmt_entry_fld(u16 fld, struct ice_flow_fld_info *info, u8 *buf,
 }
 
 /**
- * ice_flow_acl_frmt_entry - Format acl entry
+ * ice_flow_acl_frmt_entry - Format ACL entry
  * @hw: pointer to the hardware structure
  * @prof: pointer to flow profile
  * @e: pointer to the flow entry
@@ -2326,7 +2326,7 @@ ice_flow_acl_frmt_entry_fld(u16 fld, struct ice_flow_fld_info *info, u8 *buf,
  *
  * Formats the key (and key_inverse) to be matched from the data passed in,
  * along with data from the flow profile. This key/key_inverse pair makes up
- * the 'entry' for an acl flow entry.
+ * the 'entry' for an ACL flow entry.
  */
 static enum ice_status
 ice_flow_acl_frmt_entry(struct ice_hw *hw, struct ice_flow_prof *prof,
@@ -3447,7 +3447,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
 	}
 
 	/* Check if a flow profile exists with the same protocol headers and
-	 * associated with the input VSI. If so disasscociate the VSI from
+	 * associated with the input VSI. If so disassociate the VSI from
 	 * this profile. The VSI will be added to a new profile created with
 	 * the protocol header and new hash field configuration.
 	 */
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 9fb60a6d2..93043acc8 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -471,8 +471,8 @@ ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
 		   u64 entry_id, u16 vsi, enum ice_flow_priority prio,
 		   void *data, struct ice_flow_action *acts, u8 acts_cnt,
 		   u64 *entry_h);
-enum ice_status ice_flow_rem_entry(struct ice_hw *hw, enum ice_block blk,
-				   u64 entry_h);
+enum ice_status
+ice_flow_rem_entry(struct ice_hw *hw, enum ice_block blk, u64 entry_h);
 void
 ice_flow_set_fld(struct ice_flow_seg_info *seg, enum ice_flow_field fld,
 		 u16 val_loc, u16 mask_loc, u16 last_loc, bool range);
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index af42fadfe..0a46dd40b 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -171,7 +171,7 @@ ice_sched_add_node(struct ice_port_info *pi, u8 layer,
 		return ICE_ERR_PARAM;
 	}
 
-	/* query the current node information from FW  before additing it
+	/* query the current node information from FW before adding it
 	 * to the SW DB
 	 */
 	status = ice_sched_query_elem(hw, LE32_TO_CPU(info->node_teid), &elem);
@@ -599,14 +599,14 @@ ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
 /**
  * ice_aq_rl_profile - performs a rate limiting task
  * @hw: pointer to the HW struct
- * @opcode:opcode for add, query, or remove profile(s)
+ * @opcode: opcode for add, query, or remove profile(s)
  * @num_profiles: the number of profiles
  * @buf: pointer to buffer
  * @buf_size: buffer size in bytes
  * @num_processed: number of processed add or remove profile(s) to return
  * @cd: pointer to command details structure
  *
- * Rl profile function to add, query, or remove profile(s)
+ * RL profile function to add, query, or remove profile(s)
  */
 static enum ice_status
 ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
@@ -789,7 +789,7 @@ void ice_sched_clear_agg(struct ice_hw *hw)
 }
 
 /**
- * ice_sched_clear_tx_topo - clears the schduler tree nodes
+ * ice_sched_clear_tx_topo - clears the scheduler tree nodes
  * @pi: port information structure
  *
  * This function removes all the nodes from HW as well as from SW DB.
@@ -2114,7 +2114,7 @@ ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
  * This function validates aggregator ID. The function returns info if
  * aggregator ID is present in list otherwise it returns null.
  */
-static struct ice_sched_agg_info*
+static struct ice_sched_agg_info *
 ice_get_agg_info(struct ice_hw *hw, u32 agg_id)
 {
 	struct ice_sched_agg_info *agg_info;
@@ -2697,7 +2697,7 @@ ice_cfg_agg(struct ice_port_info *pi, u32 agg_id, enum ice_agg_type agg_type,
  * The function returns aggregator VSI info based on VSI handle. This function
  * needs to be called with scheduler lock held.
  */
-static struct ice_sched_agg_vsi_info*
+static struct ice_sched_agg_vsi_info *
 ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
 {
 	struct ice_sched_agg_vsi_info *agg_vsi_info;
@@ -2719,7 +2719,7 @@ ice_get_agg_vsi_info(struct ice_sched_agg_info *agg_info, u16 vsi_handle)
  * VSI has in this case a different aggregator than the default one. This
  * function needs to be called with scheduler lock held.
  */
-static struct ice_sched_agg_info*
+static struct ice_sched_agg_info *
 ice_get_vsi_agg_info(struct ice_hw *hw, u16 vsi_handle)
 {
 	struct ice_sched_agg_info *agg_info;
@@ -3471,7 +3471,6 @@ ice_cfg_agg_bw_no_shared_lmt(struct ice_port_info *pi, u32 agg_id)
  * @pi: port information structure
  * @num_qs: number of VSI queues
  * @q_ids: queue IDs array
- * @q_ids: queue IDs array
  * @q_prio: queue priority array
  *
  * This function configures the queue node priority (Sibling Priority) of the
@@ -5128,7 +5127,7 @@ enum ice_status ice_cfg_rl_burst_size(struct ice_hw *hw, u32 bytes)
 	return ICE_SUCCESS;
 }
 
-/*
+/**
  * ice_sched_replay_node_prio - re-configure node priority
  * @hw: pointer to the HW struct
  * @node: sched node to configure
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 600e1126c..b4aab6780 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2166,15 +2166,13 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)
  */
 static void ice_fill_sw_info(struct ice_hw *hw, struct ice_fltr_info *fi)
 {
-	fi->lb_en = false;
-	fi->lan_en = false;
-
 	if ((fi->flag & ICE_FLTR_RX) &&
 	    (fi->fltr_act == ICE_FWD_TO_VSI ||
 	     fi->fltr_act == ICE_FWD_TO_VSI_LIST) &&
 	    fi->lkup_type == ICE_SW_LKUP_LAST)
 		fi->lan_en = true;
-
+	fi->lb_en = false;
+	fi->lan_en = false;
 	if ((fi->flag & ICE_FLTR_TX) &&
 	    (fi->fltr_act == ICE_FWD_TO_VSI ||
 	     fi->fltr_act == ICE_FWD_TO_VSI_LIST ||
@@ -5351,7 +5349,7 @@ static u16 ice_find_recp(struct ice_hw *hw, struct ice_prot_lkup_ext *lkup_exts,
 			u8 pe, qr;
 
 			/* ar, cr, and qr are related to the recipe words, while
-			 * be, de and pe are related to the lookup words
+			 * be, de, and pe are related to the lookup words
 			 */
 			for (pe = 0; pe < lkup_exts->n_val_words; pe++) {
 				for (qr = 0; qr < recp[i].lkup_exts.n_val_words;
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index ba7c56f44..7317d17ef 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -261,8 +261,7 @@ struct ice_sw_recipe {
 	/* Profiles this recipe is associated with */
 	u8 num_profs, *prof_ids;
 
-	/* Possible result indexes are 44, 45, 46 and 47 */
-#define ICE_POSSIBLE_RES_IDX 0x0000F00000000000ULL
+	/* Bit map for possible result indexes */
 	ice_declare_bitmap(res_idxs, ICE_MAX_FV_WORDS);
 
 	/* This allows user to specify the recipe priority.
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 3280d48d0..8f01a96b1 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -497,7 +497,7 @@ struct ice_nvm_info {
 	u32 flash_size;			/* Size of available flash in bytes */
 	u8 major_ver;			/* major version of dev starter */
 	u8 minor_ver;			/* minor version of dev starter */
-	u8 blank_nvm_mode;		/* is NVM empty (no FW present)*/
+	u8 blank_nvm_mode;		/* is NVM empty (no FW present) */
 };
 
 struct ice_link_default_override_tlv {
@@ -1053,7 +1053,7 @@ enum ice_sw_fwd_act_type {
 #define ICE_SR_1ST_SCRATCH_PAD_PTR		0x41
 #define ICE_SR_1ST_NVM_BANK_PTR			0x42
 #define ICE_SR_NVM_BANK_SIZE			0x43
-#define ICE_SR_1ND_OROM_BANK_PTR		0x44
+#define ICE_SR_1ST_OROM_BANK_PTR		0x44
 #define ICE_SR_OROM_BANK_SIZE			0x45
 #define ICE_SR_NETLIST_BANK_PTR			0x46
 #define ICE_SR_NETLIST_BANK_SIZE		0x47
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 17/52] net/ice/base: add FDIR support for L2TPV3 ESP AH and PFCP
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (15 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 16/52] net/ice/base: cleanup comment formatting Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 18/52] net/ice/base: add FD completion report option Qi Zhang
                     ` (36 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang, Yahui Cao, Paul M . Stillwell Jr

FDIR can forward:
- L2TPV3 packets with session id.
- IPSEC ESP packets with security parameter index.
- IPSEC AH packets with security parameter index.
- NAT_T ESP packets with security parameter index.
- PFCP packets with s field value.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_fdir.c | 254 ++++++++++++++++++++++++++++++++++++++++
 drivers/net/ice/base/ice_fdir.h |  15 +++
 drivers/net/ice/base/ice_type.h |  12 ++
 3 files changed, 281 insertions(+)

diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index 0155597bc..38aad1904 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -102,6 +102,138 @@ static const u8 ice_fdir_ipv4_gtpu4_pkt[] = {
 	0x00, 0x00,
 };
 
+static const u8 ice_fdir_ipv4_l2tpv3_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+	0x00, 0x14, 0x00, 0x00, 0x40, 0x00, 0x40, 0x73,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv6_l2tpv3_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x73, 0x40, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv4_esp_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+	0x00, 0x14, 0x00, 0x00, 0x40, 0x00, 0x40, 0x32,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00
+};
+
+static const u8 ice_fdir_ipv6_esp_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x32, 0x40, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv4_ah_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+	0x00, 0x14, 0x00, 0x00, 0x40, 0x00, 0x40, 0x33,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00
+};
+
+static const u8 ice_fdir_ipv6_ah_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x33, 0x40, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv4_nat_t_esp_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+	0x00, 0x1C, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x11, 0x94, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv6_nat_t_esp_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+	0x00, 0x00, 0x00, 0x08, 0x11, 0x40, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x11, 0x94, 0x00, 0x00, 0x00, 0x08,
+};
+
+static const u8 ice_fdir_ipv4_pfcp_node_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+	0x00, 0x2C, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x22, 0x65, 0x22, 0x65, 0x00, 0x00,
+	0x00, 0x00, 0x20, 0x00, 0x00, 0x10, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv4_pfcp_session_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+	0x00, 0x2C, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x22, 0x65, 0x22, 0x65, 0x00, 0x00,
+	0x00, 0x00, 0x21, 0x00, 0x00, 0x10, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv6_pfcp_node_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+	0x00, 0x00, 0x00, 0x18, 0x11, 0x40, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x65,
+	0x22, 0x65, 0x00, 0x00, 0x00, 0x00, 0x20, 0x00,
+	0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv6_pfcp_session_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
+	0x00, 0x00, 0x00, 0x18, 0x11, 0x40, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x22, 0x65,
+	0x22, 0x65, 0x00, 0x00, 0x00, 0x00, 0x21, 0x00,
+	0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
 static const u8 ice_fdir_non_ip_l2_pkt[] = {
 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
@@ -335,6 +467,78 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
 		ice_fdir_ipv4_gtpu4_pkt,
 	},
 	{
+		ICE_FLTR_PTYPE_NONF_IPV4_L2TPV3,
+		sizeof(ice_fdir_ipv4_l2tpv3_pkt), ice_fdir_ipv4_l2tpv3_pkt,
+		sizeof(ice_fdir_ipv4_l2tpv3_pkt), ice_fdir_ipv4_l2tpv3_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV6_L2TPV3,
+		sizeof(ice_fdir_ipv6_l2tpv3_pkt), ice_fdir_ipv6_l2tpv3_pkt,
+		sizeof(ice_fdir_ipv6_l2tpv3_pkt), ice_fdir_ipv6_l2tpv3_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV4_ESP,
+		sizeof(ice_fdir_ipv4_esp_pkt), ice_fdir_ipv4_esp_pkt,
+		sizeof(ice_fdir_ipv4_esp_pkt), ice_fdir_ipv4_esp_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV6_ESP,
+		sizeof(ice_fdir_ipv6_esp_pkt), ice_fdir_ipv6_esp_pkt,
+		sizeof(ice_fdir_ipv6_esp_pkt), ice_fdir_ipv6_esp_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV4_AH,
+		sizeof(ice_fdir_ipv4_ah_pkt), ice_fdir_ipv4_ah_pkt,
+		sizeof(ice_fdir_ipv4_ah_pkt), ice_fdir_ipv4_ah_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV6_AH,
+		sizeof(ice_fdir_ipv6_ah_pkt), ice_fdir_ipv6_ah_pkt,
+		sizeof(ice_fdir_ipv6_ah_pkt), ice_fdir_ipv6_ah_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV4_NAT_T_ESP,
+		sizeof(ice_fdir_ipv4_nat_t_esp_pkt),
+		ice_fdir_ipv4_nat_t_esp_pkt,
+		sizeof(ice_fdir_ipv4_nat_t_esp_pkt),
+		ice_fdir_ipv4_nat_t_esp_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV6_NAT_T_ESP,
+		sizeof(ice_fdir_ipv6_nat_t_esp_pkt),
+		ice_fdir_ipv6_nat_t_esp_pkt,
+		sizeof(ice_fdir_ipv6_nat_t_esp_pkt),
+		ice_fdir_ipv6_nat_t_esp_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV4_PFCP_NODE,
+		sizeof(ice_fdir_ipv4_pfcp_node_pkt),
+		ice_fdir_ipv4_pfcp_node_pkt,
+		sizeof(ice_fdir_ipv4_pfcp_node_pkt),
+		ice_fdir_ipv4_pfcp_node_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV4_PFCP_SESSION,
+		sizeof(ice_fdir_ipv4_pfcp_session_pkt),
+		ice_fdir_ipv4_pfcp_session_pkt,
+		sizeof(ice_fdir_ipv4_pfcp_session_pkt),
+		ice_fdir_ipv4_pfcp_session_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV6_PFCP_NODE,
+		sizeof(ice_fdir_ipv6_pfcp_node_pkt),
+		ice_fdir_ipv6_pfcp_node_pkt,
+		sizeof(ice_fdir_ipv6_pfcp_node_pkt),
+		ice_fdir_ipv6_pfcp_node_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV6_PFCP_SESSION,
+		sizeof(ice_fdir_ipv6_pfcp_session_pkt),
+		ice_fdir_ipv6_pfcp_session_pkt,
+		sizeof(ice_fdir_ipv6_pfcp_session_pkt),
+		ice_fdir_ipv6_pfcp_session_pkt,
+	},
+	{
 		ICE_FLTR_PTYPE_NON_IP_L2,
 		sizeof(ice_fdir_non_ip_l2_pkt), ice_fdir_non_ip_l2_pkt,
 		sizeof(ice_fdir_non_ip_l2_pkt), ice_fdir_non_ip_l2_pkt,
@@ -832,6 +1036,56 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		ice_pkt_insert_u6_qfi(loc, ICE_IPV4_GTPU_QFI_OFFSET,
 				      input->gtpu_data.qfi);
 		break;
+	case ICE_FLTR_PTYPE_NONF_IPV4_L2TPV3:
+		ice_pkt_insert_u32(loc, ICE_IPV4_L2TPV3_SESS_ID_OFFSET,
+				   input->l2tpv3_data.session_id);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV6_L2TPV3:
+		ice_pkt_insert_u32(loc, ICE_IPV6_L2TPV3_SESS_ID_OFFSET,
+				   input->l2tpv3_data.session_id);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV4_ESP:
+		ice_pkt_insert_u32(loc, ICE_IPV4_ESP_SPI_OFFSET,
+				   input->ip.v4.sec_parm_idx);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV6_ESP:
+		ice_pkt_insert_u32(loc, ICE_IPV6_ESP_SPI_OFFSET,
+				   input->ip.v6.sec_parm_idx);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV4_AH:
+		ice_pkt_insert_u32(loc, ICE_IPV4_AH_SPI_OFFSET,
+				   input->ip.v4.sec_parm_idx);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV6_AH:
+		ice_pkt_insert_u32(loc, ICE_IPV6_AH_SPI_OFFSET,
+				   input->ip.v6.sec_parm_idx);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV4_NAT_T_ESP:
+		ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET,
+				   input->ip.v4.src_ip);
+		ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
+				   input->ip.v4.dst_ip);
+		ice_pkt_insert_u32(loc, ICE_IPV4_NAT_T_ESP_SPI_OFFSET,
+				   input->ip.v4.sec_parm_idx);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV6_NAT_T_ESP:
+		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
+					 input->ip.v6.src_ip);
+		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
+					 input->ip.v6.dst_ip);
+		ice_pkt_insert_u32(loc, ICE_IPV6_NAT_T_ESP_SPI_OFFSET,
+				   input->ip.v6.sec_parm_idx);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV4_PFCP_NODE:
+	case ICE_FLTR_PTYPE_NONF_IPV4_PFCP_SESSION:
+		ice_pkt_insert_u16(loc, ICE_IPV4_UDP_SRC_PORT_OFFSET,
+				   input->ip.v4.dst_port);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV6_PFCP_NODE:
+	case ICE_FLTR_PTYPE_NONF_IPV6_PFCP_SESSION:
+		ice_pkt_insert_u16(loc, ICE_IPV6_UDP_SRC_PORT_OFFSET,
+				   input->ip.v6.dst_port);
+		break;
 	case ICE_FLTR_PTYPE_NON_IP_L2:
 		ice_pkt_insert_u16(loc, ICE_MAC_ETHTYPE_OFFSET,
 				   input->ext_data.ether_type);
diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
index b39ce0bbf..2d41ec360 100644
--- a/drivers/net/ice/base/ice_fdir.h
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -46,6 +46,14 @@
 #define ICE_IPV6_PROTO_OFFSET		20
 #define ICE_IPV4_GTPU_TEID_OFFSET	46
 #define ICE_IPV4_GTPU_QFI_OFFSET	56
+#define ICE_IPV4_L2TPV3_SESS_ID_OFFSET	34
+#define ICE_IPV6_L2TPV3_SESS_ID_OFFSET	54
+#define ICE_IPV4_ESP_SPI_OFFSET		34
+#define ICE_IPV6_ESP_SPI_OFFSET		54
+#define ICE_IPV4_AH_SPI_OFFSET		38
+#define ICE_IPV6_AH_SPI_OFFSET		58
+#define ICE_IPV4_NAT_T_ESP_SPI_OFFSET	42
+#define ICE_IPV6_NAT_T_ESP_SPI_OFFSET	62
 
 #define ICE_FDIR_MAX_FLTRS		16384
 
@@ -150,6 +158,10 @@ struct ice_fdir_udp_gtp {
 	u8 next_ext;
 };
 
+struct ice_fdir_l2tpv3 {
+	__be32 session_id;
+};
+
 struct ice_fdir_extra {
 	u8 dst_mac[ETH_ALEN];	/* dest MAC address */
 	__be16 ether_type;      /* for NON_IP_L2 */
@@ -170,6 +182,9 @@ struct ice_fdir_fltr {
 	struct ice_fdir_udp_gtp gtpu_data;
 	struct ice_fdir_udp_gtp gtpu_mask;
 
+	struct ice_fdir_l2tpv3 l2tpv3_data;
+	struct ice_fdir_l2tpv3 l2tpv3_mask;
+
 	struct ice_fdir_extra ext_data;
 	struct ice_fdir_extra ext_mask;
 
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 8f01a96b1..a6dece9c1 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -296,6 +296,18 @@ enum ice_fltr_ptype {
 	ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP,
 	ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP,
 	ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER,
+	ICE_FLTR_PTYPE_NONF_IPV4_L2TPV3,
+	ICE_FLTR_PTYPE_NONF_IPV6_L2TPV3,
+	ICE_FLTR_PTYPE_NONF_IPV4_ESP,
+	ICE_FLTR_PTYPE_NONF_IPV6_ESP,
+	ICE_FLTR_PTYPE_NONF_IPV4_AH,
+	ICE_FLTR_PTYPE_NONF_IPV6_AH,
+	ICE_FLTR_PTYPE_NONF_IPV4_NAT_T_ESP,
+	ICE_FLTR_PTYPE_NONF_IPV6_NAT_T_ESP,
+	ICE_FLTR_PTYPE_NONF_IPV4_PFCP_NODE,
+	ICE_FLTR_PTYPE_NONF_IPV4_PFCP_SESSION,
+	ICE_FLTR_PTYPE_NONF_IPV6_PFCP_NODE,
+	ICE_FLTR_PTYPE_NONF_IPV6_PFCP_SESSION,
 	ICE_FLTR_PTYPE_NON_IP_L2,
 	ICE_FLTR_PTYPE_FRAG_IPV4,
 	ICE_FLTR_PTYPE_NONF_IPV6_UDP,
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 18/52] net/ice/base: add FD completion report option
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (16 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 17/52] net/ice/base: add FDIR support for L2TPV3 ESP AH and PFCP Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 19/52] net/ice/base: initialize Set PHY Configuration FEC fields Qi Zhang
                     ` (35 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang, Yahui Cao, Paul M . Stillwell Jr

This patch introduces comp_report variable so that the called can
determine whether to report completion on error or on all cases.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_fdir.c   | 2 +-
 drivers/net/ice/base/ice_fdir.h   | 1 +
 drivers/net/ice/ice_fdir_filter.c | 1 +
 3 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index 38aad1904..a62e6eeba 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -703,7 +703,7 @@ ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		ICE_FXD_FLTR_QW1_PCMD_REMOVE;
 	fdir_fltr_ctx.swap = ICE_FXD_FLTR_QW1_SWAP_NOT_SET;
 	fdir_fltr_ctx.comp_q = ICE_FXD_FLTR_QW0_COMP_Q_ZERO;
-	fdir_fltr_ctx.comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW;
+	fdir_fltr_ctx.comp_report = input->comp_report;
 	fdir_fltr_ctx.fdid_prio = input->fdid_prio;
 	fdir_fltr_ctx.desc_prof = 1;
 	fdir_fltr_ctx.desc_prof_prio = 3;
diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
index 2d41ec360..5b75fed34 100644
--- a/drivers/net/ice/base/ice_fdir.h
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -204,6 +204,7 @@ struct ice_fdir_fltr {
 	u16 cnt_index;
 	u32 fltr_id;
 	u8 fdid_prio;
+	u8 comp_report;
 	/* Set to true for an ACL filter */
 	bool acl_fltr;
 };
diff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c
index 19fa41afc..77e2da9fc 100644
--- a/drivers/net/ice/ice_fdir_filter.c
+++ b/drivers/net/ice/ice_fdir_filter.c
@@ -1120,6 +1120,7 @@ ice_fdir_add_del_filter(struct ice_pf *pf,
 	filter->input.dest_vsi = pf->main_vsi->idx;
 
 	memset(&desc, 0, sizeof(desc));
+	filter->input.comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW;
 	ice_fdir_get_prgm_desc(hw, &filter->input, &desc, add);
 
 	is_tun = ice_fdir_is_tunnel_profile(filter->tunnel_type);
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 19/52] net/ice/base: initialize Set PHY Configuration FEC fields
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (17 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 18/52] net/ice/base: add FD completion report option Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 20/52] net/ice/baes: add NVM help functions Qi Zhang
                     ` (34 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Paul Greenwalt, Paul M . Stillwell Jr

Currently the caller needs to initialize the ice_cfg_phy_fec() parameter
ice_aqc_set_phy_cfg_data FEC fields before calling. However, this is not
necessary since ice_cfg_phy_fec() calls Get PHY Capabilities.

Initialize ice_aqc_set_phy_cfg_data FEC capabilities and FEC option fields
from Get PHY Capabilities with media/topology in ice_cfg_phy_fec().

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 908ef9085..8ba603242 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2762,6 +2762,9 @@ ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
 	if (status)
 		goto out;
 
+	cfg->caps |= (pcaps->caps & ICE_AQC_PHY_EN_AUTO_FEC);
+	cfg->link_fec_opt = pcaps->link_fec_options;
+
 	switch (fec) {
 	case ICE_FEC_BASER:
 		/* Clear RS bits, and AND BASE-R ability
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 20/52] net/ice/baes: add NVM help functions
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (18 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 19/52] net/ice/base: initialize Set PHY Configuration FEC fields Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 21/52] net/ice/base: allow GENEVE and VXLAN rules with VLAN Qi Zhang
                     ` (33 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang, Paul M Stillwell Jr

Add couple functions that DPDK would like to use for accessing the
NVM.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.h |  1 -
 drivers/net/ice/base/ice_nvm.c    | 67 +++++++++++++++++++++++++++++++++++++--
 drivers/net/ice/base/ice_nvm.h    | 10 ++++++
 3 files changed, 74 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 6d971a644..46741a3f1 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -18,7 +18,6 @@ enum ice_fw_modes {
 	ICE_FW_MODE_ROLLBACK
 };
 
-enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw);
 enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw);
 void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw);
 enum ice_status ice_init_hw(struct ice_hw *hw);
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index d5e6215de..bedfbcbb4 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -17,7 +17,7 @@
  *
  * Read the NVM using the admin queue commands (0x0701)
  */
-static enum ice_status
+enum ice_status
 ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,
 		void *data, bool last_command, bool read_shadow_ram,
 		struct ice_sq_cd *cd)
@@ -186,7 +186,7 @@ ice_read_sr_buf_aq(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
  *
  * This function will request NVM ownership.
  */
-static enum ice_status
+enum ice_status
 ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access)
 {
 	ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
@@ -203,7 +203,7 @@ ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access)
  *
  * This function will release NVM ownership.
  */
-static void ice_release_nvm(struct ice_hw *hw)
+void ice_release_nvm(struct ice_hw *hw)
 {
 	ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
 
@@ -301,6 +301,67 @@ ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len,
 }
 
 /**
+ * ice_read_pba_string - Reads part number string from NVM
+ * @hw: pointer to hardware structure
+ * @pba_num: stores the part number string from the NVM
+ * @pba_num_size: part number string buffer length
+ *
+ * Reads the part number string from the NVM.
+ */
+enum ice_status
+ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size)
+{
+	u16 pba_tlv, pba_tlv_len;
+	enum ice_status status;
+	u16 pba_word, pba_size;
+	u16 i;
+
+	status = ice_get_pfa_module_tlv(hw, &pba_tlv, &pba_tlv_len,
+					ICE_SR_PBA_BLOCK_PTR);
+	if (status != ICE_SUCCESS) {
+		ice_debug(hw, ICE_DBG_INIT, "Failed to read PBA Block TLV.\n");
+		return status;
+	}
+
+	/* pba_size is the next word */
+	status = ice_read_sr_word(hw, (pba_tlv + 2), &pba_size);
+	if (status != ICE_SUCCESS) {
+		ice_debug(hw, ICE_DBG_INIT, "Failed to read PBA Section size.\n");
+		return status;
+	}
+
+	if (pba_tlv_len < pba_size) {
+		ice_debug(hw, ICE_DBG_INIT, "Invalid PBA Block TLV size.\n");
+		return ICE_ERR_INVAL_SIZE;
+	}
+
+	/* Subtract one to get PBA word count (PBA Size word is included in
+	 * total size)
+	 */
+	pba_size--;
+	if (pba_num_size < (((u32)pba_size * 2) + 1)) {
+		ice_debug(hw, ICE_DBG_INIT,
+			  "Buffer too small for PBA data.\n");
+		return ICE_ERR_PARAM;
+	}
+
+	for (i = 0; i < pba_size; i++) {
+		status = ice_read_sr_word(hw, (pba_tlv + 2 + 1) + i, &pba_word);
+		if (status != ICE_SUCCESS) {
+			ice_debug(hw, ICE_DBG_INIT,
+				  "Failed to read PBA Block word %d.\n", i);
+			return status;
+		}
+
+		pba_num[(i * 2)] = (pba_word >> 8) & 0xFF;
+		pba_num[(i * 2) + 1] = pba_word & 0xFF;
+	}
+	pba_num[(pba_size * 2)] = '\0';
+
+	return status;
+}
+
+/**
  * ice_get_orom_ver_info - Read Option ROM version information
  * @hw: pointer to the HW struct
  *
diff --git a/drivers/net/ice/base/ice_nvm.h b/drivers/net/ice/base/ice_nvm.h
index 9a61d4153..8e2eb4df1 100644
--- a/drivers/net/ice/base/ice_nvm.h
+++ b/drivers/net/ice/base/ice_nvm.h
@@ -85,13 +85,23 @@ enum ice_status
 ice_handle_nvm_access(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
 		      union ice_nvm_access_data *data);
 enum ice_status
+ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access);
+void ice_release_nvm(struct ice_hw *hw);
+enum ice_status
+ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,
+		void *data, bool last_command, bool read_shadow_ram,
+		struct ice_sq_cd *cd);
+enum ice_status
 ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,
 		  bool read_shadow_ram);
 enum ice_status
 ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len,
 		       u16 module_type);
+enum ice_status
+ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size);
 enum ice_status ice_init_nvm(struct ice_hw *hw);
 enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data);
 enum ice_status
 ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data);
+enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw);
 #endif /* _ICE_NVM_H_ */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 21/52] net/ice/base: allow GENEVE and VXLAN rules with VLAN
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (19 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 20/52] net/ice/baes: add NVM help functions Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 22/52] net/ice/base: increase timeout after PFR Qi Zhang
                     ` (32 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang, Dan Nowlin, Paul M . Stillwell Jr

When programming GENEVE and VXLAN switch rules, there are some instances
where both VLAN tagged packets plus non-VLAN tagged packets are needed
to match the rule.

In order to perform this action in one rule, the switch code needs
to setup the packet flag mask to ignore the VLAN packet flag. This
will allow the rule to match both VLAN and non-VLAN packets.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_protocol_type.h |  7 ++++--
 drivers/net/ice/base/ice_switch.c        | 41 +++++++++++++++++++-------------
 2 files changed, 29 insertions(+), 19 deletions(-)

diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index b75a340aa..964561d23 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -58,8 +58,10 @@ enum ice_sw_tunnel_type {
 	ICE_NON_TUN = 0,
 	ICE_SW_TUN_AND_NON_TUN,
 	ICE_SW_TUN_VXLAN_GPE,
-	ICE_SW_TUN_GENEVE,
-	ICE_SW_TUN_VXLAN,
+	ICE_SW_TUN_GENEVE,      /* GENEVE matches only non-VLAN pkts */
+	ICE_SW_TUN_GENEVE_VLAN, /* GENEVE matches both VLAN and non-VLAN pkts */
+	ICE_SW_TUN_VXLAN,	/* VXLAN matches only non-VLAN pkts */
+	ICE_SW_TUN_VXLAN_VLAN,  /* VXLAN matches both VLAN and non-VLAN pkts */
 	ICE_SW_TUN_NVGRE,
 	ICE_SW_TUN_UDP, /* This means all "UDP" tunnel types: VXLAN-GPE, VXLAN
 			 * and GENEVE
@@ -165,6 +167,7 @@ enum ice_prot_id {
 #define ICE_TUN_FLAG_MDID 21
 #define ICE_TUN_FLAG_MDID_OFF (ICE_MDID_SIZE * ICE_TUN_FLAG_MDID)
 #define ICE_TUN_FLAG_MASK 0xFF
+#define ICE_TUN_FLAG_VLAN_MASK 0x01
 #define ICE_TUN_FLAG_FV_IND 2
 
 #define ICE_PROTOCOL_MAX_ENTRIES 16
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index b4aab6780..ab8b44de7 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -5651,12 +5651,12 @@ ice_find_free_recp_res_idx(struct ice_hw *hw, const ice_bitmap_t *profiles,
  * ice_add_sw_recipe - function to call AQ calls to create switch recipe
  * @hw: pointer to hardware structure
  * @rm: recipe management list entry
- * @match_tun: if field vector index for tunnel needs to be programmed
- * @profiles: bitmap of profiles that will be assocated.
+ * @match_tun_mask: tunnel mask that needs to be programmed
+ * @profiles: bitmap of profiles that will be associated.
  */
 static enum ice_status
 ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm,
-		  bool match_tun, ice_bitmap_t *profiles)
+		  u16 match_tun_mask, ice_bitmap_t *profiles)
 {
 	ice_declare_bitmap(result_idx_bm, ICE_MAX_FV_WORDS);
 	struct ice_aqc_recipe_data_elem *tmp;
@@ -5874,10 +5874,10 @@ ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm,
 		/* To differentiate among different UDP tunnels, a meta data ID
 		 * flag is used.
 		 */
-		if (match_tun) {
+		if (match_tun_mask) {
 			buf[recps].content.lkup_indx[i] = ICE_TUN_FLAG_FV_IND;
 			buf[recps].content.mask[i] =
-				CPU_TO_LE16(ICE_TUN_FLAG_MASK);
+				CPU_TO_LE16(match_tun_mask);
 		}
 
 		recps++;
@@ -6038,12 +6038,19 @@ static bool ice_tun_type_match_word(enum ice_sw_tunnel_type tun_type, u16 *mask)
 {
 	switch (tun_type) {
 	case ICE_SW_TUN_VXLAN_GPE:
+	case ICE_SW_TUN_GENEVE:
+	case ICE_SW_TUN_VXLAN:
 	case ICE_SW_TUN_NVGRE:
 	case ICE_SW_TUN_UDP:
 	case ICE_ALL_TUNNELS:
 		*mask = ICE_TUN_FLAG_MASK;
 		return true;
 
+	case ICE_SW_TUN_GENEVE_VLAN:
+	case ICE_SW_TUN_VXLAN_VLAN:
+		*mask = ICE_TUN_FLAG_MASK & ~ICE_TUN_FLAG_VLAN_MASK;
+		return true;
+
 	default:
 		*mask = 0;
 		return false;
@@ -6101,7 +6108,9 @@ ice_get_compat_fv_bitmap(struct ice_hw *hw, struct ice_adv_rule_info *rinfo,
 		break;
 	case ICE_SW_TUN_VXLAN_GPE:
 	case ICE_SW_TUN_GENEVE:
+	case ICE_SW_TUN_GENEVE_VLAN:
 	case ICE_SW_TUN_VXLAN:
+	case ICE_SW_TUN_VXLAN_VLAN:
 	case ICE_SW_TUN_UDP:
 	case ICE_SW_TUN_GTP:
 		prof_type = ICE_PROF_TUN_UDP;
@@ -6209,7 +6218,7 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
 	struct ice_sw_fv_list_entry *tmp;
 	enum ice_status status = ICE_SUCCESS;
 	struct ice_sw_recipe *rm;
-	bool match_tun = false;
+	u16 match_tun_mask = 0;
 	u16 mask;
 	u8 i;
 
@@ -6272,9 +6281,9 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
 	 * differentiate different tunnel types. A separate recipe needs to be
 	 * used for the metadata.
 	 */
-	if (ice_tun_type_match_word(rinfo->tun_type,  &mask) &&
+	if (ice_tun_type_match_word(rinfo->tun_type, &mask) &&
 	    rm->n_grp_count > 1)
-		match_tun = mask;
+		match_tun_mask = mask;
 
 	/* set the recipe priority if specified */
 	rm->priority = (u8)rinfo->priority;
@@ -6329,7 +6338,7 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
 
 	rm->tun_type = rinfo->tun_type;
 	/* Recipe we need does not exist, add a recipe */
-	status = ice_add_sw_recipe(hw, rm, match_tun, profiles);
+	status = ice_add_sw_recipe(hw, rm, match_tun_mask, profiles);
 	if (status)
 		goto err_unroll;
 
@@ -6510,6 +6519,7 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
 		*offsets = dummy_udp_gtp_packet_offsets;
 		return;
 	}
+
 	if (tun_type == ICE_SW_TUN_PPPOE && ipv6) {
 		*pkt = dummy_pppoe_ipv6_packet;
 		*pkt_len = sizeof(dummy_pppoe_ipv6_packet);
@@ -6544,7 +6554,9 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
 	}
 
 	if (tun_type == ICE_SW_TUN_VXLAN || tun_type == ICE_SW_TUN_GENEVE ||
-	    tun_type == ICE_SW_TUN_VXLAN_GPE || tun_type == ICE_SW_TUN_UDP) {
+	    tun_type == ICE_SW_TUN_VXLAN_GPE || tun_type == ICE_SW_TUN_UDP ||
+	    tun_type == ICE_SW_TUN_GENEVE_VLAN ||
+	    tun_type == ICE_SW_TUN_VXLAN_VLAN) {
 		if (tcp) {
 			*pkt = dummy_udp_tun_tcp_packet;
 			*pkt_len = sizeof(dummy_udp_tun_tcp_packet);
@@ -6751,12 +6763,14 @@ ice_fill_adv_packet_tun(struct ice_hw *hw, enum ice_sw_tunnel_type tun_type,
 	case ICE_SW_TUN_AND_NON_TUN:
 	case ICE_SW_TUN_VXLAN_GPE:
 	case ICE_SW_TUN_VXLAN:
+	case ICE_SW_TUN_VXLAN_VLAN:
 	case ICE_SW_TUN_UDP:
 		if (!ice_get_open_tunnel_port(hw, TNL_VXLAN, &open_port))
 			return ICE_ERR_CFG;
 		break;
 
 	case ICE_SW_TUN_GENEVE:
+	case ICE_SW_TUN_GENEVE_VLAN:
 		if (!ice_get_open_tunnel_port(hw, TNL_GENEVE, &open_port))
 			return ICE_ERR_CFG;
 		break;
@@ -6865,13 +6879,6 @@ ice_adv_add_update_vsi_list(struct ice_hw *hw,
 	     cur_fltr->sw_act.fltr_act == ICE_FWD_TO_VSI_LIST))
 		return ICE_ERR_NOT_IMPL;
 
-	/* Workaround fix for unexpected rule deletion by kernel PF
-	 * during VF reset.
-	 */
-	if (new_fltr->sw_act.fltr_act == ICE_FWD_TO_VSI &&
-	    cur_fltr->sw_act.fltr_act == ICE_FWD_TO_VSI)
-		return ICE_ERR_NOT_IMPL;
-
 	if (m_entry->vsi_count < 2 && !m_entry->vsi_list_info) {
 		 /* Only one entry existed in the mapping and it was not already
 		  * a part of a VSI list. So, create a VSI list with the old and
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 22/52] net/ice/base: increase timeout after PFR
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (20 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 21/52] net/ice/base: allow GENEVE and VXLAN rules with VLAN Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-11 18:38     ` Ferruh Yigit
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 23/52] net/ice/base: remove unnecessary braces Qi Zhang
                     ` (31 subsequent siblings)
  53 siblings, 1 reply; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang, Dan Nowlin, Paul M . Stillwell Jr

To allow for resets during package download, increase the timeout period
after performing a PFR. The time waited is the global config lock
timeout plus the normal PFSWR timeout.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 8ba603242..a617643b6 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -912,7 +912,12 @@ static enum ice_status ice_pf_reset(struct ice_hw *hw)
 
 	wr32(hw, PFGEN_CTRL, (reg | PFGEN_CTRL_PFSWR_M));
 
-	for (cnt = 0; cnt < ICE_PF_RESET_WAIT_COUNT; cnt++) {
+	/* Wait for the PFR to complete. The wait time is the global config lock
+	 * timeout plus the PFR timeout which will account for a possible reset
+	 * that is occurring during a download package operation.
+	 */
+	for (cnt = 0; cnt < ICE_GLOBAL_CFG_LOCK_TIMEOUT +
+	     ICE_PF_RESET_WAIT_COUNT; cnt++) {
 		reg = rd32(hw, PFGEN_CTRL);
 		if (!(reg & PFGEN_CTRL_PFSWR_M))
 			break;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 23/52] net/ice/base: remove unnecessary braces
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (21 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 22/52] net/ice/base: increase timeout after PFR Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-11 18:39     ` Ferruh Yigit
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 24/52] net/ice/base: adjust function signature style format Qi Zhang
                     ` (30 subsequent siblings)
  53 siblings, 1 reply; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Tony Nguyen, Paul M . Stillwell Jr

This patch mainly does cleanups related to unnecessary braces.

A few other minor fixes are included which include fixing a typo,
pulling up some lines, and fixing RCT.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flex_pipe.c | 54 ++++++++++++------------------------
 drivers/net/ice/base/ice_flow.c      | 15 ++++------
 drivers/net/ice/base/ice_flow.h      |  1 +
 3 files changed, 24 insertions(+), 46 deletions(-)

diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 9703b239b..e147afbe5 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2428,12 +2428,10 @@ ice_match_prop_lst(struct LIST_HEAD_TYPE *list1, struct LIST_HEAD_TYPE *list2)
 	u16 count = 0;
 
 	/* compare counts */
-	LIST_FOR_EACH_ENTRY(tmp1, list1, ice_vsig_prof, list) {
+	LIST_FOR_EACH_ENTRY(tmp1, list1, ice_vsig_prof, list)
 		count++;
-	}
-	LIST_FOR_EACH_ENTRY(tmp2, list2, ice_vsig_prof, list) {
+	LIST_FOR_EACH_ENTRY(tmp2, list2, ice_vsig_prof, list)
 		chk_count++;
-	}
 	if (!count || count != chk_count)
 		return false;
 
@@ -2542,13 +2540,12 @@ ice_find_dup_props_vsig(struct ice_hw *hw, enum ice_block blk,
 	struct ice_xlt2 *xlt2 = &hw->blk[blk].xlt2;
 	u16 i;
 
-	for (i = 0; i < xlt2->count; i++) {
+	for (i = 0; i < xlt2->count; i++)
 		if (xlt2->vsig_tbl[i].in_use &&
 		    ice_match_prop_lst(chs, &xlt2->vsig_tbl[i].prop_lst)) {
 			*vsig = ICE_VSIG_VALUE(i, hw->pf_id);
 			return ICE_SUCCESS;
 		}
-	}
 
 	return ICE_ERR_DOES_NOT_EXIST;
 }
@@ -4051,10 +4048,9 @@ ice_has_prof_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl)
 	struct ice_vsig_prof *ent;
 
 	LIST_FOR_EACH_ENTRY(ent, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
-			    ice_vsig_prof, list) {
+			    ice_vsig_prof, list)
 		if (ent->profile_cookie == hdl)
 			return true;
-	}
 
 	ice_debug(hw, ICE_DBG_INIT,
 		  "Characteristic list for VSI group %d not found.\n",
@@ -4076,7 +4072,7 @@ ice_prof_bld_es(struct ice_hw *hw, enum ice_block blk,
 	u16 vec_size = hw->blk[blk].es.fvw * sizeof(struct ice_fv_word);
 	struct ice_chs_chg *tmp;
 
-	LIST_FOR_EACH_ENTRY(tmp, chgs, ice_chs_chg, list_entry) {
+	LIST_FOR_EACH_ENTRY(tmp, chgs, ice_chs_chg, list_entry)
 		if (tmp->type == ICE_PTG_ES_ADD && tmp->add_prof) {
 			u16 off = tmp->prof_id * hw->blk[blk].es.fvw;
 			struct ice_pkg_es *p;
@@ -4097,7 +4093,6 @@ ice_prof_bld_es(struct ice_hw *hw, enum ice_block blk,
 			ice_memcpy(p->es, &hw->blk[blk].es.t[off], vec_size,
 				   ICE_NONDMA_TO_NONDMA);
 		}
-	}
 
 	return ICE_SUCCESS;
 }
@@ -4115,7 +4110,7 @@ ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
 {
 	struct ice_chs_chg *tmp;
 
-	LIST_FOR_EACH_ENTRY(tmp, chgs, ice_chs_chg, list_entry) {
+	LIST_FOR_EACH_ENTRY(tmp, chgs, ice_chs_chg, list_entry)
 		if (tmp->type == ICE_TCAM_ADD && tmp->add_tcam_idx) {
 			struct ice_prof_id_section *p;
 			u32 id;
@@ -4136,7 +4131,6 @@ ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
 				   sizeof(hw->blk[blk].prof.t->key),
 				   ICE_NONDMA_TO_NONDMA);
 		}
-	}
 
 	return ICE_SUCCESS;
 }
@@ -4153,7 +4147,7 @@ ice_prof_bld_xlt1(enum ice_block blk, struct ice_buf_build *bld,
 {
 	struct ice_chs_chg *tmp;
 
-	LIST_FOR_EACH_ENTRY(tmp, chgs, ice_chs_chg, list_entry) {
+	LIST_FOR_EACH_ENTRY(tmp, chgs, ice_chs_chg, list_entry)
 		if (tmp->type == ICE_PTG_ES_ADD && tmp->add_ptg) {
 			struct ice_xlt1_section *p;
 			u32 id;
@@ -4169,7 +4163,6 @@ ice_prof_bld_xlt1(enum ice_block blk, struct ice_buf_build *bld,
 			p->offset = CPU_TO_LE16(tmp->ptype);
 			p->value[0] = tmp->ptg;
 		}
-	}
 
 	return ICE_SUCCESS;
 }
@@ -4400,13 +4393,12 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es)
 		    ICE_PROT_INVALID)
 			first_free = i - 1;
 
-		for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++) {
+		for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++)
 			if (es[i].prot_id == ice_fd_pairs[j].prot_id &&
 			    es[i].off == ice_fd_pairs[j].off) {
 				ice_set_bit(j, pair_list);
 				pair_start[j] = i;
 			}
-		}
 	}
 
 	orig_free = first_free;
@@ -4463,7 +4455,7 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es)
 		}
 
 		/* check for a swap location */
-		for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++) {
+		for (j = 0; j < ICE_FD_SRC_DST_PAIR_COUNT; j++)
 			if (es[si].prot_id == ice_fd_pairs[j].prot_id &&
 			    es[si].off == ice_fd_pairs[j].off) {
 				u8 idx;
@@ -4479,7 +4471,6 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es)
 
 				break;
 			}
-		}
 
 		si -= indexes_used;
 	}
@@ -4732,12 +4723,11 @@ ice_search_prof_id_low(struct ice_hw *hw, enum ice_block blk, u64 id)
 	struct ice_prof_map *map;
 
 	LIST_FOR_EACH_ENTRY(map, &hw->blk[blk].es.prof_map, ice_prof_map,
-			    list) {
+			    list)
 		if (map->profile_cookie == id) {
 			entry = map;
 			break;
 		}
-	}
 
 	return entry;
 }
@@ -4775,9 +4765,8 @@ ice_vsig_prof_id_count(struct ice_hw *hw, enum ice_block blk, u16 vsig)
 	struct ice_vsig_prof *p;
 
 	LIST_FOR_EACH_ENTRY(p, &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
-			    ice_vsig_prof, list) {
+			    ice_vsig_prof, list)
 		count++;
-	}
 
 	return count;
 }
@@ -4822,7 +4811,7 @@ ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk,
 	enum ice_status status;
 	u16 i;
 
-	for (i = 0; i < prof->tcam_count; i++) {
+	for (i = 0; i < prof->tcam_count; i++)
 		if (prof->tcam[i].in_use) {
 			prof->tcam[i].in_use = false;
 			status = ice_rel_tcam_idx(hw, blk,
@@ -4830,7 +4819,6 @@ ice_rem_prof_id(struct ice_hw *hw, enum ice_block blk,
 			if (status)
 				return ICE_ERR_HW_TABLE;
 		}
-	}
 
 	return ICE_SUCCESS;
 }
@@ -4868,7 +4856,7 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
 	/* If the VSIG has at least 1 VSI then iterate through the list
 	 * and remove the VSIs before deleting the group.
 	 */
-	if (vsi_cur) {
+	if (vsi_cur)
 		do {
 			struct ice_vsig_vsi *tmp = vsi_cur->next_vsi;
 			struct ice_chs_chg *p;
@@ -4886,7 +4874,6 @@ ice_rem_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig,
 
 			vsi_cur = tmp;
 		} while (vsi_cur);
-	}
 
 	return ice_vsig_free(hw, blk, vsig);
 }
@@ -4909,7 +4896,7 @@ ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
 
 	LIST_FOR_EACH_ENTRY_SAFE(p, t,
 				 &hw->blk[blk].xlt2.vsig_tbl[idx].prop_lst,
-				 ice_vsig_prof, list) {
+				 ice_vsig_prof, list)
 		if (p->profile_cookie == hdl) {
 			if (ice_vsig_prof_id_count(hw, blk, vsig) == 1)
 				/* this is the last profile, remove the VSIG */
@@ -4922,7 +4909,6 @@ ice_rem_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
 			}
 			return status;
 		}
-	}
 
 	return ICE_ERR_DOES_NOT_EXIST;
 }
@@ -4943,7 +4929,7 @@ ice_rem_flow_all(struct ice_hw *hw, enum ice_block blk, u64 id)
 
 	INIT_LIST_HEAD(&chg);
 
-	for (i = 1; i < ICE_MAX_VSIGS; i++) {
+	for (i = 1; i < ICE_MAX_VSIGS; i++)
 		if (hw->blk[blk].xlt2.vsig_tbl[i].in_use) {
 			if (ice_has_prof_vsig(hw, blk, i, id)) {
 				status = ice_rem_prof_id_vsig(hw, blk, i, id,
@@ -4952,7 +4938,6 @@ ice_rem_flow_all(struct ice_hw *hw, enum ice_block blk, u64 id)
 					goto err_ice_rem_flow_all;
 			}
 		}
-	}
 
 	status = ice_upd_prof_hw(hw, blk, &chg);
 
@@ -5024,7 +5009,7 @@ ice_get_prof(struct ice_hw *hw, enum ice_block blk, u64 hdl,
 	if (!map)
 		return ICE_ERR_DOES_NOT_EXIST;
 
-	for (i = 0; i < map->ptg_cnt; i++) {
+	for (i = 0; i < map->ptg_cnt; i++)
 		if (!hw->blk[blk].es.written[map->prof_id]) {
 			/* add ES to change list */
 			p = (struct ice_chs_chg *)ice_malloc(hw, sizeof(*p));
@@ -5044,7 +5029,6 @@ ice_get_prof(struct ice_hw *hw, enum ice_block blk, u64 hdl,
 
 			LIST_ADD(&p->list_entry, chg);
 		}
-	}
 
 	return ICE_SUCCESS;
 
@@ -5196,12 +5180,11 @@ ice_rem_chg_tcam_ent(struct ice_hw *hw, u16 idx, struct LIST_HEAD_TYPE *chg)
 {
 	struct ice_chs_chg *pos, *tmp;
 
-	LIST_FOR_EACH_ENTRY_SAFE(tmp, pos, chg, ice_chs_chg, list_entry) {
+	LIST_FOR_EACH_ENTRY_SAFE(tmp, pos, chg, ice_chs_chg, list_entry)
 		if (tmp->type == ICE_TCAM_ADD && tmp->tcam_idx == idx) {
 			LIST_DEL(&tmp->list_entry);
 			ice_free(hw, tmp);
 		}
-	}
 }
 
 /**
@@ -5814,13 +5797,12 @@ ice_rem_prof_from_list(struct ice_hw *hw, struct LIST_HEAD_TYPE *lst, u64 hdl)
 {
 	struct ice_vsig_prof *ent, *tmp;
 
-	LIST_FOR_EACH_ENTRY_SAFE(ent, tmp, lst, ice_vsig_prof, list) {
+	LIST_FOR_EACH_ENTRY_SAFE(ent, tmp, lst, ice_vsig_prof, list)
 		if (ent->profile_cookie == hdl) {
 			LIST_DEL(&ent->list);
 			ice_free(hw, ent);
 			return ICE_SUCCESS;
 		}
-	}
 
 	return ICE_ERR_DOES_NOT_EXIST;
 }
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 00f58697f..dfa351ff2 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1387,7 +1387,7 @@ ice_flow_find_prof_conds(struct ice_hw *hw, enum ice_block blk,
 	struct ice_flow_prof *p, *prof = NULL;
 
 	ice_acquire_lock(&hw->fl_profs_locks[blk]);
-	LIST_FOR_EACH_ENTRY(p, &hw->fl_profs[blk], ice_flow_prof, l_entry) {
+	LIST_FOR_EACH_ENTRY(p, &hw->fl_profs[blk], ice_flow_prof, l_entry)
 		if ((p->dir == dir || conds & ICE_FLOW_FIND_PROF_NOT_CHK_DIR) &&
 		    segs_cnt && segs_cnt == p->segs_cnt) {
 			u8 i;
@@ -1413,7 +1413,6 @@ ice_flow_find_prof_conds(struct ice_hw *hw, enum ice_block blk,
 				break;
 			}
 		}
-	}
 	ice_release_lock(&hw->fl_profs_locks[blk]);
 
 	return prof;
@@ -1450,10 +1449,9 @@ ice_flow_find_prof_id(struct ice_hw *hw, enum ice_block blk, u64 prof_id)
 {
 	struct ice_flow_prof *p;
 
-	LIST_FOR_EACH_ENTRY(p, &hw->fl_profs[blk], ice_flow_prof, l_entry) {
+	LIST_FOR_EACH_ENTRY(p, &hw->fl_profs[blk], ice_flow_prof, l_entry)
 		if (p->id == prof_id)
 			return p;
-	}
 
 	return NULL;
 }
@@ -3159,13 +3157,12 @@ void ice_rem_vsi_rss_list(struct ice_hw *hw, u16 vsi_handle)
 
 	ice_acquire_lock(&hw->rss_locks);
 	LIST_FOR_EACH_ENTRY_SAFE(r, tmp, &hw->rss_list_head,
-				 ice_rss_cfg, l_entry) {
+				 ice_rss_cfg, l_entry)
 		if (ice_test_and_clear_bit(vsi_handle, r->vsis))
 			if (!ice_is_any_bit_set(r->vsis, ICE_MAX_VSI)) {
 				LIST_DEL(&r->l_entry);
 				ice_free(hw, r);
 			}
-	}
 	ice_release_lock(&hw->rss_locks);
 }
 
@@ -3192,7 +3189,7 @@ enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
 
 	ice_acquire_lock(&hw->fl_profs_locks[blk]);
 	LIST_FOR_EACH_ENTRY_SAFE(p, t, &hw->fl_profs[blk], ice_flow_prof,
-				 l_entry) {
+				 l_entry)
 		if (ice_is_bit_set(p->vsis, vsi_handle)) {
 			status = ice_flow_disassoc_prof(hw, blk, p, vsi_handle);
 			if (status)
@@ -3204,7 +3201,6 @@ enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle)
 					break;
 			}
 		}
-	}
 	ice_release_lock(&hw->fl_profs_locks[blk]);
 
 	return status;
@@ -3228,7 +3224,7 @@ ice_rem_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof)
 	 * remove from the RSS entry list of the VSI context and delete entry.
 	 */
 	LIST_FOR_EACH_ENTRY_SAFE(r, tmp, &hw->rss_list_head,
-				 ice_rss_cfg, l_entry) {
+				 ice_rss_cfg, l_entry)
 		if (r->hashed_flds == prof->segs[prof->segs_cnt - 1].match &&
 		    r->packet_hdr == prof->segs[prof->segs_cnt - 1].hdrs) {
 			ice_clear_bit(vsi_handle, r->vsis);
@@ -3238,7 +3234,6 @@ ice_rem_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof)
 			}
 			return;
 		}
-	}
 }
 
 /**
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 93043acc8..88c369a33 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -7,6 +7,7 @@
 
 #include "ice_flex_type.h"
 #include "ice_acl.h"
+
 #define ICE_IPV4_MAKE_PREFIX_MASK(prefix) ((u32)(~0) << (32 - (prefix)))
 #define ICE_FLOW_PROF_ID_INVAL		0xfffffffffffffffful
 #define ICE_FLOW_PROF_ID_BYPASS		0
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 24/52] net/ice/base: adjust function signature style format
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (22 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 23/52] net/ice/base: remove unnecessary braces Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 25/52] net/ice/base: add RSS support for IPv6 prefix Qi Zhang
                     ` (29 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Bruce Allan, Paul M . Stillwell Jr

Where possible, cuddle multiple lines of function signatures to be
consistent throughout the code.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c   |  3 +--
 drivers/net/ice/base/ice_controlq.c |  9 +++------
 drivers/net/ice/base/ice_dcb.c      |  3 +--
 drivers/net/ice/base/ice_fdir.c     |  5 ++---
 drivers/net/ice/base/ice_sched.c    | 21 +++++++--------------
 drivers/net/ice/base/ice_switch.c   | 17 ++++++-----------
 6 files changed, 20 insertions(+), 38 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index a617643b6..d8d583bdf 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1720,8 +1720,7 @@ ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res)
  * @num: number of resources
  * @res: pointer to array that contains the resources to free
  */
-enum ice_status
-ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)
+enum ice_status ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)
 {
 	struct ice_aqc_alloc_free_res_elem *buf;
 	enum ice_status status;
diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c
index 47dde2f7c..3ef86fa03 100644
--- a/drivers/net/ice/base/ice_controlq.c
+++ b/drivers/net/ice/base/ice_controlq.c
@@ -742,8 +742,7 @@ enum ice_status ice_create_all_ctrlq(struct ice_hw *hw)
  *
  * Destroys the send and receive queue locks for a given control queue.
  */
-static void
-ice_destroy_ctrlq_locks(struct ice_ctl_q_info *cq)
+static void ice_destroy_ctrlq_locks(struct ice_ctl_q_info *cq)
 {
 	ice_destroy_lock(&cq->sq_lock);
 	ice_destroy_lock(&cq->rq_lock);
@@ -1040,8 +1039,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 	if (!cmd_completed) {
 		if (rd32(hw, cq->rq.len) & cq->rq.len_crit_mask ||
 		    rd32(hw, cq->sq.len) & cq->sq.len_crit_mask) {
-			ice_debug(hw, ICE_DBG_AQ_MSG,
-				  "Critical FW error.\n");
+			ice_debug(hw, ICE_DBG_AQ_MSG, "Critical FW error.\n");
 			status = ICE_ERR_AQ_FW_CRITICAL;
 		} else {
 			ice_debug(hw, ICE_DBG_AQ_MSG,
@@ -1167,8 +1165,7 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 
 	ice_debug(hw, ICE_DBG_AQ_DESC, "ARQ: desc and buffer:\n");
 
-	ice_debug_cq(hw, (void *)desc, e->msg_buf,
-		     cq->rq_buf_size);
+	ice_debug_cq(hw, (void *)desc, e->msg_buf, cq->rq_buf_size);
 
 	/* Restore the original datalen and buffer address in the desc,
 	 * FW updates datalen to indicate the event message size
diff --git a/drivers/net/ice/base/ice_dcb.c b/drivers/net/ice/base/ice_dcb.c
index 50634a145..6bdec18c0 100644
--- a/drivers/net/ice/base/ice_dcb.c
+++ b/drivers/net/ice/base/ice_dcb.c
@@ -631,8 +631,7 @@ ice_parse_org_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)
  *
  * Parse DCB configuration from the LLDPDU
  */
-enum ice_status
-ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg)
+enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg)
 {
 	struct ice_lldp_org_tlv *tlv;
 	enum ice_status ret = ICE_SUCCESS;
diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index a62e6eeba..466e0ee36 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -571,8 +571,7 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
  * ice_set_dflt_val_fd_desc
  * @fd_fltr_ctx: pointer to fd filter descriptor
  */
-void
-ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx)
+void ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx)
 {
 	fd_fltr_ctx->comp_q = ICE_FXD_FLTR_QW0_COMP_Q_ZERO;
 	fd_fltr_ctx->comp_report = ICE_FXD_FLTR_QW0_COMP_REPORT_SW_FAIL;
@@ -681,7 +680,7 @@ ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_YES;
 		fdir_fltr_ctx.qindex = 0;
 	} else if (input->dest_ctl ==
-			ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_OTHER) {
+		   ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_OTHER) {
 		fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_NO;
 		fdir_fltr_ctx.qindex = 0;
 	} else {
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 0a46dd40b..2541103ad 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -1932,8 +1932,7 @@ ice_sched_cfg_vsi(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 maxqs,
  * This function removes single aggregator VSI info entry from
  * aggregator list.
  */
-static void
-ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle)
+static void ice_sched_rm_agg_vsi_info(struct ice_port_info *pi, u16 vsi_handle)
 {
 	struct ice_sched_agg_info *agg_info;
 	struct ice_sched_agg_info *atmp;
@@ -3079,8 +3078,7 @@ ice_sched_save_vsi_bw_alloc(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
  *
  * Save or clear CIR bandwidth (BW) in the passed param bw_t_info.
  */
-static void
-ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
+static void ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
 {
 	if (bw == ICE_SCHED_DFLT_BW) {
 		ice_clear_bit(ICE_BW_TYPE_CIR, bw_t_info->bw_t_bitmap);
@@ -3099,8 +3097,7 @@ ice_set_clear_cir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
  *
  * Save or clear EIR bandwidth (BW) in the passed param bw_t_info.
  */
-static void
-ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
+static void ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
 {
 	if (bw == ICE_SCHED_DFLT_BW) {
 		ice_clear_bit(ICE_BW_TYPE_EIR, bw_t_info->bw_t_bitmap);
@@ -3125,8 +3122,7 @@ ice_set_clear_eir_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
  *
  * Save or clear shared bandwidth (BW) in the passed param bw_t_info.
  */
-static void
-ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
+static void ice_set_clear_shared_bw(struct ice_bw_type_info *bw_t_info, u32 bw)
 {
 	if (bw == ICE_SCHED_DFLT_BW) {
 		ice_clear_bit(ICE_BW_TYPE_SHARED, bw_t_info->bw_t_bitmap);
@@ -3188,8 +3184,7 @@ ice_sched_save_vsi_bw(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
  *
  * Save or clear priority (prio) in the passed param bw_t_info.
  */
-static void
-ice_set_clear_prio(struct ice_bw_type_info *bw_t_info, u8 prio)
+static void ice_set_clear_prio(struct ice_bw_type_info *bw_t_info, u8 prio)
 {
 	bw_t_info->generic = prio;
 	if (bw_t_info->generic)
@@ -5355,8 +5350,7 @@ void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
  *
  * This function replay TC nodes.
  */
-enum ice_status
-ice_sched_replay_tc_node_bw(struct ice_port_info *pi)
+enum ice_status ice_sched_replay_tc_node_bw(struct ice_port_info *pi)
 {
 	enum ice_status status = ICE_SUCCESS;
 	u8 tc;
@@ -5479,8 +5473,7 @@ ice_sched_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
  * This function replays association of VSI to aggregator type nodes, and
  * node bandwidth information.
  */
-enum ice_status
-ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
+enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle)
 {
 	struct ice_port_info *pi = hw->port_info;
 	enum ice_status status;
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index ab8b44de7..6387f9b84 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1007,8 +1007,7 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,
  * this array is the recipe ID and the element is the mapping of which profiles
  * is this recipe mapped to.
  */
-static void
-ice_get_recp_to_prof_map(struct ice_hw *hw)
+static void ice_get_recp_to_prof_map(struct ice_hw *hw)
 {
 	ice_declare_bitmap(r_bitmap, ICE_MAX_NUM_RECIPES);
 	u16 i;
@@ -3511,8 +3510,7 @@ ice_add_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list,
  *
  * Function add MAC rule for logical port from HW struct
  */
-enum ice_status
-ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
+enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
 {
 	if (!m_list || !hw)
 		return ICE_ERR_PARAM;
@@ -3710,8 +3708,7 @@ ice_add_vlan_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list,
  *
  * Function add VLAN rule for logical port from HW struct
  */
-enum ice_status
-ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list)
+enum ice_status ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *v_list)
 {
 	if (!v_list || !hw)
 		return ICE_ERR_PARAM;
@@ -3814,7 +3811,6 @@ ice_add_eth_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list,
 	return ICE_SUCCESS;
 }
 
-enum ice_status
 /**
  * ice_add_eth_mac - Add a ethertype based filter rule
  * @hw: pointer to the hardware structure
@@ -3822,6 +3818,7 @@ enum ice_status
  *
  * Function add ethertype rule for logical port from HW struct
  */
+enum ice_status
 ice_add_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list)
 {
 	if (!em_list || !hw)
@@ -4124,8 +4121,7 @@ ice_remove_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list,
  * @m_list: list of MAC addresses and forwarding information
  *
  */
-enum ice_status
-ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
+enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list)
 {
 	struct ice_sw_recipe *recp_list;
 
@@ -7415,8 +7411,7 @@ ice_rem_adv_rule_by_id(struct ice_hw *hw,
  * as removing a rule fails, it will return immediately with the error code,
  * else it will return ICE_SUCCESS
  */
-enum ice_status
-ice_rem_adv_rule_for_vsi(struct ice_hw *hw, u16 vsi_handle)
+enum ice_status ice_rem_adv_rule_for_vsi(struct ice_hw *hw, u16 vsi_handle)
 {
 	struct ice_adv_fltr_mgmt_list_entry *list_itr;
 	struct ice_vsi_list_map_info *map_info;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 25/52] net/ice/base: add RSS support for IPv6 prefix
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (23 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 24/52] net/ice/base: adjust function signature style format Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 26/52] net/ice/base: use macro for sizeof Qi Zhang
                     ` (28 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Junfeng Guo, Paul M . Stillwell Jr

Some IPv6 prefix related fields are defined in this patch, so that we
can use prefixes instead of full IPv6 address for RSS. These prefixes
include the first 32, 48, 64 bits of both SRC and DST IPV6 address.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flow.c | 27 +++++++++++++++++++++++++++
 drivers/net/ice/base/ice_flow.h | 34 ++++++++++++++++++++++++++++++++++
 2 files changed, 61 insertions(+)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index dfa351ff2..030a55ba7 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -10,6 +10,9 @@
 #define ICE_FLOW_FLD_SZ_VLAN		2
 #define ICE_FLOW_FLD_SZ_IPV4_ADDR	4
 #define ICE_FLOW_FLD_SZ_IPV6_ADDR	16
+#define ICE_FLOW_FLD_SZ_IPV6_PRE32_ADDR	4
+#define ICE_FLOW_FLD_SZ_IPV6_PRE48_ADDR	6
+#define ICE_FLOW_FLD_SZ_IPV6_PRE64_ADDR	8
 #define ICE_FLOW_FLD_SZ_IP_DSCP		1
 #define ICE_FLOW_FLD_SZ_IP_TTL		1
 #define ICE_FLOW_FLD_SZ_IP_PROT		1
@@ -91,6 +94,24 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = {
 	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 8, ICE_FLOW_FLD_SZ_IPV6_ADDR),
 	/* ICE_FLOW_FIELD_IDX_IPV6_DA */
 	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 24, ICE_FLOW_FLD_SZ_IPV6_ADDR),
+	/* ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA */
+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 8,
+			  ICE_FLOW_FLD_SZ_IPV6_PRE32_ADDR),
+	/* ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA */
+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 24,
+			  ICE_FLOW_FLD_SZ_IPV6_PRE32_ADDR),
+	/* ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA */
+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 8,
+			  ICE_FLOW_FLD_SZ_IPV6_PRE48_ADDR),
+	/* ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA */
+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 24,
+			  ICE_FLOW_FLD_SZ_IPV6_PRE48_ADDR),
+	/* ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA */
+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 8,
+			  ICE_FLOW_FLD_SZ_IPV6_PRE64_ADDR),
+	/* ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA */
+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 24,
+			  ICE_FLOW_FLD_SZ_IPV6_PRE64_ADDR),
 	/* Transport */
 	/* ICE_FLOW_FIELD_IDX_TCP_SRC_PORT */
 	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_TCP, 0, ICE_FLOW_FLD_SZ_PORT),
@@ -959,6 +980,12 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
 		break;
 	case ICE_FLOW_FIELD_IDX_IPV6_SA:
 	case ICE_FLOW_FIELD_IDX_IPV6_DA:
+	case ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA:
+	case ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA:
+	case ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA:
+	case ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA:
+	case ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA:
+	case ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA:
 		prot_id = seg == 0 ? ICE_PROT_IPV6_OF_OR_S : ICE_PROT_IPV6_IL;
 		break;
 	case ICE_FLOW_FIELD_IDX_TCP_SRC_PORT:
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 88c369a33..6e4257123 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -26,6 +26,15 @@
 #define ICE_FLOW_HASH_IPV6	\
 	(BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_SA) | \
 	 BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_DA))
+#define ICE_FLOW_HASH_IPV6_PRE32	\
+	(BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA) | \
+	 BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA))
+#define ICE_FLOW_HASH_IPV6_PRE48	\
+	(BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA) | \
+	 BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA))
+#define ICE_FLOW_HASH_IPV6_PRE64	\
+	(BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA) | \
+	 BIT_ULL(ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA))
 #define ICE_FLOW_HASH_TCP_PORT	\
 	(BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_SRC_PORT) | \
 	 BIT_ULL(ICE_FLOW_FIELD_IDX_TCP_DST_PORT))
@@ -44,6 +53,25 @@
 #define ICE_HASH_SCTP_IPV4	(ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_SCTP_PORT)
 #define ICE_HASH_SCTP_IPV6	(ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_SCTP_PORT)
 
+#define ICE_HASH_TCP_IPV6_PRE32	 \
+	(ICE_FLOW_HASH_IPV6_PRE32 | ICE_FLOW_HASH_TCP_PORT)
+#define ICE_HASH_UDP_IPV6_PRE32	 \
+	(ICE_FLOW_HASH_IPV6_PRE32 | ICE_FLOW_HASH_UDP_PORT)
+#define ICE_HASH_SCTP_IPV6_PRE32 \
+	(ICE_FLOW_HASH_IPV6_PRE32 | ICE_FLOW_HASH_SCTP_PORT)
+#define ICE_HASH_TCP_IPV6_PRE48	 \
+	(ICE_FLOW_HASH_IPV6_PRE48 | ICE_FLOW_HASH_TCP_PORT)
+#define ICE_HASH_UDP_IPV6_PRE48	 \
+	(ICE_FLOW_HASH_IPV6_PRE48 | ICE_FLOW_HASH_UDP_PORT)
+#define ICE_HASH_SCTP_IPV6_PRE48 \
+	(ICE_FLOW_HASH_IPV6_PRE48 | ICE_FLOW_HASH_SCTP_PORT)
+#define ICE_HASH_TCP_IPV6_PRE64	 \
+	(ICE_FLOW_HASH_IPV6_PRE64 | ICE_FLOW_HASH_TCP_PORT)
+#define ICE_HASH_UDP_IPV6_PRE64	 \
+	(ICE_FLOW_HASH_IPV6_PRE64 | ICE_FLOW_HASH_UDP_PORT)
+#define ICE_HASH_SCTP_IPV6_PRE64 \
+	(ICE_FLOW_HASH_IPV6_PRE64 | ICE_FLOW_HASH_SCTP_PORT)
+
 #define ICE_FLOW_HASH_GTP_TEID \
 	(BIT_ULL(ICE_FLOW_FIELD_IDX_GTPC_TEID))
 
@@ -186,6 +214,12 @@ enum ice_flow_field {
 	ICE_FLOW_FIELD_IDX_IPV4_DA,
 	ICE_FLOW_FIELD_IDX_IPV6_SA,
 	ICE_FLOW_FIELD_IDX_IPV6_DA,
+	ICE_FLOW_FIELD_IDX_IPV6_PRE32_SA,
+	ICE_FLOW_FIELD_IDX_IPV6_PRE32_DA,
+	ICE_FLOW_FIELD_IDX_IPV6_PRE48_SA,
+	ICE_FLOW_FIELD_IDX_IPV6_PRE48_DA,
+	ICE_FLOW_FIELD_IDX_IPV6_PRE64_SA,
+	ICE_FLOW_FIELD_IDX_IPV6_PRE64_DA,
 	/* L4 */
 	ICE_FLOW_FIELD_IDX_TCP_SRC_PORT,
 	ICE_FLOW_FIELD_IDX_TCP_DST_PORT,
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 26/52] net/ice/base: use macro for sizeof
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (24 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 25/52] net/ice/base: add RSS support for IPv6 prefix Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 27/52] net/ice/base: add debug logs Qi Zhang
                     ` (27 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Jacob Keller, Paul M . Stillwell Jr

The definition of ICE_SW_RULE_RX_TX_ETH_HDR_SIZE open codes the size of
a structure field. Replace this with the use of FIELD_SIZEOF.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.h | 17 ++++++++---------
 1 file changed, 8 insertions(+), 9 deletions(-)

diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 7317d17ef..8c7e98bfa 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -32,24 +32,24 @@
 #define DUMMY_ETH_HDR_LEN		16
 #define ICE_SW_RULE_RX_TX_ETH_HDR_SIZE \
 	(sizeof(struct ice_aqc_sw_rules_elem) - \
-	 sizeof(((struct ice_aqc_sw_rules_elem *)0)->pdata) + \
+	 FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \
 	 sizeof(struct ice_sw_rule_lkup_rx_tx) + DUMMY_ETH_HDR_LEN - 1)
 #define ICE_SW_RULE_RX_TX_NO_HDR_SIZE \
 	(sizeof(struct ice_aqc_sw_rules_elem) - \
-	 sizeof(((struct ice_aqc_sw_rules_elem *)0)->pdata) + \
+	 FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \
 	 sizeof(struct ice_sw_rule_lkup_rx_tx) - 1)
 #define ICE_SW_RULE_LG_ACT_SIZE(n) \
 	(sizeof(struct ice_aqc_sw_rules_elem) - \
-	 sizeof(((struct ice_aqc_sw_rules_elem *)0)->pdata) + \
+	 FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \
 	 sizeof(struct ice_sw_rule_lg_act) - \
-	 sizeof(((struct ice_sw_rule_lg_act *)0)->act) + \
-	 ((n) * sizeof(((struct ice_sw_rule_lg_act *)0)->act)))
+	 FIELD_SIZEOF(struct ice_sw_rule_lg_act, act) + \
+	 ((n) * FIELD_SIZEOF(struct ice_sw_rule_lg_act, act)))
 #define ICE_SW_RULE_VSI_LIST_SIZE(n) \
 	(sizeof(struct ice_aqc_sw_rules_elem) - \
-	 sizeof(((struct ice_aqc_sw_rules_elem *)0)->pdata) + \
+	 FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \
 	 sizeof(struct ice_sw_rule_vsi_list) - \
-	 sizeof(((struct ice_sw_rule_vsi_list *)0)->vsi) + \
-	 ((n) * sizeof(((struct ice_sw_rule_vsi_list *)0)->vsi)))
+	 FIELD_SIZEOF(struct ice_sw_rule_vsi_list, vsi) + \
+	 ((n) * FIELD_SIZEOF(struct ice_sw_rule_vsi_list, vsi)))
 
 /* Worst case buffer length for ice_aqc_opc_get_res_alloc */
 #define ICE_MAX_RES_TYPES 0x80
@@ -490,5 +490,4 @@ ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi,
 void ice_rm_sw_replay_rule_info(struct ice_hw *hw, struct ice_switch_info *sw);
 void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw);
 bool ice_is_prof_rule(enum ice_sw_tunnel_type type);
-
 #endif /* _ICE_SWITCH_H_ */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 27/52] net/ice/base: add debug logs
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (25 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 26/52] net/ice/base: use macro for sizeof Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 28/52] net/ice/base: return correct error code Qi Zhang
                     ` (26 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Paul Greenwalt, Paul M . Stillwell Jr

Add debug logs for ice_aq_get_phy_caps(), and format
ice_aq_set_phy_cfg() and ice_aq_get_link_info() debug logs to make them
more readable.

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 69 +++++++++++++++++++++++++++++----------
 1 file changed, 51 insertions(+), 18 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index d8d583bdf..e1181a102 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -147,11 +147,13 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
 	u16 pcaps_size = sizeof(*pcaps);
 	struct ice_aq_desc desc;
 	enum ice_status status;
+	struct ice_hw *hw;
 
 	cmd = &desc.params.get_phy;
 
 	if (!pcaps || (report_mode & ~ICE_AQC_REPORT_MODE_M) || !pi)
 		return ICE_ERR_PARAM;
+	hw = pi->hw;
 
 	ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_phy_caps);
 
@@ -159,7 +161,33 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
 		cmd->param0 |= CPU_TO_LE16(ICE_AQC_GET_PHY_RQM);
 
 	cmd->param0 |= CPU_TO_LE16(report_mode);
-	status = ice_aq_send_cmd(pi->hw, &desc, pcaps, pcaps_size, cd);
+	status = ice_aq_send_cmd(hw, &desc, pcaps, pcaps_size, cd);
+
+	ice_debug(hw, ICE_DBG_LINK, "get phy caps - report_mode = 0x%x\n",
+		  report_mode);
+	ice_debug(hw, ICE_DBG_LINK, "	phy_type_low = 0x%llx\n",
+		  (unsigned long long)LE64_TO_CPU(pcaps->phy_type_low));
+	ice_debug(hw, ICE_DBG_LINK, "	phy_type_high = 0x%llx\n",
+		  (unsigned long long)LE64_TO_CPU(pcaps->phy_type_high));
+	ice_debug(hw, ICE_DBG_LINK, "	caps = 0x%x\n", pcaps->caps);
+	ice_debug(hw, ICE_DBG_LINK, "	low_power_ctrl_an = 0x%x\n",
+		  pcaps->low_power_ctrl_an);
+	ice_debug(hw, ICE_DBG_LINK, "	eee_cap = 0x%x\n", pcaps->eee_cap);
+	ice_debug(hw, ICE_DBG_LINK, "	eeer_value = 0x%x\n",
+		  pcaps->eeer_value);
+	ice_debug(hw, ICE_DBG_LINK, "	link_fec_options = 0x%x\n",
+		  pcaps->link_fec_options);
+	ice_debug(hw, ICE_DBG_LINK, "	module_compliance_enforcement = 0x%x\n",
+		  pcaps->module_compliance_enforcement);
+	ice_debug(hw, ICE_DBG_LINK, "   extended_compliance_code = 0x%x\n",
+		  pcaps->extended_compliance_code);
+	ice_debug(hw, ICE_DBG_LINK, "   module_type[0] = 0x%x\n",
+		  pcaps->module_type[0]);
+	ice_debug(hw, ICE_DBG_LINK, "   module_type[1] = 0x%x\n",
+		  pcaps->module_type[1]);
+	ice_debug(hw, ICE_DBG_LINK, "   module_type[2] = 0x%x\n",
+		  pcaps->module_type[2]);
+
 
 	if (status == ICE_SUCCESS && report_mode == ICE_AQC_REPORT_TOPO_CAP) {
 		pi->phy.phy_type_low = LE64_TO_CPU(pcaps->phy_type_low);
@@ -399,18 +427,21 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
 
 	li->lse_ena = !!(resp->cmd_flags & CPU_TO_LE16(ICE_AQ_LSE_IS_ENABLED));
 
-	ice_debug(hw, ICE_DBG_LINK, "link_speed = 0x%x\n", li->link_speed);
-	ice_debug(hw, ICE_DBG_LINK, "phy_type_low = 0x%llx\n",
+	ice_debug(hw, ICE_DBG_LINK, "get link info\n");
+	ice_debug(hw, ICE_DBG_LINK, "	link_speed = 0x%x\n", li->link_speed);
+	ice_debug(hw, ICE_DBG_LINK, "	phy_type_low = 0x%llx\n",
 		  (unsigned long long)li->phy_type_low);
-	ice_debug(hw, ICE_DBG_LINK, "phy_type_high = 0x%llx\n",
+	ice_debug(hw, ICE_DBG_LINK, "	phy_type_high = 0x%llx\n",
 		  (unsigned long long)li->phy_type_high);
-	ice_debug(hw, ICE_DBG_LINK, "media_type = 0x%x\n", *hw_media_type);
-	ice_debug(hw, ICE_DBG_LINK, "link_info = 0x%x\n", li->link_info);
-	ice_debug(hw, ICE_DBG_LINK, "an_info = 0x%x\n", li->an_info);
-	ice_debug(hw, ICE_DBG_LINK, "ext_info = 0x%x\n", li->ext_info);
-	ice_debug(hw, ICE_DBG_LINK, "lse_ena = 0x%x\n", li->lse_ena);
-	ice_debug(hw, ICE_DBG_LINK, "max_frame = 0x%x\n", li->max_frame_size);
-	ice_debug(hw, ICE_DBG_LINK, "pacing = 0x%x\n", li->pacing);
+	ice_debug(hw, ICE_DBG_LINK, "	media_type = 0x%x\n", *hw_media_type);
+	ice_debug(hw, ICE_DBG_LINK, "	link_info = 0x%x\n", li->link_info);
+	ice_debug(hw, ICE_DBG_LINK, "	an_info = 0x%x\n", li->an_info);
+	ice_debug(hw, ICE_DBG_LINK, "	ext_info = 0x%x\n", li->ext_info);
+	ice_debug(hw, ICE_DBG_LINK, "	fec_info = 0x%x\n", li->fec_info);
+	ice_debug(hw, ICE_DBG_LINK, "	lse_ena = 0x%x\n", li->lse_ena);
+	ice_debug(hw, ICE_DBG_LINK, "	max_frame = 0x%x\n",
+		  li->max_frame_size);
+	ice_debug(hw, ICE_DBG_LINK, "	pacing = 0x%x\n", li->pacing);
 
 	/* save link status information */
 	if (link)
@@ -2377,16 +2408,18 @@ ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,
 	desc.params.set_phy.lport_num = pi->lport;
 	desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
 
-	ice_debug(hw, ICE_DBG_LINK, "phy_type_low = 0x%llx\n",
+	ice_debug(hw, ICE_DBG_LINK, "set phy cfg\n");
+	ice_debug(hw, ICE_DBG_LINK, "	phy_type_low = 0x%llx\n",
 		  (unsigned long long)LE64_TO_CPU(cfg->phy_type_low));
-	ice_debug(hw, ICE_DBG_LINK, "phy_type_high = 0x%llx\n",
+	ice_debug(hw, ICE_DBG_LINK, "	phy_type_high = 0x%llx\n",
 		  (unsigned long long)LE64_TO_CPU(cfg->phy_type_high));
-	ice_debug(hw, ICE_DBG_LINK, "caps = 0x%x\n", cfg->caps);
-	ice_debug(hw, ICE_DBG_LINK, "low_power_ctrl_an = 0x%x\n",
+	ice_debug(hw, ICE_DBG_LINK, "	caps = 0x%x\n", cfg->caps);
+	ice_debug(hw, ICE_DBG_LINK, "	low_power_ctrl_an = 0x%x\n",
 		  cfg->low_power_ctrl_an);
-	ice_debug(hw, ICE_DBG_LINK, "eee_cap = 0x%x\n", cfg->eee_cap);
-	ice_debug(hw, ICE_DBG_LINK, "eeer_value = 0x%x\n", cfg->eeer_value);
-	ice_debug(hw, ICE_DBG_LINK, "link_fec_opt = 0x%x\n", cfg->link_fec_opt);
+	ice_debug(hw, ICE_DBG_LINK, "	eee_cap = 0x%x\n", cfg->eee_cap);
+	ice_debug(hw, ICE_DBG_LINK, "	eeer_value = 0x%x\n", cfg->eeer_value);
+	ice_debug(hw, ICE_DBG_LINK, "	link_fec_opt = 0x%x\n",
+		  cfg->link_fec_opt);
 
 	status = ice_aq_send_cmd(hw, &desc, cfg, sizeof(*cfg), cd);
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 28/52] net/ice/base: return correct error code
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (26 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 27/52] net/ice/base: add debug logs Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-11 18:39     ` Ferruh Yigit
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 29/52] net/ice/base: remove unnecessary code Qi Zhang
                     ` (25 subsequent siblings)
  53 siblings, 1 reply; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Kiran Patil, Paul M . Stillwell Jr

Return ICE_ERR_DOES_NOT_EXIST return code if admin command error code is
ICE_AQ_RC_ENOENT (not exist). ice_aq_sw_rules is used when switch
rule is getting added/deleted/updated. In case of delete/update
switch rule, admin command can return ICE_AQ_RC_ENOENT error code
if such rule does not exist, hence return ICE_ERR_DOES_NOT_EXIST error
code from ice_aq_sw_rule, so that caller of this fucnction can decide
how to handle ICE_ERR_DOES_NOT_EXIST.

Allow proper cleanup of internal data structures from ice_rem_adv_rule
function if ice_aq_sw_rules return error code ICE_ERR_DOES_NOT_EXIST
otherwise per recipe:rule list will never become empty.

Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 6387f9b84..fa3a59e51 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1868,6 +1868,7 @@ ice_aq_sw_rules(struct ice_hw *hw, void *rule_list, u16 rule_list_sz,
 		u8 num_rules, enum ice_adminq_opc opc, struct ice_sq_cd *cd)
 {
 	struct ice_aq_desc desc;
+	enum ice_status status;
 
 	ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
 
@@ -1881,7 +1882,12 @@ ice_aq_sw_rules(struct ice_hw *hw, void *rule_list, u16 rule_list_sz,
 	desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
 	desc.params.sw_rules.num_rules_fltr_entry_index =
 		CPU_TO_LE16(num_rules);
-	return ice_aq_send_cmd(hw, &desc, rule_list, rule_list_sz, cd);
+	status = ice_aq_send_cmd(hw, &desc, rule_list, rule_list_sz, cd);
+	if (opc != ice_aqc_opc_add_sw_rules &&
+	    hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT)
+		status = ICE_ERR_DOES_NOT_EXIST;
+
+	return status;
 }
 
 /**
@@ -7354,7 +7360,7 @@ ice_rem_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
 		status = ice_aq_sw_rules(hw, (struct ice_aqc_sw_rules *)s_rule,
 					 rule_buf_sz, 1,
 					 ice_aqc_opc_remove_sw_rules, NULL);
-		if (status == ICE_SUCCESS) {
+		if (status == ICE_SUCCESS || status == ICE_ERR_DOES_NOT_EXIST) {
 			ice_acquire_lock(rule_lock);
 			LIST_DEL(&list_elem->list_entry);
 			ice_free(hw, list_elem->lkups);
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 29/52] net/ice/base: remove unnecessary code
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (27 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 28/52] net/ice/base: return correct error code Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-11 18:35     ` Ferruh Yigit
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 30/52] net/ice/base: add support for more PPPoE packet type Qi Zhang
                     ` (24 subsequent siblings)
  53 siblings, 1 reply; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang

Remove unncessary case branch.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flow.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 030a55ba7..53ff5f4be 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1384,7 +1384,6 @@ ice_flow_proc_segs(struct ice_hw *hw, struct ice_flow_prof_params *params)
 		if (status)
 			return status;
 		break;
-	case ICE_BLK_SW:
 	default:
 		return ICE_ERR_NOT_IMPL;
 	}
@@ -2915,8 +2914,6 @@ ice_flow_add_entry(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
 			goto out;
 
 		break;
-	case ICE_BLK_SW:
-	case ICE_BLK_PE:
 	default:
 		status = ICE_ERR_NOT_IMPL;
 		goto out;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 30/52] net/ice/base: add support for more PPPoE packet type
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (28 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 29/52] net/ice/base: remove unnecessary code Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 31/52] net/ice/base: reset flags when all rules are deleted Qi Zhang
                     ` (23 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang, Wei Zhao, Paul M . Stillwell Jr

This patch add more dummy packet type for pppoe packet,
it enable tcp/udp layer of ipv4/ipv6 for pppoe payload,
so we can use L4 dst/src port as input set for switch
filter.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_protocol_type.h |   7 +
 drivers/net/ice/base/ice_switch.c        | 252 ++++++++++++++++++++++++++++++-
 drivers/net/ice/base/ice_switch.h        |   7 +
 3 files changed, 265 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index 964561d23..85af7513c 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -68,6 +68,13 @@ enum ice_sw_tunnel_type {
 			 */
 	ICE_SW_TUN_GTP,
 	ICE_SW_TUN_PPPOE,
+	ICE_SW_TUN_PPPOE_PAY,
+	ICE_SW_TUN_PPPOE_IPV4,
+	ICE_SW_TUN_PPPOE_IPV4_TCP,
+	ICE_SW_TUN_PPPOE_IPV4_UDP,
+	ICE_SW_TUN_PPPOE_IPV6,
+	ICE_SW_TUN_PPPOE_IPV6_TCP,
+	ICE_SW_TUN_PPPOE_IPV6_UDP,
 	ICE_SW_TUN_IPV4_ESP,
 	ICE_SW_TUN_IPV6_ESP,
 	ICE_SW_TUN_IPV4_AH,
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index fa3a59e51..94268d560 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -542,6 +542,15 @@ static const struct ice_dummy_pkt_offsets dummy_pppoe_packet_offsets[] = {
 	{ ICE_PROTOCOL_LAST,	0 },
 };
 
+static const struct ice_dummy_pkt_offsets dummy_pppoe_packet_ipv4_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_ETYPE_OL,		12 },
+	{ ICE_VLAN_OFOS,	14},
+	{ ICE_PPPOE,		18 },
+	{ ICE_IPV4_OFOS,	26 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
 static const u8 dummy_pppoe_ipv4_packet[] = {
 	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
 	0x00, 0x00, 0x00, 0x00,
@@ -565,6 +574,92 @@ static const u8 dummy_pppoe_ipv4_packet[] = {
 	0x00, 0x00,		/* 2 bytes for 4 bytes alignment */
 };
 
+static const
+struct ice_dummy_pkt_offsets dummy_pppoe_ipv4_tcp_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_ETYPE_OL,		12 },
+	{ ICE_VLAN_OFOS,	14},
+	{ ICE_PPPOE,		18 },
+	{ ICE_IPV4_OFOS,	26 },
+	{ ICE_TCP_IL,		46 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_pppoe_ipv4_tcp_packet[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x81, 0x00,		/* ICE_ETYPE_OL 12 */
+
+	0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 14 */
+
+	0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */
+	0x00, 0x16,
+
+	0x00, 0x21,		/* PPP Link Layer 24 */
+
+	0x45, 0x00, 0x00, 0x28, /* ICE_IPV4_OFOS 26 */
+	0x00, 0x01, 0x00, 0x00,
+	0x00, 0x06, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00, 0x00, 0x00, /* ICE_TCP_IL 46 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x50, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00,		/* 2 bytes for 4 bytes alignment */
+};
+
+static const
+struct ice_dummy_pkt_offsets dummy_pppoe_ipv4_udp_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_ETYPE_OL,		12 },
+	{ ICE_VLAN_OFOS,	14},
+	{ ICE_PPPOE,		18 },
+	{ ICE_IPV4_OFOS,	26 },
+	{ ICE_UDP_ILOS,		46 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_pppoe_ipv4_udp_packet[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x81, 0x00,		/* ICE_ETYPE_OL 12 */
+
+	0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 14 */
+
+	0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */
+	0x00, 0x16,
+
+	0x00, 0x21,		/* PPP Link Layer 24 */
+
+	0x45, 0x00, 0x00, 0x1c, /* ICE_IPV4_OFOS 26 */
+	0x00, 0x01, 0x00, 0x00,
+	0x00, 0x11, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00, 0x00, 0x00, /* ICE_UDP_ILOS 46 */
+	0x00, 0x08, 0x00, 0x00,
+
+	0x00, 0x00,		/* 2 bytes for 4 bytes alignment */
+};
+
+static const struct ice_dummy_pkt_offsets dummy_pppoe_packet_ipv6_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_ETYPE_OL,		12 },
+	{ ICE_VLAN_OFOS,	14},
+	{ ICE_PPPOE,		18 },
+	{ ICE_IPV6_OFOS,	26 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
 static const u8 dummy_pppoe_ipv6_packet[] = {
 	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
 	0x00, 0x00, 0x00, 0x00,
@@ -593,6 +688,93 @@ static const u8 dummy_pppoe_ipv6_packet[] = {
 	0x00, 0x00,		/* 2 bytes for 4 bytes alignment */
 };
 
+static const
+struct ice_dummy_pkt_offsets dummy_pppoe_packet_ipv6_tcp_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_ETYPE_OL,		12 },
+	{ ICE_VLAN_OFOS,	14},
+	{ ICE_PPPOE,		18 },
+	{ ICE_IPV6_OFOS,	26 },
+	{ ICE_TCP_IL,		66 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_pppoe_ipv6_tcp_packet[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x81, 0x00,		/* ICE_ETYPE_OL 12 */
+
+	0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 14 */
+
+	0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */
+	0x00, 0x2a,
+
+	0x00, 0x57,		/* PPP Link Layer 24 */
+
+	0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 26 */
+	0x00, 0x14, 0x06, 0x00, /* Next header is TCP */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00, 0x00, 0x00, /* ICE_TCP_IL 66 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x50, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00,		/* 2 bytes for 4 bytes alignment */
+};
+
+static const
+struct ice_dummy_pkt_offsets dummy_pppoe_packet_ipv6_udp_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_ETYPE_OL,		12 },
+	{ ICE_VLAN_OFOS,	14},
+	{ ICE_PPPOE,		18 },
+	{ ICE_IPV6_OFOS,	26 },
+	{ ICE_UDP_ILOS,		66 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_pppoe_ipv6_udp_packet[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x81, 0x00,		/* ICE_ETYPE_OL 12 */
+
+	0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 14 */
+
+	0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */
+	0x00, 0x2a,
+
+	0x00, 0x57,		/* PPP Link Layer 24 */
+
+	0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 26 */
+	0x00, 0x08, 0x11, 0x00, /* Next header UDP*/
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00, 0x00, 0x00, /* ICE_UDP_ILOS 66 */
+	0x00, 0x08, 0x00, 0x00,
+
+	0x00, 0x00,		/* 2 bytes for 4 bytes alignment */
+};
+
 static const struct ice_dummy_pkt_offsets dummy_ipv4_esp_packet_offsets[] = {
 	{ ICE_MAC_OFOS,		0 },
 	{ ICE_IPV4_OFOS,	14 },
@@ -6123,6 +6305,31 @@ ice_get_compat_fv_bitmap(struct ice_hw *hw, struct ice_adv_rule_info *rinfo,
 	case ICE_SW_TUN_PPPOE:
 		prof_type = ICE_PROF_TUN_PPPOE;
 		break;
+	case ICE_SW_TUN_PPPOE_PAY:
+		ice_set_bit(ICE_PROFID_PPPOE_PAY, bm);
+		return;
+	case ICE_SW_TUN_PPPOE_IPV4:
+		ice_set_bit(ICE_PROFID_PPPOE_IPV4_OTHER, bm);
+		ice_set_bit(ICE_PROFID_PPPOE_IPV4_UDP, bm);
+		ice_set_bit(ICE_PROFID_PPPOE_IPV4_TCP, bm);
+		return;
+	case ICE_SW_TUN_PPPOE_IPV4_TCP:
+		ice_set_bit(ICE_PROFID_PPPOE_IPV4_TCP, bm);
+		return;
+	case ICE_SW_TUN_PPPOE_IPV4_UDP:
+		ice_set_bit(ICE_PROFID_PPPOE_IPV4_UDP, bm);
+		return;
+	case ICE_SW_TUN_PPPOE_IPV6:
+		ice_set_bit(ICE_PROFID_PPPOE_IPV6_OTHER, bm);
+		ice_set_bit(ICE_PROFID_PPPOE_IPV6_UDP, bm);
+		ice_set_bit(ICE_PROFID_PPPOE_IPV6_TCP, bm);
+		return;
+	case ICE_SW_TUN_PPPOE_IPV6_TCP:
+		ice_set_bit(ICE_PROFID_PPPOE_IPV6_TCP, bm);
+		return;
+	case ICE_SW_TUN_PPPOE_IPV6_UDP:
+		ice_set_bit(ICE_PROFID_PPPOE_IPV6_UDP, bm);
+		return;
 	case ICE_SW_TUN_PROFID_IPV6_ESP:
 	case ICE_SW_TUN_IPV6_ESP:
 		ice_set_bit(ICE_PROFID_IPV6_ESP, bm);
@@ -6527,13 +6734,56 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
 		*pkt_len = sizeof(dummy_pppoe_ipv6_packet);
 		*offsets = dummy_pppoe_packet_offsets;
 		return;
-	} else if (tun_type == ICE_SW_TUN_PPPOE) {
+	} else if (tun_type == ICE_SW_TUN_PPPOE ||
+		tun_type == ICE_SW_TUN_PPPOE_PAY) {
 		*pkt = dummy_pppoe_ipv4_packet;
 		*pkt_len = sizeof(dummy_pppoe_ipv4_packet);
 		*offsets = dummy_pppoe_packet_offsets;
 		return;
 	}
 
+	if (tun_type == ICE_SW_TUN_PPPOE_IPV4) {
+		*pkt = dummy_pppoe_ipv4_packet;
+		*pkt_len = sizeof(dummy_pppoe_ipv4_packet);
+		*offsets = dummy_pppoe_packet_ipv4_offsets;
+		return;
+	}
+
+	if (tun_type == ICE_SW_TUN_PPPOE_IPV4_TCP) {
+		*pkt = dummy_pppoe_ipv4_tcp_packet;
+		*pkt_len = sizeof(dummy_pppoe_ipv4_tcp_packet);
+		*offsets = dummy_pppoe_ipv4_tcp_packet_offsets;
+		return;
+	}
+
+	if (tun_type == ICE_SW_TUN_PPPOE_IPV4_UDP) {
+		*pkt = dummy_pppoe_ipv4_udp_packet;
+		*pkt_len = sizeof(dummy_pppoe_ipv4_udp_packet);
+		*offsets = dummy_pppoe_ipv4_udp_packet_offsets;
+		return;
+	}
+
+	if (tun_type == ICE_SW_TUN_PPPOE_IPV6) {
+		*pkt = dummy_pppoe_ipv6_packet;
+		*pkt_len = sizeof(dummy_pppoe_ipv6_packet);
+		*offsets = dummy_pppoe_packet_ipv6_offsets;
+		return;
+	}
+
+	if (tun_type == ICE_SW_TUN_PPPOE_IPV6_TCP) {
+		*pkt = dummy_pppoe_ipv6_tcp_packet;
+		*pkt_len = sizeof(dummy_pppoe_ipv6_tcp_packet);
+		*offsets = dummy_pppoe_packet_ipv6_tcp_offsets;
+		return;
+	}
+
+	if (tun_type == ICE_SW_TUN_PPPOE_IPV6_UDP) {
+		*pkt = dummy_pppoe_ipv6_udp_packet;
+		*pkt_len = sizeof(dummy_pppoe_ipv6_udp_packet);
+		*offsets = dummy_pppoe_packet_ipv6_udp_offsets;
+		return;
+	}
+
 	if (tun_type == ICE_ALL_TUNNELS) {
 		*pkt = dummy_gre_udp_packet;
 		*pkt_len = sizeof(dummy_gre_udp_packet);
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 8c7e98bfa..bd634f98f 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -16,6 +16,13 @@
 #define ICE_FLTR_TX_RX (ICE_FLTR_RX | ICE_FLTR_TX)
 
 /* Switch Profile IDs for Profile related switch rules */
+#define ICE_PROFID_PPPOE_PAY		34
+#define ICE_PROFID_PPPOE_IPV4_TCP	35
+#define ICE_PROFID_PPPOE_IPV4_UDP	36
+#define ICE_PROFID_PPPOE_IPV4_OTHER	37
+#define ICE_PROFID_PPPOE_IPV6_TCP	38
+#define ICE_PROFID_PPPOE_IPV6_UDP	39
+#define ICE_PROFID_PPPOE_IPV6_OTHER	40
 #define ICE_PROFID_IPV4_ESP		71
 #define ICE_PROFID_IPV6_ESP		72
 #define ICE_PROFID_IPV4_AH		73
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 31/52] net/ice/base: reset flags when all rules are deleted
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (29 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 30/52] net/ice/base: add support for more PPPoE packet type Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 32/52] net/ice/base: reset capabilities before parsing Qi Zhang
                     ` (22 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Kiran Patil, Paul M . Stillwell Jr

To avoid having stale information about "adv_rule" per recipe, when all
rules associated to a given recipe are deleted, reset the "adv_rule"
flag otherwise it causes problem later on when decisions about filter
rules being present or not are made based on "adv_rule" flag.

Removed setting "adv_rule = 1" when recipe is created. It is set correctly
when advanced switch rule is added referring to the recipe which was
created as a result of adding advanced switch rule.

Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 94268d560..f379a5f5d 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -4122,6 +4122,9 @@ void ice_rem_all_sw_rules_info(struct ice_hw *hw)
 			ice_rem_sw_rule_info(hw, rule_head);
 		else
 			ice_rem_adv_rule_info(hw, rule_head);
+		if (sw->recp_list[i].adv_rule &&
+		    LIST_EMPTY(&sw->recp_list[i].filt_rules))
+			sw->recp_list[i].adv_rule = false;
 	}
 }
 
@@ -6130,7 +6133,6 @@ ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm,
 		recp->n_grp_count = rm->n_grp_count;
 		recp->tun_type = rm->tun_type;
 		recp->recp_created = true;
-		recp->adv_rule = 1;
 	}
 	rm->root_buf = buf;
 	ice_free(hw, tmp);
@@ -7611,11 +7613,15 @@ ice_rem_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
 					 rule_buf_sz, 1,
 					 ice_aqc_opc_remove_sw_rules, NULL);
 		if (status == ICE_SUCCESS || status == ICE_ERR_DOES_NOT_EXIST) {
+			struct ice_switch_info *sw = hw->switch_info;
+
 			ice_acquire_lock(rule_lock);
 			LIST_DEL(&list_elem->list_entry);
 			ice_free(hw, list_elem->lkups);
 			ice_free(hw, list_elem);
 			ice_release_lock(rule_lock);
+			if (LIST_EMPTY(&sw->recp_list[rid].filt_rules))
+				sw->recp_list[rid].adv_rule = false;
 		}
 		ice_free(hw, s_rule);
 	}
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 32/52] net/ice/base: reset capabilities before parsing
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (30 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 31/52] net/ice/base: reset flags when all rules are deleted Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 33/52] net/ice/base: add RL profile bit mask check Qi Zhang
                     ` (21 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Jacob Keller, Paul M . Stillwell Jr

The capability flags used to report whether an NVM component has
a pending update are stored as simple booleans. If ice_parse_caps finds
the relevant capability then the boolean is set to true.

If the capability is not provided by firmware, then the boolean value
will be left alone. This works during initialization because the
capabilities structure is zero-initialized.

However, this does not work if capabilities are updated by calling
ice_get_caps again after driver load. For example, consider if firmware
had a pending update, and then an EMPR was triggered. The update will
complete, and firmware will no longer report these capabilities.

However, the device driver will have already set the pending flags.
After an EMPR, new capabilities are read. However, because the pending
flags in the dev_caps.common_cap structure have already been set, they
will remain true.

Fix this by clearing the capabilities structures in ice_parse_caps
before processing any capabilities.

This ensures that the capabilities structure will always be refreshed to
match the state of the device or function capabilities reported by
firmware.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index e1181a102..e2e7f1137 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1828,10 +1828,16 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
 	if (opc == ice_aqc_opc_list_dev_caps) {
 		dev_p = &hw->dev_caps;
 		caps = &dev_p->common_cap;
+
+		ice_memset(dev_p, 0, sizeof(*dev_p), ICE_NONDMA_MEM);
+
 		prefix = "dev cap";
 	} else if (opc == ice_aqc_opc_list_func_caps) {
 		func_p = &hw->func_caps;
 		caps = &func_p->common_cap;
+
+		ice_memset(func_p, 0, sizeof(*func_p), ICE_NONDMA_MEM);
+
 		prefix = "func cap";
 	} else {
 		ice_debug(hw, ICE_DBG_INIT, "wrong opcode\n");
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 33/52] net/ice/base: add RL profile bit mask check
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (31 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 32/52] net/ice/base: reset capabilities before parsing Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-11 18:39     ` Ferruh Yigit
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 34/52] net/ice/base: update the vsi handle to remaining VSI Qi Zhang
                     ` (20 subsequent siblings)
  53 siblings, 1 reply; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Tarun Singh, Paul M . Stillwell Jr

Mask bits before accessing the profile type field.

Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_sched.c | 11 ++++++-----
 1 file changed, 6 insertions(+), 5 deletions(-)

diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 2541103ad..f48c971c8 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -3856,8 +3856,8 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
 	hw = pi->hw;
 	LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
 			    ice_aqc_rl_profile_info, list_entry)
-		if (rl_prof_elem->profile.flags == profile_type &&
-		    rl_prof_elem->bw == bw)
+		if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
+		    profile_type && rl_prof_elem->bw == bw)
 			/* Return existing profile ID info */
 			return rl_prof_elem;
 
@@ -4088,7 +4088,8 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
 	/* Check the existing list for RL profile */
 	LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
 			    ice_aqc_rl_profile_info, list_entry)
-		if (rl_prof_elem->profile.flags == profile_type &&
+		if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
+		    profile_type &&
 		    LE16_TO_CPU(rl_prof_elem->profile.profile_id) ==
 		    profile_id) {
 			if (rl_prof_elem->prof_id_ref)
@@ -4250,8 +4251,8 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
 		return ICE_SUCCESS;
 
 	return ice_sched_rm_rl_profile(pi, layer_num,
-				       rl_prof_info->profile.flags,
-				       old_id);
+				       rl_prof_info->profile.flags &
+				       ICE_AQC_RL_PROFILE_TYPE_M, old_id);
 }
 
 /**
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 34/52] net/ice/base: update the vsi handle to remaining VSI
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (32 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 33/52] net/ice/base: add RL profile bit mask check Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-11 18:40     ` Ferruh Yigit
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 35/52] net/ice/base: correct return value Qi Zhang
                     ` (19 subsequent siblings)
  53 siblings, 1 reply; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Haiyue Wang, Paul M . Stillwell Jr

Needs to update the VSI handle to the last remaining VSI using the
rule for ICE_FWD_TO_VSI. Otherwise it may have error for deleting the
rule.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index f379a5f5d..01dcace55 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -7491,6 +7491,7 @@ ice_adv_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
 			ice_get_hw_vsi_num(hw, rem_vsi_handle);
 		fm_list->rule_info.sw_act.fwd_id.hw_vsi_id =
 			ice_get_hw_vsi_num(hw, rem_vsi_handle);
+		fm_list->rule_info.sw_act.vsi_handle = rem_vsi_handle;
 
 		/* Update the previous switch rule of "MAC forward to VSI" to
 		 * "MAC fwd to VSI list"
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 35/52] net/ice/base: correct return value
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (33 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 34/52] net/ice/base: update the vsi handle to remaining VSI Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-11 18:40     ` Ferruh Yigit
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 36/52] net/ice/base: remove unneeded variable Qi Zhang
                     ` (18 subsequent siblings)
  53 siblings, 1 reply; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Kiran Patil, Paul M . Stillwell Jr

Function ice_rem_adv_rule_id return incorrect error code (ICE_ERR_PARAM)
whereas it should have returned ICE_ERR_DOES_NOT_EXIST return code
if filter list is empty or unable to find "rule" in list

Signed-off-by: Kiran Patil <kiran.patil@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 01dcace55..5c53b9ec3 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -7661,7 +7661,8 @@ ice_rem_adv_rule_by_id(struct ice_hw *hw,
 						list_itr->lkups_cnt, &rinfo);
 		}
 	}
-	return ICE_ERR_PARAM;
+	/* either list is empty or unable to find rule */
+	return ICE_ERR_DOES_NOT_EXIST;
 }
 
 /**
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 36/52] net/ice/base: remove unneeded variable
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (34 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 35/52] net/ice/base: correct return value Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 37/52] net/ice/base: fix for memory leak Qi Zhang
                     ` (17 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Tony Nguyen, Paul M . Stillwell Jr

The variable 'adj' is initialized to 0 and later used in an addition, but
the value is never changed from 0. Remove the variable since it's doing
nothing.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flow.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 53ff5f4be..fa0b7f54b 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -914,7 +914,6 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
 	struct ice_flow_fld_info *flds;
 	u16 cnt, ese_bits, i;
 	u16 sib_mask = 0;
-	s16 adj = 0;
 	u16 mask;
 	u16 off;
 
@@ -1060,7 +1059,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
 	flds[fld].xtrct.prot_id = prot_id;
 	flds[fld].xtrct.off = (ice_flds_info[fld].off / ese_bits) *
 		ICE_FLOW_FV_EXTRACT_SZ;
-	flds[fld].xtrct.disp = (u8)((ice_flds_info[fld].off + adj) % ese_bits);
+	flds[fld].xtrct.disp = (u8)(ice_flds_info[fld].off % ese_bits);
 	flds[fld].xtrct.idx = params->es_cnt;
 	flds[fld].xtrct.mask = ice_flds_info[fld].mask;
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 37/52] net/ice/base: fix for memory leak
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (35 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 36/52] net/ice/base: remove unneeded variable Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 38/52] net/ice/base: add entries in Profile TCAM with priority Qi Zhang
                     ` (16 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, stable, Surabhi Boob, Paul M . Stillwell Jr

Handles memory leaks during control queue initialization and
buffer allocation failures. The MACRO - ICE_FREE_CQ_BUFS is modified to
re-use for this fix.

Fixes: 6c1f26be50a2 ("net/ice/base: add control queue information")
Cc: stable@dpdk.org

Signed-off-by: Surabhi Boob <surabhi.boob@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_controlq.c | 39 +++++++++++++++++++++++--------------
 1 file changed, 24 insertions(+), 15 deletions(-)

diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c
index 3ef86fa03..f278ef636 100644
--- a/drivers/net/ice/base/ice_controlq.c
+++ b/drivers/net/ice/base/ice_controlq.c
@@ -182,7 +182,9 @@ ice_alloc_rq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
 	i--;
 	for (; i >= 0; i--)
 		ice_free_dma_mem(hw, &cq->rq.r.rq_bi[i]);
+	cq->rq.r.rq_bi = NULL;
 	ice_free(hw, cq->rq.dma_head);
+	cq->rq.dma_head = NULL;
 
 	return ICE_ERR_NO_MEMORY;
 }
@@ -220,7 +222,9 @@ ice_alloc_sq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
 	i--;
 	for (; i >= 0; i--)
 		ice_free_dma_mem(hw, &cq->sq.r.sq_bi[i]);
+	cq->sq.r.sq_bi = NULL;
 	ice_free(hw, cq->sq.dma_head);
+	cq->sq.dma_head = NULL;
 
 	return ICE_ERR_NO_MEMORY;
 }
@@ -279,6 +283,24 @@ ice_cfg_rq_regs(struct ice_hw *hw, struct ice_ctl_q_info *cq)
 	return ICE_SUCCESS;
 }
 
+#define ICE_FREE_CQ_BUFS(hw, qi, ring)					\
+do {									\
+	/* free descriptors */						\
+	if ((qi)->ring.r.ring##_bi) {					\
+		int i;							\
+									\
+		for (i = 0; i < (qi)->num_##ring##_entries; i++)	\
+			if ((qi)->ring.r.ring##_bi[i].pa)		\
+				ice_free_dma_mem((hw),			\
+					&(qi)->ring.r.ring##_bi[i]);	\
+	}								\
+	/* free the buffer info list */					\
+	if ((qi)->ring.cmd_buf)						\
+		ice_free(hw, (qi)->ring.cmd_buf);			\
+	/* free DMA head */						\
+	ice_free(hw, (qi)->ring.dma_head);				\
+} while (0)
+
 /**
  * ice_init_sq - main initialization routine for Control ATQ
  * @hw: pointer to the hardware structure
@@ -334,6 +356,7 @@ static enum ice_status ice_init_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
 	goto init_ctrlq_exit;
 
 init_ctrlq_free_rings:
+	ICE_FREE_CQ_BUFS(hw, cq, sq);
 	ice_free_cq_ring(hw, &cq->sq);
 
 init_ctrlq_exit:
@@ -395,27 +418,13 @@ static enum ice_status ice_init_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
 	goto init_ctrlq_exit;
 
 init_ctrlq_free_rings:
+	ICE_FREE_CQ_BUFS(hw, cq, rq);
 	ice_free_cq_ring(hw, &cq->rq);
 
 init_ctrlq_exit:
 	return ret_code;
 }
 
-#define ICE_FREE_CQ_BUFS(hw, qi, ring)					\
-do {									\
-	int i;								\
-	/* free descriptors */						\
-	for (i = 0; i < (qi)->num_##ring##_entries; i++)		\
-		if ((qi)->ring.r.ring##_bi[i].pa)			\
-			ice_free_dma_mem((hw),				\
-					 &(qi)->ring.r.ring##_bi[i]);	\
-	/* free the buffer info list */					\
-	if ((qi)->ring.cmd_buf)						\
-		ice_free(hw, (qi)->ring.cmd_buf);			\
-	/* free DMA head */						\
-	ice_free(hw, (qi)->ring.dma_head);				\
-} while (0)
-
 /**
  * ice_shutdown_sq - shutdown the Control ATQ
  * @hw: pointer to the hardware structure
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 38/52] net/ice/base: add entries in Profile TCAM with priority
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (36 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 37/52] net/ice/base: fix for memory leak Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 39/52] net/ice/base: remove unimplemented function prototypes Qi Zhang
                     ` (15 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang, Dan Nowlin, Paul M . Stillwell Jr

The profile TCAM tables are implemented such that entries with a smaller
index in the table have a higher priority. When records to be added to the
table have flags to differentiate between standard PTG and VSIG records,
then these entries need to have higher priority in order to be found and
processed first.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flex_pipe.c | 20 ++++++++++++++++----
 1 file changed, 16 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index e147afbe5..f953d891d 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2893,20 +2893,22 @@ static bool ice_tcam_ent_rsrc_type(enum ice_block blk, u16 *rsrc_type)
  * ice_alloc_tcam_ent - allocate hardware TCAM entry
  * @hw: pointer to the HW struct
  * @blk: the block to allocate the TCAM for
+ * @btm: true to allocate from bottom of table, false to allocate from top
  * @tcam_idx: pointer to variable to receive the TCAM entry
  *
  * This function allocates a new entry in a Profile ID TCAM for a specific
  * block.
  */
 static enum ice_status
-ice_alloc_tcam_ent(struct ice_hw *hw, enum ice_block blk, u16 *tcam_idx)
+ice_alloc_tcam_ent(struct ice_hw *hw, enum ice_block blk, bool btm,
+		   u16 *tcam_idx)
 {
 	u16 res_type;
 
 	if (!ice_tcam_ent_rsrc_type(blk, &res_type))
 		return ICE_ERR_PARAM;
 
-	return ice_alloc_hw_res(hw, res_type, 1, true, tcam_idx);
+	return ice_alloc_hw_res(hw, res_type, 1, btm, tcam_idx);
 }
 
 /**
@@ -5225,7 +5227,12 @@ ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,
 	}
 
 	/* for re-enabling, reallocate a TCAM */
-	status = ice_alloc_tcam_ent(hw, blk, &tcam->tcam_idx);
+	/* for entries with empty attribute masks, allocate entry from
+	 * the bottom of the tcam table; otherwise, allocate from the
+	 * top of the table in order to give it higher priority
+	 */
+	status = ice_alloc_tcam_ent(hw, blk, tcam->attr.mask == 0,
+				    &tcam->tcam_idx);
 	if (status)
 		return status;
 
@@ -5426,7 +5433,12 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
 			goto err_ice_add_prof_id_vsig;
 
 		/* allocate the TCAM entry index */
-		status = ice_alloc_tcam_ent(hw, blk, &tcam_idx);
+		/* for entries with empty attribute masks, allocate entry from
+		 * the bottom of the tcam table; otherwise, allocate from the
+		 * top of the table in order to give it higher priority
+		 */
+		status = ice_alloc_tcam_ent(hw, blk, map->attr[i].mask == 0,
+					    &tcam_idx);
 		if (status) {
 			ice_free(hw, p);
 			goto err_ice_add_prof_id_vsig;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 39/52] net/ice/base: remove unimplemented function prototypes
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (37 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 38/52] net/ice/base: add entries in Profile TCAM with priority Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 40/52] net/ice/base: add new API to check all autoneg enable bits Qi Zhang
                     ` (14 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Tony Nguyen, Paul M . Stillwell Jr

There are no implementations for these two functions so remove the
prototypes.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_fdir.h | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
index 5b75fed34..e4f7b1387 100644
--- a/drivers/net/ice/base/ice_fdir.h
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -239,13 +239,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
 			  u8 *pkt, bool frag, bool tun);
 enum ice_status
 ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag);
-enum ice_status
-ice_add_del_fdir(struct ice_hw *hw, struct ice_fdir_fltr *input, bool add);
 int ice_get_fdir_cnt_all(struct ice_hw *hw);
 bool ice_fdir_is_dup_fltr(struct ice_hw *hw, struct ice_fdir_fltr *input);
-enum ice_status
-ice_update_fdir_list_entry(struct ice_hw *hw, struct ice_fdir_fltr *input,
-			   u16 sw_idx);
 bool ice_fdir_has_frag(enum ice_fltr_ptype flow);
 struct ice_fdir_fltr *
 ice_fdir_find_fltr_by_idx(struct ice_hw *hw, u32 fltr_idx);
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 40/52] net/ice/base: add new API to check all autoneg enable bits
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (38 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 39/52] net/ice/base: remove unimplemented function prototypes Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-11 18:42     ` Ferruh Yigit
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 41/52] net/ice/base: avoid PPPoE ipv4 overlap Qi Zhang
                     ` (13 subsequent siblings)
  53 siblings, 1 reply; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Paul Greenwalt, Paul M . Stillwell Jr

struct ice_aqc_get_phy_caps_data has multiple autoneg enable bits.
ice_is_phy_caps_an_enabled checks all bits and returns true if any
autoneg enable bits are set.

Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 15 +++++++++++++++
 drivers/net/ice/base/ice_common.h |  1 +
 2 files changed, 16 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index e2e7f1137..8efc4b4cc 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -4533,3 +4533,18 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
 
 	return status;
 }
+
+/**
+ * ice_is_phy_caps_an_enabled - check if PHY capabilities autoneg is enabled
+ * @caps: get PHY capability data
+ */
+bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps)
+{
+	if (caps->caps & ICE_AQC_PHY_AN_MODE ||
+	    caps->low_power_ctrl_an & (ICE_AQC_PHY_AN_EN_CLAUSE28 |
+				       ICE_AQC_PHY_AN_EN_CLAUSE73 |
+				       ICE_AQC_PHY_AN_EN_CLAUSE37))
+		return true;
+
+	return false;
+}
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 46741a3f1..cb41497bc 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -143,6 +143,7 @@ bool ice_fw_supports_link_override(struct ice_hw *hw);
 enum ice_status
 ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
 			      struct ice_port_info *pi);
+bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps);
 
 enum ice_fc_mode ice_caps_to_fc_mode(u8 caps);
 enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options);
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 41/52] net/ice/base: avoid PPPoE ipv4 overlap
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (39 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 40/52] net/ice/base: add new API to check all autoneg enable bits Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 42/52] net/ice/base: initialize AQ failure variable when set fc Qi Zhang
                     ` (12 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang, Yahui Cao, Paul M . Stillwell Jr

When PPPOE header is not selected, pppoe should not be included in
ipv4 ptype bitmaps.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flow.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index fa0b7f54b..744b2805f 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -198,7 +198,7 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = {
 static const u32 ice_ptypes_mac_ofos[] = {
 	0xFDC00846, 0xBFBF7F7E, 0xF70001DF, 0xFEFDFDFB,
 	0x0000077E, 0x00000000, 0x00000000, 0x00000000,
-	0x00000000, 0x03FFF000, 0x7FFFFFE0, 0x00000000,
+	0x00400000, 0x03FFF000, 0x7FFFFFE0, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -222,7 +222,7 @@ static const u32 ice_ptypes_macvlan_il[] = {
 static const u32 ice_ptypes_ipv4_ofos[] = {
 	0x1DC00000, 0x04000800, 0x00000000, 0x00000000,
 	0x00000000, 0x00000155, 0x00000000, 0x00000000,
-	0x0003000F, 0x000FC000, 0x83E0F800, 0x00000101,
+	0x00000000, 0x000FC000, 0x83E0F800, 0x00000101,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -765,6 +765,10 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
 			src = (const ice_bitmap_t *)ice_ptypes_pppoe;
 			ice_and_bitmap(params->ptypes, params->ptypes, src,
 				       ICE_FLOW_PTYPE_MAX);
+		} else {
+			src = (const ice_bitmap_t *)ice_ptypes_pppoe;
+			ice_andnot_bitmap(params->ptypes, params->ptypes, src,
+					  ICE_FLOW_PTYPE_MAX);
 		}
 
 		if (hdrs & ICE_FLOW_SEG_HDR_ICMP) {
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 42/52] net/ice/base: initialize AQ failure variable when set fc
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (40 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 41/52] net/ice/base: avoid PPPoE ipv4 overlap Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 43/52] net/ice/base: adjust scheduler default BW weight Qi Zhang
                     ` (11 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Anirudh Venkataramanan,
	Paul M . Stillwell Jr

ice_set_fc takes a u8 pointer 'aq_failures' as an input parameter. If
this function encounters an error, in addition to returning an appropriate
ice_status enum code, it also populates aq_failures with a link specific
error value.

If the caller does not initialize this variable to 0 before calling
ice_set_fc, it would appear as if ice_set_fc returned an error code in
this variable. So initialize it to 0.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 8efc4b4cc..d02a047f6 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2637,6 +2637,7 @@ ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, bool ena_auto_link_update)
 	if (!pi || !aq_failures)
 		return ICE_ERR_BAD_PTR;
 
+	*aq_failures = 0;
 	hw = pi->hw;
 
 	pcaps = (struct ice_aqc_get_phy_caps_data *)
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 43/52] net/ice/base: adjust scheduler default BW weight
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (41 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 42/52] net/ice/base: initialize AQ failure variable when set fc Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-11 18:36     ` Ferruh Yigit
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 44/52] net/ice/base: distribute Tx queues evenly Qi Zhang
                     ` (10 subsequent siblings)
  53 siblings, 1 reply; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Tarun Singh, Paul M . Stillwell Jr

By default the queues are configured in legacy mode. The default
BW settings for legacy/advanced modes are different. The existing
code was using the advanced mode default value of 1 which was
incorrect. This caused the unbalanced BW sharing among siblings.
The recommneded default value is applied.

Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 13 ++++++++++++-
 drivers/net/ice/base/ice_type.h   |  2 +-
 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index d02a047f6..54112e8f2 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -4012,7 +4012,18 @@ ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
 	 * Without setting the generic section as valid in valid_sections, the
 	 * Admin queue command will fail with error code ICE_AQ_RC_EINVAL.
 	 */
-	buf->txqs[0].info.valid_sections = ICE_AQC_ELEM_VALID_GENERIC;
+	buf->txqs[0].info.valid_sections =
+		ICE_AQC_ELEM_VALID_GENERIC | ICE_AQC_ELEM_VALID_CIR |
+		ICE_AQC_ELEM_VALID_EIR;
+	buf->txqs[0].info.generic = 0;
+	buf->txqs[0].info.cir_bw.bw_profile_idx =
+		CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
+	buf->txqs[0].info.cir_bw.bw_alloc =
+		CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
+	buf->txqs[0].info.eir_bw.bw_profile_idx =
+		CPU_TO_LE16(ICE_SCHED_DFLT_RL_PROF_ID);
+	buf->txqs[0].info.eir_bw.bw_alloc =
+		CPU_TO_LE16(ICE_SCHED_DFLT_BW_WT);
 
 	/* add the LAN queue */
 	status = ice_aq_add_lan_txq(hw, num_qgrps, buf, buf_size, cd);
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index a6dece9c1..41a1912bf 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -610,7 +610,7 @@ enum ice_rl_type {
 #define ICE_SCHED_NO_BW_WT		0
 #define ICE_SCHED_DFLT_RL_PROF_ID	0
 #define ICE_SCHED_NO_SHARED_RL_PROF_ID	0xFFFF
-#define ICE_SCHED_DFLT_BW_WT		1
+#define ICE_SCHED_DFLT_BW_WT		4
 #define ICE_SCHED_INVAL_PROF_ID		0xFFFF
 #define ICE_SCHED_DFLT_BURST_SIZE	(15 * 1024)	/* in bytes (15k) */
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 44/52] net/ice/base: distribute Tx queues evenly
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (42 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 43/52] net/ice/base: adjust scheduler default BW weight Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 45/52] net/ice/base: add a new command to LLDP commands Qi Zhang
                     ` (9 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang, Victor Raj, Paul M . Stillwell Jr

Distribute the tx queues evenly across all queue groups. This will
help the queues to get more equal sharing among the queues when all
are in use.

In the previous algorithm, the next queue group node will be picked up
only after the previous one filled with max children.
For example: if VSI is configured with 9 queues, the first 8 queues
will be assigned to queue group 1 and the 9th queue will be assigned to
queue group 2.

The 2 queue groups split the bandwidth between them equally (50:50).
The first queue group node will share the 50% bandwidth with all of
its children (8 queues). And the second queue group node will share
the entire 50% bandwidth with its only children.

Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_sched.c | 55 +++++++++++++++++++++++++++++++++++++---
 1 file changed, 51 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index f48c971c8..91847110b 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -1442,6 +1442,53 @@ ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
 }
 
 /**
+ * ice_sched_get_free_qgrp - Scan all Q group siblings and find a free node
+ * @pi: port information structure
+ * @vsi_node: software VSI handle
+ * @qgrp_node: first Q group node identified for scanning
+ * @owner: LAN or RDMA
+ *
+ * This function retrieves a free LAN or RDMA Q group node by scanning
+ * qgrp_node and its siblings for the Q group with the fewest number
+ * of queues currently assigned.
+ */
+static struct ice_sched_node *
+ice_sched_get_free_qgrp(struct ice_port_info *pi,
+			struct ice_sched_node *vsi_node,
+			struct ice_sched_node *qgrp_node, u8 owner)
+{
+	struct ice_sched_node *min_qgrp;
+	u8 min_children;
+
+	if (!qgrp_node)
+		return qgrp_node;
+	min_children = qgrp_node->num_children;
+	if (!min_children)
+		return qgrp_node;
+	min_qgrp = qgrp_node;
+	/* scan all Q groups until find a node which has less than the
+	 * minimum number of children. This way all Q group nodes get
+	 * equal number of shares and active. The bandwidth will be equally
+	 * distributed across all Qs.
+	 */
+	while (qgrp_node) {
+		/* make sure the qgroup node is part of the VSI subtree */
+		if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
+			if (qgrp_node->num_children < min_children &&
+			    qgrp_node->owner == owner) {
+				/* replace the new min Q group node */
+				min_qgrp = qgrp_node;
+				min_children = min_qgrp->num_children;
+				/* break if it has no children, */
+				if (!min_children)
+					break;
+			}
+		qgrp_node = qgrp_node->sibling;
+	}
+	return min_qgrp;
+}
+
+/**
  * ice_sched_get_free_qparent - Get a free LAN or RDMA queue group node
  * @pi: port information structure
  * @vsi_handle: software VSI handle
@@ -1454,7 +1501,7 @@ struct ice_sched_node *
 ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
 			   u8 owner)
 {
-	struct ice_sched_node *vsi_node, *qgrp_node = NULL;
+	struct ice_sched_node *vsi_node, *qgrp_node;
 	struct ice_vsi_ctx *vsi_ctx;
 	u16 max_children;
 	u8 qgrp_layer;
@@ -1468,7 +1515,7 @@ ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
 	vsi_node = vsi_ctx->sched.vsi_node[tc];
 	/* validate invalid VSI ID */
 	if (!vsi_node)
-		goto lan_q_exit;
+		return NULL;
 
 	/* get the first queue group node from VSI sub-tree */
 	qgrp_node = ice_sched_get_first_node(pi, vsi_node, qgrp_layer);
@@ -1481,8 +1528,8 @@ ice_sched_get_free_qparent(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
 		qgrp_node = qgrp_node->sibling;
 	}
 
-lan_q_exit:
-	return qgrp_node;
+	/* Select the best queue group */
+	return ice_sched_get_free_qgrp(pi, vsi_node, qgrp_node, owner);
 }
 
 /**
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 45/52] net/ice/base: add a new command to LLDP commands
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (43 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 44/52] net/ice/base: distribute Tx queues evenly Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 46/52] net/ice/base: remove unused code for VSI list free Qi Zhang
                     ` (8 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, Sharon Haroni, Paul M . Stillwell Jr

Add support for LLDP forwarding to SW programming in FW
LLDP Filter Control is 0x0A0A.

Signed-off-by: Sharon Haroni <sharon.haroni@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_adminq_cmd.h | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index dec4c38cf..d9d43639f 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1943,6 +1943,18 @@ struct ice_aqc_lldp_stop_start_specific_agent {
 	u8 reserved[15];
 };
 
+/* LLDP Filter Control (direct 0x0A0A) */
+struct ice_aqc_lldp_filter_ctrl {
+	u8 cmd_flags;
+#define ICE_AQC_LLDP_FILTER_ACTION_M		MAKEMASK(3, 0)
+#define ICE_AQC_LLDP_FILTER_ACTION_ADD		0x0
+#define ICE_AQC_LLDP_FILTER_ACTION_DELETE	0x1
+#define ICE_AQC_LLDP_FILTER_ACTION_UPDATE	0x2
+	u8 reserved1;
+	__le16 vsi_num;
+	u8 reserved2[12];
+};
+
 /* Get/Set RSS key (indirect 0x0B04/0x0B02) */
 struct ice_aqc_get_set_rss_key {
 #define ICE_AQC_GSET_RSS_KEY_VSI_VALID	BIT(15)
@@ -2702,6 +2714,7 @@ struct ice_aq_desc {
 		struct ice_aqc_lldp_start lldp_start;
 		struct ice_aqc_lldp_set_local_mib lldp_set_mib;
 		struct ice_aqc_lldp_stop_start_specific_agent lldp_agent_ctrl;
+		struct ice_aqc_lldp_filter_ctrl lldp_filter_ctrl;
 		struct ice_aqc_get_set_rss_lut get_set_rss_lut;
 		struct ice_aqc_get_set_rss_key get_set_rss_key;
 		struct ice_aqc_clear_fd_table clear_fd_table;
@@ -2929,6 +2942,7 @@ enum ice_adminq_opc {
 	ice_aqc_opc_get_cee_dcb_cfg			= 0x0A07,
 	ice_aqc_opc_lldp_set_local_mib			= 0x0A08,
 	ice_aqc_opc_lldp_stop_start_specific_agent	= 0x0A09,
+	ice_aqc_opc_lldp_filter_ctrl			= 0x0A0A,
 
 	/* RSS commands */
 	ice_aqc_opc_set_rss_key				= 0x0B02,
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 46/52] net/ice/base: remove unused code for VSI list free
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (44 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 45/52] net/ice/base: add a new command to LLDP commands Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 47/52] net/ice/base: fix reference count when update VSI list Qi Zhang
                     ` (7 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang, Wei Zhao, Paul M . Stillwell Jr

When free vsi list resource after vsi list update to empty, some
useless code in function ice_remove_vsi_list_rule() should be deleted.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 17 +----------------
 1 file changed, 1 insertion(+), 16 deletions(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 5c53b9ec3..84102368b 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -3250,26 +3250,11 @@ static enum ice_status
 ice_remove_vsi_list_rule(struct ice_hw *hw, u16 vsi_list_id,
 			 enum ice_sw_lkup_type lkup_type)
 {
-	struct ice_aqc_sw_rules_elem *s_rule;
-	enum ice_status status;
-	u16 s_rule_size;
-
-	s_rule_size = (u16)ICE_SW_RULE_VSI_LIST_SIZE(0);
-	s_rule = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw, s_rule_size);
-	if (!s_rule)
-		return ICE_ERR_NO_MEMORY;
-
-	s_rule->type = CPU_TO_LE16(ICE_AQC_SW_RULES_T_VSI_LIST_CLEAR);
-	s_rule->pdata.vsi_list.index = CPU_TO_LE16(vsi_list_id);
-
 	/* Free the vsi_list resource that we allocated. It is assumed that the
 	 * list is empty at this point.
 	 */
-	status = ice_aq_alloc_free_vsi_list(hw, &vsi_list_id, lkup_type,
+	return ice_aq_alloc_free_vsi_list(hw, &vsi_list_id, lkup_type,
 					    ice_aqc_opc_free_res);
-
-	ice_free(hw, s_rule);
-	return status;
 }
 
 /**
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 47/52] net/ice/base: fix reference count when update VSI list
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (45 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 46/52] net/ice/base: remove unused code for VSI list free Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 48/52] net/ice/base: add more tunnel type for IPv4 and IPv6 Qi Zhang
                     ` (6 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, stable, Wei Zhao, Paul M . Stillwell Jr

The parameter ref_cnt is used for tracking how many
rules are reusing this VSI list, so it can only be
updated when a rule which using this list be deleted.

Fixes: f89aa3affa9e ("net/ice/base: support removing advanced rule")
Cc: stable@dpdk.org

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 84102368b..9c7e55ff9 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -7488,6 +7488,7 @@ ice_adv_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
 				  tmp_fltr.fwd_id.hw_vsi_id, status);
 			return status;
 		}
+		fm_list->vsi_list_info->ref_cnt--;
 
 		/* Remove the VSI list since it is no longer used */
 		status = ice_remove_vsi_list_rule(hw, vsi_list_id, lkup_type);
@@ -7566,7 +7567,6 @@ ice_rem_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
 	if (list_elem->rule_info.sw_act.fltr_act != ICE_FWD_TO_VSI_LIST) {
 		remove_rule = true;
 	} else if (list_elem->vsi_count > 1) {
-		list_elem->vsi_list_info->ref_cnt--;
 		remove_rule = false;
 		vsi_handle = rinfo->sw_act.vsi_handle;
 		status = ice_adv_rem_update_vsi_list(hw, vsi_handle, list_elem);
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 48/52] net/ice/base: add more tunnel type for IPv4 and IPv6
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (46 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 47/52] net/ice/base: fix reference count when update VSI list Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-11 18:37     ` Ferruh Yigit
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 49/52] net/ice/base: fix uninitialized flag Qi Zhang
                     ` (5 subsequent siblings)
  53 siblings, 1 reply; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang, Wei Zhao, Paul M . Stillwell Jr

This patch add more tunnel type defination ipv4/ipv6 packet,
it enable tcp/udp layer of ipv4/ipv6 as L4 payload but without
L4 dst/src port number as input set for switch filter rule.

For example:
we can download a switch rule to direct ipv4 packet with specific
source and destination ip address to queue index 1.
"eth / ipv4 src is 192.168.0.1 dst is 192.168.0.2 / udp /
end actions queue index 1 / end"
this type of rule will be matched with ipv4/udp file only.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_protocol_type.h |  4 ++++
 drivers/net/ice/base/ice_switch.c        | 40 ++++++++++++++++++++++++++++++++
 drivers/net/ice/base/ice_switch.h        |  4 ++++
 3 files changed, 48 insertions(+)

diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index 85af7513c..7cc44c172 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -66,6 +66,10 @@ enum ice_sw_tunnel_type {
 	ICE_SW_TUN_UDP, /* This means all "UDP" tunnel types: VXLAN-GPE, VXLAN
 			 * and GENEVE
 			 */
+	ICE_SW_IPV4_TCP,
+	ICE_SW_IPV4_UDP,
+	ICE_SW_IPV6_TCP,
+	ICE_SW_IPV6_UDP,
 	ICE_SW_TUN_GTP,
 	ICE_SW_TUN_PPPOE,
 	ICE_SW_TUN_PPPOE_PAY,
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 9c7e55ff9..1b1693dbb 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -6357,6 +6357,18 @@ ice_get_compat_fv_bitmap(struct ice_hw *hw, struct ice_adv_rule_info *rinfo,
 	case ICE_SW_TUN_IPV4_AH:
 		ice_set_bit(ICE_PROFID_IPV4_AH, bm);
 		return;
+	case ICE_SW_IPV4_TCP:
+		ice_set_bit(ICE_PROFID_IPV4_TCP, bm);
+		return;
+	case ICE_SW_IPV4_UDP:
+		ice_set_bit(ICE_PROFID_IPV4_UDP, bm);
+		return;
+	case ICE_SW_IPV6_TCP:
+		ice_set_bit(ICE_PROFID_IPV6_TCP, bm);
+		return;
+	case ICE_SW_IPV6_UDP:
+		ice_set_bit(ICE_PROFID_IPV6_UDP, bm);
+		return;
 	case ICE_SW_TUN_AND_NON_TUN:
 	default:
 		prof_type = ICE_PROF_ALL;
@@ -6771,6 +6783,34 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
 		return;
 	}
 
+	if (tun_type == ICE_SW_IPV4_TCP) {
+		*pkt = dummy_tcp_packet;
+		*pkt_len = sizeof(dummy_tcp_packet);
+		*offsets = dummy_tcp_packet_offsets;
+		return;
+	}
+
+	if (tun_type == ICE_SW_IPV4_UDP) {
+		*pkt = dummy_udp_packet;
+		*pkt_len = sizeof(dummy_udp_packet);
+		*offsets = dummy_udp_packet_offsets;
+		return;
+	}
+
+	if (tun_type == ICE_SW_IPV6_TCP) {
+		*pkt = dummy_tcp_ipv6_packet;
+		*pkt_len = sizeof(dummy_tcp_ipv6_packet);
+		*offsets = dummy_tcp_ipv6_packet_offsets;
+		return;
+	}
+
+	if (tun_type == ICE_SW_IPV6_UDP) {
+		*pkt = dummy_udp_ipv6_packet;
+		*pkt_len = sizeof(dummy_udp_ipv6_packet);
+		*offsets = dummy_udp_ipv6_packet_offsets;
+		return;
+	}
+
 	if (tun_type == ICE_ALL_TUNNELS) {
 		*pkt = dummy_gre_udp_packet;
 		*pkt_len = sizeof(dummy_gre_udp_packet);
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index bd634f98f..1ba85b16b 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -16,6 +16,10 @@
 #define ICE_FLTR_TX_RX (ICE_FLTR_RX | ICE_FLTR_TX)
 
 /* Switch Profile IDs for Profile related switch rules */
+#define ICE_PROFID_IPV4_TCP		4
+#define ICE_PROFID_IPV4_UDP		5
+#define ICE_PROFID_IPV6_TCP		7
+#define ICE_PROFID_IPV6_UDP		8
 #define ICE_PROFID_PPPOE_PAY		34
 #define ICE_PROFID_PPPOE_IPV4_TCP	35
 #define ICE_PROFID_PPPOE_IPV4_UDP	36
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 49/52] net/ice/base: fix uninitialized flag
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (47 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 48/52] net/ice/base: add more tunnel type for IPv4 and IPv6 Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-11 18:45     ` [dpdk-dev] [dpdk-stable] " Ferruh Yigit
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 50/52] net/ice/base: add more device ID support Qi Zhang
                     ` (4 subsequent siblings)
  53 siblings, 1 reply; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang
  Cc: xiaolong.ye, dev, Qi Zhang, stable, Wei Zhao, Paul M . Stillwell Jr

This patch add initialization for prof_res_bm_init flag
to zero in order that the possible resource for field vector
in the files can be initialized.

Fixes: 453d087ccaff ("net/ice/base: add common functions")
Cc: stable@dpdk.org

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 54112e8f2..baaeee321 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -536,6 +536,7 @@ enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
 		return ICE_ERR_NO_MEMORY;
 
 	INIT_LIST_HEAD(&sw->vsi_list_map_head);
+	sw->prof_res_bm_init = 0;
 
 	status = ice_init_def_sw_recp(hw, &hw->switch_info->recp_list);
 	if (status) {
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 50/52] net/ice/base: add more device ID support
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (48 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 49/52] net/ice/base: fix uninitialized flag Qi Zhang
@ 2020-06-09 11:59   ` Qi Zhang
  2020-06-09 12:00   ` [dpdk-dev] [PATCH v2 51/52] net/ice/base: add 1G SGMII PHY type Qi Zhang
                     ` (3 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 11:59 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang

Add support for E823L devices.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c |  5 +++++
 drivers/net/ice/base/ice_devids.h | 10 ++++++++++
 drivers/net/ice/base/ice_nvm.c    |  5 +++++
 drivers/net/ice/ice_ethdev.c      |  5 +++++
 4 files changed, 25 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index baaeee321..1d28a1399 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -43,6 +43,11 @@ static enum ice_status ice_set_mac_type(struct ice_hw *hw)
 	case ICE_DEV_ID_E822L_BACKPLANE:
 	case ICE_DEV_ID_E822L_SFP:
 	case ICE_DEV_ID_E822L_SGMII:
+	case ICE_DEV_ID_E823L_10G_BASE_T:
+	case ICE_DEV_ID_E823L_1GBE:
+	case ICE_DEV_ID_E823L_BACKPLANE:
+	case ICE_DEV_ID_E823L_QSFP:
+	case ICE_DEV_ID_E823L_SFP:
 		hw->mac_type = ICE_MAC_GENERIC;
 		break;
 	default:
diff --git a/drivers/net/ice/base/ice_devids.h b/drivers/net/ice/base/ice_devids.h
index e396f445a..84028e990 100644
--- a/drivers/net/ice/base/ice_devids.h
+++ b/drivers/net/ice/base/ice_devids.h
@@ -6,6 +6,16 @@
 #define _ICE_DEVIDS_H_
 
 /* Device IDs */
+/* Intel(R) Ethernet Connection E823-L for backplane */
+#define ICE_DEV_ID_E823L_BACKPLANE	0x124C
+/* Intel(R) Ethernet Connection E823-L for SFP */
+#define ICE_DEV_ID_E823L_SFP		0x124D
+/* Intel(R) Ethernet Connection E823-L/X557-AT 10GBASE-T */
+#define ICE_DEV_ID_E823L_10G_BASE_T	0x124E
+/* Intel(R) Ethernet Connection E823-L 1GbE */
+#define ICE_DEV_ID_E823L_1GBE		0x124F
+/* Intel(R) Ethernet Connection E823-L for QSFP */
+#define ICE_DEV_ID_E823L_QSFP		0x151D
 /* Intel(R) Ethernet Controller E810-C for backplane */
 #define ICE_DEV_ID_E810C_BACKPLANE	0x1591
 /* Intel(R) Ethernet Controller E810-C for QSFP */
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index bedfbcbb4..bfeade6f9 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -549,6 +549,11 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)
 	case ICE_DEV_ID_E822L_SFP:
 	case ICE_DEV_ID_E822L_10G_BASE_T:
 	case ICE_DEV_ID_E822L_SGMII:
+	case ICE_DEV_ID_E823L_BACKPLANE:
+	case ICE_DEV_ID_E823L_SFP:
+	case ICE_DEV_ID_E823L_10G_BASE_T:
+	case ICE_DEV_ID_E823L_1GBE:
+	case ICE_DEV_ID_E823L_QSFP:
 		return status;
 	default:
 		break;
diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index d5110c439..5a89a1955 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -161,6 +161,11 @@ static const struct rte_pci_id pci_id_ice_map[] = {
 	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_SFP) },
 	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_10G_BASE_T) },
 	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E822C_SGMII) },
+	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_BACKPLANE) },
+	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_SFP) },
+	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_10G_BASE_T) },
+	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_1GBE) },
+	{ RTE_PCI_DEVICE(ICE_INTEL_VENDOR_ID, ICE_DEV_ID_E823L_QSFP) },
 	{ .vendor_id = 0, /* sentinel */ },
 };
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 51/52] net/ice/base: add 1G SGMII PHY type
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (49 preceding siblings ...)
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 50/52] net/ice/base: add more device ID support Qi Zhang
@ 2020-06-09 12:00   ` Qi Zhang
  2020-06-09 12:00   ` [dpdk-dev] [PATCH v2 52/52] net/ice/base: update IPV4 and IPV6 flow ptype masks Qi Zhang
                     ` (2 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 12:00 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang, Paul M Stillwell Jr

There isn't a case for 1G SGMII in ice_get_media_type() so add
the handling for it.

Also handle the special case where some direct attach
cables may report that they support 1G SGMII, but
that is erroneous since SGMII is supposed to be a
backplane media type (between a MAC and a PHY). If
the driver doesn't handle this special case then a
user could see the 'Port' in ethtool change from
'Direct attach Copper' to 'Backplane' when they have
forced the speed to 1G, but the cable hasn't changed.

Lastly, change ice_aq_get_phy_caps() to save the
module_type info if the function was called with
ICE_AQC_REPORT_TOPO_CAP. This call uses the media
information to populate the module_type. If no
media is present then the values in module_type
will be 0.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_adminq_cmd.h |  1 +
 drivers/net/ice/base/ice_common.c     | 20 ++++++++++++++++----
 2 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index d9d43639f..f480917cd 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1382,6 +1382,7 @@ struct ice_aqc_get_phy_caps_data {
 	u8 module_type[ICE_MODULE_TYPE_TOTAL_BYTE];
 #define ICE_AQC_MOD_TYPE_BYTE0_SFP_PLUS			0xA0
 #define ICE_AQC_MOD_TYPE_BYTE0_QSFP_PLUS		0x80
+#define ICE_AQC_MOD_TYPE_IDENT				1
 #define ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_PASSIVE	BIT(0)
 #define ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_ACTIVE	BIT(1)
 #define ICE_AQC_MOD_TYPE_BYTE1_10G_BASE_SR		BIT(4)
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 1d28a1399..2c822d7d4 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -197,6 +197,10 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
 	if (status == ICE_SUCCESS && report_mode == ICE_AQC_REPORT_TOPO_CAP) {
 		pi->phy.phy_type_low = LE64_TO_CPU(pcaps->phy_type_low);
 		pi->phy.phy_type_high = LE64_TO_CPU(pcaps->phy_type_high);
+		ice_memcpy(pi->phy.link_info.module_type, &pcaps->module_type,
+			   sizeof(pi->phy.link_info.module_type),
+			   ICE_NONDMA_TO_NONDMA);
+
 	}
 
 	return status;
@@ -269,6 +273,18 @@ static enum ice_media_type ice_get_media_type(struct ice_port_info *pi)
 		return ICE_MEDIA_UNKNOWN;
 
 	if (hw_link_info->phy_type_low) {
+		/* 1G SGMII is a special case where some DA cable PHYs
+		 * may show this as an option when it really shouldn't
+		 * be since SGMII is meant to be between a MAC and a PHY
+		 * in a backplane. Try to detect this case and handle it
+		 */
+		if (hw_link_info->phy_type_low == ICE_PHY_TYPE_LOW_1G_SGMII &&
+		    (hw_link_info->module_type[ICE_AQC_MOD_TYPE_IDENT] ==
+		    ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_ACTIVE ||
+		    hw_link_info->module_type[ICE_AQC_MOD_TYPE_IDENT] ==
+		    ICE_AQC_MOD_TYPE_BYTE1_SFP_PLUS_CU_PASSIVE))
+			return ICE_MEDIA_DA;
+
 		switch (hw_link_info->phy_type_low) {
 		case ICE_PHY_TYPE_LOW_1000BASE_SX:
 		case ICE_PHY_TYPE_LOW_1000BASE_LX:
@@ -2474,10 +2490,6 @@ enum ice_status ice_update_link_info(struct ice_port_info *pi)
 
 		status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_TOPO_CAP,
 					     pcaps, NULL);
-		if (status == ICE_SUCCESS)
-			ice_memcpy(li->module_type, &pcaps->module_type,
-				   sizeof(li->module_type),
-				   ICE_NONDMA_TO_NONDMA);
 
 		ice_free(hw, pcaps);
 	}
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v2 52/52] net/ice/base: update IPV4 and IPV6 flow ptype masks
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (50 preceding siblings ...)
  2020-06-09 12:00   ` [dpdk-dev] [PATCH v2 51/52] net/ice/base: add 1G SGMII PHY type Qi Zhang
@ 2020-06-09 12:00   ` Qi Zhang
  2020-06-11 18:46     ` Ferruh Yigit
  2020-06-10  5:27   ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Yang, Qiming
  2020-06-11  0:34   ` Ye Xiaolong
  53 siblings, 1 reply; 187+ messages in thread
From: Qi Zhang @ 2020-06-09 12:00 UTC (permalink / raw)
  To: qiming.yang; +Cc: xiaolong.ye, dev, Qi Zhang, Dan Nowlin, Paul M . Stillwell Jr

In the flow API, add ability to add IPV4/IPV6 rules that match on
packets with or without inner L4 protocols.

Also, remove PPPOD packet from PPPOE bitmap.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flow.c   | 168 ++++++++++++++++++++++++++++++--------
 drivers/net/ice/base/ice_flow.h   |   4 +
 drivers/net/ice/ice_fdir_filter.c |  30 ++++---
 drivers/net/ice/ice_hash.c        |  22 +++--
 4 files changed, 171 insertions(+), 53 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 744b2805f..1e944bf52 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -218,10 +218,26 @@ static const u32 ice_ptypes_macvlan_il[] = {
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 };
 
-/* Packet types for packets with an Outer/First/Single IPv4 header */
+/* Packet types for packets with an Outer/First/Single IPv4 header, does NOT
+ * include IPV4 other PTYPEs
+ */
 static const u32 ice_ptypes_ipv4_ofos[] = {
 	0x1DC00000, 0x04000800, 0x00000000, 0x00000000,
 	0x00000000, 0x00000155, 0x00000000, 0x00000000,
+	0x00000000, 0x000FC000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+};
+
+/* Packet types for packets with an Outer/First/Single IPv4 header, includes
+ * IPV4 other PTYPEs
+ */
+static const u32 ice_ptypes_ipv4_ofos_all[] = {
+	0x1DC00000, 0x04000800, 0x00000000, 0x00000000,
+	0x00000000, 0x00000155, 0x00000000, 0x00000000,
 	0x00000000, 0x000FC000, 0x83E0F800, 0x00000101,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -242,10 +258,26 @@ static const u32 ice_ptypes_ipv4_il[] = {
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 };
 
-/* Packet types for packets with an Outer/First/Single IPv6 header */
+/* Packet types for packets with an Outer/First/Single IPv6 header, does NOT
+ * include IVP6 other PTYPEs
+ */
 static const u32 ice_ptypes_ipv6_ofos[] = {
 	0x00000000, 0x00000000, 0x77000000, 0x10002000,
 	0x00000000, 0x000002AA, 0x00000000, 0x00000000,
+	0x00000000, 0x03F00000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+};
+
+/* Packet types for packets with an Outer/First/Single IPv6 header, includes
+ * IPV6 other PTYPEs
+ */
+static const u32 ice_ptypes_ipv6_ofos_all[] = {
+	0x00000000, 0x00000000, 0x77000000, 0x10002000,
+	0x00000000, 0x000002AA, 0x00000000, 0x00000000,
 	0x00080F00, 0x03F00000, 0x7C1F0000, 0x00000206,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -266,6 +298,54 @@ static const u32 ice_ptypes_ipv6_il[] = {
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 };
 
+/* Packet types for packets with an Outer/First/Single IPv4 header - no L4 */
+static const u32 ice_ipv4_ofos_no_l4[] = {
+	0x10C00000, 0x04000800, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x000cc000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+};
+
+/* Packet types for packets with an Innermost/Last IPv4 header - no L4 */
+static const u32 ice_ipv4_il_no_l4[] = {
+	0x60000000, 0x18043008, 0x80000002, 0x6010c021,
+	0x00000008, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00139800, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+};
+
+/* Packet types for packets with an Outer/First/Single IPv6 header - no L4 */
+static const u32 ice_ipv6_ofos_no_l4[] = {
+	0x00000000, 0x00000000, 0x43000000, 0x10002000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x02300000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+};
+
+/* Packet types for packets with an Innermost/Last IPv6 header - no L4 */
+static const u32 ice_ipv6_il_no_l4[] = {
+	0x00000000, 0x02180430, 0x0000010c, 0x086010c0,
+	0x00000430, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x4e600000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+};
+
 /* Packet types for packets with an Outermost/First ARP header */
 static const u32 ice_ptypes_arp_of[] = {
 	0x00000800, 0x00000000, 0x00000000, 0x00000000,
@@ -473,7 +553,7 @@ static const u32 ice_ptypes_gtpu[] = {
 static const u32 ice_ptypes_pppoe[] = {
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
-	0x00000000, 0x03FFF000, 0x00000000, 0x00000000,
+	0x00000000, 0x03ffe000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -598,6 +678,9 @@ struct ice_flow_prof_params {
 #define ICE_FLOW_SEG_HDRS_L4_MASK	\
 	(ICE_FLOW_SEG_HDR_ICMP | ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | \
 	 ICE_FLOW_SEG_HDR_SCTP)
+/* mask for L4 protocols that are NOT part of IPV4/6 OTHER PTYPE groups */
+#define ICE_FLOW_SEG_HDRS_L4_MASK_NO_OTHER	\
+	(ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_SCTP)
 
 /**
  * ice_flow_val_hdrs - validates packet segments for valid protocol headers
@@ -715,46 +798,47 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
 				       ICE_FLOW_PTYPE_MAX);
 		}
 
-		if (hdrs & ICE_FLOW_SEG_HDR_IPV4) {
+		if (hdrs & ICE_FLOW_SEG_HDR_PPPOE) {
+			src = (const ice_bitmap_t *)ice_ptypes_pppoe;
+			ice_and_bitmap(params->ptypes, params->ptypes, src,
+				       ICE_FLOW_PTYPE_MAX);
+		}
+		if ((hdrs & ICE_FLOW_SEG_HDR_IPV4) &&
+		    (hdrs & ICE_FLOW_SEG_HDR_IPV_OTHER)) {
+			src = !i ?
+				(const ice_bitmap_t *)ice_ptypes_ipv4_ofos_all :
+				(const ice_bitmap_t *)ice_ptypes_ipv4_il;
+			ice_and_bitmap(params->ptypes, params->ptypes, src,
+				       ICE_FLOW_PTYPE_MAX);
+		} else if ((hdrs & ICE_FLOW_SEG_HDR_IPV6) &&
+			   (hdrs & ICE_FLOW_SEG_HDR_IPV_OTHER)) {
+			src = !i ?
+				(const ice_bitmap_t *)ice_ptypes_ipv6_ofos_all :
+				(const ice_bitmap_t *)ice_ptypes_ipv6_il;
+			ice_and_bitmap(params->ptypes, params->ptypes, src,
+				       ICE_FLOW_PTYPE_MAX);
+		} else if ((hdrs & ICE_FLOW_SEG_HDR_IPV4) &&
+			   !(hdrs & ICE_FLOW_SEG_HDRS_L4_MASK_NO_OTHER)) {
+			src = !i ? (const ice_bitmap_t *)ice_ipv4_ofos_no_l4 :
+				(const ice_bitmap_t *)ice_ipv4_il_no_l4;
+			ice_and_bitmap(params->ptypes, params->ptypes, src,
+				       ICE_FLOW_PTYPE_MAX);
+		} else if (hdrs & ICE_FLOW_SEG_HDR_IPV4) {
 			src = !i ? (const ice_bitmap_t *)ice_ptypes_ipv4_ofos :
 				(const ice_bitmap_t *)ice_ptypes_ipv4_il;
 			ice_and_bitmap(params->ptypes, params->ptypes, src,
 				       ICE_FLOW_PTYPE_MAX);
-			if (hdrs & ICE_FLOW_SEG_HDR_UDP) {
-				src = (const ice_bitmap_t *)ice_ptypes_udp_il;
-				ice_and_bitmap(params->ptypes,
-						params->ptypes, src,
-					       ICE_FLOW_PTYPE_MAX);
-			} else if (hdrs & ICE_FLOW_SEG_HDR_TCP) {
-				ice_and_bitmap(params->ptypes, params->ptypes,
-					       (const ice_bitmap_t *)
-					       ice_ptypes_tcp_il,
-					       ICE_FLOW_PTYPE_MAX);
-			} else if (hdrs & ICE_FLOW_SEG_HDR_SCTP) {
-				src = (const ice_bitmap_t *)ice_ptypes_sctp_il;
-				ice_and_bitmap(params->ptypes, params->ptypes,
-					       src, ICE_FLOW_PTYPE_MAX);
-			}
+		} else if ((hdrs & ICE_FLOW_SEG_HDR_IPV6) &&
+			   !(hdrs & ICE_FLOW_SEG_HDRS_L4_MASK_NO_OTHER)) {
+			src = !i ? (const ice_bitmap_t *)ice_ipv6_ofos_no_l4 :
+				(const ice_bitmap_t *)ice_ipv6_il_no_l4;
+			ice_and_bitmap(params->ptypes, params->ptypes, src,
+				       ICE_FLOW_PTYPE_MAX);
 		} else if (hdrs & ICE_FLOW_SEG_HDR_IPV6) {
 			src = !i ? (const ice_bitmap_t *)ice_ptypes_ipv6_ofos :
 				(const ice_bitmap_t *)ice_ptypes_ipv6_il;
 			ice_and_bitmap(params->ptypes, params->ptypes, src,
 				       ICE_FLOW_PTYPE_MAX);
-			if (hdrs & ICE_FLOW_SEG_HDR_UDP) {
-				src = (const ice_bitmap_t *)ice_ptypes_udp_il;
-				ice_and_bitmap(params->ptypes,
-						params->ptypes, src,
-					       ICE_FLOW_PTYPE_MAX);
-			} else if (hdrs & ICE_FLOW_SEG_HDR_TCP) {
-				ice_and_bitmap(params->ptypes, params->ptypes,
-					       (const ice_bitmap_t *)
-					       ice_ptypes_tcp_il,
-					       ICE_FLOW_PTYPE_MAX);
-			} else if (hdrs & ICE_FLOW_SEG_HDR_SCTP) {
-				src = (const ice_bitmap_t *)ice_ptypes_sctp_il;
-				ice_and_bitmap(params->ptypes, params->ptypes,
-					       src, ICE_FLOW_PTYPE_MAX);
-			}
 		}
 
 		if (hdrs & ICE_FLOW_SEG_HDR_ETH_NON_IP) {
@@ -771,6 +855,20 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
 					  ICE_FLOW_PTYPE_MAX);
 		}
 
+		if (hdrs & ICE_FLOW_SEG_HDR_UDP) {
+			src = (const ice_bitmap_t *)ice_ptypes_udp_il;
+			ice_and_bitmap(params->ptypes, params->ptypes, src,
+				       ICE_FLOW_PTYPE_MAX);
+		} else if (hdrs & ICE_FLOW_SEG_HDR_TCP) {
+			ice_and_bitmap(params->ptypes, params->ptypes,
+				       (const ice_bitmap_t *)ice_ptypes_tcp_il,
+				       ICE_FLOW_PTYPE_MAX);
+		} else if (hdrs & ICE_FLOW_SEG_HDR_SCTP) {
+			src = (const ice_bitmap_t *)ice_ptypes_sctp_il;
+			ice_and_bitmap(params->ptypes, params->ptypes, src,
+				       ICE_FLOW_PTYPE_MAX);
+		}
+
 		if (hdrs & ICE_FLOW_SEG_HDR_ICMP) {
 			src = !i ? (const ice_bitmap_t *)ice_ptypes_icmp_of :
 				(const ice_bitmap_t *)ice_ptypes_icmp_il;
@@ -3154,7 +3252,7 @@ ice_flow_set_rss_seg_info(struct ice_flow_seg_info *segs, u64 hash_fields,
 	ICE_FLOW_SET_HDRS(segs, flow_hdr);
 
 	if (segs->hdrs & ~ICE_FLOW_RSS_SEG_HDR_VAL_MASKS &
-	    ~ICE_FLOW_RSS_HDRS_INNER_MASK)
+	    ~ICE_FLOW_RSS_HDRS_INNER_MASK & ~ICE_FLOW_SEG_HDR_IPV_OTHER)
 		return ICE_ERR_PARAM;
 
 	val = (u64)(segs->hdrs & ICE_FLOW_RSS_SEG_HDR_L3_MASKS);
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 6e4257123..92987664e 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -178,6 +178,10 @@ enum ice_flow_seg_hdr {
 	ICE_FLOW_SEG_HDR_AH		= 0x00200000,
 	ICE_FLOW_SEG_HDR_NAT_T_ESP	= 0x00400000,
 	ICE_FLOW_SEG_HDR_ETH_NON_IP	= 0x00800000,
+	/* The following is an additive bit for ICE_FLOW_SEG_HDR_IPV4 and
+	 * ICE_FLOW_SEG_HDR_IPV6 which include the IPV4 other PTYPEs
+	 */
+	ICE_FLOW_SEG_HDR_IPV_OTHER	= 0x20000000,
 };
 
 /* These segements all have the same PTYPES, but are otherwise distinguished by
diff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c
index 77e2da9fc..c3f23a019 100644
--- a/drivers/net/ice/ice_fdir_filter.c
+++ b/drivers/net/ice/ice_fdir_filter.c
@@ -956,33 +956,41 @@ ice_fdir_input_set_conf(struct ice_pf *pf, enum ice_fltr_ptype flow,
 	switch (flow) {
 	case ICE_FLTR_PTYPE_NONF_IPV4_UDP:
 		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_UDP |
-				  ICE_FLOW_SEG_HDR_IPV4);
+				  ICE_FLOW_SEG_HDR_IPV4 |
+				  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV4_TCP:
 		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_TCP |
-				  ICE_FLOW_SEG_HDR_IPV4);
+				  ICE_FLOW_SEG_HDR_IPV4 |
+				  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV4_SCTP:
 		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_SCTP |
-				  ICE_FLOW_SEG_HDR_IPV4);
+				  ICE_FLOW_SEG_HDR_IPV4 |
+				  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV4_OTHER:
-		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV4);
+		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV4 |
+				  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_UDP:
 		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_UDP |
-				  ICE_FLOW_SEG_HDR_IPV6);
+				  ICE_FLOW_SEG_HDR_IPV6 |
+				  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
 		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_TCP |
-				  ICE_FLOW_SEG_HDR_IPV6);
+				  ICE_FLOW_SEG_HDR_IPV6 |
+				  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_SCTP:
 		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_SCTP |
-				  ICE_FLOW_SEG_HDR_IPV6);
+				  ICE_FLOW_SEG_HDR_IPV6 |
+				  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_OTHER:
-		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV6);
+		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_IPV6 |
+				  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP:
 	case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP:
@@ -990,11 +998,13 @@ ice_fdir_input_set_conf(struct ice_pf *pf, enum ice_fltr_ptype flow,
 	case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER:
 		if (ttype == ICE_FDIR_TUNNEL_TYPE_GTPU)
 			ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_IP |
-					  ICE_FLOW_SEG_HDR_IPV4);
+					  ICE_FLOW_SEG_HDR_IPV4 |
+					  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		else if (ttype == ICE_FDIR_TUNNEL_TYPE_GTPU_EH)
 			ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_EH |
 					  ICE_FLOW_SEG_HDR_GTPU_IP |
-					  ICE_FLOW_SEG_HDR_IPV4);
+					  ICE_FLOW_SEG_HDR_IPV4 |
+					  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		else
 			PMD_DRV_LOG(ERR, "not supported tunnel type.");
 		break;
diff --git a/drivers/net/ice/ice_hash.c b/drivers/net/ice/ice_hash.c
index 11435cbfb..3d58b7184 100644
--- a/drivers/net/ice/ice_hash.c
+++ b/drivers/net/ice/ice_hash.c
@@ -79,21 +79,27 @@ ice_hash_parse_pattern_action(struct ice_adapter *ad,
 struct rss_type_match_hdr hint_0 = {
 	ICE_FLOW_SEG_HDR_NONE,	0};
 struct rss_type_match_hdr hint_1 = {
-	ICE_FLOW_SEG_HDR_IPV4,	ETH_RSS_IPV4};
+	ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV_OTHER, ETH_RSS_IPV4};
 struct rss_type_match_hdr hint_2 = {
-	ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_UDP, ETH_RSS_NONFRAG_IPV4_UDP};
+	ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_UDP |
+	ICE_FLOW_SEG_HDR_IPV_OTHER, ETH_RSS_NONFRAG_IPV4_UDP};
 struct rss_type_match_hdr hint_3 = {
-	ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_TCP, ETH_RSS_NONFRAG_IPV4_TCP};
+	ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_TCP |
+	ICE_FLOW_SEG_HDR_IPV_OTHER, ETH_RSS_NONFRAG_IPV4_TCP};
 struct rss_type_match_hdr hint_4 = {
-	ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_SCTP, ETH_RSS_NONFRAG_IPV4_SCTP};
+	ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_SCTP |
+	ICE_FLOW_SEG_HDR_IPV_OTHER, ETH_RSS_NONFRAG_IPV4_SCTP};
 struct rss_type_match_hdr hint_5 = {
-	ICE_FLOW_SEG_HDR_IPV6,	ETH_RSS_IPV6};
+	ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_IPV_OTHER, ETH_RSS_IPV6};
 struct rss_type_match_hdr hint_6 = {
-	ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_UDP, ETH_RSS_NONFRAG_IPV6_UDP};
+	ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_UDP |
+	ICE_FLOW_SEG_HDR_IPV_OTHER, ETH_RSS_NONFRAG_IPV6_UDP};
 struct rss_type_match_hdr hint_7 = {
-	ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_TCP, ETH_RSS_NONFRAG_IPV6_TCP};
+	ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_TCP |
+	ICE_FLOW_SEG_HDR_IPV_OTHER, ETH_RSS_NONFRAG_IPV6_TCP};
 struct rss_type_match_hdr hint_8 = {
-	ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_SCTP, ETH_RSS_NONFRAG_IPV6_SCTP};
+	ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_SCTP |
+	ICE_FLOW_SEG_HDR_IPV_OTHER, ETH_RSS_NONFRAG_IPV6_SCTP};
 struct rss_type_match_hdr hint_9 = {
 	ICE_FLOW_SEG_HDR_GTPU_EH, ETH_RSS_IPV4};
 struct rss_type_match_hdr hint_10 = {
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH v2 00/52] net/ice: base code update
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (51 preceding siblings ...)
  2020-06-09 12:00   ` [dpdk-dev] [PATCH v2 52/52] net/ice/base: update IPV4 and IPV6 flow ptype masks Qi Zhang
@ 2020-06-10  5:27   ` Yang, Qiming
  2020-06-11  0:34   ` Ye Xiaolong
  53 siblings, 0 replies; 187+ messages in thread
From: Yang, Qiming @ 2020-06-10  5:27 UTC (permalink / raw)
  To: Zhang, Qi Z; +Cc: Ye, Xiaolong, dev

Hi,
> -----Original Message-----
> From: Zhang, Qi Z <qi.z.zhang@intel.com>
> Sent: Tuesday, June 9, 2020 19:59
> To: Yang, Qiming <qiming.yang@intel.com>
> Cc: Ye, Xiaolong <xiaolong.ye@intel.com>; dev@dpdk.org; Zhang, Qi Z
> <qi.z.zhang@intel.com>
> Subject: [PATCH v2 00/52] net/ice: base code update
> 
> Upgrade base with below main changes
> 
> 1. add more protocol support - L2TPv3/ESP/AH/PFCP.
> 2. Add IPv6 prefix RSS support.
> 3. support GENEVE and VXLAN rules with VLAN.
> 4. Add E823L device IDs
> 5. couple bug fixes and code clean.
> 
> v2:
> - fix a bug in patch that cause RSS fail in patch 52/52
> - fix minor commit log issue
> 
> Qi Zhang (52):
>   net/ice/base: add support for non-IP Layer2 protocol
>   net/ice/base: add FDIR program status WB macro
>   net/ice/base: disable profile merge for FDIR
>   net/ice/base: avoid undefined behavior
>   net/ice/base: consolidate implementation of MAC config set
>   net/ice/base: report AOC PHY Types as Fiber
>   net/ice/base: gate devices from FW link override
>   net/ice/base: improve VSI filters rebuild
>   net/ice/base: add AUI media type
>   net/ice/base: fix variable type for ACL
>   net/ice/base: update PHY type high max index value
>   net/ice/base: consolidate VF Promiscuous mode
>   net/ice/base: refactor flow director filter swap
>   net/ice/base: change IPV6 training packet
>   net/ice/base: group function protoypes together
>   net/ice/base: cleanup comment formatting
>   net/ice/base: add FDIR support for L2TPV3 ESP AH and PFCP
>   net/ice/base: add FD completion report option
>   net/ice/base: initialize Set PHY Configuration FEC fields
>   net/ice/baes: add NVM help functions
>   net/ice/base: allow GENEVE and VXLAN rules with VLAN
>   net/ice/base: increase timeout after PFR
>   net/ice/base: remove unnecessary braces
>   net/ice/base: adjust function signature style format
>   net/ice/base: add RSS support for IPv6 prefix
>   net/ice/base: use macro for sizeof
>   net/ice/base: add debug logs
>   net/ice/base: return correct error code
>   net/ice/base: remove unnecessary code
>   net/ice/base: add support for more PPPoE packet type
>   net/ice/base: reset flags when all rules are deleted
>   net/ice/base: reset capabilities before parsing
>   net/ice/base: add RL profile bit mask check
>   net/ice/base: update the vsi handle to remaining VSI
>   net/ice/base: correct return value
>   net/ice/base: remove unneeded variable
>   net/ice/base: fix for memory leak
>   net/ice/base: add entries in Profile TCAM with priority
>   net/ice/base: remove unimplemented function prototypes
>   net/ice/base: add new API to check all autoneg enable bits
>   net/ice/base: avoid PPPoE ipv4 overlap
>   net/ice/base: initialize AQ failure variable when set fc
>   net/ice/base: adjust scheduler default BW weight
>   net/ice/base: distribute Tx queues evenly
>   net/ice/base: add a new command to LLDP commands
>   net/ice/base: remove unused code for VSI list free
>   net/ice/base: fix reference count when update VSI list
>   net/ice/base: add more tunnel type for IPv4 and IPv6
>   net/ice/base: fix uninitialized flag
>   net/ice/base: add more device ID support
>   net/ice/base: add 1G SGMII PHY type
>   net/ice/base: update IPV4 and IPV6 flow ptype masks
> 
>  drivers/net/ice/base/ice_acl.c           |  25 +-
>  drivers/net/ice/base/ice_acl_ctrl.c      |  26 +-
>  drivers/net/ice/base/ice_adminq_cmd.h    |  67 ++--
>  drivers/net/ice/base/ice_bitops.h        |  10 +-
>  drivers/net/ice/base/ice_common.c        | 309 ++++++++++++----
>  drivers/net/ice/base/ice_common.h        |   6 +-
>  drivers/net/ice/base/ice_controlq.c      |  48 +--
>  drivers/net/ice/base/ice_dcb.c           |   3 +-
>  drivers/net/ice/base/ice_devids.h        |  10 +
>  drivers/net/ice/base/ice_fdir.c          | 338 ++++++++++++++++--
>  drivers/net/ice/base/ice_fdir.h          | 106 +++---
>  drivers/net/ice/base/ice_flex_pipe.c     |  92 +++--
>  drivers/net/ice/base/ice_flow.c          | 277 +++++++++++----
>  drivers/net/ice/base/ice_flow.h          |  44 ++-
>  drivers/net/ice/base/ice_hw_autogen.h    |   4 +-
>  drivers/net/ice/base/ice_lan_tx_rx.h     |  46 ++-
>  drivers/net/ice/base/ice_nvm.c           |  72 +++-
>  drivers/net/ice/base/ice_nvm.h           |  10 +
>  drivers/net/ice/base/ice_protocol_type.h |  18 +-
>  drivers/net/ice/base/ice_sched.c         | 104 ++++--
>  drivers/net/ice/base/ice_switch.c        | 589
> ++++++++++++++++++++++++++-----
>  drivers/net/ice/base/ice_switch.h        |  36 +-
>  drivers/net/ice/base/ice_type.h          |  20 +-
>  drivers/net/ice/ice_ethdev.c             |   5 +
>  drivers/net/ice/ice_fdir_filter.c        |  63 ++--
>  drivers/net/ice/ice_hash.c               |  22 +-
>  drivers/net/ice/ice_rxtx.c               |   4 +-
>  27 files changed, 1817 insertions(+), 537 deletions(-)
> 
> --
> 2.13.6

Series Acked-by: Qiming Yang <qiming.yang@intel.com>

^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH v2 00/52] net/ice: base code update
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
                     ` (52 preceding siblings ...)
  2020-06-10  5:27   ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Yang, Qiming
@ 2020-06-11  0:34   ` Ye Xiaolong
  53 siblings, 0 replies; 187+ messages in thread
From: Ye Xiaolong @ 2020-06-11  0:34 UTC (permalink / raw)
  To: Qi Zhang; +Cc: qiming.yang, dev

On 06/09, Qi Zhang wrote:
>Upgrade base with below main changes
>
>1. add more protocol support - L2TPv3/ESP/AH/PFCP.
>2. Add IPv6 prefix RSS support.
>3. support GENEVE and VXLAN rules with VLAN.
>4. Add E823L device IDs
>5. couple bug fixes and code clean.
>
>v2:
>- fix a bug in patch that cause RSS fail in patch 52/52
>- fix minor commit log issue
>
>Qi Zhang (52):
>  net/ice/base: add support for non-IP Layer2 protocol
>  net/ice/base: add FDIR program status WB macro
>  net/ice/base: disable profile merge for FDIR
>  net/ice/base: avoid undefined behavior
>  net/ice/base: consolidate implementation of MAC config set
>  net/ice/base: report AOC PHY Types as Fiber
>  net/ice/base: gate devices from FW link override
>  net/ice/base: improve VSI filters rebuild
>  net/ice/base: add AUI media type
>  net/ice/base: fix variable type for ACL
>  net/ice/base: update PHY type high max index value
>  net/ice/base: consolidate VF Promiscuous mode
>  net/ice/base: refactor flow director filter swap
>  net/ice/base: change IPV6 training packet
>  net/ice/base: group function protoypes together
>  net/ice/base: cleanup comment formatting
>  net/ice/base: add FDIR support for L2TPV3 ESP AH and PFCP
>  net/ice/base: add FD completion report option
>  net/ice/base: initialize Set PHY Configuration FEC fields
>  net/ice/baes: add NVM help functions
>  net/ice/base: allow GENEVE and VXLAN rules with VLAN
>  net/ice/base: increase timeout after PFR
>  net/ice/base: remove unnecessary braces
>  net/ice/base: adjust function signature style format
>  net/ice/base: add RSS support for IPv6 prefix
>  net/ice/base: use macro for sizeof
>  net/ice/base: add debug logs
>  net/ice/base: return correct error code
>  net/ice/base: remove unnecessary code
>  net/ice/base: add support for more PPPoE packet type
>  net/ice/base: reset flags when all rules are deleted
>  net/ice/base: reset capabilities before parsing
>  net/ice/base: add RL profile bit mask check
>  net/ice/base: update the vsi handle to remaining VSI
>  net/ice/base: correct return value
>  net/ice/base: remove unneeded variable
>  net/ice/base: fix for memory leak
>  net/ice/base: add entries in Profile TCAM with priority
>  net/ice/base: remove unimplemented function prototypes
>  net/ice/base: add new API to check all autoneg enable bits
>  net/ice/base: avoid PPPoE ipv4 overlap
>  net/ice/base: initialize AQ failure variable when set fc
>  net/ice/base: adjust scheduler default BW weight
>  net/ice/base: distribute Tx queues evenly
>  net/ice/base: add a new command to LLDP commands
>  net/ice/base: remove unused code for VSI list free
>  net/ice/base: fix reference count when update VSI list
>  net/ice/base: add more tunnel type for IPv4 and IPv6
>  net/ice/base: fix uninitialized flag
>  net/ice/base: add more device ID support
>  net/ice/base: add 1G SGMII PHY type
>  net/ice/base: update IPV4 and IPV6 flow ptype masks
>
> drivers/net/ice/base/ice_acl.c           |  25 +-
> drivers/net/ice/base/ice_acl_ctrl.c      |  26 +-
> drivers/net/ice/base/ice_adminq_cmd.h    |  67 ++--
> drivers/net/ice/base/ice_bitops.h        |  10 +-
> drivers/net/ice/base/ice_common.c        | 309 ++++++++++++----
> drivers/net/ice/base/ice_common.h        |   6 +-
> drivers/net/ice/base/ice_controlq.c      |  48 +--
> drivers/net/ice/base/ice_dcb.c           |   3 +-
> drivers/net/ice/base/ice_devids.h        |  10 +
> drivers/net/ice/base/ice_fdir.c          | 338 ++++++++++++++++--
> drivers/net/ice/base/ice_fdir.h          | 106 +++---
> drivers/net/ice/base/ice_flex_pipe.c     |  92 +++--
> drivers/net/ice/base/ice_flow.c          | 277 +++++++++++----
> drivers/net/ice/base/ice_flow.h          |  44 ++-
> drivers/net/ice/base/ice_hw_autogen.h    |   4 +-
> drivers/net/ice/base/ice_lan_tx_rx.h     |  46 ++-
> drivers/net/ice/base/ice_nvm.c           |  72 +++-
> drivers/net/ice/base/ice_nvm.h           |  10 +
> drivers/net/ice/base/ice_protocol_type.h |  18 +-
> drivers/net/ice/base/ice_sched.c         | 104 ++++--
> drivers/net/ice/base/ice_switch.c        | 589 ++++++++++++++++++++++++++-----
> drivers/net/ice/base/ice_switch.h        |  36 +-
> drivers/net/ice/base/ice_type.h          |  20 +-
> drivers/net/ice/ice_ethdev.c             |   5 +
> drivers/net/ice/ice_fdir_filter.c        |  63 ++--
> drivers/net/ice/ice_hash.c               |  22 +-
> drivers/net/ice/ice_rxtx.c               |   4 +-
> 27 files changed, 1817 insertions(+), 537 deletions(-)
>
>-- 
>2.13.6
>

Series applied to dpdk-next-net-intel with Qiming's ack, Thanks.

^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH v2 10/52] net/ice/base: fix variable type for ACL
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 10/52] net/ice/base: fix variable type for ACL Qi Zhang
@ 2020-06-11 18:35     ` Ferruh Yigit
  0 siblings, 0 replies; 187+ messages in thread
From: Ferruh Yigit @ 2020-06-11 18:35 UTC (permalink / raw)
  To: Qi Zhang, qiming.yang; +Cc: xiaolong.ye, dev, stable, Paul M Stillwell Jr

On 6/9/2020 12:59 PM, Qi Zhang wrote:
> The commit ef92cee94cdb ("ice-shared: Fix remaining minor casting
> issues") changed the idx variable within ice_acl_add_entry() from
> a u16 to a u8. 

Where is this commit, I guess it is not in the DPDK repo, and the DPDK repo one
is already listed in the 'Fixes' line, is there a benefit to have it, what do
you think to remove this reference?

> This causes the code to truncate the values greater
> than 255 to 255 or less when calling ice_aq_program_acl_entry()
> resulting in the wrong TCAM index being programmed for the specified
> rule. The result is that the rule action doesn't work correctly
> (packets don't get routed to the correct queue or dropped if that
> is the action). Fix the issue by changing the variable to be a u16
> again.
> 
> Fixes: f3202a097f12 ("net/ice/base: add ACL module")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>

<...>

^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH v2 29/52] net/ice/base: remove unnecessary code
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 29/52] net/ice/base: remove unnecessary code Qi Zhang
@ 2020-06-11 18:35     ` Ferruh Yigit
  0 siblings, 0 replies; 187+ messages in thread
From: Ferruh Yigit @ 2020-06-11 18:35 UTC (permalink / raw)
  To: Qi Zhang, qiming.yang; +Cc: xiaolong.ye, dev

On 6/9/2020 12:59 PM, Qi Zhang wrote:
> Remove unncessary case branch.

's/unncessary/unnecessary/'


'ICE_BLK_SW' & 'ICE_BLK_PE' cases seems removed, is there any context for record
why they are unnecessary, can you please add to the commit log?

> 
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>

<...>

^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH v2 43/52] net/ice/base: adjust scheduler default BW weight
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 43/52] net/ice/base: adjust scheduler default BW weight Qi Zhang
@ 2020-06-11 18:36     ` Ferruh Yigit
  2020-06-11 20:27       ` Singh, Tarun K
  0 siblings, 1 reply; 187+ messages in thread
From: Ferruh Yigit @ 2020-06-11 18:36 UTC (permalink / raw)
  To: Qi Zhang, qiming.yang
  Cc: xiaolong.ye, dev, Tarun Singh, Paul M . Stillwell Jr

On 6/9/2020 12:59 PM, Qi Zhang wrote:
> By default the queues are configured in legacy mode. The default
> BW settings for legacy/advanced modes are different.

BW == Bandwidth?

> The existing
> code was using the advanced mode default value of 1 which was
> incorrect. This caused the unbalanced BW sharing among siblings.
> The recommneded default value is applied.

's/recommneded/recommended/'

> 
> Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
> Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>

<...>

^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH v2 15/52] net/ice/base: group function protoypes together
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 15/52] net/ice/base: group function protoypes together Qi Zhang
@ 2020-06-11 18:37     ` Ferruh Yigit
  0 siblings, 0 replies; 187+ messages in thread
From: Ferruh Yigit @ 2020-06-11 18:37 UTC (permalink / raw)
  To: Qi Zhang, qiming.yang
  Cc: xiaolong.ye, dev, Tony Nguyen, Paul M . Stillwell Jr

On 6/9/2020 12:59 PM, Qi Zhang wrote:

In patch title, 's/protoypes/prototypes/'

> There are some function prototypes at the beginning of the file and
> some at the end, group them all together so that they are in one
> consistent location.
> 
> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
> Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>

<...>


^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH v2 48/52] net/ice/base: add more tunnel type for IPv4 and IPv6
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 48/52] net/ice/base: add more tunnel type for IPv4 and IPv6 Qi Zhang
@ 2020-06-11 18:37     ` Ferruh Yigit
  0 siblings, 0 replies; 187+ messages in thread
From: Ferruh Yigit @ 2020-06-11 18:37 UTC (permalink / raw)
  To: Qi Zhang, qiming.yang; +Cc: xiaolong.ye, dev, Wei Zhao, Paul M . Stillwell Jr

On 6/9/2020 12:59 PM, Qi Zhang wrote:
> This patch add more tunnel type defination ipv4/ipv6 packet,

's/defination/definition/'

> it enable tcp/udp layer of ipv4/ipv6 as L4 payload but without
> L4 dst/src port number as input set for switch filter rule.
> 
> For example:
> we can download a switch rule to direct ipv4 packet with specific
> source and destination ip address to queue index 1.
> "eth / ipv4 src is 192.168.0.1 dst is 192.168.0.2 / udp /
> end actions queue index 1 / end"
> this type of rule will be matched with ipv4/udp file only.
> 
> Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
> Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>

<...>


^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH v2 01/52] net/ice/base: add support for non-IP Layer2 protocol
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 01/52] net/ice/base: add support for non-IP Layer2 protocol Qi Zhang
@ 2020-06-11 18:38     ` Ferruh Yigit
  0 siblings, 0 replies; 187+ messages in thread
From: Ferruh Yigit @ 2020-06-11 18:38 UTC (permalink / raw)
  To: Qi Zhang, qiming.yang; +Cc: xiaolong.ye, dev, Yahui Cao, Paul M . Stillwell Jr

On 6/9/2020 12:59 PM, Qi Zhang wrote:
> FDIR can forward Ethernet packets with non-IP ethertype.

In patch title, isn't "non-IP Layer2 protocol" confusing? Should it be "non-IP
Layer 3 protocol"? But I think description in commit log is better, what do you
think:
"support flow director for non-IP packets"

> 
> Signed-off-by: Yahui Cao <yahui.cao@intel.com>
> Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>

<...>


^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH v2 22/52] net/ice/base: increase timeout after PFR
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 22/52] net/ice/base: increase timeout after PFR Qi Zhang
@ 2020-06-11 18:38     ` Ferruh Yigit
  2020-06-15  1:58       ` Zhang, Qi Z
  0 siblings, 1 reply; 187+ messages in thread
From: Ferruh Yigit @ 2020-06-11 18:38 UTC (permalink / raw)
  To: Qi Zhang, qiming.yang; +Cc: xiaolong.ye, dev, Dan Nowlin, Paul M . Stillwell Jr

On 6/9/2020 12:59 PM, Qi Zhang wrote:
> To allow for resets during package download, increase the timeout period
> after performing a PFR. The time waited is the global config lock
> timeout plus the normal PFSWR timeout.

Is PFR == PF Reset, right? And is this same as FLR?

> 
> Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
> Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>

<...>

^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH v2 23/52] net/ice/base: remove unnecessary braces
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 23/52] net/ice/base: remove unnecessary braces Qi Zhang
@ 2020-06-11 18:39     ` Ferruh Yigit
  0 siblings, 0 replies; 187+ messages in thread
From: Ferruh Yigit @ 2020-06-11 18:39 UTC (permalink / raw)
  To: Qi Zhang, qiming.yang
  Cc: xiaolong.ye, dev, Tony Nguyen, Paul M . Stillwell Jr

On 6/9/2020 12:59 PM, Qi Zhang wrote:
> This patch mainly does cleanups related to unnecessary braces.

Personally I think better to keep the braces when the block is more than single
line, otherwise you are mostly relying on indentation which is prone to error.

If you have strong opinion/need to remove them that is OK but if this is
optional my 5cents is to keep the braces.

> 
> A few other minor fixes are included which include fixing a typo,
> pulling up some lines, and fixing RCT.

I can't find the typo fix and I can't find othe change (fixing RCT), are they
still valid in this patch?

> 
> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
> Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>

<...>

^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH v2 28/52] net/ice/base: return correct error code
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 28/52] net/ice/base: return correct error code Qi Zhang
@ 2020-06-11 18:39     ` Ferruh Yigit
  0 siblings, 0 replies; 187+ messages in thread
From: Ferruh Yigit @ 2020-06-11 18:39 UTC (permalink / raw)
  To: Qi Zhang, qiming.yang
  Cc: xiaolong.ye, dev, Kiran Patil, Paul M . Stillwell Jr

On 6/9/2020 12:59 PM, Qi Zhang wrote:
> Return ICE_ERR_DOES_NOT_EXIST return code if admin command error code is
> ICE_AQ_RC_ENOENT (not exist). ice_aq_sw_rules is used when switch
> rule is getting added/deleted/updated. In case of delete/update
> switch rule, admin command can return ICE_AQ_RC_ENOENT error code
> if such rule does not exist, hence return ICE_ERR_DOES_NOT_EXIST error
> code from ice_aq_sw_rule, so that caller of this fucnction can decide

's/fucnction/function/'

> how to handle ICE_ERR_DOES_NOT_EXIST.
> 
> Allow proper cleanup of internal data structures from ice_rem_adv_rule
> function if ice_aq_sw_rules return error code ICE_ERR_DOES_NOT_EXIST
> otherwise per recipe:rule list will never become empty.
> 
> Signed-off-by: Kiran Patil <kiran.patil@intel.com>
> Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>

<...>

^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH v2 33/52] net/ice/base: add RL profile bit mask check
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 33/52] net/ice/base: add RL profile bit mask check Qi Zhang
@ 2020-06-11 18:39     ` Ferruh Yigit
  2020-06-11 20:29       ` Singh, Tarun K
  0 siblings, 1 reply; 187+ messages in thread
From: Ferruh Yigit @ 2020-06-11 18:39 UTC (permalink / raw)
  To: Qi Zhang, qiming.yang
  Cc: xiaolong.ye, dev, Tarun Singh, Paul M . Stillwell Jr

On 6/9/2020 12:59 PM, Qi Zhang wrote:
> Mask bits before accessing the profile type field.

RL profile == Rate Limiter profile?

> 
> Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
> Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>

<...>


^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH v2 34/52] net/ice/base: update the vsi handle to remaining VSI
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 34/52] net/ice/base: update the vsi handle to remaining VSI Qi Zhang
@ 2020-06-11 18:40     ` Ferruh Yigit
  2020-06-12  2:34       ` Wang, Haiyue
  0 siblings, 1 reply; 187+ messages in thread
From: Ferruh Yigit @ 2020-06-11 18:40 UTC (permalink / raw)
  To: Qi Zhang, qiming.yang
  Cc: xiaolong.ye, dev, Haiyue Wang, Paul M . Stillwell Jr

On 6/9/2020 12:59 PM, Qi Zhang wrote:
> Needs to update the VSI handle to the last remaining VSI using the
> rule for ICE_FWD_TO_VSI. Otherwise it may have error for deleting the
> rule.

The reason of the patch is not clear, it looks to "prevent an error for deleting
the rule", but can you please give more detail?
Why it cause the error, what rule are we talking about, when this happens, what
happens if it gives error, why setting to the last remaining VSI helps?

Thanks

> 
> Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
> Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
> ---
>  drivers/net/ice/base/ice_switch.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
> index f379a5f5d..01dcace55 100644
> --- a/drivers/net/ice/base/ice_switch.c
> +++ b/drivers/net/ice/base/ice_switch.c
> @@ -7491,6 +7491,7 @@ ice_adv_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
>  			ice_get_hw_vsi_num(hw, rem_vsi_handle);
>  		fm_list->rule_info.sw_act.fwd_id.hw_vsi_id =
>  			ice_get_hw_vsi_num(hw, rem_vsi_handle);
> +		fm_list->rule_info.sw_act.vsi_handle = rem_vsi_handle;
>  
>  		/* Update the previous switch rule of "MAC forward to VSI" to
>  		 * "MAC fwd to VSI list"
> 


^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH v2 35/52] net/ice/base: correct return value
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 35/52] net/ice/base: correct return value Qi Zhang
@ 2020-06-11 18:40     ` Ferruh Yigit
  0 siblings, 0 replies; 187+ messages in thread
From: Ferruh Yigit @ 2020-06-11 18:40 UTC (permalink / raw)
  To: Qi Zhang, qiming.yang
  Cc: xiaolong.ye, dev, Kiran Patil, Paul M . Stillwell Jr

On 6/9/2020 12:59 PM, Qi Zhang wrote:
> Function ice_rem_adv_rule_id return incorrect error code (ICE_ERR_PARAM)
> whereas it should have returned ICE_ERR_DOES_NOT_EXIST return code
> if filter list is empty or unable to find "rule" in list

Can you please add the "Fixes: " tag?

And the patch title is too generic, can it be possible to add details fixing
return value for which case?

> 
> Signed-off-by: Kiran Patil <kiran.patil@intel.com>
> Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>

<...>

^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH v2 40/52] net/ice/base: add new API to check all autoneg enable bits
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 40/52] net/ice/base: add new API to check all autoneg enable bits Qi Zhang
@ 2020-06-11 18:42     ` Ferruh Yigit
  0 siblings, 0 replies; 187+ messages in thread
From: Ferruh Yigit @ 2020-06-11 18:42 UTC (permalink / raw)
  To: Qi Zhang, qiming.yang
  Cc: xiaolong.ye, dev, Paul Greenwalt, Paul M . Stillwell Jr

On 6/9/2020 12:59 PM, Qi Zhang wrote:
> struct ice_aqc_get_phy_caps_data has multiple autoneg enable bits.
> ice_is_phy_caps_an_enabled checks all bits and returns true if any
> autoneg enable bits are set.

We refer as API to the functions that are exposed to applications, what do you
think about following:
net/ice/base: support checking all autoneg enable bits

> 
> Signed-off-by: Paul Greenwalt <paul.greenwalt@intel.com>
> Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>

<...>


^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [dpdk-stable] [PATCH v2 49/52] net/ice/base: fix uninitialized flag
  2020-06-09 11:59   ` [dpdk-dev] [PATCH v2 49/52] net/ice/base: fix uninitialized flag Qi Zhang
@ 2020-06-11 18:45     ` Ferruh Yigit
  0 siblings, 0 replies; 187+ messages in thread
From: Ferruh Yigit @ 2020-06-11 18:45 UTC (permalink / raw)
  To: Qi Zhang, qiming.yang
  Cc: xiaolong.ye, dev, stable, Wei Zhao, Paul M . Stillwell Jr

On 6/9/2020 12:59 PM, Qi Zhang wrote:
> This patch add initialization for prof_res_bm_init flag
> to zero in order that the possible resource for field vector
> in the files can be initialized.

I guess this is fixing initialization of _something_ (resource for field vector
in package file?), and this is done by zeroing an uninitialized flag. Can you
please update the patch title to document what is fixed (why change is done)?

> 
> Fixes: 453d087ccaff ("net/ice/base: add common functions")
> Cc: stable@dpdk.org
> 
> Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
> Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
> ---
>  drivers/net/ice/base/ice_common.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
> index 54112e8f2..baaeee321 100644
> --- a/drivers/net/ice/base/ice_common.c
> +++ b/drivers/net/ice/base/ice_common.c
> @@ -536,6 +536,7 @@ enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
>  		return ICE_ERR_NO_MEMORY;
>  
>  	INIT_LIST_HEAD(&sw->vsi_list_map_head);
> +	sw->prof_res_bm_init = 0;
>  
>  	status = ice_init_def_sw_recp(hw, &hw->switch_info->recp_list);
>  	if (status) {
> 


^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH v2 52/52] net/ice/base: update IPV4 and IPV6 flow ptype masks
  2020-06-09 12:00   ` [dpdk-dev] [PATCH v2 52/52] net/ice/base: update IPV4 and IPV6 flow ptype masks Qi Zhang
@ 2020-06-11 18:46     ` Ferruh Yigit
  0 siblings, 0 replies; 187+ messages in thread
From: Ferruh Yigit @ 2020-06-11 18:46 UTC (permalink / raw)
  To: Qi Zhang, qiming.yang; +Cc: xiaolong.ye, dev, Dan Nowlin, Paul M . Stillwell Jr

On 6/9/2020 1:00 PM, Qi Zhang wrote:
> In the flow API, add ability to add IPV4/IPV6 rules that match on
> packets with or without inner L4 protocols.
> 
> Also, remove PPPOD packet from PPPOE bitmap.

I can't spot this change among other changes, if it is not directly related to
the main feature, what do you think to separate it to its own patch?

> 
> Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
> Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>

<...>

^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH v2 43/52] net/ice/base: adjust scheduler default BW weight
  2020-06-11 18:36     ` Ferruh Yigit
@ 2020-06-11 20:27       ` Singh, Tarun K
  0 siblings, 0 replies; 187+ messages in thread
From: Singh, Tarun K @ 2020-06-11 20:27 UTC (permalink / raw)
  To: Yigit, Ferruh, Zhang, Qi Z, Yang, Qiming
  Cc: Ye, Xiaolong, dev, Stillwell Jr, Paul M

Yes, BW is for bandwidth.

-Tarun

-----Original Message-----
From: Yigit, Ferruh <ferruh.yigit@intel.com> 
Sent: Thursday, June 11, 2020 11:37 AM
To: Zhang, Qi Z <qi.z.zhang@intel.com>; Yang, Qiming <qiming.yang@intel.com>
Cc: Ye, Xiaolong <xiaolong.ye@intel.com>; dev@dpdk.org; Singh, Tarun K <tarun.k.singh@intel.com>; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>
Subject: Re: [dpdk-dev] [PATCH v2 43/52] net/ice/base: adjust scheduler default BW weight

On 6/9/2020 12:59 PM, Qi Zhang wrote:
> By default the queues are configured in legacy mode. The default BW 
> settings for legacy/advanced modes are different.

BW == Bandwidth?

> The existing
> code was using the advanced mode default value of 1 which was 
> incorrect. This caused the unbalanced BW sharing among siblings.
> The recommneded default value is applied.

's/recommneded/recommended/'

> 
> Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
> Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>

<...>

^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH v2 33/52] net/ice/base: add RL profile bit mask check
  2020-06-11 18:39     ` Ferruh Yigit
@ 2020-06-11 20:29       ` Singh, Tarun K
  0 siblings, 0 replies; 187+ messages in thread
From: Singh, Tarun K @ 2020-06-11 20:29 UTC (permalink / raw)
  To: Yigit, Ferruh, Zhang, Qi Z, Yang, Qiming
  Cc: Ye, Xiaolong, dev, Stillwell Jr, Paul M

Yes, RL profile is for Rate limiter profile.
-Tarun

-----Original Message-----
From: Yigit, Ferruh <ferruh.yigit@intel.com> 
Sent: Thursday, June 11, 2020 11:40 AM
To: Zhang, Qi Z <qi.z.zhang@intel.com>; Yang, Qiming <qiming.yang@intel.com>
Cc: Ye, Xiaolong <xiaolong.ye@intel.com>; dev@dpdk.org; Singh, Tarun K <tarun.k.singh@intel.com>; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>
Subject: Re: [dpdk-dev] [PATCH v2 33/52] net/ice/base: add RL profile bit mask check

On 6/9/2020 12:59 PM, Qi Zhang wrote:
> Mask bits before accessing the profile type field.

RL profile == Rate Limiter profile?

> 
> Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
> Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>

<...>


^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH v2 34/52] net/ice/base: update the vsi handle to remaining VSI
  2020-06-11 18:40     ` Ferruh Yigit
@ 2020-06-12  2:34       ` Wang, Haiyue
  0 siblings, 0 replies; 187+ messages in thread
From: Wang, Haiyue @ 2020-06-12  2:34 UTC (permalink / raw)
  To: Yigit, Ferruh, Zhang, Qi Z, Yang, Qiming
  Cc: Ye, Xiaolong, dev, Stillwell Jr, Paul M

> -----Original Message-----
> From: Yigit, Ferruh <ferruh.yigit@intel.com>
> Sent: Friday, June 12, 2020 02:41
> To: Zhang, Qi Z <qi.z.zhang@intel.com>; Yang, Qiming <qiming.yang@intel.com>
> Cc: Ye, Xiaolong <xiaolong.ye@intel.com>; dev@dpdk.org; Wang, Haiyue <haiyue.wang@intel.com>;
> Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>
> Subject: Re: [dpdk-dev] [PATCH v2 34/52] net/ice/base: update the vsi handle to remaining VSI
> 
> On 6/9/2020 12:59 PM, Qi Zhang wrote:
> > Needs to update the VSI handle to the last remaining VSI using the
> > rule for ICE_FWD_TO_VSI. Otherwise it may have error for deleting the
> > rule.
> 
> The reason of the patch is not clear, it looks to "prevent an error for deleting
> the rule", but can you please give more detail?
> Why it cause the error, what rule are we talking about, when this happens, what
> happens if it gives error, why setting to the last remaining VSI helps?
> 

Thing should be simple, it needs to update the VSI handle which is active, the original code
just used the first VSI handle always. If this VSI is removed, and left another latter added
VSI, it should use the latter added VSI handle which means 'the remaining'.

And the 'remaining' is the word in the VSI code context, so use it here to means 'the active'.

> Thanks
> 
> >
> > Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
> > Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
> > Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
> > ---
> >  drivers/net/ice/base/ice_switch.c | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
> > index f379a5f5d..01dcace55 100644
> > --- a/drivers/net/ice/base/ice_switch.c
> > +++ b/drivers/net/ice/base/ice_switch.c
> > @@ -7491,6 +7491,7 @@ ice_adv_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
> >  			ice_get_hw_vsi_num(hw, rem_vsi_handle);
> >  		fm_list->rule_info.sw_act.fwd_id.hw_vsi_id =
> >  			ice_get_hw_vsi_num(hw, rem_vsi_handle);
> > +		fm_list->rule_info.sw_act.vsi_handle = rem_vsi_handle;
> >
> >  		/* Update the previous switch rule of "MAC forward to VSI" to
> >  		 * "MAC fwd to VSI list"
> >


^ permalink raw reply	[flat|nested] 187+ messages in thread

* Re: [dpdk-dev] [PATCH v2 22/52] net/ice/base: increase timeout after PFR
  2020-06-11 18:38     ` Ferruh Yigit
@ 2020-06-15  1:58       ` Zhang, Qi Z
  0 siblings, 0 replies; 187+ messages in thread
From: Zhang, Qi Z @ 2020-06-15  1:58 UTC (permalink / raw)
  To: Yigit, Ferruh, Yang, Qiming
  Cc: Ye, Xiaolong, dev, Nowlin, Dan, Stillwell Jr, Paul M



> -----Original Message-----
> From: Yigit, Ferruh <ferruh.yigit@intel.com>
> Sent: Friday, June 12, 2020 2:38 AM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>; Yang, Qiming <qiming.yang@intel.com>
> Cc: Ye, Xiaolong <xiaolong.ye@intel.com>; dev@dpdk.org; Nowlin, Dan
> <dan.nowlin@intel.com>; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com>
> Subject: Re: [dpdk-dev] [PATCH v2 22/52] net/ice/base: increase timeout after
> PFR
> 
> On 6/9/2020 12:59 PM, Qi Zhang wrote:
> > To allow for resets during package download, increase the timeout
> > period after performing a PFR. The time waited is the global config
> > lock timeout plus the normal PFSWR timeout.
> 
> Is PFR == PF Reset, right? And is this same as FLR?
Yes, PFR is PF Reset, but its not same as FLR, FLR is PF level reset, which specific for operation system set FLR bit in the PCIe config
While FLR will trigger PF reset, but device driver can also setting specific register to reset the PF.

Regards
Qi
> 
> >
> > Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
> > Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
> > Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
> 
> <...>

^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v3 00/53] net/ice: base code update
  2020-06-03  2:39 [dpdk-dev] [PATCH 00/52] net/ice: base code update Qi Zhang
                   ` (52 preceding siblings ...)
  2020-06-09 11:59 ` [dpdk-dev] [PATCH v2 00/52] net/ice: base code update Qi Zhang
@ 2020-06-15  2:04 ` Qi Zhang
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 01/53] net/ice/base: add support for non-IP Layer2 protocol Qi Zhang
                     ` (53 more replies)
  53 siblings, 54 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-15  2:04 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: xiaolong.ye, qiming.yang, dev, Qi Zhang

Upgrade base with below main changes

1. add more protocol support - L2TPv3/ESP/AH/PFCP.
2. Add IPv6 prefix RSS support.
3. support GENEVE and VXLAN rules with VLAN.
4. Add E823L device IDs
5. couple bug fixes and code clean.

v3:
- fix commit log base on Ferruh's comment.
  [PATCH v2 10/52] remove incorrect fixline.
  [PATCH v2 15/52] fix typo
  [PATCH v2 22/52] replace PFR to PF reset
  [PATCH v2 23/52] add more description of the fix 
  [PATCH v2 29/52] fix typo and add more description 
  [PATCH v2 34/52] add more description of the fix 
  [PATCH v2 40/52] improve the title.
  [PATCH v2 43/52] replace "BW" with "bandwith" and fix typo
  [PATCH v2 48/52] fix typo
  [PATCH v2 49/52] add more description of the fix
  [PATCH v2 52/52] seperate into 2 patches

v2:
- fix a bug in patch that cause RSS fail in patch 52/52
- fix minor commit log issue


Qi Zhang (53):
  net/ice/base: add support for non-IP Layer2 protocol
  net/ice/base: add FDIR program status WB macro
  net/ice/base: disable profile merge for FDIR
  net/ice/base: avoid undefined behavior
  net/ice/base: consolidate implementation of MAC config set
  net/ice/base: report AOC PHY Types as Fiber
  net/ice/base: gate devices from FW link override
  net/ice/base: improve VSI filters rebuild
  net/ice/base: add AUI media type
  net/ice/base: fix variable type for ACL
  net/ice/base: update PHY type high max index value
  net/ice/base: consolidate VF Promiscuous mode
  net/ice/base: refactor flow director filter swap
  net/ice/base: change IPV6 training packet
  net/ice/base: group function prototypes together
  net/ice/base: cleanup comment formatting
  net/ice/base: add FDIR support for L2TPV3 ESP AH and PFCP
  net/ice/base: add FD completion report option
  net/ice/base: initialize Set PHY Configuration FEC fields
  net/ice/baes: add NVM help functions
  net/ice/base: allow GENEVE and VXLAN rules with VLAN
  net/ice/base: increase timeout after PF Reset
  net/ice/base: remove unnecessary braces
  net/ice/base: adjust function signature style format
  net/ice/base: add RSS support for IPv6 prefix
  net/ice/base: use macro for sizeof
  net/ice/base: add debug logs
  net/ice/base: return correct error code
  net/ice/base: remove unnecessary code
  net/ice/base: add support for more PPPoE packet type
  net/ice/base: reset flags when all rules are deleted
  net/ice/base: reset capabilities before parsing
  net/ice/base: add rate limiting profile bit mask check
  net/ice/base: update the vsi handle to remaining VSI
  net/ice/base: fix return value
  net/ice/base: remove unneeded variable
  net/ice/base: fix for memory leak
  net/ice/base: add entries in Profile TCAM with priority
  net/ice/base: remove unimplemented function prototypes
  net/ice/base: support checking all autoneg enable bits
  net/ice/base: avoid PPPoE ipv4 overlap
  net/ice/base: initialize AQ failure variable when set fc
  net/ice/base: adjust scheduler default bandwidth weight
  net/ice/base: distribute Tx queues evenly
  net/ice/base: add a new command to LLDP commands
  net/ice/base: remove unused code for VSI list free
  net/ice/base: fix reference count when update VSI list
  net/ice/base: add more tunnel type for IPv4 and IPv6
  net/ice/base: fix uninitialized flag for result index bitmap
  net/ice/base: add more device ID support
  net/ice/base: add 1G SGMII PHY type
  net/ice/base: update IPV4 and IPV6 flow ptype masks
  net/ice/base: remove PPPoD from PPPoE bitmap

 drivers/net/ice/base/ice_acl.c           |  25 +-
 drivers/net/ice/base/ice_acl_ctrl.c      |  26 +-
 drivers/net/ice/base/ice_adminq_cmd.h    |  67 ++--
 drivers/net/ice/base/ice_bitops.h        |  10 +-
 drivers/net/ice/base/ice_common.c        | 309 ++++++++++++----
 drivers/net/ice/base/ice_common.h        |   6 +-
 drivers/net/ice/base/ice_controlq.c      |  48 +--
 drivers/net/ice/base/ice_dcb.c           |   3 +-
 drivers/net/ice/base/ice_devids.h        |  10 +
 drivers/net/ice/base/ice_fdir.c          | 338 ++++++++++++++++--
 drivers/net/ice/base/ice_fdir.h          | 106 +++---
 drivers/net/ice/base/ice_flex_pipe.c     |  92 +++--
 drivers/net/ice/base/ice_flow.c          | 277 +++++++++++----
 drivers/net/ice/base/ice_flow.h          |  44 ++-
 drivers/net/ice/base/ice_hw_autogen.h    |   4 +-
 drivers/net/ice/base/ice_lan_tx_rx.h     |  46 ++-
 drivers/net/ice/base/ice_nvm.c           |  72 +++-
 drivers/net/ice/base/ice_nvm.h           |  10 +
 drivers/net/ice/base/ice_protocol_type.h |  18 +-
 drivers/net/ice/base/ice_sched.c         | 104 ++++--
 drivers/net/ice/base/ice_switch.c        | 589 ++++++++++++++++++++++++++-----
 drivers/net/ice/base/ice_switch.h        |  36 +-
 drivers/net/ice/base/ice_type.h          |  20 +-
 drivers/net/ice/ice_ethdev.c             |   5 +
 drivers/net/ice/ice_fdir_filter.c        |  63 ++--
 drivers/net/ice/ice_hash.c               |  22 +-
 drivers/net/ice/ice_rxtx.c               |   4 +-
 27 files changed, 1817 insertions(+), 537 deletions(-)

-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v3 01/53] net/ice/base: add support for non-IP Layer2 protocol
  2020-06-15  2:04 ` [dpdk-dev] [PATCH v3 00/53] " Qi Zhang
@ 2020-06-15  2:04   ` Qi Zhang
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 02/53] net/ice/base: add FDIR program status WB macro Qi Zhang
                     ` (52 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-15  2:04 UTC (permalink / raw)
  To: ferruh.yigit
  Cc: xiaolong.ye, qiming.yang, dev, Qi Zhang, Yahui Cao,
	Paul M . Stillwell Jr

FDIR can forward Ethernet packets with non-IP ethertype.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_fdir.c | 15 +++++++++++++++
 drivers/net/ice/base/ice_fdir.h |  2 ++
 drivers/net/ice/base/ice_flow.c | 29 ++++++++++++++++++++++-------
 drivers/net/ice/base/ice_flow.h |  1 +
 drivers/net/ice/base/ice_type.h |  1 +
 5 files changed, 41 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index 4e9aafc39..c92533223 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -102,6 +102,12 @@ static const u8 ice_fdir_ipv4_gtpu4_pkt[] = {
 	0x00, 0x00,
 };
 
+static const u8 ice_fdir_non_ip_l2_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+};
+
 static const u8 ice_fdir_tcpv6_pkt[] = {
 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00,
@@ -329,6 +335,11 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
 		ice_fdir_ipv4_gtpu4_pkt,
 	},
 	{
+		ICE_FLTR_PTYPE_NON_IP_L2,
+		sizeof(ice_fdir_non_ip_l2_pkt), ice_fdir_non_ip_l2_pkt,
+		sizeof(ice_fdir_non_ip_l2_pkt), ice_fdir_non_ip_l2_pkt,
+	},
+	{
 		ICE_FLTR_PTYPE_NONF_IPV6_TCP,
 		sizeof(ice_fdir_tcpv6_pkt), ice_fdir_tcpv6_pkt,
 		sizeof(ice_fdir_tcp6_tun_pkt), ice_fdir_tcp6_tun_pkt,
@@ -819,6 +830,10 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		ice_pkt_insert_u6_qfi(loc, ICE_IPV4_GTPU_QFI_OFFSET,
 				      input->gtpu_data.qfi);
 		break;
+	case ICE_FLTR_PTYPE_NON_IP_L2:
+		ice_pkt_insert_u16(loc, ICE_MAC_ETHTYPE_OFFSET,
+				   input->ext_data.ether_type);
+		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
 		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
 					 input->ip.v6.dst_ip);
diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
index 18656c55f..97553c8e7 100644
--- a/drivers/net/ice/base/ice_fdir.h
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -79,6 +79,7 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw);
 #define ICE_IPV6_SCTP_SRC_PORT_OFFSET	54
 #define ICE_IPV6_SCTP_DST_PORT_OFFSET	56
 
+#define ICE_MAC_ETHTYPE_OFFSET		12
 #define ICE_IPV4_TOS_OFFSET		15
 #define ICE_IPV4_TTL_OFFSET		22
 #define ICE_IPV6_TC_OFFSET		14
@@ -165,6 +166,7 @@ struct ice_fdir_udp_gtp {
 
 struct ice_fdir_extra {
 	u8 dst_mac[ETH_ALEN];	/* dest MAC address */
+	__be16 ether_type;      /* for NON_IP_L2 */
 	u32 usr_def[2];		/* user data */
 	__be16 vlan_type;	/* VLAN ethertype */
 	__be16 vlan_tag;	/* VLAN tag info */
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index e741f5940..90302a6cb 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -63,7 +63,7 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = {
 	/* ICE_FLOW_FIELD_IDX_C_VLAN */
 	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_VLAN, 14, ICE_FLOW_FLD_SZ_VLAN),
 	/* ICE_FLOW_FIELD_IDX_ETH_TYPE */
-	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_ETH, 12, ICE_FLOW_FLD_SZ_ETH_TYPE),
+	ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_ETH, 0, ICE_FLOW_FLD_SZ_ETH_TYPE),
 	/* IPv4 / IPv6 */
 	/* ICE_FLOW_FIELD_IDX_IPV4_DSCP */
 	ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_IPV4, 0, ICE_FLOW_FLD_SZ_IP_DSCP,
@@ -532,6 +532,17 @@ static const u32 ice_ptypes_nat_t_esp[] = {
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 };
 
+static const u32 ice_ptypes_mac_non_ip_ofos[] = {
+	0x00000846, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00400000, 0x03FFF000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+};
+
 /* Manage parameters and info. used during the creation of a flow profile */
 struct ice_flow_prof_params {
 	enum ice_block blk;
@@ -683,12 +694,6 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
 				       ICE_FLOW_PTYPE_MAX);
 		}
 
-		if (hdrs & ICE_FLOW_SEG_HDR_PPPOE) {
-			src = (const ice_bitmap_t *)ice_ptypes_pppoe;
-			ice_and_bitmap(params->ptypes, params->ptypes, src,
-				       ICE_FLOW_PTYPE_MAX);
-		}
-
 		if (hdrs & ICE_FLOW_SEG_HDR_IPV4) {
 			src = !i ? (const ice_bitmap_t *)ice_ptypes_ipv4_ofos :
 				(const ice_bitmap_t *)ice_ptypes_ipv4_il;
@@ -731,6 +736,16 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
 			}
 		}
 
+		if (hdrs & ICE_FLOW_SEG_HDR_ETH_NON_IP) {
+			src = (const ice_bitmap_t *)ice_ptypes_mac_non_ip_ofos;
+			ice_and_bitmap(params->ptypes, params->ptypes,
+				       src, ICE_FLOW_PTYPE_MAX);
+		} else if (hdrs & ICE_FLOW_SEG_HDR_PPPOE) {
+			src = (const ice_bitmap_t *)ice_ptypes_pppoe;
+			ice_and_bitmap(params->ptypes, params->ptypes, src,
+				       ICE_FLOW_PTYPE_MAX);
+		}
+
 		if (hdrs & ICE_FLOW_SEG_HDR_ICMP) {
 			src = !i ? (const ice_bitmap_t *)ice_ptypes_icmp_of :
 				(const ice_bitmap_t *)ice_ptypes_icmp_il;
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index c8a0483e3..9fb60a6d2 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -148,6 +148,7 @@ enum ice_flow_seg_hdr {
 	ICE_FLOW_SEG_HDR_ESP		= 0x00100000,
 	ICE_FLOW_SEG_HDR_AH		= 0x00200000,
 	ICE_FLOW_SEG_HDR_NAT_T_ESP	= 0x00400000,
+	ICE_FLOW_SEG_HDR_ETH_NON_IP	= 0x00800000,
 };
 
 /* These segements all have the same PTYPES, but are otherwise distinguished by
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 94ea44265..cf622178e 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -295,6 +295,7 @@ enum ice_fltr_ptype {
 	ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP,
 	ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP,
 	ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER,
+	ICE_FLTR_PTYPE_NON_IP_L2,
 	ICE_FLTR_PTYPE_FRAG_IPV4,
 	ICE_FLTR_PTYPE_NONF_IPV6_UDP,
 	ICE_FLTR_PTYPE_NONF_IPV6_TCP,
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v3 02/53] net/ice/base: add FDIR program status WB macro
  2020-06-15  2:04 ` [dpdk-dev] [PATCH v3 00/53] " Qi Zhang
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 01/53] net/ice/base: add support for non-IP Layer2 protocol Qi Zhang
@ 2020-06-15  2:04   ` Qi Zhang
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 03/53] net/ice/base: disable profile merge for FDIR Qi Zhang
                     ` (51 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-15  2:04 UTC (permalink / raw)
  To: ferruh.yigit
  Cc: xiaolong.ye, qiming.yang, dev, Qi Zhang, Yahui Cao,
	Paul M . Stillwell Jr

Add descriptor field offset and mask definition. It is used to parse
FDIR rx descriptor field value.

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_lan_tx_rx.h | 44 ++++++++++++++++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index a0e284a8d..99edcc8ae 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -175,6 +175,50 @@ struct ice_fltr_desc {
 			(0xFFFFFFFFULL << ICE_FXD_FLTR_QW1_FDID_S)
 #define ICE_FXD_FLTR_QW1_FDID_ZERO	0x0ULL
 
+/* definition for FD filter programming status descriptor WB format */
+#define ICE_FXD_FLTR_WB_QW0_BUKT_LEN_S	28
+#define ICE_FXD_FLTR_WB_QW0_BUKT_LEN_M	\
+			(0xFULL << ICE_FXD_FLTR_WB_QW0_BUKT_LEN_S)
+
+#define ICE_FXD_FLTR_WB_QW0_FLTR_STAT_S	32
+#define ICE_FXD_FLTR_WB_QW0_FLTR_STAT_M	\
+			(0xFFFFFFFFULL << ICE_FXD_FLTR_WB_QW0_FLTR_STAT_S)
+
+#define ICE_FXD_FLTR_WB_QW1_DD_S	0
+#define ICE_FXD_FLTR_WB_QW1_DD_M	(0x1ULL << ICE_FXD_FLTR_WB_QW1_DD_S)
+#define ICE_FXD_FLTR_WB_QW1_DD_YES	0x1ULL
+
+#define ICE_FXD_FLTR_WB_QW1_PROG_ID_S	1
+#define ICE_FXD_FLTR_WB_QW1_PROG_ID_M	\
+				(0x3ULL << ICE_FXD_FLTR_WB_QW1_PROG_ID_S)
+#define ICE_FXD_FLTR_WB_QW1_PROG_ADD	0x0ULL
+#define ICE_FXD_FLTR_WB_QW1_PROG_DEL	0x1ULL
+
+#define ICE_FXD_FLTR_WB_QW1_FAIL_S	4
+#define ICE_FXD_FLTR_WB_QW1_FAIL_M	(0x1ULL << ICE_FXD_FLTR_WB_QW1_FAIL_S)
+#define ICE_FXD_FLTR_WB_QW1_FAIL_YES	0x1ULL
+
+#define ICE_FXD_FLTR_WB_QW1_FAIL_PROF_S	5
+#define ICE_FXD_FLTR_WB_QW1_FAIL_PROF_M	\
+				(0x1ULL << ICE_FXD_FLTR_WB_QW1_FAIL_PROF_S)
+#define ICE_FXD_FLTR_WB_QW1_FAIL_PROF_YES	0x1ULL
+
+#define ICE_FXD_FLTR_WB_QW1_FLT_ADDR_S	8
+#define ICE_FXD_FLTR_WB_QW1_FLT_ADDR_M	\
+				(0x3FFFULL << ICE_FXD_FLTR_WB_QW1_FLT_ADDR_S)
+
+#define ICE_FXD_FLTR_WB_QW1_PKT_PROF_S	28
+#define ICE_FXD_FLTR_WB_QW1_PKT_PROF_M	\
+				(0x7FULL << ICE_FXD_FLTR_WB_QW1_PKT_PROF_S)
+
+#define ICE_FXD_FLTR_WB_QW1_BUKT_HASH_S	38
+#define ICE_FXD_FLTR_WB_QW1_BUKT_HASH_M	\
+				(0x3FFFFFF << ICE_FXD_FLTR_WB_QW1_BUKT_HASH_S)
+
+#define ICE_FXD_FLTR_WB_QW1_FAIL_PROF_M	\
+				(0x1ULL << ICE_FXD_FLTR_WB_QW1_FAIL_PROF_S)
+#define ICE_FXD_FLTR_WB_QW1_FAIL_PROF_YES	0x1ULL
+
 enum ice_rx_desc_status_bits {
 	/* Note: These are predefined bit offsets */
 	ICE_RX_DESC_STATUS_DD_S			= 0,
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v3 03/53] net/ice/base: disable profile merge for FDIR
  2020-06-15  2:04 ` [dpdk-dev] [PATCH v3 00/53] " Qi Zhang
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 01/53] net/ice/base: add support for non-IP Layer2 protocol Qi Zhang
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 02/53] net/ice/base: add FDIR program status WB macro Qi Zhang
@ 2020-06-15  2:04   ` Qi Zhang
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 04/53] net/ice/base: avoid undefined behavior Qi Zhang
                     ` (50 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-15  2:04 UTC (permalink / raw)
  To: ferruh.yigit
  Cc: xiaolong.ye, qiming.yang, dev, Qi Zhang, Yahui Cao,
	Paul M . Stillwell Jr

For Flow Director, we don't want to re-use an existed profile with the
same field vector and mask. Merging two different flow_type’s field
vector will also make them sharing trained rule and cause rule
interference.

For example:
issue rule A: IPV4_TCP matching tcp src&dst port 80  to queue 8
issue rule B: IPV6_TCP matching tcp src&dst port 200 to queue 20
Below behavior is found but not expected:
IPV4_TCP pkt with src&dst port 200 hits rule B and goes to queue 20
IPV6_TCP pkt with src&dst port 80  hits rule A and goes to queue 8

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flex_pipe.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 512ced6b8..1f7a05969 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -2811,6 +2811,12 @@ ice_find_prof_id_with_mask(struct ice_hw *hw, enum ice_block blk,
 	struct ice_es *es = &hw->blk[blk].es;
 	u8 i;
 
+	/* For FD, we don't want to re-use an existed profile with the same
+	 * field vector and mask. This will cause rule interference.
+	 */
+	if (blk == ICE_BLK_FD)
+		return ICE_ERR_DOES_NOT_EXIST;
+
 	for (i = 0; i < (u8)es->count; i++) {
 		u16 off = i * es->fvw;
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v3 04/53] net/ice/base: avoid undefined behavior
  2020-06-15  2:04 ` [dpdk-dev] [PATCH v3 00/53] " Qi Zhang
                     ` (2 preceding siblings ...)
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 03/53] net/ice/base: disable profile merge for FDIR Qi Zhang
@ 2020-06-15  2:04   ` Qi Zhang
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 05/53] net/ice/base: consolidate implementation of MAC config set Qi Zhang
                     ` (49 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-15  2:04 UTC (permalink / raw)
  To: ferruh.yigit
  Cc: xiaolong.ye, qiming.yang, dev, Qi Zhang, Bruce Allan,
	Paul M . Stillwell Jr

When writing the driver's struct ice_tlan_ctx structure, do not write the
8-bit element int_q_state with the associated internal-to-hardware field
which is 122-bits, otherwise the helper function ice_write_byte() will use
undefined behavior when setting the mask used for that write.  This should
not cause any functional change and will avoid use of undefined behavior.
Also, update a comment to highlight this structure element is not written.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c    | 17 +++++++++++++----
 drivers/net/ice/base/ice_common.h    |  4 +++-
 drivers/net/ice/base/ice_lan_tx_rx.h |  2 +-
 drivers/net/ice/ice_rxtx.c           |  4 ++--
 4 files changed, 19 insertions(+), 8 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 17ffdee00..4b4555f6f 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -996,7 +996,7 @@ ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
 
 	rlan_ctx->prefena = 1;
 
-	ice_set_ctx((u8 *)rlan_ctx, ctx_buf, ice_rlan_ctx_info);
+	ice_set_ctx(hw, (u8 *)rlan_ctx, ctx_buf, ice_rlan_ctx_info);
 	return ice_copy_rxq_ctx_to_hw(hw, ctx_buf, rxq_index);
 }
 
@@ -1119,7 +1119,7 @@ ice_write_tx_cmpltnq_ctx(struct ice_hw *hw,
 {
 	u8 ctx_buf[ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS * sizeof(u32)] = { 0 };
 
-	ice_set_ctx((u8 *)tx_cmpltnq_ctx, ctx_buf, ice_tx_cmpltnq_ctx_info);
+	ice_set_ctx(hw, (u8 *)tx_cmpltnq_ctx, ctx_buf, ice_tx_cmpltnq_ctx_info);
 	return ice_copy_tx_cmpltnq_ctx_to_hw(hw, ctx_buf, tx_cmpltnq_index);
 }
 
@@ -1210,7 +1210,8 @@ ice_write_tx_drbell_q_ctx(struct ice_hw *hw,
 {
 	u8 ctx_buf[ICE_TX_DRBELL_Q_CTX_SIZE_DWORDS * sizeof(u32)] = { 0 };
 
-	ice_set_ctx((u8 *)tx_drbell_q_ctx, ctx_buf, ice_tx_drbell_q_ctx_info);
+	ice_set_ctx(hw, (u8 *)tx_drbell_q_ctx, ctx_buf,
+		    ice_tx_drbell_q_ctx_info);
 	return ice_copy_tx_drbell_q_ctx_to_hw(hw, ctx_buf, tx_drbell_q_index);
 }
 
@@ -3565,12 +3566,14 @@ ice_write_qword(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
 
 /**
  * ice_set_ctx - set context bits in packed structure
+ * @hw: pointer to the hardware structure
  * @src_ctx:  pointer to a generic non-packed context structure
  * @dest_ctx: pointer to memory for the packed structure
  * @ce_info:  a description of the structure to be transformed
  */
 enum ice_status
-ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
+ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,
+	    const struct ice_ctx_ele *ce_info)
 {
 	int f;
 
@@ -3579,6 +3582,12 @@ ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info)
 		 * using the correct size so that we are correct regardless
 		 * of the endianness of the machine.
 		 */
+		if (ce_info[f].width > (ce_info[f].size_of * BITS_PER_BYTE)) {
+			ice_debug(hw, ICE_DBG_QCTX,
+				  "Field %d width of %d bits larger than size of %d byte(s) ... skipping write\n",
+				  f, ce_info[f].width, ce_info[f].size_of);
+			continue;
+		}
 		switch (ce_info[f].size_of) {
 		case sizeof(u8):
 			ice_write_byte(src_ctx, dest_ctx, &ce_info[f]);
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 2a1077b90..6d971a644 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -114,7 +114,9 @@ enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
 void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode);
 extern const struct ice_ctx_ele ice_tlan_ctx_info[];
 enum ice_status
-ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info);
+ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,
+	    const struct ice_ctx_ele *ce_info);
+
 enum ice_status
 ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc,
 		void *buf, u16 buf_size, struct ice_sq_cd *cd);
diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h
index 99edcc8ae..012d129df 100644
--- a/drivers/net/ice/base/ice_lan_tx_rx.h
+++ b/drivers/net/ice/base/ice_lan_tx_rx.h
@@ -1135,7 +1135,7 @@ struct ice_tlan_ctx {
 	u8 drop_ena;
 	u8 cache_prof_idx;
 	u8 pkt_shaper_prof_idx;
-	u8 int_q_state;	/* width not needed - internal do not write */
+	u8 int_q_state;	/* width not needed - internal - DO NOT WRITE!!! */
 };
 
 /* LAN Tx Completion Queue data */
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index 1c9f31efd..5d6f693c5 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -481,7 +481,7 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
 	tx_ctx.tso_qnum = txq->reg_idx; /* index for tso state structure */
 	tx_ctx.legacy_int = 1; /* Legacy or Advanced Host Interface */
 
-	ice_set_ctx((uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,
+	ice_set_ctx(hw, (uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,
 		    ice_tlan_ctx_info);
 
 	txq->qtx_tail = hw->hw_addr + QTX_COMM_DBELL(txq->reg_idx);
@@ -653,7 +653,7 @@ ice_fdir_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
 	tx_ctx.tso_qnum = txq->reg_idx; /* index for tso state structure */
 	tx_ctx.legacy_int = 1; /* Legacy or Advanced Host Interface */
 
-	ice_set_ctx((uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,
+	ice_set_ctx(hw, (uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,
 		    ice_tlan_ctx_info);
 
 	txq->qtx_tail = hw->hw_addr + QTX_COMM_DBELL(txq->reg_idx);
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v3 05/53] net/ice/base: consolidate implementation of MAC config set
  2020-06-15  2:04 ` [dpdk-dev] [PATCH v3 00/53] " Qi Zhang
                     ` (3 preceding siblings ...)
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 04/53] net/ice/base: avoid undefined behavior Qi Zhang
@ 2020-06-15  2:04   ` Qi Zhang
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 06/53] net/ice/base: report AOC PHY Types as Fiber Qi Zhang
                     ` (48 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-15  2:04 UTC (permalink / raw)
  To: ferruh.yigit
  Cc: xiaolong.ye, qiming.yang, dev, Qi Zhang, Anirudh Venkataramanan,
	Jeb Cramer, Paul M . Stillwell Jr

Consolidate implementation of ice_aq_set_mac_cfg for switch mode
and NIC mode. As per the specification, the driver needs to call
set_mac_cfg (opcode 0x0603) to be able to exercise jumbo frames.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c     | 65 ++++++++++++++++++++++-------------
 drivers/net/ice/base/ice_hw_autogen.h |  4 +--
 2 files changed, 44 insertions(+), 25 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 4b4555f6f..051eb8c64 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -410,6 +410,43 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
 }
 
 /**
+ * ice_fill_tx_timer_and_fc_thresh
+ * @hw: pointer to the HW struct
+ * @cmd: pointer to MAC cfg structure
+ *
+ * Add Tx timer and FC refresh threshold info to Set MAC Config AQ command
+ * descriptor
+ */
+static void
+ice_fill_tx_timer_and_fc_thresh(struct ice_hw *hw,
+				struct ice_aqc_set_mac_cfg *cmd)
+{
+	u16 fc_thres_val, tx_timer_val;
+	u32 val;
+
+	/* We read back the transmit timer and fc threshold value of
+	 * LFC. Thus, we will use index =
+	 * PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX.
+	 *
+	 * Also, because we are opearating on transmit timer and fc
+	 * threshold of LFC, we don't turn on any bit in tx_tmr_priority
+	 */
+#define IDX_OF_LFC PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX
+
+	/* Retrieve the transmit timer */
+	val = rd32(hw, PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA(IDX_OF_LFC));
+	tx_timer_val = val &
+		PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_HSEC_CTL_TX_PAUSE_QUANTA_M;
+	cmd->tx_tmr_value = CPU_TO_LE16(tx_timer_val);
+
+	/* Retrieve the fc threshold */
+	val = rd32(hw, PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(IDX_OF_LFC));
+	fc_thres_val = val & PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_M;
+
+	cmd->fc_refresh_threshold = CPU_TO_LE16(fc_thres_val);
+}
+
+/**
  * ice_aq_set_mac_cfg
  * @hw: pointer to the HW struct
  * @max_frame_size: Maximum Frame Size to be supported
@@ -420,10 +457,8 @@ ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
 enum ice_status
 ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd)
 {
-	u16 fc_threshold_val, tx_timer_val;
 	struct ice_aqc_set_mac_cfg *cmd;
 	struct ice_aq_desc desc;
-	u32 reg_val;
 
 	cmd = &desc.params.set_mac_cfg;
 
@@ -434,27 +469,7 @@ ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd)
 
 	cmd->max_frame_size = CPU_TO_LE16(max_frame_size);
 
-	/* We read back the transmit timer and fc threshold value of
-	 * LFC. Thus, we will use index =
-	 * PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX.
-	 *
-	 * Also, because we are opearating on transmit timer and fc
-	 * threshold of LFC, we don't turn on any bit in tx_tmr_priority
-	 */
-#define IDX_OF_LFC PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_MAX_INDEX
-
-	/* Retrieve the transmit timer */
-	reg_val = rd32(hw,
-		       PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA(IDX_OF_LFC));
-	tx_timer_val = reg_val &
-		PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_HSEC_CTL_TX_PAUSE_QUANTA_M;
-	cmd->tx_tmr_value = CPU_TO_LE16(tx_timer_val);
-
-	/* Retrieve the fc threshold */
-	reg_val = rd32(hw,
-		       PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(IDX_OF_LFC));
-	fc_threshold_val = reg_val & MAKEMASK(0xFFFF, 0);
-	cmd->fc_refresh_threshold = CPU_TO_LE16(fc_threshold_val);
+	ice_fill_tx_timer_and_fc_thresh(hw, cmd);
 
 	return ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
 }
@@ -721,6 +736,10 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
 
 	if (status)
 		goto err_unroll_fltr_mgmt_struct;
+	/* enable jumbo frame support at MAC level */
+	status = ice_aq_set_mac_cfg(hw, ICE_AQ_SET_MAC_FRAME_SIZE_MAX, NULL);
+	if (status)
+		goto err_unroll_fltr_mgmt_struct;
 	/* Obtain counter base index which would be used by flow director */
 	status = ice_alloc_fd_res_cntr(hw, &hw->fd_ctr_base);
 	if (status)
diff --git a/drivers/net/ice/base/ice_hw_autogen.h b/drivers/net/ice/base/ice_hw_autogen.h
index 1c9c84dfb..572f481b7 100644
--- a/drivers/net/ice/base/ice_hw_autogen.h
+++ b/drivers/net/ice/base/ice_hw_autogen.h
@@ -5232,8 +5232,8 @@
 #define PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA_HSEC_CTL_TX_PAUSE_QUANTA_M MAKEMASK(0xFFFF, 0)
 #define PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(_i) (0x001E3800 + ((_i) * 32)) /* _i=0...8 */ /* Reset Source: GLOBR */
 #define PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_MAX_INDEX 8
-#define PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_S 0
-#define PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_M MAKEMASK(0xFFFF, 0)
+#define PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_S 0
+#define PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER_M MAKEMASK(0xFFFF, 0)
 #define PRTMAC_HSEC_CTL_TX_SA_PART1		0x001E3960 /* Reset Source: GLOBR */
 #define PRTMAC_HSEC_CTL_TX_SA_PART1_HSEC_CTL_TX_SA_PART1_S 0
 #define PRTMAC_HSEC_CTL_TX_SA_PART1_HSEC_CTL_TX_SA_PART1_M MAKEMASK(0xFFFFFFFF, 0)
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v3 06/53] net/ice/base: report AOC PHY Types as Fiber
  2020-06-15  2:04 ` [dpdk-dev] [PATCH v3 00/53] " Qi Zhang
                     ` (4 preceding siblings ...)
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 05/53] net/ice/base: consolidate implementation of MAC config set Qi Zhang
@ 2020-06-15  2:04   ` Qi Zhang
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 07/53] net/ice/base: gate devices from FW link override Qi Zhang
                     ` (47 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-15  2:04 UTC (permalink / raw)
  To: ferruh.yigit
  Cc: xiaolong.ye, qiming.yang, dev, Qi Zhang, Doug Dziggel,
	Paul M . Stillwell Jr

Report AOC types as fiber instead of unknown

Signed-off-by: Doug Dziggel <douglas.a.dziggel@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 051eb8c64..38ffd5203 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -256,6 +256,15 @@ static enum ice_media_type ice_get_media_type(struct ice_port_info *pi)
 		case ICE_PHY_TYPE_LOW_100GBASE_SR2:
 		case ICE_PHY_TYPE_LOW_100GBASE_DR:
 			return ICE_MEDIA_FIBER;
+		case ICE_PHY_TYPE_LOW_10G_SFI_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_25G_AUI_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_40G_XLAUI_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_50G_LAUI2_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_50G_AUI2_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_50G_AUI1_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_100G_CAUI4_AOC_ACC:
+		case ICE_PHY_TYPE_LOW_100G_AUI4_AOC_ACC:
+			return ICE_MEDIA_FIBER;
 		case ICE_PHY_TYPE_LOW_100BASE_TX:
 		case ICE_PHY_TYPE_LOW_1000BASE_T:
 		case ICE_PHY_TYPE_LOW_2500BASE_T:
@@ -307,6 +316,9 @@ static enum ice_media_type ice_get_media_type(struct ice_port_info *pi)
 			/* fall-through */
 		case ICE_PHY_TYPE_HIGH_100GBASE_KR2_PAM4:
 			return ICE_MEDIA_BACKPLANE;
+		case ICE_PHY_TYPE_HIGH_100G_CAUI2_AOC_ACC:
+		case ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC:
+			return ICE_MEDIA_FIBER;
 		}
 	}
 	return ICE_MEDIA_UNKNOWN;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v3 07/53] net/ice/base: gate devices from FW link override
  2020-06-15  2:04 ` [dpdk-dev] [PATCH v3 00/53] " Qi Zhang
                     ` (5 preceding siblings ...)
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 06/53] net/ice/base: report AOC PHY Types as Fiber Qi Zhang
@ 2020-06-15  2:04   ` Qi Zhang
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 08/53] net/ice/base: improve VSI filters rebuild Qi Zhang
                     ` (46 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-15  2:04 UTC (permalink / raw)
  To: ferruh.yigit
  Cc: xiaolong.ye, qiming.yang, dev, Qi Zhang, Jeb Cramer,
	Paul M . Stillwell Jr

Currently, the FW link override feature is only permitted for E810
devices.  However, the ice_fw_supports_link_override() guards against FW
versions irrespective of the device. This assumes FW versions between
the families are aligned, which is not the case.

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 38ffd5203..499653c21 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -4357,6 +4357,10 @@ enum ice_fw_modes ice_get_fw_mode(struct ice_hw *hw)
  */
 bool ice_fw_supports_link_override(struct ice_hw *hw)
 {
+	/* Currently, only supported for E810 devices */
+	if (hw->mac_type != ICE_MAC_E810)
+		return false;
+
 	if (hw->api_maj_ver == ICE_FW_API_LINK_OVERRIDE_MAJ) {
 		if (hw->api_min_ver > ICE_FW_API_LINK_OVERRIDE_MIN)
 			return true;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v3 08/53] net/ice/base: improve VSI filters rebuild
  2020-06-15  2:04 ` [dpdk-dev] [PATCH v3 00/53] " Qi Zhang
                     ` (6 preceding siblings ...)
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 07/53] net/ice/base: gate devices from FW link override Qi Zhang
@ 2020-06-15  2:04   ` Qi Zhang
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 09/53] net/ice/base: add AUI media type Qi Zhang
                     ` (45 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-15  2:04 UTC (permalink / raw)
  To: ferruh.yigit
  Cc: xiaolong.ye, qiming.yang, dev, Qi Zhang, Grzegorz Nitka,
	Paul M . Stillwell Jr

This change improve VSI filter configuration rebuild for
multiport configuration, ie. where 1 PF includes more than
one logical port. For some functions, association between
port and corresponding switch_info or port_info structure
has been lost because by default the pointer to the first
element of array (switch, port etc.) is passed as function
argument. With this change, pointer to proper element is
added an extra argument in relevant functions.

Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 59 +++++++++++++++++++++++++++++++--------
 drivers/net/ice/base/ice_switch.c | 38 ++++++++++++++++++-------
 drivers/net/ice/base/ice_switch.h |  5 +++-
 3 files changed, 79 insertions(+), 23 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 499653c21..aab560504 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -493,6 +493,7 @@ ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd)
 enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
 {
 	struct ice_switch_info *sw;
+	enum ice_status status;
 
 	hw->switch_info = (struct ice_switch_info *)
 			  ice_malloc(hw, sizeof(*hw->switch_info));
@@ -504,27 +505,36 @@ enum ice_status ice_init_fltr_mgmt_struct(struct ice_hw *hw)
 
 	INIT_LIST_HEAD(&sw->vsi_list_map_head);
 
-	return ice_init_def_sw_recp(hw, &hw->switch_info->recp_list);
+	status = ice_init_def_sw_recp(hw, &hw->switch_info->recp_list);
+	if (status) {
+		ice_free(hw, hw->switch_info);
+		return status;
+	}
+	return ICE_SUCCESS;
 }
 
 /**
- * ice_cleanup_fltr_mgmt_struct - cleanup filter management list and locks
+ * ice_cleanup_fltr_mgmt_single - clears single filter mngt struct
  * @hw: pointer to the HW struct
+ * @sw: pointer to switch info struct for which function clears filters
  */
-void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
+static void
+ice_cleanup_fltr_mgmt_single(struct ice_hw *hw, struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	struct ice_vsi_list_map_info *v_pos_map;
 	struct ice_vsi_list_map_info *v_tmp_map;
 	struct ice_sw_recipe *recps;
 	u8 i;
 
+	if (!sw)
+		return;
+
 	LIST_FOR_EACH_ENTRY_SAFE(v_pos_map, v_tmp_map, &sw->vsi_list_map_head,
 				 ice_vsi_list_map_info, list_entry) {
 		LIST_DEL(&v_pos_map->list_entry);
 		ice_free(hw, v_pos_map);
 	}
-	recps = hw->switch_info->recp_list;
+	recps = sw->recp_list;
 	for (i = 0; i < ICE_MAX_NUM_RECIPES; i++) {
 		struct ice_recp_grp_entry *rg_entry, *tmprg_entry;
 
@@ -564,12 +574,21 @@ void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
 		if (recps[i].root_buf)
 			ice_free(hw, recps[i].root_buf);
 	}
-	ice_rm_all_sw_replay_rule_info(hw);
+	ice_rm_sw_replay_rule_info(hw, sw);
 	ice_free(hw, sw->recp_list);
 	ice_free(hw, sw);
 }
 
 /**
+ * ice_cleanup_all_fltr_mgmt - cleanup filter management list and locks
+ * @hw: pointer to the HW struct
+ */
+void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw)
+{
+	ice_cleanup_fltr_mgmt_single(hw, hw->switch_info);
+}
+
+/**
  * ice_get_itr_intrl_gran
  * @hw: pointer to the HW struct
  *
@@ -4104,18 +4123,32 @@ ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
 }
 
 /**
+ * ice_is_main_vsi - checks whether the VSI is main VSI
+ * @hw: pointer to the HW struct
+ * @vsi_handle: VSI handle
+ *
+ * Checks whether the VSI is the main VSI (the first PF VSI created on
+ * given PF).
+ */
+static bool ice_is_main_vsi(struct ice_hw *hw, u16 vsi_handle)
+{
+	return vsi_handle == ICE_MAIN_VSI_HANDLE && hw->vsi_ctx[vsi_handle];
+}
+
+/**
  * ice_replay_pre_init - replay pre initialization
  * @hw: pointer to the HW struct
+ * @sw: pointer to switch info struct for which function initializes filters
  *
  * Initializes required config data for VSI, FD, ACL, and RSS before replay.
  */
-static enum ice_status ice_replay_pre_init(struct ice_hw *hw)
+static enum ice_status
+ice_replay_pre_init(struct ice_hw *hw, struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	u8 i;
 
 	/* Delete old entries from replay filter list head if there is any */
-	ice_rm_all_sw_replay_rule_info(hw);
+	ice_rm_sw_replay_rule_info(hw, sw);
 	/* In start of replay, move entries into replay_rules list, it
 	 * will allow adding rules entries back to filt_rules list,
 	 * which is operational list.
@@ -4138,14 +4171,16 @@ static enum ice_status ice_replay_pre_init(struct ice_hw *hw)
  */
 enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle)
 {
+	struct ice_switch_info *sw = hw->switch_info;
+	struct ice_port_info *pi = hw->port_info;
 	enum ice_status status;
 
 	if (!ice_is_vsi_valid(hw, vsi_handle))
 		return ICE_ERR_PARAM;
 
 	/* Replay pre-initialization if there is any */
-	if (vsi_handle == ICE_MAIN_VSI_HANDLE) {
-		status = ice_replay_pre_init(hw);
+	if (ice_is_main_vsi(hw, vsi_handle)) {
+		status = ice_replay_pre_init(hw, sw);
 		if (status)
 			return status;
 	}
@@ -4154,7 +4189,7 @@ enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle)
 	if (status)
 		return status;
 	/* Replay per VSI all filters */
-	status = ice_replay_vsi_all_fltr(hw, vsi_handle);
+	status = ice_replay_vsi_all_fltr(hw, pi, vsi_handle);
 	if (!status)
 		status = ice_replay_vsi_agg(hw, vsi_handle);
 	return status;
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 5b968b7ce..910fb5236 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -7460,6 +7460,8 @@ enum ice_status ice_replay_all_fltr(struct ice_hw *hw)
 /**
  * ice_replay_vsi_fltr - Replay filters for requested VSI
  * @hw: pointer to the hardware structure
+ * @pi: pointer to port information structure
+ * @sw: pointer to switch info struct for which function replays filters
  * @vsi_handle: driver VSI handle
  * @recp_id: Recipe ID for which rules need to be replayed
  * @list_head: list for which filters need to be replayed
@@ -7468,7 +7470,8 @@ enum ice_status ice_replay_all_fltr(struct ice_hw *hw)
  * It is required to pass valid VSI handle.
  */
 static enum ice_status
-ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
+ice_replay_vsi_fltr(struct ice_hw *hw, struct ice_port_info *pi,
+		    struct ice_switch_info *sw, u16 vsi_handle, u8 recp_id,
 		    struct LIST_HEAD_TYPE *list_head)
 {
 	struct ice_fltr_mgmt_list_entry *itr;
@@ -7478,7 +7481,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
 
 	if (LIST_EMPTY(list_head))
 		return status;
-	recp_list = &hw->switch_info->recp_list[recp_id];
+	recp_list = &sw->recp_list[recp_id];
 	hw_vsi_id = ice_get_hw_vsi_num(hw, vsi_handle);
 
 	LIST_FOR_EACH_ENTRY(itr, list_head, ice_fltr_mgmt_list_entry,
@@ -7492,7 +7495,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
 			if (f_entry.fltr_info.src_id == ICE_SRC_ID_VSI)
 				f_entry.fltr_info.src = hw_vsi_id;
 			status = ice_add_rule_internal(hw, recp_list,
-						       hw->port_info->lport,
+						       pi->lport,
 						       &f_entry);
 			if (status != ICE_SUCCESS)
 				goto end;
@@ -7512,7 +7515,7 @@ ice_replay_vsi_fltr(struct ice_hw *hw, u16 vsi_handle, u8 recp_id,
 			status = ice_add_vlan_internal(hw, recp_list, &f_entry);
 		else
 			status = ice_add_rule_internal(hw, recp_list,
-						       hw->port_info->lport,
+						       pi->lport,
 						       &f_entry);
 		if (status != ICE_SUCCESS)
 			goto end;
@@ -7557,11 +7560,14 @@ ice_replay_vsi_adv_rule(struct ice_hw *hw, u16 vsi_handle,
 /**
  * ice_replay_vsi_all_fltr - replay all filters stored in bookkeeping lists
  * @hw: pointer to the hardware structure
+ * @pi: pointer to port information structure
  * @vsi_handle: driver VSI handle
  *
  * Replays filters for requested VSI via vsi_handle.
  */
-enum ice_status ice_replay_vsi_all_fltr(struct ice_hw *hw, u16 vsi_handle)
+enum ice_status
+ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi,
+			u16 vsi_handle)
 {
 	struct ice_switch_info *sw = hw->switch_info;
 	enum ice_status status;
@@ -7573,7 +7579,8 @@ enum ice_status ice_replay_vsi_all_fltr(struct ice_hw *hw, u16 vsi_handle)
 
 		head = &sw->recp_list[i].filt_replay_rules;
 		if (!sw->recp_list[i].adv_rule)
-			status = ice_replay_vsi_fltr(hw, vsi_handle, i, head);
+			status = ice_replay_vsi_fltr(hw, pi, sw, vsi_handle, i,
+						     head);
 		else
 			status = ice_replay_vsi_adv_rule(hw, vsi_handle, head);
 		if (status != ICE_SUCCESS)
@@ -7584,14 +7591,14 @@ enum ice_status ice_replay_vsi_all_fltr(struct ice_hw *hw, u16 vsi_handle)
 }
 
 /**
- * ice_rm_all_sw_replay_rule_info - deletes filter replay rules
+ * ice_rm_all_sw_replay_rule - helper function to delete filter replay rules
  * @hw: pointer to the HW struct
+ * @sw: pointer to switch info struct for which function removes filters
  *
- * Deletes the filter replay rules.
+ * Deletes the filter replay rules for given switch
  */
-void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw)
+void ice_rm_sw_replay_rule_info(struct ice_hw *hw, struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	u8 i;
 
 	if (!sw)
@@ -7609,3 +7616,14 @@ void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw)
 		}
 	}
 }
+
+/**
+ * ice_rm_all_sw_replay_rule_info - deletes filter replay rules
+ * @hw: pointer to the HW struct
+ *
+ * Deletes the filter replay rules.
+ */
+void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw)
+{
+	ice_rm_sw_replay_rule_info(hw, hw->switch_info);
+}
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 6bd50518f..ba7c56f44 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -485,7 +485,10 @@ ice_init_def_sw_recp(struct ice_hw *hw, struct ice_sw_recipe **recp_list);
 u16 ice_get_hw_vsi_num(struct ice_hw *hw, u16 vsi_handle);
 bool ice_is_vsi_valid(struct ice_hw *hw, u16 vsi_handle);
 
-enum ice_status ice_replay_vsi_all_fltr(struct ice_hw *hw, u16 vsi_handle);
+enum ice_status
+ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi,
+			u16 vsi_handle);
+void ice_rm_sw_replay_rule_info(struct ice_hw *hw, struct ice_switch_info *sw);
 void ice_rm_all_sw_replay_rule_info(struct ice_hw *hw);
 bool ice_is_prof_rule(enum ice_sw_tunnel_type type);
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v3 09/53] net/ice/base: add AUI media type
  2020-06-15  2:04 ` [dpdk-dev] [PATCH v3 00/53] " Qi Zhang
                     ` (7 preceding siblings ...)
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 08/53] net/ice/base: improve VSI filters rebuild Qi Zhang
@ 2020-06-15  2:04   ` Qi Zhang
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 10/53] net/ice/base: fix variable type for ACL Qi Zhang
                     ` (44 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-15  2:04 UTC (permalink / raw)
  To: ferruh.yigit
  Cc: xiaolong.ye, qiming.yang, dev, Qi Zhang, Doug Dziggel,
	Paul M . Stillwell Jr

Add and report AUI PHY types as an AUI media type

Signed-off-by: Doug Dziggel <douglas.a.dziggel@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 5 +++--
 drivers/net/ice/base/ice_type.h   | 1 +
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index aab560504..e266ba56c 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -291,7 +291,7 @@ static enum ice_media_type ice_get_media_type(struct ice_port_info *pi)
 		case ICE_PHY_TYPE_LOW_100G_AUI4:
 		case ICE_PHY_TYPE_LOW_100G_CAUI4:
 			if (ice_is_media_cage_present(pi))
-				return ICE_MEDIA_DA;
+				return ICE_MEDIA_AUI;
 			/* fall-through */
 		case ICE_PHY_TYPE_LOW_1000BASE_KX:
 		case ICE_PHY_TYPE_LOW_2500BASE_KX:
@@ -311,8 +311,9 @@ static enum ice_media_type ice_get_media_type(struct ice_port_info *pi)
 	} else {
 		switch (hw_link_info->phy_type_high) {
 		case ICE_PHY_TYPE_HIGH_100G_AUI2:
+		case ICE_PHY_TYPE_HIGH_100G_CAUI2:
 			if (ice_is_media_cage_present(pi))
-				return ICE_MEDIA_DA;
+				return ICE_MEDIA_AUI;
 			/* fall-through */
 		case ICE_PHY_TYPE_HIGH_100GBASE_KR2_PAM4:
 			return ICE_MEDIA_BACKPLANE;
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index cf622178e..3280d48d0 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -218,6 +218,7 @@ enum ice_media_type {
 	ICE_MEDIA_BASET,
 	ICE_MEDIA_BACKPLANE,
 	ICE_MEDIA_DA,
+	ICE_MEDIA_AUI,
 };
 
 /* Software VSI types. */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v3 10/53] net/ice/base: fix variable type for ACL
  2020-06-15  2:04 ` [dpdk-dev] [PATCH v3 00/53] " Qi Zhang
                     ` (8 preceding siblings ...)
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 09/53] net/ice/base: add AUI media type Qi Zhang
@ 2020-06-15  2:04   ` Qi Zhang
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 11/53] net/ice/base: update PHY type high max index value Qi Zhang
                     ` (43 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-15  2:04 UTC (permalink / raw)
  To: ferruh.yigit
  Cc: xiaolong.ye, qiming.yang, dev, Qi Zhang, stable, Paul M Stillwell Jr

A u8 idx in ice_acl_add_entry  causes the code to truncate the values
greater than 255 to 255 or less when calling ice_aq_program_acl_entry()
resulting in the wrong TCAM index being programmed for the specified
rule. The result is that the rule action doesn't work correctly
(packets don't get routed to the correct queue or dropped if that
is the action). Fix the issue by changing the variable to be a u16
again.

Fixes: f3202a097f12 ("net/ice/base: add ACL module")
Cc: stable@dpdk.org

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_acl_ctrl.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_acl_ctrl.c b/drivers/net/ice/base/ice_acl_ctrl.c
index e67605141..39b399dd4 100644
--- a/drivers/net/ice/base/ice_acl_ctrl.c
+++ b/drivers/net/ice/base/ice_acl_ctrl.c
@@ -934,9 +934,10 @@ ice_acl_add_entry(struct ice_hw *hw, struct ice_acl_scen *scen,
 		  enum ice_acl_entry_prior prior, u8 *keys, u8 *inverts,
 		  struct ice_acl_act_entry *acts, u8 acts_cnt, u16 *entry_idx)
 {
-	u8 i, entry_tcam, num_cscd, idx, offset;
+	u8 i, entry_tcam, num_cscd, offset;
 	struct ice_aqc_acl_data buf;
 	enum ice_status status = ICE_SUCCESS;
+	u16 idx;
 
 	if (!scen)
 		return ICE_ERR_DOES_NOT_EXIST;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v3 11/53] net/ice/base: update PHY type high max index value
  2020-06-15  2:04 ` [dpdk-dev] [PATCH v3 00/53] " Qi Zhang
                     ` (9 preceding siblings ...)
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 10/53] net/ice/base: fix variable type for ACL Qi Zhang
@ 2020-06-15  2:04   ` Qi Zhang
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 12/53] net/ice/base: consolidate VF Promiscuous mode Qi Zhang
                     ` (42 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-15  2:04 UTC (permalink / raw)
  To: ferruh.yigit
  Cc: xiaolong.ye, qiming.yang, dev, Qi Zhang, Chinh T Cao,
	Paul M . Stillwell Jr

As currently, we are supporting only 5 PHY_SPEEDs for phy_type_high.
Thus, we should adjust the value of ICE_PHY_TYPE_HIGH_MAX_INDEX to 5.

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_adminq_cmd.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index 57a785508..a5d689dc8 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -1331,7 +1331,7 @@ struct ice_aqc_get_phy_caps {
 #define ICE_PHY_TYPE_HIGH_100G_CAUI2		BIT_ULL(2)
 #define ICE_PHY_TYPE_HIGH_100G_AUI2_AOC_ACC	BIT_ULL(3)
 #define ICE_PHY_TYPE_HIGH_100G_AUI2		BIT_ULL(4)
-#define ICE_PHY_TYPE_HIGH_MAX_INDEX		19
+#define ICE_PHY_TYPE_HIGH_MAX_INDEX		5
 
 struct ice_aqc_get_phy_caps_data {
 	__le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v3 12/53] net/ice/base: consolidate VF Promiscuous mode
  2020-06-15  2:04 ` [dpdk-dev] [PATCH v3 00/53] " Qi Zhang
                     ` (10 preceding siblings ...)
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 11/53] net/ice/base: update PHY type high max index value Qi Zhang
@ 2020-06-15  2:04   ` Qi Zhang
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 13/53] net/ice/base: refactor flow director filter swap Qi Zhang
                     ` (41 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-15  2:04 UTC (permalink / raw)
  To: ferruh.yigit
  Cc: xiaolong.ye, qiming.yang, dev, Qi Zhang, Shibin Koikkara Reeny,
	Paul M . Stillwell Jr

Consolidate the Promiscuous rule for SMBM on the chosen logical port.

Signed-off-by: Shibin Koikkara Reeny <shibin.koikkara.reeny@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 145 ++++++++++++++++++++++++++++++--------
 1 file changed, 115 insertions(+), 30 deletions(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 910fb5236..f5dd86bf4 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -4354,17 +4354,17 @@ static u8 ice_determine_promisc_mask(struct ice_fltr_info *fi)
 }
 
 /**
- * ice_get_vsi_promisc - get promiscuous mode of given VSI
+ * _ice_get_vsi_promisc - get promiscuous mode of given VSI
  * @hw: pointer to the hardware structure
  * @vsi_handle: VSI handle to retrieve info from
  * @promisc_mask: pointer to mask to be filled in
  * @vid: VLAN ID of promisc VLAN VSI
+ * @sw: pointer to switch info struct for which function add rule
  */
-enum ice_status
-ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
-		    u16 *vid)
+static enum ice_status
+_ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+		     u16 *vid, struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	struct ice_fltr_mgmt_list_entry *itr;
 	struct LIST_HEAD_TYPE *rule_head;
 	struct ice_lock *rule_lock;	/* Lock to protect filter rule list */
@@ -4394,17 +4394,32 @@ ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
 }
 
 /**
- * ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI
+ * ice_get_vsi_promisc - get promiscuous mode of given VSI
  * @hw: pointer to the hardware structure
  * @vsi_handle: VSI handle to retrieve info from
  * @promisc_mask: pointer to mask to be filled in
  * @vid: VLAN ID of promisc VLAN VSI
  */
 enum ice_status
-ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
-			 u16 *vid)
+ice_get_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+		    u16 *vid)
+{
+	return _ice_get_vsi_promisc(hw, vsi_handle, promisc_mask,
+				    vid, hw->switch_info);
+}
+
+/**
+ * ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to retrieve info from
+ * @promisc_mask: pointer to mask to be filled in
+ * @vid: VLAN ID of promisc VLAN VSI
+ * @sw: pointer to switch info struct for which function add rule
+ */
+static enum ice_status
+_ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+			  u16 *vid, struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	struct ice_fltr_mgmt_list_entry *itr;
 	struct LIST_HEAD_TYPE *rule_head;
 	struct ice_lock *rule_lock;	/* Lock to protect filter rule list */
@@ -4434,6 +4449,21 @@ ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
 }
 
 /**
+ * ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to retrieve info from
+ * @promisc_mask: pointer to mask to be filled in
+ * @vid: VLAN ID of promisc VLAN VSI
+ */
+enum ice_status
+ice_get_vsi_vlan_promisc(struct ice_hw *hw, u16 vsi_handle, u8 *promisc_mask,
+			 u16 *vid)
+{
+	return _ice_get_vsi_vlan_promisc(hw, vsi_handle, promisc_mask,
+					 vid, hw->switch_info);
+}
+
+/**
  * ice_remove_promisc - Remove promisc based filter rules
  * @hw: pointer to the hardware structure
  * @recp_id: recipe ID for which the rule needs to removed
@@ -4458,17 +4488,17 @@ ice_remove_promisc(struct ice_hw *hw, u8 recp_id,
 }
 
 /**
- * ice_clear_vsi_promisc - clear specified promiscuous mode(s) for given VSI
+ * _ice_clear_vsi_promisc - clear specified promiscuous mode(s)
  * @hw: pointer to the hardware structure
  * @vsi_handle: VSI handle to clear mode
  * @promisc_mask: mask of promiscuous config bits to clear
  * @vid: VLAN ID to clear VLAN promiscuous
+ * @sw: pointer to switch info struct for which function add rule
  */
-enum ice_status
-ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
-		      u16 vid)
+static enum ice_status
+_ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
+		       u16 vid, struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	struct ice_fltr_list_entry *fm_entry, *tmp;
 	struct LIST_HEAD_TYPE remove_list_head;
 	struct ice_fltr_mgmt_list_entry *itr;
@@ -4533,14 +4563,32 @@ ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
 }
 
 /**
- * ice_set_vsi_promisc - set given VSI to given promiscuous mode(s)
+ * ice_clear_vsi_promisc - clear specified promiscuous mode(s) for given VSI
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to clear mode
+ * @promisc_mask: mask of promiscuous config bits to clear
+ * @vid: VLAN ID to clear VLAN promiscuous
+ */
+enum ice_status
+ice_clear_vsi_promisc(struct ice_hw *hw, u16 vsi_handle,
+		      u8 promisc_mask, u16 vid)
+{
+	return _ice_clear_vsi_promisc(hw, vsi_handle, promisc_mask,
+				      vid, hw->switch_info);
+}
+
+/**
+ * _ice_set_vsi_promisc - set given VSI to given promiscuous mode(s)
  * @hw: pointer to the hardware structure
  * @vsi_handle: VSI handle to configure
  * @promisc_mask: mask of promiscuous config bits
  * @vid: VLAN ID to set VLAN promiscuous
+ * @lport: logical port number to configure promisc mode
+ * @sw: pointer to switch info struct for which function add rule
  */
-enum ice_status
-ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask, u16 vid)
+static enum ice_status
+_ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
+		     u16 vid, u8 lport, struct ice_switch_info *sw)
 {
 	enum { UCAST_FLTR = 1, MCAST_FLTR, BCAST_FLTR };
 	struct ice_fltr_list_entry f_list_entry;
@@ -4631,17 +4679,16 @@ ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask, u16 vid)
 			new_fltr.src = hw_vsi_id;
 		} else {
 			new_fltr.flag |= ICE_FLTR_RX;
-			new_fltr.src = hw->port_info->lport;
+			new_fltr.src = lport;
 		}
 
 		new_fltr.fltr_act = ICE_FWD_TO_VSI;
 		new_fltr.vsi_handle = vsi_handle;
 		new_fltr.fwd_id.hw_vsi_id = hw_vsi_id;
 		f_list_entry.fltr_info = new_fltr;
-		recp_list = &hw->switch_info->recp_list[recipe_id];
+		recp_list = &sw->recp_list[recipe_id];
 
-		status = ice_add_rule_internal(hw, recp_list,
-					       hw->port_info->lport,
+		status = ice_add_rule_internal(hw, recp_list, lport,
 					       &f_list_entry);
 		if (status != ICE_SUCCESS)
 			goto set_promisc_exit;
@@ -4652,19 +4699,37 @@ ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask, u16 vid)
 }
 
 /**
- * ice_set_vlan_vsi_promisc
+ * ice_set_vsi_promisc - set given VSI to given promiscuous mode(s)
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to configure
+ * @promisc_mask: mask of promiscuous config bits
+ * @vid: VLAN ID to set VLAN promiscuous
+ */
+enum ice_status
+ice_set_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
+		    u16 vid)
+{
+	return _ice_set_vsi_promisc(hw, vsi_handle, promisc_mask, vid,
+				    hw->port_info->lport,
+				    hw->switch_info);
+}
+
+/**
+ * _ice_set_vlan_vsi_promisc
  * @hw: pointer to the hardware structure
  * @vsi_handle: VSI handle to configure
  * @promisc_mask: mask of promiscuous config bits
  * @rm_vlan_promisc: Clear VLANs VSI promisc mode
+ * @lport: logical port number to configure promisc mode
+ * @sw: pointer to switch info struct for which function add rule
  *
  * Configure VSI with all associated VLANs to given promiscuous mode(s)
  */
-enum ice_status
-ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
-			 bool rm_vlan_promisc)
+static enum ice_status
+_ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
+			  bool rm_vlan_promisc, u8 lport,
+			  struct ice_switch_info *sw)
 {
-	struct ice_switch_info *sw = hw->switch_info;
 	struct ice_fltr_list_entry *list_itr, *tmp;
 	struct LIST_HEAD_TYPE vsi_list_head;
 	struct LIST_HEAD_TYPE *vlan_head;
@@ -4686,11 +4751,13 @@ ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
 			    list_entry) {
 		vlan_id = list_itr->fltr_info.l_data.vlan.vlan_id;
 		if (rm_vlan_promisc)
-			status = ice_clear_vsi_promisc(hw, vsi_handle,
-						       promisc_mask, vlan_id);
+			status =  _ice_clear_vsi_promisc(hw, vsi_handle,
+							 promisc_mask,
+							 vlan_id, sw);
 		else
-			status = ice_set_vsi_promisc(hw, vsi_handle,
-						     promisc_mask, vlan_id);
+			status =  _ice_set_vsi_promisc(hw, vsi_handle,
+						       promisc_mask, vlan_id,
+						       lport, sw);
 		if (status)
 			break;
 	}
@@ -4705,6 +4772,24 @@ ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
 }
 
 /**
+ * ice_set_vlan_vsi_promisc
+ * @hw: pointer to the hardware structure
+ * @vsi_handle: VSI handle to configure
+ * @promisc_mask: mask of promiscuous config bits
+ * @rm_vlan_promisc: Clear VLANs VSI promisc mode
+ *
+ * Configure VSI with all associated VLANs to given promiscuous mode(s)
+ */
+enum ice_status
+ice_set_vlan_vsi_promisc(struct ice_hw *hw, u16 vsi_handle, u8 promisc_mask,
+			 bool rm_vlan_promisc)
+{
+	return _ice_set_vlan_vsi_promisc(hw, vsi_handle, promisc_mask,
+					 rm_vlan_promisc, hw->port_info->lport,
+					 hw->switch_info);
+}
+
+/**
  * ice_remove_vsi_lkup_fltr - Remove lookup type filters for a VSI
  * @hw: pointer to the hardware structure
  * @vsi_handle: VSI handle to remove filters from
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v3 13/53] net/ice/base: refactor flow director filter swap
  2020-06-15  2:04 ` [dpdk-dev] [PATCH v3 00/53] " Qi Zhang
                     ` (11 preceding siblings ...)
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 12/53] net/ice/base: consolidate VF Promiscuous mode Qi Zhang
@ 2020-06-15  2:04   ` Qi Zhang
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 14/53] net/ice/base: change IPV6 training packet Qi Zhang
                     ` (40 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-15  2:04 UTC (permalink / raw)
  To: ferruh.yigit
  Cc: xiaolong.ye, qiming.yang, dev, Qi Zhang, Henry Tieman,
	Paul M . Stillwell Jr

Move the swap of flow director addresses and ports into training packet
generation. This reduces the code written for ACL.

Signed-off-by: Henry Tieman <henry.w.tieman@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_fdir.c   | 59 ++++++++++++++++++++-------------------
 drivers/net/ice/ice_fdir_filter.c | 32 ++++++++++-----------
 2 files changed, 47 insertions(+), 44 deletions(-)

diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index c92533223..2257eba60 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -764,16 +764,19 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		loc = &pkt[ICE_FDIR_TUN_PKT_OFF];
 	}
 
+	/* Reverse the src and dst, since the HW expects them to be from Tx
+	 * perspective. The input from user is from Rx filter perspective.
+	 */
 	switch (flow) {
 	case ICE_FLTR_PTYPE_NONF_IPV4_TCP:
 		ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET,
-				   input->ip.v4.dst_ip);
+				   input->ip.v4.src_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV4_TCP_DST_PORT_OFFSET,
-				   input->ip.v4.dst_port);
+				   input->ip.v4.src_port);
 		ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
-				   input->ip.v4.src_ip);
+				   input->ip.v4.dst_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV4_TCP_SRC_PORT_OFFSET,
-				   input->ip.v4.src_port);
+				   input->ip.v4.dst_port);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl);
 		ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac);
@@ -782,35 +785,35 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV4_UDP:
 		ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET,
-				   input->ip.v4.dst_ip);
+				   input->ip.v4.src_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV4_UDP_DST_PORT_OFFSET,
-				   input->ip.v4.dst_port);
+				   input->ip.v4.src_port);
 		ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
-				   input->ip.v4.src_ip);
+				   input->ip.v4.dst_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV4_UDP_SRC_PORT_OFFSET,
-				   input->ip.v4.src_port);
+				   input->ip.v4.dst_port);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl);
 		ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV4_SCTP:
 		ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET,
-				   input->ip.v4.dst_ip);
+				   input->ip.v4.src_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_DST_PORT_OFFSET,
-				   input->ip.v4.dst_port);
+				   input->ip.v4.src_port);
 		ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
-				   input->ip.v4.src_ip);
+				   input->ip.v4.dst_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_SRC_PORT_OFFSET,
-				   input->ip.v4.src_port);
+				   input->ip.v4.dst_port);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl);
 		ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV4_OTHER:
 		ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET,
-				   input->ip.v4.dst_ip);
-		ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
 				   input->ip.v4.src_ip);
+		ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
+				   input->ip.v4.dst_ip);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos);
 		ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl);
 		ice_pkt_insert_u8(loc, ICE_IPV4_PROTO_OFFSET,
@@ -836,48 +839,48 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_TCP:
 		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
-					 input->ip.v6.dst_ip);
-		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
 					 input->ip.v6.src_ip);
+		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
+					 input->ip.v6.dst_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV6_TCP_DST_PORT_OFFSET,
-				   input->ip.v6.dst_port);
-		ice_pkt_insert_u16(loc, ICE_IPV6_TCP_SRC_PORT_OFFSET,
 				   input->ip.v6.src_port);
+		ice_pkt_insert_u16(loc, ICE_IPV6_TCP_SRC_PORT_OFFSET,
+				   input->ip.v6.dst_port);
 		ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc);
 		ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim);
 		ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_UDP:
 		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
-					 input->ip.v6.dst_ip);
-		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
 					 input->ip.v6.src_ip);
+		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
+					 input->ip.v6.dst_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV6_UDP_DST_PORT_OFFSET,
-				   input->ip.v6.dst_port);
-		ice_pkt_insert_u16(loc, ICE_IPV6_UDP_SRC_PORT_OFFSET,
 				   input->ip.v6.src_port);
+		ice_pkt_insert_u16(loc, ICE_IPV6_UDP_SRC_PORT_OFFSET,
+				   input->ip.v6.dst_port);
 		ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc);
 		ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim);
 		ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_SCTP:
 		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
-					 input->ip.v6.dst_ip);
-		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
 					 input->ip.v6.src_ip);
+		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
+					 input->ip.v6.dst_ip);
 		ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_DST_PORT_OFFSET,
-				   input->ip.v6.dst_port);
-		ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_SRC_PORT_OFFSET,
 				   input->ip.v6.src_port);
+		ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_SRC_PORT_OFFSET,
+				   input->ip.v6.dst_port);
 		ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc);
 		ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim);
 		ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_OTHER:
 		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
-					 input->ip.v6.dst_ip);
-		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
 					 input->ip.v6.src_ip);
+		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
+					 input->ip.v6.dst_ip);
 		ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc);
 		ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim);
 		ice_pkt_insert_u8(loc, ICE_IPV6_PROTO_OFFSET,
diff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c
index 69c714c59..19fa41afc 100644
--- a/drivers/net/ice/ice_fdir_filter.c
+++ b/drivers/net/ice/ice_fdir_filter.c
@@ -1676,9 +1676,9 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
 					input_set |= ICE_INSET_IPV4_PROTO;
 
 				filter->input.ip.v4.dst_ip =
-					ipv4_spec->hdr.src_addr;
-				filter->input.ip.v4.src_ip =
 					ipv4_spec->hdr.dst_addr;
+				filter->input.ip.v4.src_ip =
+					ipv4_spec->hdr.src_addr;
 				filter->input.ip.v4.tos =
 					ipv4_spec->hdr.type_of_service;
 				filter->input.ip.v4.ttl =
@@ -1723,9 +1723,9 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
 					input_set |= ICE_INSET_IPV6_HOP_LIMIT;
 
 				rte_memcpy(filter->input.ip.v6.dst_ip,
-					   ipv6_spec->hdr.src_addr, 16);
-				rte_memcpy(filter->input.ip.v6.src_ip,
 					   ipv6_spec->hdr.dst_addr, 16);
+				rte_memcpy(filter->input.ip.v6.src_ip,
+					   ipv6_spec->hdr.src_addr, 16);
 
 				vtc_flow_cpu =
 				      rte_be_to_cpu_32(ipv6_spec->hdr.vtc_flow);
@@ -1777,14 +1777,14 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
 				/* Get filter info */
 				if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
 					filter->input.ip.v4.dst_port =
-						tcp_spec->hdr.src_port;
-					filter->input.ip.v4.src_port =
 						tcp_spec->hdr.dst_port;
+					filter->input.ip.v4.src_port =
+						tcp_spec->hdr.src_port;
 				} else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
 					filter->input.ip.v6.dst_port =
-						tcp_spec->hdr.src_port;
-					filter->input.ip.v6.src_port =
 						tcp_spec->hdr.dst_port;
+					filter->input.ip.v6.src_port =
+						tcp_spec->hdr.src_port;
 				}
 			}
 			break;
@@ -1820,14 +1820,14 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
 				/* Get filter info */
 				if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
 					filter->input.ip.v4.dst_port =
-						udp_spec->hdr.src_port;
-					filter->input.ip.v4.src_port =
 						udp_spec->hdr.dst_port;
+					filter->input.ip.v4.src_port =
+						udp_spec->hdr.src_port;
 				} else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
 					filter->input.ip.v6.src_port =
-						udp_spec->hdr.dst_port;
-					filter->input.ip.v6.dst_port =
 						udp_spec->hdr.src_port;
+					filter->input.ip.v6.dst_port =
+						udp_spec->hdr.dst_port;
 				}
 			}
 			break;
@@ -1862,14 +1862,14 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
 				/* Get filter info */
 				if (l3 == RTE_FLOW_ITEM_TYPE_IPV4) {
 					filter->input.ip.v4.dst_port =
-						sctp_spec->hdr.src_port;
-					filter->input.ip.v4.src_port =
 						sctp_spec->hdr.dst_port;
+					filter->input.ip.v4.src_port =
+						sctp_spec->hdr.src_port;
 				} else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6) {
 					filter->input.ip.v6.dst_port =
-						sctp_spec->hdr.src_port;
-					filter->input.ip.v6.src_port =
 						sctp_spec->hdr.dst_port;
+					filter->input.ip.v6.src_port =
+						sctp_spec->hdr.src_port;
 				}
 			}
 			break;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v3 14/53] net/ice/base: change IPV6 training packet
  2020-06-15  2:04 ` [dpdk-dev] [PATCH v3 00/53] " Qi Zhang
                     ` (12 preceding siblings ...)
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 13/53] net/ice/base: refactor flow director filter swap Qi Zhang
@ 2020-06-15  2:04   ` Qi Zhang
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 15/53] net/ice/base: group function prototypes together Qi Zhang
                     ` (39 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-15  2:04 UTC (permalink / raw)
  To: ferruh.yigit
  Cc: xiaolong.ye, qiming.yang, dev, Qi Zhang, Dan Nowlin,
	Paul M . Stillwell Jr

Add additional UDP payload to allow for additional headers such as ESP.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index f5dd86bf4..600e1126c 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -446,7 +446,7 @@ static const u8 dummy_udp_ipv6_packet[] = {
 	0x86, 0xDD,		/* ICE_ETYPE_OL 12 */
 
 	0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 40 */
-	0x00, 0x08, 0x11, 0x00, /* Next header UDP*/
+	0x00, 0x10, 0x11, 0x00, /* Next header UDP */
 	0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00,
@@ -457,7 +457,10 @@ static const u8 dummy_udp_ipv6_packet[] = {
 	0x00, 0x00, 0x00, 0x00,
 
 	0x00, 0x00, 0x00, 0x00, /* ICE_UDP_ILOS 54 */
-	0x00, 0x08, 0x00, 0x00,
+	0x00, 0x10, 0x00, 0x00,
+
+	0x00, 0x00, 0x00, 0x00, /* needed for ESP packets */
+	0x00, 0x00, 0x00, 0x00,
 
 	0x00, 0x00, /* 2 bytes for 4 byte alignment */
 };
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v3 15/53] net/ice/base: group function prototypes together
  2020-06-15  2:04 ` [dpdk-dev] [PATCH v3 00/53] " Qi Zhang
                     ` (13 preceding siblings ...)
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 14/53] net/ice/base: change IPV6 training packet Qi Zhang
@ 2020-06-15  2:04   ` Qi Zhang
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 16/53] net/ice/base: cleanup comment formatting Qi Zhang
                     ` (38 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-15  2:04 UTC (permalink / raw)
  To: ferruh.yigit
  Cc: xiaolong.ye, qiming.yang, dev, Qi Zhang, Tony Nguyen,
	Paul M . Stillwell Jr

There are some function prototypes at the beginning of the file and
some at the end, group them all together so that they are in one
consistent location.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_fdir.h | 83 ++++++++++++++++++++---------------------
 1 file changed, 41 insertions(+), 42 deletions(-)

diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h
index 97553c8e7..b39ce0bbf 100644
--- a/drivers/net/ice/base/ice_fdir.h
+++ b/drivers/net/ice/base/ice_fdir.h
@@ -7,47 +7,6 @@
 
 #include "ice_common.h"
 
-/* Flow Director (FD) Filter Programming descriptor */
-struct ice_fd_fltr_desc_ctx {
-	u32 fdid;
-	u16 qindex;
-	u16 cnt_index;
-	u16 fd_vsi;
-	u16 flex_val;
-	u8 comp_q;
-	u8 comp_report;
-	u8 fd_space;
-	u8 cnt_ena;
-	u8 evict_ena;
-	u8 toq;
-	u8 toq_prio;
-	u8 dpu_recipe;
-	u8 drop;
-	u8 flex_prio;
-	u8 flex_mdid;
-	u8 dtype;
-	u8 pcmd;
-	u8 desc_prof_prio;
-	u8 desc_prof;
-	u8 swap;
-	u8 fdid_prio;
-	u8 fdid_mdid;
-};
-
-enum ice_status ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id);
-enum ice_status ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id);
-void ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx);
-enum ice_status
-ice_alloc_fd_guar_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
-enum ice_status
-ice_free_fd_guar_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
-enum ice_status
-ice_alloc_fd_shrd_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
-enum ice_status
-ice_free_fd_shrd_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
-enum ice_status ice_clear_vsi_fd_table(struct ice_hw *hw, u16 vsi_num);
-enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw);
-
 #define ICE_FDIR_IP_PROTOCOLS
 #define ICE_IP_PROTO_TCP		6
 #define ICE_IP_PROTO_UDP		17
@@ -111,6 +70,33 @@ enum ice_fltr_prgm_desc_fd_status {
 	ICE_FLTR_PRGM_DESC_FD_STATUS_8FLEX_BYTES,
 };
 
+/* Flow Director (FD) Filter Programming descriptor */
+struct ice_fd_fltr_desc_ctx {
+	u32 fdid;
+	u16 qindex;
+	u16 cnt_index;
+	u16 fd_vsi;
+	u16 flex_val;
+	u8 comp_q;
+	u8 comp_report;
+	u8 fd_space;
+	u8 cnt_ena;
+	u8 evict_ena;
+	u8 toq;
+	u8 toq_prio;
+	u8 dpu_recipe;
+	u8 drop;
+	u8 flex_prio;
+	u8 flex_mdid;
+	u8 dtype;
+	u8 pcmd;
+	u8 desc_prof_prio;
+	u8 desc_prof;
+	u8 swap;
+	u8 fdid_prio;
+	u8 fdid_mdid;
+};
+
 #define ICE_FLTR_PRGM_FLEX_WORD_SIZE	sizeof(__be16)
 
 struct ice_rx_flow_userdef {
@@ -207,7 +193,7 @@ struct ice_fdir_fltr {
 	bool acl_fltr;
 };
 
-/* Dummy packet filter definition structure. */
+/* Dummy packet filter definition structure */
 struct ice_fdir_base_pkt {
 	enum ice_fltr_ptype flow;
 	u16 pkt_len;
@@ -216,6 +202,19 @@ struct ice_fdir_base_pkt {
 	const u8 *tun_pkt;
 };
 
+enum ice_status ice_alloc_fd_res_cntr(struct ice_hw *hw, u16 *cntr_id);
+enum ice_status ice_free_fd_res_cntr(struct ice_hw *hw, u16 cntr_id);
+void ice_set_dflt_val_fd_desc(struct ice_fd_fltr_desc_ctx *fd_fltr_ctx);
+enum ice_status
+ice_alloc_fd_guar_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
+enum ice_status
+ice_free_fd_guar_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
+enum ice_status
+ice_alloc_fd_shrd_item(struct ice_hw *hw, u16 *cntr_id, u16 num_fltr);
+enum ice_status
+ice_free_fd_shrd_item(struct ice_hw *hw, u16 cntr_id, u16 num_fltr);
+enum ice_status ice_clear_vsi_fd_table(struct ice_hw *hw, u16 vsi_num);
+enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw);
 void
 ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		       struct ice_fltr_desc *fdesc, bool add);
-- 
2.13.6


^ permalink raw reply	[flat|nested] 187+ messages in thread

* [dpdk-dev] [PATCH v3 16/53] net/ice/base: cleanup comment formatting
  2020-06-15  2:04 ` [dpdk-dev] [PATCH v3 00/53] " Qi Zhang
                     ` (14 preceding siblings ...)
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 15/53] net/ice/base: group function prototypes together Qi Zhang
@ 2020-06-15  2:04   ` Qi Zhang
  2020-06-15  2:04   ` [dpdk-dev] [PATCH v3 17/53] net/ice/base: add FDIR support for L2TPV3 ESP AH and PFCP Qi Zhang
                     ` (37 subsequent siblings)
  53 siblings, 0 replies; 187+ messages in thread
From: Qi Zhang @ 2020-06-15  2:04 UTC (permalink / raw)
  To: ferruh.yigit
  Cc: xiaolong.ye, qiming.yang, dev, Qi Zhang, Bruce Allan,
	Paul M . Stillwell Jr

Add missing space between end of comment text and comment terminator,
and remove unnecessary punctuation.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M. Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_acl.c        | 25 +++++++++---------
 drivers/net/ice/base/ice_acl_ctrl.c   | 23 ++++++++--------
 drivers/net/ice/base/ice_adminq_cmd.h | 50 +++++++++++++++++++----------------
 drivers/net/ice/base/ice_bitops.h     | 10 +++----
 drivers/net/ice/base/ice_common.c     |  4 +--
 drivers/net/ice/base/ice_fdir.c       |  3 +--
 drivers/net/ice/base/ice_flex_pipe.c  | 12 ++++-----
 drivers/net/ice/base/ice_flow.c       | 34 ++++++++++++------------
 drivers/net/ice/base/ice_flow.h       |  4 +--
 drivers/net/ice/base/ice_sched.c      | 17 ++++++------
 drivers/net/ice/base/ice_switch.c     |  8 +++---
 drivers/net/ice/base/ice_switch.h     |  3 +--
 drivers/net/ice/base/ice_type.h       |  4 +--
 13 files changed, 97 insertions(+), 100 deletions(-)

diff --git a/drivers/net/ice/base/ice_acl.c b/drivers/net/ice/base/ice_acl.c
index 31244cb4b..fd12507d7 100644
--- a/drivers/net/ice/base/ice_acl.c
+++ b/drivers/net/ice/base/ice_acl.c
@@ -123,7 +123,7 @@ ice_aq_program_acl_entry(struct ice_hw *hw, u8 tcam_idx, u16 entry_idx,
  * @buf: address of indirect data buffer
  * @cd: pointer to command details structure or NULL
  *
- *  Query ACL entry (direct 0x0C24)
+ * Query ACL entry (direct 0x0C24)
  *
  * NOTE: Caller of this API to parse 'buf' appropriately since it contains
  * response (key and key invert)
@@ -250,7 +250,7 @@ ice_aq_query_actpair(struct ice_hw *hw, u8 act_mem_idx, u16 act_entry_idx,
  * @hw: pointer to the HW struct
  * @cd: pointer to command details structure or NULL
  *
- * ACL - de-allocate (direct 0x0C1A) resources. Used by SW to release all the
+ * De-allocate ACL resources (direct 0x0C1A). Used by SW to release all the
  * resources allocated for it using a single command
  */
 enum ice_status ice_aq_dealloc_acl_res(struct ice_hw *hw, struct ice_sq_cd *cd)
@@ -263,7 +263,7 @@ enum ice_status ice_aq_dealloc_acl_res(struct ice_hw *hw, struct ice_sq_cd *cd)
 }
 
 /**
- * ice_acl_prof_aq_send - sending acl profile aq commands
+ * ice_acl_prof_aq_send - sending ACL profile AQ commands
  * @hw: pointer to the HW struct
  * @opc: command opcode
  * @prof_id: profile ID
@@ -294,7 +294,7 @@ ice_acl_prof_aq_send(struct ice_hw *hw, u16 opc, u8 prof_id,
  * @buf: ptr to buffer
  * @cd: pointer to command details structure or NULL
  *
- * ACL - program ACL profile extraction (indirect 0x0C1D)
+ * Program ACL profile extraction (indirect 0x0C1D)
  */
 enum ice_status
 ice_prgm_acl_prof_extrt(struct ice_hw *hw, u8 prof_id,
@@ -312,7 +312,7 @@ ice_prgm_acl_prof_extrt(struct ice_hw *hw, u8 prof_id,
  * @buf: ptr to buffer (which will contain response of this command)
  * @cd: pointer to command details structure or NULL
  *
- * ACL - query ACL profile (indirect 0x0C21)
+ * Query ACL profile (indirect 0x0C21)
  */
 enum ice_status
 ice_query_acl_prof(struct ice_hw *hw, u8 prof_id,
@@ -354,7 +354,7 @@ static enum ice_status ice_aq_acl_cntrs_chk_params(struct ice_acl_cntrs *cntrs)
 			status = ICE_ERR_OUT_OF_RANGE;
 		break;
 	default:
-		/* Unspecified counter type - Invalid or error*/
+		/* Unspecified counter type - Invalid or error */
 		status = ICE_ERR_PARAM;
 	}
 
@@ -367,7 +367,7 @@ static enum ice_status ice_aq_acl_cntrs_chk_params(struct ice_acl_cntrs *cntrs)
  * @cntrs: ptr to buffer describing input and output params
  * @cd: pointer to command details structure or NULL
  *
- * ACL - allocate (indirect 0x0C16) counters. This function attempts to
+ * Allocate ACL counters (indirect 0x0C16). This function attempts to
  * allocate a contiguous block of counters. In case of failures, caller can
  * attempt to allocate a smaller chunk. The allocation is considered
  * unsuccessful if returned counter value is invalid. In this case it returns
@@ -410,8 +410,7 @@ ice_aq_alloc_acl_cntrs(struct ice_hw *hw, struct ice_acl_cntrs *cntrs,
  * @cntrs: ptr to buffer describing input and output params
  * @cd: pointer to command details structure or NULL
  *
- * ACL - de-allocate (direct 0x0C17) counters.
- * This function deallocate ACL counters.
+ * De-allocate ACL counters (direct 0x0C17)
  */
 enum ice_status
 ice_aq_dealloc_acl_cntrs(struct ice_hw *hw, struct ice_acl_cntrs *cntrs,
@@ -443,7 +442,7 @@ ice_aq_dealloc_acl_cntrs(struct ice_hw *hw, struct ice_acl_cntrs *cntrs,
  * @cntr_val: pointer to counter or packet counter value
  * @cd: pointer to command details structure or NULL
  *
- * ACL - query ACL counter (direct 0x0C27)
+ * Query ACL counter (direct 0x0C27)
  */
 enum ice_status
 ice_aq_query_acl_cntrs(struct ice_hw *hw, u8 bank, u16 index, u64 *cntr_val,
@@ -478,7 +477,7 @@ ice_aq_query_acl_cntrs(struct ice_hw *hw, u8 bank, u16 index, u64 *cntr_val,
  * @buf: pointer to input buffer
  * @cd: pointer to command details structure or NULL
  *
- * ACL - program ACL profile ranges (indirect 0x0C1E)
+ * Program ACL profile ranges (indirect 0x0C1E)
  */
 enum ice_status
 ice_prog_acl_prof_ranges(struct ice_hw *hw, u8 prof_id,
@@ -501,7 +500,7 @@ ice_prog_acl_prof_ranges(struct ice_hw *hw, u8 prof_id,
  * @buf: pointer to response buffer
  * @cd: pointer to command details structure or NULL
  *
- * ACL - query ACL profile ranges (indirect 0x0C22)
+ * Query ACL profile ranges (indirect 0x0C22)
  */
 enum ice_status
 ice_query_acl_prof_ranges(struct ice_hw *hw, u8 prof_id,
@@ -571,7 +570,7 @@ ice_aq_dealloc_acl_scen(struct ice_hw *hw, u16 scen_id, struct ice_sq_cd *cd)
 /**
  * ice_aq_update_query_scen - update or query ACL scenario
  * @hw: pointer to the HW struct
- * @opcode: aq command opcode for either query or update scenario
+ * @opcode: AQ command opcode for either query or update scenario
  * @scen_id: scen_id to be updated or queried
  * @buf: address of indirect data buffer
  * @cd: pointer to command details structure or NULL
diff --git a/drivers/net/ice/base/ice_acl_ctrl.c b/drivers/net/ice/base/ice_acl_ctrl.c
index 39b399dd4..5310b9d9f 100644
--- a/drivers/net/ice/base/ice_acl_ctrl.c
+++ b/drivers/net/ice/base/ice_acl_ctrl.c
@@ -12,6 +12,7 @@
 #define ICE_ACL_TBL_TCAM_ENTRY_IDX(e) ((e) % ICE_AQC_ACL_TCAM_DEPTH)
 
 #define ICE_ACL_SCEN_ENTRY_INVAL 0xFFFF
+
 /**
  * ice_acl_init_entry
  * @scen: pointer to the scenario struct
@@ -20,8 +21,7 @@
  */
 static void ice_acl_init_entry(struct ice_acl_scen *scen)
 {
-	/**
-	 * low priority: start from the highest index, 25% of total entries
+	/* low priority: start from the highest index, 25% of total entries
 	 * normal priority: start from the highest index, 50% of total entries
 	 * high priority: start from the lowest index, 25% of total entries
 	 */
@@ -44,8 +44,9 @@ static void ice_acl_init_entry(struct ice_acl_scen *scen)
  * Returns ICE_ACL_SCEN_ENTRY_INVAL if fails
  * Returns index on success
  */
-static u16 ice_acl_scen_assign_entry_idx(struct ice_acl_scen *scen,
-					 enum ice_acl_entry_prior prior)
+static u16
+ice_acl_scen_assign_entry_idx(struct ice_acl_scen *scen,
+			      enum ice_acl_entry_prior prior)
 {
 	u16 first_idx, last_idx, i;
 	s8 step;
@@ -198,7 +199,7 @@ static enum ice_status ice_acl_init_tbl(struct ice_hw *hw)
 
 /**
  * ice_acl_assign_act_mems_to_tcam
- * @tbl: pointer to acl table structure
+ * @tbl: pointer to ACL table structure
  * @cur_tcam: Index of current TCAM. Value = 0 to (ICE_AQC_ACL_SLICES - 1)
  * @cur_mem_idx: Index of current action memory bank. Value = 0 to
  *		 (ICE_AQC_MAX_ACTION_MEMORIES - 1)
@@ -229,7 +230,7 @@ ice_acl_assign_act_mems_to_tcam(struct ice_acl_tbl *tbl, u8 cur_tcam,
 
 /**
  * ice_acl_divide_act_mems_to_tcams
- * @tbl: pointer to acl table structure
+ * @tbl: pointer to ACL table structure
  *
  * Figure out how to divide given action memory banks to given TCAMs. This
  * division is for SW book keeping. In the time when scenario is created,
@@ -351,7 +352,7 @@ ice_acl_create_tbl(struct ice_hw *hw, struct ice_acl_tbl_params *params)
 				CPU_TO_LE16(params->dep_tbls[i]);
 	}
 
-	/* call the aq command to create the ACL table with these values */
+	/* call the AQ command to create the ACL table with these values */
 	status = ice_aq_alloc_acl_tbl(hw, &tbl_alloc, NULL);
 
 	if (status) {
@@ -660,7 +661,7 @@ ice_acl_set_scen_chnk_msk(struct ice_aqc_acl_scen *scen_buf,
 
 /**
  * ice_acl_assign_act_mem_for_scen
- * @tbl: pointer to acl table structure
+ * @tbl: pointer to ACL table structure
  * @scen: pointer to the scenario struct
  * @scen_buf: pointer to the available space for the scenario
  * @current_tcam_idx: theoretical index of the TCAM that we associated those
@@ -897,7 +898,7 @@ enum ice_status ice_acl_destroy_tbl(struct ice_hw *hw)
 		}
 	}
 
-	/* call the aq command to destroy the ACL table */
+	/* call the AQ command to destroy the ACL table */
 	status = ice_aq_dealloc_acl_tbl(hw, hw->acl_tbl->id, &resp_buf, NULL);
 
 	if (status) {
@@ -1107,7 +1108,7 @@ ice_acl_rem_entry(struct ice_hw *hw, struct ice_acl_scen *scen, u16 entry_idx)
 						  NULL);
 		if (status)
 			ice_debug(hw, ICE_DBG_ACL,
-				  "aq program acl entry failed status: %d\n",
+				  "AQ program ACL entry failed status: %d\n",
 				  status);
 	}
 
@@ -1164,7 +1165,7 @@ enum ice_status ice_acl_destroy_scen(struct ice_hw *hw, u16 scen_id)
 			}
 		}
 
-	/* Call the aq command to destroy the targeted scenario */
+	/* Call the AQ command to destroy the targeted scenario */
 	status = ice_aq_dealloc_acl_scen(hw, scen_id, NULL);
 
 	if (status) {
diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index a5d689dc8..dec4c38cf 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -533,7 +533,7 @@ struct ice_aqc_vsi_props {
 	u8 q_opt_reserved[3];
 	/* outer up section */
 	__le32 outer_up_table; /* same structure and defines as ingress tbl */
-	/* acl section */
+	/* ACL section */
 	__le16 acl_def_act;
 #define ICE_AQ_VSI_ACL_DEF_RX_PROF_S	0
 #define ICE_AQ_VSI_ACL_DEF_RX_PROF_M	(0xF << ICE_AQ_VSI_ACL_DEF_RX_PROF_S)
@@ -675,7 +675,7 @@ struct ice_aqc_storm_cfg {
 
 #define ICE_MAX_NUM_RECIPES 64
 
-/* Add/Get Recipe (indirect 0x0290/0x0292)*/
+/* Add/Get Recipe (indirect 0x0290/0x0292) */
 struct ice_aqc_add_get_recipe {
 	__le16 num_sub_recipes;	/* Input in Add cmd, Output in Get cmd */
 	__le16 return_index;	/* Input, used for Get cmd only */
@@ -2020,7 +2020,7 @@ struct ice_aqc_clear_fd_table {
 	u8 reserved[12];
 };
 
-/* ACL - allocate (indirect 0x0C10) table */
+/* Allocate ACL table (indirect 0x0C10) */
 #define ICE_AQC_ACL_KEY_WIDTH		40
 #define ICE_AQC_ACL_KEY_WIDTH_BYTES	5
 #define ICE_AQC_ACL_TCAM_DEPTH		512
@@ -2065,9 +2065,9 @@ struct ice_aqc_acl_alloc_table_data {
 	__le16 alloc_ids[ICE_AQC_MAX_CONCURRENT_ACL_TBL];
 };
 
-/* ACL - deallocate (indirect 0x0C11) table
- * ACL - allocate (indirect 0x0C12) action-pair
- * ACL - deallocate (indirect 0x0C13) action-pair
+/* Deallocate ACL table (indirect 0x0C11)
+ * Allocate ACL action-pair (indirect 0x0C12)
+ * Deallocate ACL action-pair (indirect 0x0C13)
  */
 
 /* Following structure is common and used in case of deallocation
@@ -2126,7 +2126,7 @@ struct ice_aqc_acl_generic {
 	u8 act_mem[ICE_AQC_MAX_ACTION_MEMORIES];
 };
 
-/* ACL - allocate (indirect 0x0C14) scenario. This command doesn't have separate
+/* Allocate ACL scenario (indirect 0x0C14). This command doesn't have separate
  * response buffer since original command buffer gets updated with
  * 'scen_id' in case of success
  */
@@ -2144,7 +2144,7 @@ struct ice_aqc_acl_alloc_scen {
 	__le32 addr_low;
 };
 
-/* ACL - de-allocate (direct 0x0C15) scenario. This command doesn't need
+/* De-allocate ACL scenario (direct 0x0C15). This command doesn't need
  * separate response buffer since nothing to be returned as a response
  * except status.
  */
@@ -2153,8 +2153,9 @@ struct ice_aqc_acl_dealloc_scen {
 	u8 reserved[14];
 };
 
-/* ACL - update (direct 0x0C1B) scenario */
-/* ACL - query (direct 0x0C23) scenario */
+/* Update ACL scenario (direct 0x0C1B)
+ * Query ACL scenario (direct 0x0C23)
+ */
 struct ice_aqc_acl_update_query_scen {
 	__le16 scen_id;
 	u8 reserved[6];
@@ -2202,7 +2203,7 @@ struct ice_aqc_acl_scen {
 	u8 act_mem_cfg[ICE_AQC_MAX_ACTION_MEMORIES];
 };
 
-/* ACL - allocate (indirect 0x0C16) counters */
+/* Allocate ACL counters (indirect 0x0C16) */
 struct ice_aqc_acl_alloc_counters {
 	/* Amount of contiguous counters requested. Min value is 1 and
 	 * max value is 255
@@ -2253,7 +2254,7 @@ struct ice_aqc_acl_alloc_counters {
 	} ops;
 };
 
-/* ACL - de-allocate (direct 0x0C17) counters */
+/* De-allocate ACL counters (direct 0x0C17) */
 struct ice_aqc_acl_dealloc_counters {
 	/* first counter being released */
 	__le16 first_counter;
@@ -2266,15 +2267,16 @@ struct ice_aqc_acl_dealloc_counters {
 	u8 reserved[10];
 };
 
-/* ACL - de-allocate (direct 0x0C1A) resources. Used by SW to release all the
+/* De-allocate ACL resources (direct 0x0C1A). Used by SW to release all the
  * resources allocated for it using a single command
  */
 struct ice_aqc_acl_dealloc_res {
 	u8 reserved[16];
 };
 
-/* ACL - program actionpair (indirect 0x0C1C) */
-/* ACL - query actionpair (indirect 0x0C25) */
+/* Program ACL actionpair (indirect 0x0C1C)
+ * Query ACL actionpair (indirect 0x0C25)
+ */
 struct ice_aqc_acl_actpair {
 	/* action mem index to program/update */
 	u8 act_mem_index;
@@ -2349,10 +2351,11 @@ struct ice_aqc_acl_prof_generic_frmt {
 	u8 pf_scenario_num[ICE_AQC_ACL_PROF_PF_SCEN_NUM_ELEMS];
 };
 
-/* ACL - program ACL profile extraction (indirect 0x0C1D) */
-/* ACL - program ACL profile ranges (indirect 0x0C1E) */
-/* ACL - query ACL profile (indirect 0x0C21) */
-/* ACL - query ACL profile ranges (indirect 0x0C22) */
+/* Program ACL profile extraction (indirect 0x0C1D)
+ * Program ACL profile ranges (indirect 0x0C1E)
+ * Query ACL profile (indirect 0x0C21)
+ * Query ACL profile ranges (indirect 0x0C22)
+ */
 struct ice_aqc_acl_profile {
 	u8 profile_id; /* Programmed/Updated profile ID */
 	u8 reserved[7];
@@ -2389,8 +2392,9 @@ struct ice_aqc_acl_profile_ranges {
 	struct ice_acl_rng_data checker_cfg[ICE_AQC_ACL_PROF_RANGES_NUM_CFG];
 };
 
-/* ACL - program ACL entry (indirect 0x0C20) */
-/* ACL - query ACL entry (indirect 0x0C24) */
+/* Program ACL entry (indirect 0x0C20)
+ * Query ACL entry (indirect 0x0C24)
+ */
 struct ice_aqc_acl_entry {
 	u8 tcam_index; /* Updated TCAM block index */
 	u8 reserved;
@@ -2414,7 +2418,7 @@ struct ice_aqc_acl_data {
 	} entry_key, entry_key_invert;
 };
 
-/* ACL - query ACL counter (direct 0x0C27) */
+/* Query ACL counter (direct 0x0C27) */
 struct ice_aqc_acl_query_counter {
 	/* Queried counter index */
 	__le16 counter_index;
@@ -2556,7 +2560,7 @@ struct ice_aqc_move_txqs_data {
 };
 
 /* Download Package (indirect 0x0C40) */
-/* Also used for Update Package (indirect 0x0C42) */
+/* Also used for Update Package (indirect 0x0C42 and 0x0C41) */
 struct ice_aqc_download_pkg {
 	u8 flags;
 #define ICE_AQC_DOWNLOAD_PKG_LAST_BUF	0x01
diff --git a/drivers/net/ice/base/ice_bitops.h b/drivers/net/ice/base/ice_bitops.h
index 87f47b238..3022116a4 100644
--- a/drivers/net/ice/base/ice_bitops.h
+++ b/drivers/net/ice/base/ice_bitops.h
@@ -214,7 +214,7 @@ ice_or_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
 	ice_bitmap_t mask;
 	u16 i;
 
-	/* Handle all but last chunk*/
+	/* Handle all but last chunk */
 	for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
 		dst[i] = bmp1[i] | bmp2[i];
 
@@ -245,7 +245,7 @@ ice_xor_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
 	ice_bitmap_t mask;
 	u16 i;
 
-	/* Handle all but last chunk*/
+	/* Handle all but last chunk */
 	for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
 		dst[i] = bmp1[i] ^ bmp2[i];
 
@@ -276,7 +276,7 @@ ice_andnot_bitmap(ice_bitmap_t *dst, const ice_bitmap_t *bmp1,
 	ice_bitmap_t mask;
 	u16 i;
 
-	/* Handle all but last chunk*/
+	/* Handle all but last chunk */
 	for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
 		dst[i] = bmp1[i] & ~bmp2[i];
 
@@ -389,12 +389,12 @@ ice_cmp_bitmap(ice_bitmap_t *bmp1, ice_bitmap_t *bmp2, u16 size)
 	ice_bitmap_t mask;
 	u16 i;
 
-	/* Handle all but last chunk*/
+	/* Handle all but last chunk */
 	for (i = 0; i < BITS_TO_CHUNKS(size) - 1; i++)
 		if (bmp1[i] != bmp2[i])
 			return false;
 
-	/* We want to only compare bits within the size.*/
+	/* We want to only compare bits within the size */
 	mask = LAST_CHUNK_MASK(size);
 	if ((bmp1[i] & mask) != (bmp2[i] & mask))
 		return false;
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index e266ba56c..908ef9085 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -747,7 +747,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
 	/* Initialize max burst size */
 	if (!hw->max_burst_size)
 		ice_cfg_rl_burst_size(hw, ICE_SCHED_DFLT_BURST_SIZE);
-
 	status = ice_init_fltr_mgmt_struct(hw);
 	if (status)
 		goto err_unroll_sched;
@@ -1901,6 +1900,7 @@ ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
 			}
 			if (func_p) {
 				u32 reg_val, val;
+
 				if (hw->dcf_enabled)
 					break;
 				reg_val = rd32(hw, GLQF_FD_SIZE);
@@ -2611,7 +2611,7 @@ ice_set_fc(struct ice_port_info *pi, u8 *aq_failures, bool ena_auto_link_update)
 
 	ice_copy_phy_caps_to_cfg(pi, pcaps, &cfg);
 
-	/* Configure the set phy data */
+	/* Configure the set PHY data */
 	status = ice_cfg_phy_fc(pi, &cfg, pi->fc.req_mode);
 	if (status) {
 		if (status != ICE_ERR_BAD_PTR)
diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index 2257eba60..0155597bc 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -495,7 +495,7 @@ ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input,
 		fdir_fltr_ctx.toq_prio = 0;
 	else
 		fdir_fltr_ctx.toq_prio = 3;
-	fdir_fltr_ctx.pcmd = (add) ? ICE_FXD_FLTR_QW1_PCMD_ADD :
+	fdir_fltr_ctx.pcmd = add ? ICE_FXD_FLTR_QW1_PCMD_ADD :
 		ICE_FXD_FLTR_QW1_PCMD_REMOVE;
 	fdir_fltr_ctx.swap = ICE_FXD_FLTR_QW1_SWAP_NOT_SET;
 	fdir_fltr_ctx.comp_q = ICE_FXD_FLTR_QW0_COMP_Q_ZERO;
@@ -684,7 +684,6 @@ static void ice_pkt_insert_u32(u8 *pkt, int offset, __be32 data)
 /**
  * ice_pkt_insert_mac_addr - insert a MAC addr into a memory buffer.
  * @pkt: packet buffer
- * @offset: offset into buffer
  * @addr: MAC address to convert and insert into pkt at offset
  */
 static void ice_pkt_insert_mac_addr(u8 *pkt, u8 *addr)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 1f7a05969..9703b239b 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -648,7 +648,7 @@ static bool ice_bits_max_set(const u8 *mask, u16 size, u16 max)
  * This function generates a key from a value, a don't care mask and a never
  * match mask.
  * upd, dc, and nm are optional parameters, and can be NULL:
- *	upd == NULL --> udp mask is all 1's (update all bits)
+ *	upd == NULL --> upd mask is all 1's (update all bits)
  *	dc == NULL --> dc mask is all 0's (no don't care bits)
  *	nm == NULL --> nm mask is all 0's (no never match bits)
  */
@@ -2738,7 +2738,7 @@ ice_vsig_add_mv_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig)
  * @blk: HW block
  * @prof: profile to check
  * @idx: profile index to check
- * @masks: masks to match
+ * @mask: mask to match
  */
 static bool
 ice_prof_has_mask_idx(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 idx,
@@ -3264,7 +3264,6 @@ static void ice_shutdown_prof_masks(struct ice_hw *hw, enum ice_block blk)
 /**
  * ice_shutdown_all_prof_masks - releases all locks for masking
  * @hw: pointer to the HW struct
- * @blk: hardware block
  *
  * This should be called before unloading the driver
  */
@@ -3279,12 +3278,11 @@ void ice_shutdown_all_prof_masks(struct ice_hw *hw)
  * @hw: pointer to the HW struct
  * @blk: hardware block
  * @prof_id: profile ID
- * @es: field vector
  * @masks: masks
  */
 static enum ice_status
 ice_update_prof_masking(struct ice_hw *hw, enum ice_block blk, u16 prof_id,
-			struct ice_fv_word *es, u16 *masks)
+			u16 *masks)
 {
 	bool err = false;
 	u32 ena_mask = 0;
@@ -3986,7 +3984,7 @@ ice_prof_gen_key(struct ice_hw *hw, enum ice_block blk, u8 ptg, u16 vsig,
  * @prof_id: profile ID
  * @ptg: packet type group (PTG) portion of key
  * @vsig: VSIG portion of key
- * @cdid: CDID: portion of key
+ * @cdid: CDID portion of key
  * @flags: flag portion of key
  * @vl_msk: valid mask
  * @dc_msk: don't care mask
@@ -4628,7 +4626,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
 			if (status)
 				goto err_ice_add_prof;
 		}
-		status = ice_update_prof_masking(hw, blk, prof_id, es, masks);
+		status = ice_update_prof_masking(hw, blk, prof_id, masks);
 		if (status)
 			goto err_ice_add_prof;
 
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 90302a6cb..00f58697f 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1489,13 +1489,13 @@ ice_dealloc_flow_entry(struct ice_hw *hw, struct ice_flow_entry *entry)
 #define ICE_ACL_INVALID_SCEN	0x3f
 
 /**
- * ice_flow_acl_is_prof_in_use - Verify if the profile is associated to any pf
+ * ice_flow_acl_is_prof_in_use - Verify if the profile is associated to any PF
  * @hw: pointer to the hardware structure
  * @prof: pointer to flow profile
- * @buf: destination buffer function writes partial xtrct sequence to
+ * @