From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 34DB1A0350; Tue, 23 Jun 2020 13:20:16 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 5AB0A1D676; Tue, 23 Jun 2020 13:19:38 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id ACEB31D674 for ; Tue, 23 Jun 2020 13:19:36 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 05NBFxro030220; Tue, 23 Jun 2020 04:19:36 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=MqofnmPDYV8+eqkI4uPi7pUsmTGEV8S71dK5tU2GpCo=; b=P80kwTeWALINFKWfbT4y8W4yhUqJ7xBx0K6jKwlq66gQMFZR8OO46BDO75C83ER6qgUF uDL/xSjl6yHkz1I9SpbQX2EuH1osUbIyigX13fBZnMHWvxyCtsnZaZv63lu9GXArrpcw 2qZEKFwZK6oFWdwXdMvGCFNpNAsTw5EbVFMSuif5YrMLdFCkz6kVAr3RbWOj3GzfLNpx qHmwNf+9fVtff/899MvS8Mw7kALpcNfFQGlrtXQbMG7Og3GhA86LBRZtmpAADg61uUs8 e81UeEE5Usm9rYxZ4eKMOyL60gbLNyTfF9YHVtvCiqTnaXh5/nNqIu91qzqI3XDs7qOr sw== Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0b-0016f401.pphosted.com with ESMTP id 31shynw02n-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Tue, 23 Jun 2020 04:19:36 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 23 Jun 2020 04:19:34 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Tue, 23 Jun 2020 04:19:34 -0700 Received: from hyd1554T5810.caveonetworks.com.com (unknown [10.29.57.11]) by maili.marvell.com (Postfix) with ESMTP id 365C53F7040; Tue, 23 Jun 2020 04:19:31 -0700 (PDT) From: Tejasree Kondoj To: Akhil Goyal , Radu Nicolau CC: Vamsi Attunuru , Narayana Prasad , Anoob Joseph , Tejasree Kondoj , Date: Tue, 23 Jun 2020 17:42:28 +0530 Message-ID: <20200623121228.10355-9-ktejasree@marvell.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200623121228.10355-1-ktejasree@marvell.com> References: <20200623121228.10355-1-ktejasree@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.216, 18.0.687 definitions=2020-06-23_06:2020-06-23, 2020-06-23 signatures=0 Subject: [dpdk-dev] [PATCH 8/8] crypto/octeontx2: add cryptodev sec dequeue routine X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Vamsi Attunuru Signed-off-by: Vamsi Attunuru Signed-off-by: Tejasree Kondoj --- drivers/crypto/octeontx2/otx2_cryptodev_ops.c | 37 +++++++++++++++++++ drivers/crypto/octeontx2/otx2_ipsec_po.h | 30 +++++++++++++++ 2 files changed, 67 insertions(+) diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c index d796488def..43bb9a5fdf 100644 --- a/drivers/crypto/octeontx2/otx2_cryptodev_ops.c +++ b/drivers/crypto/octeontx2/otx2_cryptodev_ops.c @@ -832,11 +832,48 @@ otx2_cpt_asym_post_process(struct rte_crypto_op *cop, } } +static void +otx2_cpt_sec_post_process(struct rte_crypto_op *cop, uintptr_t *rsp) +{ + struct cpt_request_info *req = (struct cpt_request_info *)rsp[2]; + vq_cmd_word0_t *word0 = (vq_cmd_word0_t *)&req->ist.ei0; + struct rte_crypto_sym_op *sym_op = cop->sym; + struct rte_mbuf *m = sym_op->m_src; + struct rte_ipv4_hdr *ip; + uint16_t m_len; + int mdata_len; + char *data; + + mdata_len = (int)rsp[3]; + rte_pktmbuf_trim(m, mdata_len); + + if ((word0->s.opcode & 0xff) == OTX2_IPSEC_PO_PROCESS_IPSEC_INB) { + data = rte_pktmbuf_mtod(m, char *); + ip = (struct rte_ipv4_hdr *)(data + OTX2_IPSEC_PO_INB_RPTR_HDR); + + m_len = rte_be_to_cpu_16(ip->total_length); + + m->data_len = m_len; + m->pkt_len = m_len; + m->data_off += OTX2_IPSEC_PO_INB_RPTR_HDR; + } +} + static inline void otx2_cpt_dequeue_post_process(struct otx2_cpt_qp *qp, struct rte_crypto_op *cop, uintptr_t *rsp, uint8_t cc) { if (cop->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) { + if (cop->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) { + if (likely(cc == OTX2_IPSEC_PO_CC_SUCCESS)) { + otx2_cpt_sec_post_process(cop, rsp); + cop->status = RTE_CRYPTO_OP_STATUS_SUCCESS; + } else + cop->status = RTE_CRYPTO_OP_STATUS_ERROR; + + return; + } + if (likely(cc == NO_ERR)) { /* Verify authentication data if required */ if (unlikely(rsp[2])) diff --git a/drivers/crypto/octeontx2/otx2_ipsec_po.h b/drivers/crypto/octeontx2/otx2_ipsec_po.h index d127f310b7..f74ae2e598 100644 --- a/drivers/crypto/octeontx2/otx2_ipsec_po.h +++ b/drivers/crypto/octeontx2/otx2_ipsec_po.h @@ -22,10 +22,40 @@ #define OTX2_IPSEC_PO_PROCESS_IPSEC_OUTB 0x23 #define OTX2_IPSEC_PO_PROCESS_IPSEC_INB 0x24 +#define OTX2_IPSEC_PO_INB_RPTR_HDR 0x8 + enum otx2_ipsec_po_comp_e { OTX2_IPSEC_PO_CC_SUCCESS = 0x00, OTX2_IPSEC_PO_CC_AUTH_UNSUPPORTED = 0xB0, OTX2_IPSEC_PO_CC_ENCRYPT_UNSUPPORTED = 0xB1, + OTX2_IPSEC_PO_CC_IP_VERSION = 0xB2, + OTX2_IPSEC_PO_CC_PROTOCOL = 0xB3, + OTX2_IPSEC_PO_CC_CTX_INVALID = 0xB4, + OTX2_IPSEC_PO_CC_CTX_DIR_MISMATCH = 0xB5, + OTX2_IPSEC_PO_CC_IP_PAYLOAD_TYPE = 0xB6, + OTX2_IPSEC_PO_CC_CTX_FLAG_MISMATCH = 0xB7, + OTX2_IPSEC_PO_CC_GRE_HDR_MISMATCH = 0xB8, + OTX2_IPSEC_PO_CC_GRE_PROTOCOL = 0xB9, + OTX2_IPSEC_PO_CC_CUSTOM_HDR_LEN = 0xBA, + OTX2_IPSEC_PO_CC_ENC_TYPE_CTR_GCM = 0xBB, + OTX2_IPSEC_PO_CC_IPCOMP_CONF = 0xBC, + OTX2_IPSEC_PO_CC_FREG_SIZE_CONF = 0xBD, + OTX2_IPSEC_PO_CC_SPI_MISMATCH = 0xBE, + OTX2_IPSEC_PO_CC_CHECKSUM = 0xBF, + OTX2_IPSEC_PO_CC_IPCOMP_PKT_DETECTED = 0xC0, + OTX2_IPSEC_PO_CC_TFC_PADDING_WITH_PREFRAG = 0xC1, + OTX2_IPSEC_PO_CC_DSIV_INCORRECT_PARAM = 0xC2, + OTX2_IPSEC_PO_CC_AUTH_MISMATCH = 0xC3, + OTX2_IPSEC_PO_CC_PADDING = 0xC4, + OTX2_IPSEC_PO_CC_DUMMY_PADDING = 0xC5, + OTX2_IPSEC_PO_CC_IPV6_EXT_HDRS_TOO_BIG = 0xC6, + OTX2_IPSEC_PO_CC_IPV6_HOP_BY_HOP = 0xC7, + OTX2_IPSEC_PO_CC_IPV6_RH_LENGTH = 0xC8, + OTX2_IPSEC_PO_CC_IPV6_OUTB_RH_COPY_ADDR = 0xC9, + OTX2_IPSEC_PO_CC_IPV6_DEC_RH_SEGS_LEFT = 0xCA, + OTX2_IPSEC_PO_CC_IPV6_HDR_INVALID = 0xCB, + OTX2_IPSEC_PO_CC_IPV6_SELECTOR_MATCH = 0xCC, + OTX2_IPSEC_PO_CC_IPV6_UDP_PAYLOAD_CSUM_MISMATCH = 0xCE, }; enum { -- 2.27.0