From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 058C1A00C5; Mon, 6 Jul 2020 10:27:30 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id DD0211D9C2; Mon, 6 Jul 2020 10:24:39 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id DA7591D9D6 for ; Mon, 6 Jul 2020 10:24:37 +0200 (CEST) IronPort-SDR: Q00QOQ1K3N51l0V5r6LFZ7WsMpV+Sa8DMGhPWkqfzMtAOjEV8v75QOYBUze8t5EBAL6Vku/DlH 3wcUWxV2F8Wg== X-IronPort-AV: E=McAfee;i="6000,8403,9673"; a="147379333" X-IronPort-AV: E=Sophos;i="5.75,318,1589266800"; d="scan'208";a="147379333" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Jul 2020 01:24:37 -0700 IronPort-SDR: 1AxgaigAZui2EMonCgm5CZ7QhGL+NuWdU9DLgB0kWU1/hnU2ZYoFNlcUb13n/YUI2HnyAu6lKj 30XavZIXgy4g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,318,1589266800"; d="scan'208";a="388129017" Received: from intel.sh.intel.com ([10.239.255.48]) by fmsmga001.fm.intel.com with ESMTP; 06 Jul 2020 01:24:35 -0700 From: Guinan Sun To: dev@dpdk.org Cc: Jeff Guo , Zhao1 Wei , Guinan Sun , Roman Fridlyand Date: Mon, 6 Jul 2020 08:12:17 +0000 Message-Id: <20200706081222.19279-23-guinanx.sun@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200706081222.19279-1-guinanx.sun@intel.com> References: <20200622064634.70941-1-guinanx.sun@intel.com> <20200706081222.19279-1-guinanx.sun@intel.com> Subject: [dpdk-dev] [PATCH v3 22/27] net/e1000/base: add support for Nahum10 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add support to a new MAC type (for Nahum10). Signed-off-by: Roman Fridlyand Signed-off-by: Guinan Sun --- drivers/net/e1000/base/e1000_hw.h | 1 + drivers/net/e1000/base/e1000_ich8lan.c | 9 +++++++-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/net/e1000/base/e1000_hw.h b/drivers/net/e1000/base/e1000_hw.h index b71cb4d4d..11acec27e 100644 --- a/drivers/net/e1000/base/e1000_hw.h +++ b/drivers/net/e1000/base/e1000_hw.h @@ -212,6 +212,7 @@ enum e1000_mac_type { e1000_pch_lpt, e1000_pch_spt, e1000_pch_cnp, + e1000_pch_adp, e1000_82575, e1000_82576, e1000_82580, diff --git a/drivers/net/e1000/base/e1000_ich8lan.c b/drivers/net/e1000/base/e1000_ich8lan.c index 85344ebeb..61dcc1e61 100644 --- a/drivers/net/e1000/base/e1000_ich8lan.c +++ b/drivers/net/e1000/base/e1000_ich8lan.c @@ -318,6 +318,7 @@ STATIC s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw) case e1000_pch_lpt: case e1000_pch_spt: case e1000_pch_cnp: + case e1000_pch_adp: if (e1000_phy_is_accessible_pchlan(hw)) break; @@ -467,6 +468,7 @@ STATIC s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw) case e1000_pch_lpt: case e1000_pch_spt: case e1000_pch_cnp: + case e1000_pch_adp: /* In case the PHY needs to be in mdio slow mode, * set slow mode and try to get the PHY id again. */ @@ -772,12 +774,11 @@ STATIC s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw) case e1000_pch_lpt: case e1000_pch_spt: case e1000_pch_cnp: -#ifndef NO_NON_BLOCKING_PHY_MTA_UPDATE_SUPPORT + case e1000_pch_adp: /* multicast address update for pch2 */ mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_pch2lan; /* fall-through */ -#endif case e1000_pchlan: #if defined(QV_RELEASE) || !defined(NO_PCH_LPT_B0_SUPPORT) /* save PCH revision_id */ @@ -1764,6 +1765,7 @@ void e1000_init_function_pointers_ich8lan(struct e1000_hw *hw) case e1000_pch_lpt: case e1000_pch_spt: case e1000_pch_cnp: + case e1000_pch_adp: hw->phy.ops.init_params = e1000_init_phy_params_pchlan; break; default: @@ -2231,6 +2233,7 @@ STATIC s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw) case e1000_pch_lpt: case e1000_pch_spt: case e1000_pch_cnp: + case e1000_pch_adp: sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M; break; default: @@ -3358,6 +3361,7 @@ STATIC s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank) switch (hw->mac.type) { case e1000_pch_spt: case e1000_pch_cnp: + case e1000_pch_adp: bank1_offset = nvm->flash_bank_size; act_offset = E1000_ICH_NVM_SIG_WORD; @@ -4329,6 +4333,7 @@ STATIC s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw) case e1000_pch_lpt: case e1000_pch_spt: case e1000_pch_cnp: + case e1000_pch_adp: word = NVM_COMPAT; valid_csum_mask = NVM_COMPAT_VALID_CSUM; break; -- 2.17.1