From: Arek Kusztal <arkadiuszx.kusztal@intel.com>
To: dev@dpdk.org
Cc: akhil.goyal@nxp.com, fiona.trahe@intel.com,
Arek Kusztal <arkadiuszx.kusztal@intel.com>
Subject: [dpdk-dev] [PATCH v5 3/3] drivers/qat: add handling of capabilities in multi process
Date: Tue, 7 Jul 2020 17:02:39 +0200 [thread overview]
Message-ID: <20200707150239.13400-4-arkadiuszx.kusztal@intel.com> (raw)
In-Reply-To: <20200707150239.13400-1-arkadiuszx.kusztal@intel.com>
Move qat capabilities data into a memzone where it can be
shared by primary and secondary processes.
Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
---
drivers/compress/qat/qat_comp_pmd.c | 31 +++++++++++++++++++++-
drivers/compress/qat/qat_comp_pmd.h | 2 ++
drivers/crypto/qat/qat_asym_pmd.c | 27 +++++++++++++++++++
drivers/crypto/qat/qat_asym_pmd.h | 2 ++
drivers/crypto/qat/qat_sym_pmd.c | 52 +++++++++++++++++++++++++++++++++----
drivers/crypto/qat/qat_sym_pmd.h | 2 ++
6 files changed, 110 insertions(+), 6 deletions(-)
diff --git a/drivers/compress/qat/qat_comp_pmd.c b/drivers/compress/qat/qat_comp_pmd.c
index 47c10e2..ecf972a 100644
--- a/drivers/compress/qat/qat_comp_pmd.c
+++ b/drivers/compress/qat/qat_comp_pmd.c
@@ -667,8 +667,11 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,
.socket_id = qat_dev_instance->pci_dev->device.numa_node,
};
char name[RTE_COMPRESSDEV_NAME_MAX_LEN];
+ char capa_memz_name[RTE_COMPRESSDEV_NAME_MAX_LEN];
struct rte_compressdev *compressdev;
struct qat_comp_dev_private *comp_dev;
+ const struct rte_compressdev_capabilities *capabilities;
+ uint64_t capa_size;
snprintf(name, RTE_COMPRESSDEV_NAME_MAX_LEN, "%s_%s",
qat_pci_dev->name, "comp");
@@ -699,6 +702,10 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
+ snprintf(capa_memz_name, RTE_COMPRESSDEV_NAME_MAX_LEN,
+ "QAT_COMP_CAPA_GEN_%d",
+ qat_pci_dev->qat_dev_gen);
+
comp_dev = compressdev->data->dev_private;
comp_dev->qat_dev = qat_pci_dev;
comp_dev->compressdev = compressdev;
@@ -707,15 +714,34 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,
case QAT_GEN1:
case QAT_GEN2:
case QAT_GEN3:
- comp_dev->qat_dev_capabilities = qat_comp_gen_capabilities;
+ capabilities = qat_comp_gen_capabilities;
+ capa_size = sizeof(qat_comp_gen_capabilities);
break;
default:
+ capabilities = qat_comp_gen_capabilities;
+ capa_size = sizeof(qat_comp_gen_capabilities);
QAT_LOG(DEBUG,
"QAT gen %d capabilities unknown, default to GEN1",
qat_pci_dev->qat_dev_gen);
break;
}
+ comp_dev->capa_mz = rte_memzone_reserve(capa_memz_name,
+ capa_size,
+ rte_socket_id(), 0);
+ if (comp_dev->capa_mz == NULL) {
+ QAT_LOG(DEBUG,
+ "Error allocating memzone for capabilities, destroying PMD for %s",
+ name);
+ memset(&qat_dev_instance->comp_rte_dev, 0,
+ sizeof(qat_dev_instance->comp_rte_dev));
+ rte_compressdev_pmd_destroy(compressdev);
+ return -EFAULT;
+ }
+
+ memcpy(comp_dev->capa_mz->addr, capabilities, capa_size);
+ comp_dev->qat_dev_capabilities = comp_dev->capa_mz->addr;
+
while (1) {
if (qat_dev_cmd_param[i].name == NULL)
break;
@@ -744,6 +770,9 @@ qat_comp_dev_destroy(struct qat_pci_device *qat_pci_dev)
if (comp_dev == NULL)
return 0;
+ if (rte_eal_process_type() == RTE_PROC_PRIMARY)
+ rte_memzone_free(qat_pci_dev->comp_dev->capa_mz);
+
/* clean up any resources used by the device */
qat_comp_dev_close(comp_dev->compressdev);
diff --git a/drivers/compress/qat/qat_comp_pmd.h b/drivers/compress/qat/qat_comp_pmd.h
index 5c7fa9f..ed27120 100644
--- a/drivers/compress/qat/qat_comp_pmd.h
+++ b/drivers/compress/qat/qat_comp_pmd.h
@@ -32,6 +32,8 @@ struct qat_comp_dev_private {
/**< The device's pool for qat_comp_xforms */
struct rte_mempool *streampool;
/**< The device's pool for qat_comp_streams */
+ const struct rte_memzone *capa_mz;
+ /* Shared memzone for storing capabilities */
uint16_t min_enq_burst_threshold;
};
diff --git a/drivers/crypto/qat/qat_asym_pmd.c b/drivers/crypto/qat/qat_asym_pmd.c
index d584ac7..968ec54 100644
--- a/drivers/crypto/qat/qat_asym_pmd.c
+++ b/drivers/crypto/qat/qat_asym_pmd.c
@@ -248,6 +248,7 @@ qat_asym_dev_create(struct qat_pci_device *qat_pci_dev,
.private_data_size = sizeof(struct qat_asym_dev_private)
};
char name[RTE_CRYPTODEV_NAME_MAX_LEN];
+ char capa_memz_name[RTE_CRYPTODEV_NAME_MAX_LEN];
struct rte_cryptodev *cryptodev;
struct qat_asym_dev_private *internals;
@@ -296,11 +297,35 @@ qat_asym_dev_create(struct qat_pci_device *qat_pci_dev,
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
+ snprintf(capa_memz_name, RTE_CRYPTODEV_NAME_MAX_LEN,
+ "QAT_ASYM_CAPA_GEN_%d",
+ qat_pci_dev->qat_dev_gen);
+
internals = cryptodev->data->dev_private;
internals->qat_dev = qat_pci_dev;
internals->asym_dev_id = cryptodev->data->dev_id;
internals->qat_dev_capabilities = qat_gen1_asym_capabilities;
+ internals->capa_mz = rte_memzone_lookup(capa_memz_name);
+ if (internals->capa_mz == NULL) {
+ internals->capa_mz = rte_memzone_reserve(capa_memz_name,
+ sizeof(qat_gen1_asym_capabilities),
+ rte_socket_id(), 0);
+ }
+ if (internals->capa_mz == NULL) {
+ QAT_LOG(DEBUG,
+ "Error allocating memzone for capabilities, destroying PMD for %s",
+ name);
+ rte_cryptodev_pmd_destroy(cryptodev);
+ memset(&qat_dev_instance->asym_rte_dev, 0,
+ sizeof(qat_dev_instance->asym_rte_dev));
+ return -EFAULT;
+ }
+
+ memcpy(internals->capa_mz->addr, qat_gen1_asym_capabilities,
+ sizeof(qat_gen1_asym_capabilities));
+ internals->qat_dev_capabilities = internals->capa_mz->addr;
+
while (1) {
if (qat_dev_cmd_param[i].name == NULL)
break;
@@ -325,6 +350,8 @@ qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev)
return -ENODEV;
if (qat_pci_dev->asym_dev == NULL)
return 0;
+ if (rte_eal_process_type() == RTE_PROC_PRIMARY)
+ rte_memzone_free(qat_pci_dev->asym_dev->capa_mz);
/* free crypto device */
cryptodev = rte_cryptodev_pmd_get_dev(
diff --git a/drivers/crypto/qat/qat_asym_pmd.h b/drivers/crypto/qat/qat_asym_pmd.h
index ddf413f..3b5abdd 100644
--- a/drivers/crypto/qat/qat_asym_pmd.h
+++ b/drivers/crypto/qat/qat_asym_pmd.h
@@ -26,6 +26,8 @@ struct qat_asym_dev_private {
/**< Device instance for this rte_cryptodev */
const struct rte_cryptodev_capabilities *qat_dev_capabilities;
/* QAT device asymmetric crypto capabilities */
+ const struct rte_memzone *capa_mz;
+ /* Shared memzone for storing capabilities */
uint16_t min_enq_burst_threshold;
};
diff --git a/drivers/crypto/qat/qat_sym_pmd.c b/drivers/crypto/qat/qat_sym_pmd.c
index 6ef9a34..2dcda4a 100644
--- a/drivers/crypto/qat/qat_sym_pmd.c
+++ b/drivers/crypto/qat/qat_sym_pmd.c
@@ -32,6 +32,12 @@ static const struct rte_cryptodev_capabilities qat_gen2_sym_capabilities[] = {
RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
};
+static const struct rte_cryptodev_capabilities qat_gen3_sym_capabilities[] = {
+ QAT_BASE_GEN1_SYM_CAPABILITIES,
+ QAT_EXTRA_GEN2_SYM_CAPABILITIES,
+ RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
+};
+
#ifdef RTE_LIBRTE_SECURITY
static const struct rte_cryptodev_capabilities
qat_security_sym_capabilities[] = {
@@ -314,8 +320,11 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,
.private_data_size = sizeof(struct qat_sym_dev_private)
};
char name[RTE_CRYPTODEV_NAME_MAX_LEN];
+ char capa_memz_name[RTE_CRYPTODEV_NAME_MAX_LEN];
struct rte_cryptodev *cryptodev;
struct qat_sym_dev_private *internals;
+ const struct rte_cryptodev_capabilities *capabilities;
+ uint64_t capa_size;
/*
* All processes must use same driver id so they can share sessions.
@@ -377,6 +386,10 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,
if (rte_eal_process_type() != RTE_PROC_PRIMARY)
return 0;
+ snprintf(capa_memz_name, RTE_CRYPTODEV_NAME_MAX_LEN,
+ "QAT_SYM_CAPA_GEN_%d",
+ qat_pci_dev->qat_dev_gen);
+
#ifdef RTE_LIBRTE_SECURITY
security_instance = rte_malloc("qat_sec",
sizeof(struct rte_security_ctx),
@@ -399,18 +412,45 @@ qat_sym_dev_create(struct qat_pci_device *qat_pci_dev,
internals->sym_dev_id = cryptodev->data->dev_id;
switch (qat_pci_dev->qat_dev_gen) {
case QAT_GEN1:
- internals->qat_dev_capabilities = qat_gen1_sym_capabilities;
+ capabilities = qat_gen1_sym_capabilities;
+ capa_size = sizeof(qat_gen1_sym_capabilities);
break;
case QAT_GEN2:
+ capabilities = qat_gen2_sym_capabilities;
+ capa_size = sizeof(qat_gen2_sym_capabilities);
+ break;
case QAT_GEN3:
- internals->qat_dev_capabilities = qat_gen2_sym_capabilities;
+ capabilities = qat_gen3_sym_capabilities;
+ capa_size = sizeof(qat_gen3_sym_capabilities);
break;
default:
QAT_LOG(DEBUG,
- "QAT gen %d capabilities unknown, default to GEN2",
- qat_pci_dev->qat_dev_gen);
- break;
+ "QAT gen %d capabilities unknown",
+ qat_pci_dev->qat_dev_gen);
+ rte_cryptodev_pmd_destroy(cryptodev);
+ memset(&qat_dev_instance->sym_rte_dev, 0,
+ sizeof(qat_dev_instance->sym_rte_dev));
+ return -(EINVAL);
+ }
+
+ internals->capa_mz = rte_memzone_lookup(capa_memz_name);
+ if (internals->capa_mz == NULL) {
+ internals->capa_mz = rte_memzone_reserve(capa_memz_name,
+ capa_size,
+ rte_socket_id(), 0);
}
+ if (internals->capa_mz == NULL) {
+ QAT_LOG(DEBUG,
+ "Error allocating memzone for capabilities, destroying PMD for %s",
+ name);
+ rte_cryptodev_pmd_destroy(cryptodev);
+ memset(&qat_dev_instance->sym_rte_dev, 0,
+ sizeof(qat_dev_instance->sym_rte_dev));
+ return -EFAULT;
+ }
+
+ memcpy(internals->capa_mz->addr, capabilities, capa_size);
+ internals->qat_dev_capabilities = internals->capa_mz->addr;
while (1) {
if (qat_dev_cmd_param[i].name == NULL)
@@ -437,6 +477,8 @@ qat_sym_dev_destroy(struct qat_pci_device *qat_pci_dev)
return -ENODEV;
if (qat_pci_dev->sym_dev == NULL)
return 0;
+ if (rte_eal_process_type() == RTE_PROC_PRIMARY)
+ rte_memzone_free(qat_pci_dev->sym_dev->capa_mz);
/* free crypto device */
cryptodev = rte_cryptodev_pmd_get_dev(qat_pci_dev->sym_dev->sym_dev_id);
diff --git a/drivers/crypto/qat/qat_sym_pmd.h b/drivers/crypto/qat/qat_sym_pmd.h
index cf4e1a0..f32a77e 100644
--- a/drivers/crypto/qat/qat_sym_pmd.h
+++ b/drivers/crypto/qat/qat_sym_pmd.h
@@ -36,6 +36,8 @@ struct qat_sym_dev_private {
/**< Device instance for this rte_cryptodev */
const struct rte_cryptodev_capabilities *qat_dev_capabilities;
/* QAT device symmetric crypto capabilities */
+ const struct rte_memzone *capa_mz;
+ /* Shared memzone for storing capabilities */
uint16_t min_enq_burst_threshold;
uint32_t internal_capabilities; /* see flags QAT_SYM_CAP_xxx */
};
--
2.1.0
next prev parent reply other threads:[~2020-07-07 15:03 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-07 15:02 [dpdk-dev] [PATCH v5 0/3] drivers/qat: improve handling of " Arek Kusztal
2020-07-07 15:02 ` [dpdk-dev] [PATCH v5 1/3] " Arek Kusztal
2020-07-07 15:02 ` [dpdk-dev] [PATCH v5 2/3] drivers/qat: add multi process handling of driver id Arek Kusztal
2020-07-07 15:02 ` Arek Kusztal [this message]
2020-07-07 22:28 ` [dpdk-dev] [PATCH v5 3/3] drivers/qat: add handling of capabilities in multi process Akhil Goyal
2020-07-07 15:28 ` [dpdk-dev] [PATCH v5 0/3] drivers/qat: improve handling of " Trahe, Fiona
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