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From: Ting Xu <ting.xu@intel.com>
To: dev@dpdk.org
Cc: cristian.dumitrescu@intel.com, Ting Xu <ting.xu@intel.com>,
Subject: [dpdk-dev] [PATCH v3] lib/table: fix cache alignment issue
Date: Thu,  9 Jul 2020 09:44:26 +0800	[thread overview]
Message-ID: <20200709014426.13641-1-ting.xu@intel.com> (raw)

When create softnic hash table with 16 keys, it failed on 32bit
environment because of the structure rte_bucket_4_16 alignment
issue. Add __rte_cache_aligned to ensure correct cache align.

Fixes: 8aa327214c ("table: hash")
Cc: stable@dpdk.org

Signed-off-by: Ting Xu <ting.xu@intel.com>

v2->v3: Rebase
v1->v2: Correct patch time
 lib/librte_table/rte_table_hash_key16.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/librte_table/rte_table_hash_key16.c b/lib/librte_table/rte_table_hash_key16.c
index 2cca1c924..5e1665c15 100644
--- a/lib/librte_table/rte_table_hash_key16.c
+++ b/lib/librte_table/rte_table_hash_key16.c
@@ -44,7 +44,7 @@ struct rte_bucket_4_16 {
 	uint64_t key[4][2];
 	/* Cache line 2 */
-	uint8_t data[0];
+	uint8_t data[0] __rte_cache_aligned;
 struct rte_table_hash {

             reply	other threads:[~2020-07-09  1:40 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-09  1:44 Ting Xu [this message]
  -- strict thread matches above, loose matches on Subject: below --
2020-06-16 16:27 [dpdk-dev] [PATCH v1] " Ting Xu
2020-07-09  1:48 ` [dpdk-dev] [PATCH v3] " Ting Xu
2020-07-20 14:37   ` Dumitrescu, Cristian
2020-07-21  5:15     ` Xu, Ting
2020-07-21 21:16       ` Dumitrescu, Cristian
2020-07-22  2:16         ` Xu, Ting

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