From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A10BEA0540; Wed, 15 Jul 2020 10:34:06 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id AC3B21C117; Wed, 15 Jul 2020 10:33:55 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id A7FA71C117 for ; Wed, 15 Jul 2020 10:33:54 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 06F8Un59015143; Wed, 15 Jul 2020 01:33:53 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=Net+S/KymjvZC1VEgxewMIj6ksEiudSl+GjMR8AlZtI=; b=F+Sdcyc5Iyva9GOWvRMUFX9uO5tCBRK6/nxOt8tklPlem7botGt/zWn2Rzt301GAS6XA 5qReYqLZMGvZ/QP24Iiq+jl3TVkfl2+7dMbQUZAtsLJyJqsjq+TIogfltZ8EGIiGP8KK i3t2Il7u0qdmiGJ3fqdIkcgOf7/oDIuqe/pf7rR6ciGB5LOUlEEYFPq+nSuWNVI9MQhI pMqpNc90SOyJ8MIsdRfafCsyXTKGVBEtACRMqFRw/d9XHVrA7S4MdyCJrFUvjimmntND K75QoBXn1MNADZ0UpV+PVrKolMTuN0Kk4AnIaV2HNndXvF5MhKsSzfbHitEKblr0idnM iQ== Received: from sc-exch04.marvell.com ([199.233.58.184]) by mx0a-0016f401.pphosted.com with ESMTP id 327asngppn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 15 Jul 2020 01:33:53 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 15 Jul 2020 01:33:53 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 15 Jul 2020 01:33:53 -0700 Received: from hyd1554T5810.caveonetworks.com.com (unknown [10.29.57.11]) by maili.marvell.com (Postfix) with ESMTP id 46B253F7040; Wed, 15 Jul 2020 01:33:50 -0700 (PDT) From: Tejasree Kondoj To: Akhil Goyal , Radu Nicolau CC: Tejasree Kondoj , Narayana Prasad , Anoob Joseph , Vamsi Attunuru , Date: Wed, 15 Jul 2020 14:56:57 +0530 Message-ID: <20200715092703.17936-4-ktejasree@marvell.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200715092703.17936-1-ktejasree@marvell.com> References: <20200715092703.17936-1-ktejasree@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-07-15_06:2020-07-15, 2020-07-15 signatures=0 Subject: [dpdk-dev] [PATCH v2 3/9] crypto/octeontx2: add lookaside SA context definitions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch adds lookaside IPsec SA context definitions. Signed-off-by: Vamsi Attunuru Signed-off-by: Tejasree Kondoj --- drivers/crypto/octeontx2/otx2_cryptodev_sec.h | 58 +++++++++ drivers/crypto/octeontx2/otx2_ipsec_po.h | 110 ++++++++++++++++++ drivers/crypto/octeontx2/otx2_security.h | 2 + drivers/net/octeontx2/otx2_ethdev_sec.h | 1 + 4 files changed, 171 insertions(+) create mode 100644 drivers/crypto/octeontx2/otx2_cryptodev_sec.h create mode 100644 drivers/crypto/octeontx2/otx2_ipsec_po.h diff --git a/drivers/crypto/octeontx2/otx2_cryptodev_sec.h b/drivers/crypto/octeontx2/otx2_cryptodev_sec.h new file mode 100644 index 0000000000..253f62d873 --- /dev/null +++ b/drivers/crypto/octeontx2/otx2_cryptodev_sec.h @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright (C) 2020 Marvell International Ltd. + */ + +#ifndef __OTX2_CRYPTODEV_SEC_H__ +#define __OTX2_CRYPTODEV_SEC_H__ + +#include "otx2_ipsec_po.h" + +struct otx2_sec_session_ipsec_lp { + RTE_STD_C11 + union { + /* Inbound SA */ + struct otx2_ipsec_po_in_sa in_sa; + /* Outbound SA */ + struct otx2_ipsec_po_out_sa out_sa; + }; + + uint64_t ucmd_w3; + union { + uint64_t ucmd_w0; + struct { + uint16_t ucmd_dlen; + uint16_t ucmd_param2; + uint16_t ucmd_param1; + uint16_t ucmd_opcode; + }; + }; + + uint8_t partial_len; + uint8_t roundup_len; + uint8_t roundup_byte; + uint16_t ip_id; + union { + uint64_t esn; + struct { + uint32_t seq_lo; + uint32_t seq_hi; + }; + }; + + /** Context length in 8-byte words */ + size_t ctx_len; + /** Auth IV offset in bytes */ + uint16_t auth_iv_offset; + /** IV offset in bytes */ + uint16_t iv_offset; + /** AAD length */ + uint16_t aad_length; + /** MAC len in bytes */ + uint8_t mac_len; + /** IV length in bytes */ + uint8_t iv_length; + /** Auth IV length in bytes */ + uint8_t auth_iv_length; +}; + +#endif /* __OTX2_CRYPTODEV_SEC_H__ */ diff --git a/drivers/crypto/octeontx2/otx2_ipsec_po.h b/drivers/crypto/octeontx2/otx2_ipsec_po.h new file mode 100644 index 0000000000..217dfeaff0 --- /dev/null +++ b/drivers/crypto/octeontx2/otx2_ipsec_po.h @@ -0,0 +1,110 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2020 Marvell International Ltd. + */ + +#ifndef __OTX2_IPSEC_PO_H__ +#define __OTX2_IPSEC_PO_H__ + +#include +#include +#include + +union otx2_ipsec_po_bit_perfect_iv { + uint8_t aes_iv[16]; + uint8_t des_iv[8]; + struct { + uint8_t nonce[4]; + uint8_t iv[8]; + uint8_t counter[4]; + } gcm; +}; + +struct otx2_ipsec_po_traffic_selector { + rte_be16_t src_port[2]; + rte_be16_t dst_port[2]; + RTE_STD_C11 + union { + struct { + rte_be32_t src_addr[2]; + rte_be32_t dst_addr[2]; + } ipv4; + struct { + uint8_t src_addr[32]; + uint8_t dst_addr[32]; + } ipv6; + }; +}; + +struct otx2_ipsec_po_sa_ctl { + rte_be32_t spi : 32; + uint64_t exp_proto_inter_frag : 8; + uint64_t rsvd_42_40 : 3; + uint64_t esn_en : 1; + uint64_t rsvd_45_44 : 2; + uint64_t encap_type : 2; + uint64_t enc_type : 3; + uint64_t rsvd_48 : 1; + uint64_t auth_type : 4; + uint64_t valid : 1; + uint64_t direction : 1; + uint64_t outer_ip_ver : 1; + uint64_t inner_ip_ver : 1; + uint64_t ipsec_mode : 1; + uint64_t ipsec_proto : 1; + uint64_t aes_key_len : 2; +}; + +struct otx2_ipsec_po_in_sa { + /* w0 */ + struct otx2_ipsec_po_sa_ctl ctl; + + /* w1-w4 */ + uint8_t cipher_key[32]; + + /* w5-w6 */ + union otx2_ipsec_po_bit_perfect_iv iv; + + /* w7 */ + uint32_t esn_hi; + uint32_t esn_low; + + /* w8 */ + uint8_t udp_encap[8]; + + /* w9-w23 */ + struct { + uint8_t hmac_key[48]; + struct otx2_ipsec_po_traffic_selector selector; + } aes_gcm; +}; + +struct otx2_ipsec_po_ip_template { + RTE_STD_C11 + union { + uint8_t raw[252]; + struct rte_ipv4_hdr ipv4_hdr; + struct rte_ipv6_hdr ipv6_hdr; + }; +}; + +struct otx2_ipsec_po_out_sa { + /* w0 */ + struct otx2_ipsec_po_sa_ctl ctl; + + /* w1-w4 */ + uint8_t cipher_key[32]; + + /* w5-w6 */ + union otx2_ipsec_po_bit_perfect_iv iv; + + /* w7 */ + uint32_t esn_hi; + uint32_t esn_low; + + /* w8-w39 */ + struct otx2_ipsec_po_ip_template template; + uint16_t udp_src; + uint16_t udp_dst; +}; + +#endif /* __OTX2_IPSEC_PO_H__ */ diff --git a/drivers/crypto/octeontx2/otx2_security.h b/drivers/crypto/octeontx2/otx2_security.h index 9790c709d6..9b4fe263c4 100644 --- a/drivers/crypto/octeontx2/otx2_security.h +++ b/drivers/crypto/octeontx2/otx2_security.h @@ -5,10 +5,12 @@ #ifndef __OTX2_SECURITY_H__ #define __OTX2_SECURITY_H__ +#include "otx2_cryptodev_sec.h" #include "otx2_ethdev_sec.h" union otx2_sec_session_ipsec { struct otx2_sec_session_ipsec_ip ip; + struct otx2_sec_session_ipsec_lp lp; }; struct otx2_sec_session { diff --git a/drivers/net/octeontx2/otx2_ethdev_sec.h b/drivers/net/octeontx2/otx2_ethdev_sec.h index 22025d0d0c..298b00bf89 100644 --- a/drivers/net/octeontx2/otx2_ethdev_sec.h +++ b/drivers/net/octeontx2/otx2_ethdev_sec.h @@ -8,6 +8,7 @@ #include #include "otx2_ipsec_fp.h" +#include "otx2_ipsec_po.h" #define OTX2_CPT_RES_ALIGN 16 #define OTX2_NIX_SEND_DESC_ALIGN 16 -- 2.27.0