From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 81624A052A; Sun, 19 Jul 2020 09:11:46 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 307B31C034; Sun, 19 Jul 2020 09:11:33 +0200 (CEST) Received: from EUR04-DB3-obe.outbound.protection.outlook.com (mail-eopbgr60064.outbound.protection.outlook.com [40.107.6.64]) by dpdk.org (Postfix) with ESMTP id 9528E1C02A for ; Sun, 19 Jul 2020 09:11:29 +0200 (CEST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=n2BDLh/YpUXSncTrPy+2l8uEgYCcdw3Rz3StXSkUcopBYYHFjHDp0fQVJA/4CIGrFs2I53ifd8nffVuqQNvPxYHYFP9DDLqNlSWYZneh/ygg49g06kocXXVS6I4gLF8X8ol+DLDDh+mCAnCjvEku9x2HWSBRUn7PGF4RF9TW31pVOWp50MzLQJIQSFVfGbHv1k7LF95wlcqpG0Lnn7MQ9k2SAWZnuJ6i1gVF4DIIZ8liMYdA3sX0rjnsef0NfrJBJufMSWozpKZZfpog23QXkm9uF+mEAWM4mXn9739OCvmyt98i65Lv4v5cqI2UgmVNObKTbRozthNSVSVTNLbg6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=JpEGCfNq08mI4CAweS5w8TnsuVVBSmx83CkNuBkrsUE=; b=jjR9cQz7dGpVu3/8fG4+cuBr0BKO8EsnavIPMD3WKQzgFobs5pChoJ54e98no84/3WqaUj1DLUAAH44AwJkpmKihGGb7p57qvVPol7xlVSvuupq9P/cgiwxcXBmtOP5ZLXH4qQVnc1rrKchmIJER0HpuHVfe78MA+nz0A+a889lFDau0uhe6IFVK6C8EwlqTAyVXA28SPRVaIeHAS78Lb3MoNLvQzJBpg04GYXPxfdFbli41zzku650MMMT5KX2znBDsw3MLGsuJVaD49TgLRet2zWXeSzNnMaGNezISpfrQToTkQwRKngHKSN08l9YlAtRXqkLKhdCzb1UYz8y43w== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=mellanox.com; dmarc=pass action=none header.from=mellanox.com; dkim=pass header.d=mellanox.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Mellanox.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=JpEGCfNq08mI4CAweS5w8TnsuVVBSmx83CkNuBkrsUE=; b=GHgqCUDT/8Y/J1VsLk6snxZ4yqSkrSMuqvkT8xwYLrx/jgS8aRissKaI+L9jDWb4fL44S/0oRxzj0mXksQTBTxyegxfXNFMXvMBm54gTBcRv/VIKkHDrVX2CzcDxxpzC1DEV00DBr2eG1WLcQVVe8l41/gqjYqKMvW3HdEaIp2s= Authentication-Results: dpdk.org; dkim=none (message not signed) header.d=none;dpdk.org; dmarc=none action=none header.from=mellanox.com; Received: from AM0PR05MB4209.eurprd05.prod.outlook.com (2603:10a6:208:61::22) by AM0PR05MB4738.eurprd05.prod.outlook.com (2603:10a6:208:b7::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3174.21; Sun, 19 Jul 2020 07:11:28 +0000 Received: from AM0PR05MB4209.eurprd05.prod.outlook.com ([fe80::3949:70c3:126:3972]) by AM0PR05MB4209.eurprd05.prod.outlook.com ([fe80::3949:70c3:126:3972%7]) with mapi id 15.20.3195.024; Sun, 19 Jul 2020 07:11:28 +0000 From: Ophir Munk To: dev@dpdk.org Cc: Raslan Darawsheh , Ophir Munk , Matan Azrad Date: Sun, 19 Jul 2020 07:11:06 +0000 Message-Id: <20200719071112.8540-3-ophirmu@mellanox.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20200719071112.8540-1-ophirmu@mellanox.com> References: <20200714142102.30606-9-ophirmu@mellanox.com> <20200719071112.8540-1-ophirmu@mellanox.com> Content-Type: text/plain X-ClientProxiedBy: AM0PR04CA0024.eurprd04.prod.outlook.com (2603:10a6:208:122::37) To AM0PR05MB4209.eurprd05.prod.outlook.com (2603:10a6:208:61::22) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from mellanox.com (37.142.13.130) by AM0PR04CA0024.eurprd04.prod.outlook.com (2603:10a6:208:122::37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3195.17 via Frontend Transport; Sun, 19 Jul 2020 07:11:27 +0000 X-Mailer: git-send-email 2.8.4 X-Originating-IP: [37.142.13.130] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: f2a2fba2-2b79-4db0-f987-08d82bb2f484 X-MS-TrafficTypeDiagnostic: AM0PR05MB4738: X-LD-Processed: a652971c-7d2e-4d9b-a6a4-d149256f461b,ExtFwd X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:3383; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: RFZatwPMv/NyVtz+LfLrJQar29VjVGLqcGKlgx0lYKxejPe1+rYE1Nvvqh5Xus6Gm9rctE+yXSOLewymX22f+6TR9MqUHJbeSGs9F806ugaR7SZ7juoLfqakcelCkSJqjpw4hnyIZkMxWZ6vKY6xp4VYKYCB0LcJUGMqx7xE6xrxE3Q3iU998i78CdBQJcWpO947CrOg0BL/H/QIcrI/Mo8SD2apsaxkTrkJ2I5m62F+JE7M7raXHQLRGqn07eu8s2jKZOMhxAUmrWe9yFWoDTqhztNDDU7y2rNBRAAfN1j8/bR4xgnkBUMOjXsJvFSPNVMFoBj+KMcFCFrG42G0GA== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:AM0PR05MB4209.eurprd05.prod.outlook.com; PTR:; CAT:NONE; SFTY:; SFS:(4636009)(396003)(376002)(39850400004)(346002)(136003)(366004)(52116002)(107886003)(5660300002)(2906002)(316002)(36756003)(8886007)(6666004)(7696005)(6916009)(55016002)(8676002)(478600001)(2616005)(4326008)(66556008)(66476007)(186003)(26005)(66946007)(54906003)(83380400001)(1076003)(30864003)(86362001)(16526019)(956004)(8936002); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: BoXbhmS+HW1Q7431Ncg2VyB3XH5miz3h/wAxHsu1rQt5nXQnWDKqn7FlR2qYTfhuM+CxY3xRUs1aAtA0xe7mJJ1lg7Go72ZQt6F7AbxYBys5w1qY/ZUc48aZhHQL4FL8IYHbwsgjtFYT0vMQxLuSQuFe13ENYsB/JPh9AMEtMF0bLnOR4SqnPzHmxL6Y4hzJxnBNj6NBF2BZw/atuyPWQWwowLQduyJ8HWVgQeCBqbOH6MYxd+jPnRii15crbV9rXVolTaJ+RK0dpBlx7tjSX0i8HRtmuXXi/aknpBg5ZuLcY/bgvojr1skuBWWUG3lt+l1W2X5gYOJFvSijosYDlLE4rX4m9wJH7rd9BuW0jMniaVzsq6FoWKjwQDm14eEejOCoVfLJvS8XzValhyG3vmcwwkxGj34VbMBavdZOhXvIZ0VdmJ6U2x8U+YvRMgp0tMztyV30VCGlN+lGN+uJS/qQKpWeDigXcmyM+AhUFooKPL2wdnvwOmZltERtUwPN X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: f2a2fba2-2b79-4db0-f987-08d82bb2f484 X-MS-Exchange-CrossTenant-AuthSource: AM0PR05MB4209.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Jul 2020 07:11:28.1312 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Zcz/Zo+MinVFmf8jbxvMfFgMMkFGPFe65HDlP2R9tuqQGFPgFF8UrCNndFH4plCSHbkTDb21H4NeJ2IzahmhtA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR05MB4738 Subject: [dpdk-dev] [PATCH v2 2/8] net/mlx5: replace Linux specific calls with rte API X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The following Linux calls are replaced by their matching rte APIs. mmap ==> rte_mem_map() munmap == >rte_mem_unmap() sysconf(_SC_PAGESIZE) ==> rte_mem_page_size() Signed-off-by: Ophir Munk Acked-by: Matan Azrad --- drivers/common/mlx5/mlx5_devx_cmds.c | 9 +++++++- drivers/common/mlx5/mlx5_prm.h | 4 ++-- drivers/net/mlx5/linux/mlx5_os.c | 11 ++++++--- drivers/net/mlx5/linux/mlx5_verbs.c | 1 - drivers/net/mlx5/mlx5_flow_dv.c | 9 +++++++- drivers/net/mlx5/mlx5_rxq.c | 9 +++++++- drivers/net/mlx5/mlx5_txpp.c | 15 ++++++++++-- drivers/net/mlx5/mlx5_txq.c | 45 ++++++++++++++++++++++++++++-------- 8 files changed, 82 insertions(+), 21 deletions(-) diff --git a/drivers/common/mlx5/mlx5_devx_cmds.c b/drivers/common/mlx5/mlx5_devx_cmds.c index e5acfa3..d97e700 100644 --- a/drivers/common/mlx5/mlx5_devx_cmds.c +++ b/drivers/common/mlx5/mlx5_devx_cmds.c @@ -5,6 +5,7 @@ #include #include +#include #include "mlx5_prm.h" #include "mlx5_devx_cmds.h" @@ -222,7 +223,13 @@ mlx5_devx_cmd_mkey_create(void *ctx, return NULL; } memset(in, 0, in_size_dw * 4); - pgsize = sysconf(_SC_PAGESIZE); + pgsize = rte_mem_page_size(); + if (pgsize == (size_t)-1) { + mlx5_free(mkey); + DRV_LOG(ERR, "Failed to get page size"); + rte_errno = ENOMEM; + return NULL; + } MLX5_SET(create_mkey_in, in, opcode, MLX5_CMD_OP_CREATE_MKEY); mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry); if (klm_num > 0) { diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h index aba0368..83fe3af 100644 --- a/drivers/common/mlx5/mlx5_prm.h +++ b/drivers/common/mlx5/mlx5_prm.h @@ -267,10 +267,10 @@ #define MLX5_MAX_LOG_RQ_SEGS 5u /* The alignment needed for WQ buffer. */ -#define MLX5_WQE_BUF_ALIGNMENT sysconf(_SC_PAGESIZE) +#define MLX5_WQE_BUF_ALIGNMENT rte_mem_page_size() /* The alignment needed for CQ buffer. */ -#define MLX5_CQE_BUF_ALIGNMENT sysconf(_SC_PAGESIZE) +#define MLX5_CQE_BUF_ALIGNMENT rte_mem_page_size() /* Completion mode. */ enum mlx5_completion_mode { diff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c index bf1c750..292062e 100644 --- a/drivers/net/mlx5/linux/mlx5_os.c +++ b/drivers/net/mlx5/linux/mlx5_os.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include @@ -37,6 +36,7 @@ #include #include #include +#include #include #include @@ -134,7 +134,7 @@ mlx5_os_get_dev_attr(void *ctx, struct mlx5_dev_attr *device_attr) * Verbs callback to allocate a memory. This function should allocate the space * according to the size provided residing inside a huge page. * Please note that all allocation must respect the alignment from libmlx5 - * (i.e. currently sysconf(_SC_PAGESIZE)). + * (i.e. currently rte_mem_page_size()). * * @param[in] size * The size in bytes of the memory to allocate. @@ -149,8 +149,13 @@ mlx5_alloc_verbs_buf(size_t size, void *data) { struct mlx5_priv *priv = data; void *ret; - size_t alignment = sysconf(_SC_PAGESIZE); unsigned int socket = SOCKET_ID_ANY; + size_t alignment = rte_mem_page_size(); + if (alignment == (size_t)-1) { + DRV_LOG(ERR, "Failed to get mem page size"); + rte_errno = ENOMEM; + return NULL; + } if (priv->verbs_alloc_ctx.type == MLX5_VERBS_ALLOC_TYPE_TX_QUEUE) { const struct mlx5_txq_ctrl *ctrl = priv->verbs_alloc_ctx.obj; diff --git a/drivers/net/mlx5/linux/mlx5_verbs.c b/drivers/net/mlx5/linux/mlx5_verbs.c index 6b59fa1..5ac6982 100644 --- a/drivers/net/mlx5/linux/mlx5_verbs.c +++ b/drivers/net/mlx5/linux/mlx5_verbs.c @@ -7,7 +7,6 @@ #include #include #include -#include #include /* Verbs header. */ diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c index 0b36ec3..4121f9d 100644 --- a/drivers/net/mlx5/mlx5_flow_dv.c +++ b/drivers/net/mlx5/mlx5_flow_dv.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include @@ -4177,7 +4178,13 @@ flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n) MLX5_COUNTERS_PER_POOL + sizeof(struct mlx5_counter_stats_raw)) * raws_n + sizeof(struct mlx5_counter_stats_mem_mng); - uint8_t *mem = mlx5_malloc(MLX5_MEM_ZERO, size, sysconf(_SC_PAGESIZE), + size_t pgsize = rte_mem_page_size(); + if (pgsize == (size_t)-1) { + DRV_LOG(ERR, "Failed to get mem page size"); + rte_errno = ENOMEM; + return NULL; + } + uint8_t *mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY); int i; diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index 67d996c..9e7df8e 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include @@ -1233,8 +1234,14 @@ mlx5_devx_rq_new(struct rte_eth_dev *dev, uint16_t idx, uint32_t cqn) /* Calculate and allocate WQ memory space. */ wqe_size = 1 << log_wqe_size; /* round up power of two.*/ wq_size = wqe_n * wqe_size; + size_t alignment = MLX5_WQE_BUF_ALIGNMENT; + if (alignment == (size_t)-1) { + DRV_LOG(ERR, "Failed to get mem page size"); + rte_errno = ENOMEM; + return NULL; + } buf = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, wq_size, - MLX5_WQE_BUF_ALIGNMENT, rxq_ctrl->socket); + alignment, rxq_ctrl->socket); if (!buf) return NULL; rxq_data->wqes = buf; diff --git a/drivers/net/mlx5/mlx5_txpp.c b/drivers/net/mlx5/mlx5_txpp.c index f840551..14d4a66 100644 --- a/drivers/net/mlx5/mlx5_txpp.c +++ b/drivers/net/mlx5/mlx5_txpp.c @@ -10,6 +10,7 @@ #include #include #include +#include #include @@ -249,10 +250,15 @@ mlx5_txpp_create_rearm_queue(struct mlx5_dev_ctx_shared *sh) struct mlx5_devx_modify_sq_attr msq_attr = { 0 }; struct mlx5_devx_cq_attr cq_attr = { 0 }; struct mlx5_txpp_wq *wq = &sh->txpp.rearm_queue; - size_t page_size = sysconf(_SC_PAGESIZE); + size_t page_size; uint32_t umem_size, umem_dbrec; int ret; + page_size = rte_mem_page_size(); + if (page_size == (size_t)-1) { + DRV_LOG(ERR, "Failed to get mem page size"); + return -ENOMEM; + } /* Allocate memory buffer for CQEs and doorbell record. */ umem_size = sizeof(struct mlx5_cqe) * MLX5_TXPP_REARM_CQ_SIZE; umem_dbrec = RTE_ALIGN(umem_size, MLX5_DBR_SIZE); @@ -472,10 +478,15 @@ mlx5_txpp_create_clock_queue(struct mlx5_dev_ctx_shared *sh) struct mlx5_devx_modify_sq_attr msq_attr = { 0 }; struct mlx5_devx_cq_attr cq_attr = { 0 }; struct mlx5_txpp_wq *wq = &sh->txpp.clock_queue; - size_t page_size = sysconf(_SC_PAGESIZE); + size_t page_size; uint32_t umem_size, umem_dbrec; int ret; + page_size = rte_mem_page_size(); + if (page_size == (size_t)-1) { + DRV_LOG(ERR, "Failed to get mem page size"); + return -ENOMEM; + } sh->txpp.tsa = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, MLX5_TXPP_REARM_SQ_SIZE * sizeof(struct mlx5_txpp_ts), diff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c index 4a73299..46034b5 100644 --- a/drivers/net/mlx5/mlx5_txq.c +++ b/drivers/net/mlx5/mlx5_txq.c @@ -8,7 +8,6 @@ #include #include #include -#include #include /* Verbs header. */ @@ -26,6 +25,7 @@ #include #include #include +#include #include #include @@ -344,10 +344,14 @@ txq_uar_init(struct mlx5_txq_ctrl *txq_ctrl) { struct mlx5_priv *priv = txq_ctrl->priv; struct mlx5_proc_priv *ppriv = MLX5_PROC_PRIV(PORT_ID(priv)); - const size_t page_size = sysconf(_SC_PAGESIZE); #ifndef RTE_ARCH_64 unsigned int lock_idx; #endif + const size_t page_size = rte_mem_page_size(); + if (page_size == (size_t)-1) { + DRV_LOG(ERR, "Failed to get mem page size"); + rte_errno = ENOMEM; + } if (txq_ctrl->type != MLX5_TXQ_TYPE_STANDARD) return; @@ -386,7 +390,12 @@ txq_uar_init_secondary(struct mlx5_txq_ctrl *txq_ctrl, int fd) void *addr; uintptr_t uar_va; uintptr_t offset; - const size_t page_size = sysconf(_SC_PAGESIZE); + const size_t page_size = rte_mem_page_size(); + if (page_size == (size_t)-1) { + DRV_LOG(ERR, "Failed to get mem page size"); + rte_errno = ENOMEM; + return -rte_errno; + } if (txq_ctrl->type != MLX5_TXQ_TYPE_STANDARD) return 0; @@ -397,9 +406,9 @@ txq_uar_init_secondary(struct mlx5_txq_ctrl *txq_ctrl, int fd) */ uar_va = (uintptr_t)txq_ctrl->bf_reg; offset = uar_va & (page_size - 1); /* Offset in page. */ - addr = mmap(NULL, page_size, PROT_WRITE, MAP_SHARED, fd, - txq_ctrl->uar_mmap_offset); - if (addr == MAP_FAILED) { + addr = rte_mem_map(NULL, page_size, RTE_PROT_WRITE, RTE_MAP_SHARED, + fd, txq_ctrl->uar_mmap_offset); + if (!addr) { DRV_LOG(ERR, "port %u mmap failed for BF reg of txq %u", txq->port_id, txq->idx); @@ -422,13 +431,17 @@ static void txq_uar_uninit_secondary(struct mlx5_txq_ctrl *txq_ctrl) { struct mlx5_proc_priv *ppriv = MLX5_PROC_PRIV(PORT_ID(txq_ctrl->priv)); - const size_t page_size = sysconf(_SC_PAGESIZE); void *addr; + const size_t page_size = rte_mem_page_size(); + if (page_size == (size_t)-1) { + DRV_LOG(ERR, "Failed to get mem page size"); + rte_errno = ENOMEM; + } if (txq_ctrl->type != MLX5_TXQ_TYPE_STANDARD) return; addr = ppriv->uar_table[txq_ctrl->txq.idx]; - munmap(RTE_PTR_ALIGN_FLOOR(addr, page_size), page_size); + rte_mem_unmap(RTE_PTR_ALIGN_FLOOR(addr, page_size), page_size); } /** @@ -642,13 +655,19 @@ mlx5_txq_obj_devx_new(struct rte_eth_dev *dev, uint16_t idx) struct mlx5_devx_modify_sq_attr msq_attr = { 0 }; struct mlx5_devx_cq_attr cq_attr = { 0 }; struct mlx5_txq_obj *txq_obj = NULL; - size_t page_size = sysconf(_SC_PAGESIZE); + size_t page_size; struct mlx5_cqe *cqe; uint32_t i, nqe; int ret = 0; MLX5_ASSERT(txq_data); MLX5_ASSERT(!txq_ctrl->obj); + page_size = rte_mem_page_size(); + if (page_size == (size_t)-1) { + DRV_LOG(ERR, "Failed to get mem page size"); + rte_errno = ENOMEM; + return NULL; + } txq_obj = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, sizeof(struct mlx5_txq_obj), 0, txq_ctrl->socket); @@ -674,9 +693,15 @@ mlx5_txq_obj_devx_new(struct rte_eth_dev *dev, uint16_t idx) goto error; } /* Allocate memory buffer for CQEs. */ + size_t alignment = MLX5_CQE_BUF_ALIGNMENT; + if (alignment == (size_t)-1) { + DRV_LOG(ERR, "Failed to get mem page size"); + rte_errno = ENOMEM; + goto error; + } txq_obj->cq_buf = mlx5_malloc(MLX5_MEM_RTE | MLX5_MEM_ZERO, nqe * sizeof(struct mlx5_cqe), - MLX5_CQE_BUF_ALIGNMENT, + alignment, sh->numa_node); if (!txq_obj->cq_buf) { DRV_LOG(ERR, -- 2.8.4