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From: Wei Zhao <wei.zhao1@intel.com>
To: dev@dpdk.org
Cc: qi.z.zhang@intel.com, Wei Zhao <wei.zhao1@intel.com>
Subject: [dpdk-dev] [PATCH v2] net/ice: fix FDIR GTPU rule create fail
Date: Thu, 30 Jul 2020 17:28:01 +0800	[thread overview]
Message-ID: <20200730092801.31771-1-wei.zhao1@intel.com> (raw)
In-Reply-To: <20200730083034.21616-1-wei.zhao1@intel.com>

For GTPU rule without extend header the trainning packet
for FDIR is different. This patch enable these case.

Fixes: 934fd00c9389 ("net/ice/base: fix GTPU IP hash")

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
---
 drivers/net/ice/base/ice_fdir.c   | 63 +++++++++++++++++++++++-
 drivers/net/ice/base/ice_type.h   |  2 +
 drivers/net/ice/ice_fdir_filter.c | 80 +++++++++++++------------------
 3 files changed, 97 insertions(+), 48 deletions(-)

diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c
index 2c47fb57b..a904ff513 100644
--- a/drivers/net/ice/base/ice_fdir.c
+++ b/drivers/net/ice/base/ice_fdir.c
@@ -89,6 +89,37 @@ static const u8 ice_fdir_icmp4_gtpu4_pkt[] = {
 };
 
 static const u8 ice_fdir_ipv4_gtpu4_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
+	0x00, 0x44, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x00,
+	0x00, 0x00, 0x33, 0xff, 0x00, 0x20, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x45, 0x00,
+	0x00, 0x14, 0x00, 0x00, 0x40, 0x00, 0x40, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv6_gtpu6_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, 0x60, 0x00,
+	0x00, 0x00, 0x00, 0x44, 0x11, 0x40, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x08, 0x68,
+	0x08, 0x68, 0x00, 0x44, 0x7f, 0xed, 0x33, 0xff,
+	0x00, 0x34, 0x12, 0x34, 0x56, 0x78, 0x00, 0x00,
+	0x00, 0x85, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x3b, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00,
+};
+
+static const u8 ice_fdir_ipv4_gtpu4_eh_pkt[] = {
 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00,
 	0x00, 0x44, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11,
@@ -102,7 +133,7 @@ static const u8 ice_fdir_ipv4_gtpu4_pkt[] = {
 	0x00, 0x00,
 };
 
-static const u8 ice_fdir_ipv6_gtpu6_pkt[] = {
+static const u8 ice_fdir_ipv6_gtpu6_eh_pkt[] = {
 	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 	0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, 0x60, 0x00,
 	0x00, 0x00, 0x00, 0x44, 0x11, 0x40, 0x00, 0x00,
@@ -492,6 +523,20 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = {
 		sizeof(ice_fdir_ipv6_gtpu6_pkt),
 		ice_fdir_ipv6_gtpu6_pkt,
 	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV4_OTHER,
+		sizeof(ice_fdir_ipv4_gtpu4_eh_pkt),
+		ice_fdir_ipv4_gtpu4_eh_pkt,
+		sizeof(ice_fdir_ipv4_gtpu4_eh_pkt),
+		ice_fdir_ipv4_gtpu4_eh_pkt,
+	},
+	{
+		ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH_IPV6_OTHER,
+		sizeof(ice_fdir_ipv6_gtpu6_eh_pkt),
+		ice_fdir_ipv6_gtpu6_eh_pkt,
+		sizeof(ice_fdir_ipv6_gtpu6_eh_pkt),
+		ice_fdir_ipv6_gtpu6_eh_pkt,
+	},
 	{
 		ICE_FLTR_PTYPE_NONF_IPV4_L2TPV3,
 		sizeof(ice_fdir_ipv4_l2tpv3_pkt), ice_fdir_ipv4_l2tpv3_pkt,
@@ -1053,6 +1098,14 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
 	case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP:
 	case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP:
 	case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER:
+		ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET,
+				   input->ip.v4.src_ip);
+		ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
+				   input->ip.v4.dst_ip);
+		ice_pkt_insert_u32(loc, ICE_IPV4_GTPU_TEID_OFFSET,
+				   input->gtpu_data.teid);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV4_OTHER:
 		ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET,
 				   input->ip.v4.src_ip);
 		ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET,
@@ -1063,6 +1116,14 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input,
 				      input->gtpu_data.qfi);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_GTPU_IPV6_OTHER:
+		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
+					 input->ip.v6.src_ip);
+		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
+					 input->ip.v6.dst_ip);
+		ice_pkt_insert_u32(loc, ICE_IPV6_GTPU_TEID_OFFSET,
+				   input->gtpu_data.teid);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH_IPV6_OTHER:
 		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET,
 					 input->ip.v6.src_ip);
 		ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET,
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index c13cd7b00..3775689a9 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -297,6 +297,8 @@ enum ice_fltr_ptype {
 	ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP,
 	ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER,
 	ICE_FLTR_PTYPE_NONF_IPV6_GTPU_IPV6_OTHER,
+	ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV4_OTHER,
+	ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH_IPV6_OTHER,
 	ICE_FLTR_PTYPE_NONF_IPV4_L2TPV3,
 	ICE_FLTR_PTYPE_NONF_IPV6_L2TPV3,
 	ICE_FLTR_PTYPE_NONF_IPV4_ESP,
diff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c
index 745d7291a..c59fe46b9 100644
--- a/drivers/net/ice/ice_fdir_filter.c
+++ b/drivers/net/ice/ice_fdir_filter.c
@@ -778,30 +778,15 @@ ice_fdir_cross_prof_conflict(struct ice_pf *pf,
 			goto err;
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER:
-		cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER;
+		cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP;
 		if (!ice_fdir_prof_resolve_conflict
 			(pf, cflct_ptype, is_tunnel))
 			goto err;
-		cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER;
+		cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP;
 		if (!ice_fdir_prof_resolve_conflict
 			(pf, cflct_ptype, is_tunnel))
 			goto err;
-		cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER;
-		if (!ice_fdir_prof_resolve_conflict
-			(pf, cflct_ptype, is_tunnel))
-			goto err;
-		break;
-	/* IPv6 GTPU */
-	case ICE_FLTR_PTYPE_NONF_IPV6_GTPU_IPV6_OTHER:
-		cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV6_GTPU_IPV6_OTHER;
-		if (!ice_fdir_prof_resolve_conflict
-			(pf, cflct_ptype, is_tunnel))
-			goto err;
-		cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV6_GTPU_IPV6_OTHER;
-		if (!ice_fdir_prof_resolve_conflict
-			(pf, cflct_ptype, is_tunnel))
-			goto err;
-		cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV6_GTPU_IPV6_OTHER;
+		cflct_ptype = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP;
 		if (!ice_fdir_prof_resolve_conflict
 			(pf, cflct_ptype, is_tunnel))
 			goto err;
@@ -1025,30 +1010,26 @@ ice_fdir_input_set_conf(struct ice_pf *pf, enum ice_fltr_ptype flow,
 	case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP:
 	case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP:
 	case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER:
-		if (ttype == ICE_FDIR_TUNNEL_TYPE_GTPU)
-			ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_IP |
-					  ICE_FLOW_SEG_HDR_IPV4 |
-					  ICE_FLOW_SEG_HDR_IPV_OTHER);
-		else if (ttype == ICE_FDIR_TUNNEL_TYPE_GTPU_EH)
-			ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_EH |
-					  ICE_FLOW_SEG_HDR_GTPU_IP |
-					  ICE_FLOW_SEG_HDR_IPV4 |
-					  ICE_FLOW_SEG_HDR_IPV_OTHER);
-		else
-			PMD_DRV_LOG(ERR, "not supported tunnel type.");
+		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_IP |
+				  ICE_FLOW_SEG_HDR_IPV4 |
+				  ICE_FLOW_SEG_HDR_IPV_OTHER);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV4_OTHER:
+		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_EH |
+				  ICE_FLOW_SEG_HDR_GTPU_IP |
+				  ICE_FLOW_SEG_HDR_IPV4 |
+				  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		break;
 	case ICE_FLTR_PTYPE_NONF_IPV6_GTPU_IPV6_OTHER:
-		if (ttype == ICE_FDIR_TUNNEL_TYPE_GTPU)
-			ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_IP |
-					  ICE_FLOW_SEG_HDR_IPV6 |
-					  ICE_FLOW_SEG_HDR_IPV_OTHER);
-		else if (ttype == ICE_FDIR_TUNNEL_TYPE_GTPU_EH)
-			ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_EH |
-					  ICE_FLOW_SEG_HDR_GTPU_IP |
-					  ICE_FLOW_SEG_HDR_IPV6 |
-					  ICE_FLOW_SEG_HDR_IPV_OTHER);
-		else
-			PMD_DRV_LOG(ERR, "not supported tunnel type.");
+		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_IP |
+				  ICE_FLOW_SEG_HDR_IPV6 |
+				  ICE_FLOW_SEG_HDR_IPV_OTHER);
+		break;
+	case ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH_IPV6_OTHER:
+		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_GTPU_EH |
+				  ICE_FLOW_SEG_HDR_GTPU_IP |
+				  ICE_FLOW_SEG_HDR_IPV6 |
+				  ICE_FLOW_SEG_HDR_IPV_OTHER);
 		break;
 	case ICE_FLTR_PTYPE_NON_IP_L2:
 		ICE_FLOW_SET_HDRS(seg, ICE_FLOW_SEG_HDR_ETH_NON_IP);
@@ -2007,13 +1988,18 @@ ice_fdir_parse_pattern(__rte_unused struct ice_adapter *ad,
 		}
 	}
 
-	if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_GTPU ||
-	    tunnel_type == ICE_FDIR_TUNNEL_TYPE_GTPU_EH) {
-		if (flow_type == ICE_FLTR_PTYPE_NONF_IPV4_UDP)
-			flow_type = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER;
-		else
-			flow_type = ICE_FLTR_PTYPE_NONF_IPV6_GTPU_IPV6_OTHER;
-	}
+	if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_GTPU &&
+		flow_type == ICE_FLTR_PTYPE_NONF_IPV4_UDP)
+		flow_type = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER;
+	else if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_GTPU_EH &&
+		flow_type == ICE_FLTR_PTYPE_NONF_IPV4_UDP)
+		flow_type = ICE_FLTR_PTYPE_NONF_IPV4_GTPU_EH_IPV4_OTHER;
+	else if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_GTPU &&
+		flow_type == ICE_FLTR_PTYPE_NONF_IPV6_UDP)
+		flow_type = ICE_FLTR_PTYPE_NONF_IPV6_GTPU_IPV6_OTHER;
+	else if (tunnel_type == ICE_FDIR_TUNNEL_TYPE_GTPU_EH &&
+		flow_type == ICE_FLTR_PTYPE_NONF_IPV4_UDP)
+		flow_type = ICE_FLTR_PTYPE_NONF_IPV6_GTPU_EH_IPV6_OTHER;
 
 	filter->tunnel_type = tunnel_type;
 	filter->input.flow_type = flow_type;
-- 
2.19.1


  parent reply	other threads:[~2020-07-30  9:54 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-30  8:30 [dpdk-dev] [PATCH] " Wei Zhao
2020-07-30  9:26 ` Huang, ZhiminX
2020-07-30  9:28 ` Wei Zhao [this message]
2020-07-30 10:11   ` [dpdk-dev] [PATCH v2] " Zhao1, Wei
2020-07-31  1:24   ` Huang, ZhiminX
2020-08-28  1:11   ` [dpdk-dev] [PATCH v3] " Wei Zhao
2020-08-31  6:58     ` [dpdk-dev] [PATCH v4] " Wei Zhao
2020-08-31  7:36       ` Zhang, Qi Z
2020-08-31  8:32       ` Huang, ZhiminX

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