From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 50D2BA04B0; Fri, 7 Aug 2020 18:06:30 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 81ACE2BF1; Fri, 7 Aug 2020 18:06:29 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id C295D2B84 for ; Fri, 7 Aug 2020 18:06:27 +0200 (CEST) IronPort-SDR: qSoud/ESgQ2NlscqugbqIwxavKSE47S5tUkvyTEXj0VwUZM5OK1UMKHkKrLQ880kaCkNhlMGff Eq1BErUa0Myw== X-IronPort-AV: E=McAfee;i="6000,8403,9705"; a="171183016" X-IronPort-AV: E=Sophos;i="5.75,446,1589266800"; d="scan'208";a="171183016" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Aug 2020 09:06:26 -0700 IronPort-SDR: CwGNUE8j1xsAuJix2d3SwGnsJFJHNDLtJXVYcE9Ys9lKbrz17ti0Q1WgFvIK//lqGbL7SKJf64 ns0FpkEsZIWg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,446,1589266800"; d="scan'208";a="275407853" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 07 Aug 2020 09:06:25 -0700 From: Ciara Power To: dev@dpdk.org Cc: bruce.richardson@intel.com, Ciara Power Date: Fri, 7 Aug 2020 16:58:47 +0100 Message-Id: <20200807155859.63888-1-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 Subject: [dpdk-dev] [PATCH 20.11 00/12] add max SIMD bitwidth to EAL X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" A number of components in DPDK have optional AVX-512 or other vector code paths which can be selected at runtime. Rather than having each component provide its own mechanism to select a code path, this patchset adds support for a single setting to control what code paths are used. This can be used to enable some non-default code paths e.g. ones using AVX-512, but also to limit the code paths to certain vector widths, or to scalar code only, which is useful for testing. The max SIMD bitwidth setting can be set by the app itself through use of the available API, or can be overriden by a commandline argument passed by the user. Ciara Power (12): eal: add max SIMD bitwidth eal: add default SIMD bitwidth values net/i40e: add checks for max SIMD bitwidth net/axgbe: add checks for max SIMD bitwidth net/bnxt: add checks for max SIMD bitwidth net/enic: add checks for max SIMD bitwidth net/fm10k: add checks for max SIMD bitwidth net/iavf: add checks for max SIMD bitwidth net/ice: add checks for max SIMD bitwidth net/ixgbe: add checks for max SIMD bitwidth net/mlx5: add checks for max SIMD bitwidth net/virtio: add checks for max SIMD bitwidth drivers/net/axgbe/axgbe_rxtx.c | 3 +- drivers/net/bnxt/bnxt_ethdev.c | 6 ++- drivers/net/enic/enic_rxtx_vec_avx2.c | 3 +- drivers/net/fm10k/fm10k_ethdev.c | 11 ++-- drivers/net/i40e/i40e_rxtx.c | 19 ++++--- drivers/net/iavf/iavf_rxtx.c | 16 +++--- drivers/net/ice/ice_rxtx.c | 20 ++++--- drivers/net/ixgbe/ixgbe_rxtx.c | 7 ++- drivers/net/mlx5/mlx5_ethdev.c | 3 +- drivers/net/virtio/virtio_ethdev.c | 12 +++-- lib/librte_eal/arm/include/rte_vect.h | 2 + lib/librte_eal/common/eal_common_options.c | 63 ++++++++++++++++++++++ lib/librte_eal/common/eal_internal_cfg.h | 8 +++ lib/librte_eal/common/eal_options.h | 2 + lib/librte_eal/include/generic/rte_vect.h | 2 + lib/librte_eal/include/rte_eal.h | 31 +++++++++++ lib/librte_eal/ppc/include/rte_vect.h | 2 + lib/librte_eal/rte_eal_version.map | 4 ++ lib/librte_eal/x86/include/rte_vect.h | 2 + 19 files changed, 184 insertions(+), 32 deletions(-) -- 2.17.1