From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7FE9EA04B0; Fri, 7 Aug 2020 18:08:19 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D088D1C11B; Fri, 7 Aug 2020 18:06:44 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id A6A101C112 for ; Fri, 7 Aug 2020 18:06:40 +0200 (CEST) IronPort-SDR: 4I1EF1vgQJ4c83cNekAwox+YgllgTvxqH+t2fNrIhmyURwTVMC2gcKMjZ/MSairUlon5YEKz9r IxhqqYusGcgA== X-IronPort-AV: E=McAfee;i="6000,8403,9705"; a="171183112" X-IronPort-AV: E=Sophos;i="5.75,446,1589266800"; d="scan'208";a="171183112" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Aug 2020 09:06:40 -0700 IronPort-SDR: H1m5soCi7SJL12c2EWEJ9jyPLn2PeUSMWb0rGI+6OiKb88CadP54Q9VhZuoEdxk2pDWiR2IiPp FvTxBENQIzkA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,446,1589266800"; d="scan'208";a="275407932" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga007.fm.intel.com with ESMTP; 07 Aug 2020 09:06:39 -0700 From: Ciara Power To: dev@dpdk.org Cc: bruce.richardson@intel.com, Ciara Power , Wei Zhao , Jeff Guo Date: Fri, 7 Aug 2020 16:58:57 +0100 Message-Id: <20200807155859.63888-11-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200807155859.63888-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH 20.11 10/12] net/ixgbe: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: Wei Zhao Cc: Jeff Guo Signed-off-by: Ciara Power --- drivers/net/ixgbe/ixgbe_rxtx.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c index 977ecf5137..eadc7183f2 100644 --- a/drivers/net/ixgbe/ixgbe_rxtx.c +++ b/drivers/net/ixgbe/ixgbe_rxtx.c @@ -2503,7 +2503,9 @@ ixgbe_set_tx_function(struct rte_eth_dev *dev, struct ixgbe_tx_queue *txq) dev->tx_pkt_prepare = NULL; if (txq->tx_rs_thresh <= RTE_IXGBE_TX_MAX_FREE_BUF_SZ && (rte_eal_process_type() != RTE_PROC_PRIMARY || - ixgbe_txq_vec_setup(txq) == 0)) { + ixgbe_txq_vec_setup(txq) == 0) && + rte_get_max_simd_bitwidth() + >= RTE_MAX_128_SIMD) { PMD_INIT_LOG(DEBUG, "Vector tx enabled."); dev->tx_pkt_burst = ixgbe_xmit_pkts_vec; } else @@ -4743,7 +4745,8 @@ ixgbe_set_rx_function(struct rte_eth_dev *dev) * conditions to be met and Rx Bulk Allocation should be allowed. */ if (ixgbe_rx_vec_dev_conf_condition_check(dev) || - !adapter->rx_bulk_alloc_allowed) { + !adapter->rx_bulk_alloc_allowed || + rte_get_max_simd_bitwidth() < RTE_MAX_128_SIMD) { PMD_INIT_LOG(DEBUG, "Port[%d] doesn't meet Vector Rx " "preconditions", dev->data->port_id); -- 2.17.1