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From: Ciara Power <ciara.power@intel.com>
To: dev@dpdk.org
Cc: bruce.richardson@intel.com, Ciara Power <ciara.power@intel.com>,
Wei Zhao <wei.zhao1@intel.com>, Jeff Guo <jia.guo@intel.com>
Date: Fri, 7 Aug 2020 16:58:57 +0100
Message-Id: <20200807155859.63888-11-ciara.power@intel.com>
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Subject: [dpdk-dev] [PATCH 20.11 10/12] net/ixgbe: add checks for max SIMD
bitwidth
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When choosing a vector path to take, an extra condition must be
satisfied to ensure the max SIMD bitwidth allows for the CPU enabled
path.
Cc: Wei Zhao <wei.zhao1@intel.com>
Cc: Jeff Guo <jia.guo@intel.com>
Signed-off-by: Ciara Power <ciara.power@intel.com>
---
drivers/net/ixgbe/ixgbe_rxtx.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index 977ecf5137..eadc7183f2 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -2503,7 +2503,9 @@ ixgbe_set_tx_function(struct rte_eth_dev *dev, struct ixgbe_tx_queue *txq)
dev->tx_pkt_prepare = NULL;
if (txq->tx_rs_thresh <= RTE_IXGBE_TX_MAX_FREE_BUF_SZ &&
(rte_eal_process_type() != RTE_PROC_PRIMARY ||
- ixgbe_txq_vec_setup(txq) == 0)) {
+ ixgbe_txq_vec_setup(txq) == 0) &&
+ rte_get_max_simd_bitwidth()
+ >= RTE_MAX_128_SIMD) {
PMD_INIT_LOG(DEBUG, "Vector tx enabled.");
dev->tx_pkt_burst = ixgbe_xmit_pkts_vec;
} else
@@ -4743,7 +4745,8 @@ ixgbe_set_rx_function(struct rte_eth_dev *dev)
* conditions to be met and Rx Bulk Allocation should be allowed.
*/
if (ixgbe_rx_vec_dev_conf_condition_check(dev) ||
- !adapter->rx_bulk_alloc_allowed) {
+ !adapter->rx_bulk_alloc_allowed ||
+ rte_get_max_simd_bitwidth() < RTE_MAX_128_SIMD) {
PMD_INIT_LOG(DEBUG, "Port[%d] doesn't meet Vector Rx "
"preconditions",
dev->data->port_id);
--
2.17.1