From: <kirankumark@marvell.com>
To: Jerin Jacob <jerinj@marvell.com>,
Nithin Dabilpuram <ndabilpuram@marvell.com>,
Kiran Kumar K <kirankumark@marvell.com>
Cc: <dev@dpdk.org>
Subject: [dpdk-dev] [PATCH] net/octeontx2: set max vtag insertion size
Date: Fri, 21 Aug 2020 12:29:30 +0530 [thread overview]
Message-ID: <20200821065930.191028-1-kirankumark@marvell.com> (raw)
From: Kiran Kumar K <kirankumark@marvell.com>
When TX side VTAG insertion is enabled, As we are not setting the max
vtag insertion size an interrupt has been received. This patch will fix
the issue by configuring the max vtag insertion size to 8B.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
---
drivers/net/octeontx2/otx2_tm.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/net/octeontx2/otx2_tm.c b/drivers/net/octeontx2/otx2_tm.c
index 8ed059549..b76242a60 100644
--- a/drivers/net/octeontx2/otx2_tm.c
+++ b/drivers/net/octeontx2/otx2_tm.c
@@ -560,8 +560,9 @@ populate_tm_reg(struct otx2_eth_dev *dev,
* smaller
*/
reg[k] = NIX_AF_SMQX_CFG(schq);
- regval[k] = BIT_ULL(50) | NIX_MIN_HW_FRS;
- regval_mask[k] = ~(BIT_ULL(50) | 0x7f);
+ regval[k] = BIT_ULL(50) | ((uint64_t)NIX_MAX_VTAG_INS << 36) |
+ NIX_MIN_HW_FRS;
+ regval_mask[k] = ~(BIT_ULL(50) | (0x7ULL << 36) | 0x7f);
k++;
/* Parent and schedule conf */
--
2.25.1
next reply other threads:[~2020-08-21 6:59 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-21 6:59 kirankumark [this message]
2020-09-29 8:03 ` Jerin Jacob
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