From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 5FAE8A04B1; Tue, 25 Aug 2020 13:53:35 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C6B9E1C1AE; Tue, 25 Aug 2020 13:53:30 +0200 (CEST) Received: from mail.chinasoftinc.com (unknown [114.113.233.8]) by dpdk.org (Postfix) with ESMTP id 735F8E07 for ; Tue, 25 Aug 2020 13:53:26 +0200 (CEST) Received: from localhost.localdomain (65.49.108.226) by INCCAS002.ito.icss (10.168.0.60) with Microsoft SMTP Server id 14.3.487.0; Tue, 25 Aug 2020 19:53:19 +0800 From: "Wei Hu (Xavier)" To: CC: , Date: Tue, 25 Aug 2020 19:52:55 +0800 Message-ID: <20200825115305.58490-2-huwei013@chinasoftinc.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200825115305.58490-1-huwei013@chinasoftinc.com> References: <20200825115305.58490-1-huwei013@chinasoftinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [65.49.108.226] Subject: [dpdk-dev] [PATCH 01/11] net/hns3: get device capability from firmware X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: "Wei Hu (Xavier)" This patch adds getting device capabilities from firmware, so driver can supply differnet cpabilities and specifications to upper level applications base on differnet versions of hardware network engine. Signed-off-by: Wei Hu (Xavier) --- drivers/net/hns3/hns3_cmd.c | 36 ++++++++++++++++++++++++++++------ drivers/net/hns3/hns3_cmd.h | 19 +++++++++++++++++- drivers/net/hns3/hns3_ethdev.c | 3 --- drivers/net/hns3/hns3_ethdev.h | 29 +++++++++++++++++++++++++++ 4 files changed, 77 insertions(+), 10 deletions(-) diff --git a/drivers/net/hns3/hns3_cmd.c b/drivers/net/hns3/hns3_cmd.c index cbb09887c..0299072ef 100644 --- a/drivers/net/hns3/hns3_cmd.c +++ b/drivers/net/hns3/hns3_cmd.c @@ -426,8 +426,29 @@ hns3_cmd_send(struct hns3_hw *hw, struct hns3_cmd_desc *desc, int num) return retval; } +static void hns3_parse_capability(struct hns3_hw *hw, + struct hns3_query_version_cmd *cmd) +{ + uint32_t caps = rte_le_to_cpu_32(cmd->caps[0]); + + if (hns3_get_bit(caps, HNS3_CAPS_UDP_GSO_B)) + hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_UDP_GSO_B, 1); + if (hns3_get_bit(caps, HNS3_CAPS_ADQ_B)) + hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_ADQ_B, 1); + if (hns3_get_bit(caps, HNS3_CAPS_PTP_B)) + hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_PTP_B, 1); + if (hns3_get_bit(caps, HNS3_CAPS_TX_PUSH_B)) + hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_TX_PUSH_B, 1); + if (hns3_get_bit(caps, HNS3_CAPS_PHY_IMP_B)) + hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_COPPER_B, 1); + if (hns3_get_bit(caps, HNS3_CAPS_TQP_TXRX_INDEP_B)) + hns3_set_bit(hw->capability, HNS3_CAPS_TQP_TXRX_INDEP_B, 1); + if (hns3_get_bit(caps, HNS3_CAPS_STASH_B)) + hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_STASH_B, 1); +} + static enum hns3_cmd_status -hns3_cmd_query_firmware_version(struct hns3_hw *hw, uint32_t *version) +hns3_cmd_query_firmware_version_and_capability(struct hns3_hw *hw) { struct hns3_query_version_cmd *resp; struct hns3_cmd_desc desc; @@ -438,10 +459,13 @@ hns3_cmd_query_firmware_version(struct hns3_hw *hw, uint32_t *version) /* Initialize the cmd function */ ret = hns3_cmd_send(hw, &desc, 1); - if (ret == 0) - *version = rte_le_to_cpu_32(resp->firmware); + if (ret) + return ret; - return ret; + hw->fw_version = rte_le_to_cpu_32(resp->firmware); + hns3_parse_capability(hw, resp); + + return 0; } int @@ -519,13 +543,13 @@ hns3_cmd_init(struct hns3_hw *hw) } rte_atomic16_clear(&hw->reset.disable_cmd); - ret = hns3_cmd_query_firmware_version(hw, &version); + ret = hns3_cmd_query_firmware_version_and_capability(hw); if (ret) { PMD_INIT_LOG(ERR, "firmware version query failed %d", ret); goto err_cmd_init; } - hw->fw_version = version; + version = hw->fw_version; PMD_INIT_LOG(INFO, "The firmware version is %lu.%lu.%lu.%lu", hns3_get_field(version, HNS3_FW_VERSION_BYTE3_M, HNS3_FW_VERSION_BYTE3_S), diff --git a/drivers/net/hns3/hns3_cmd.h b/drivers/net/hns3/hns3_cmd.h index d70f42e5d..a13b799f4 100644 --- a/drivers/net/hns3/hns3_cmd.h +++ b/drivers/net/hns3/hns3_cmd.h @@ -264,9 +264,26 @@ struct hns3_rx_priv_buff_cmd { #define HNS3_FW_VERSION_BYTE1_M GENMASK(15, 8) #define HNS3_FW_VERSION_BYTE0_S 0 #define HNS3_FW_VERSION_BYTE0_M GENMASK(7, 0) + +enum HNS3_CAPS_BITS { + HNS3_CAPS_UDP_GSO_B, + HNS3_CAPS_ATR_B, + HNS3_CAPS_ADQ_B, + HNS3_CAPS_PTP_B, + HNS3_CAPS_INT_QL_B, + HNS3_CAPS_SIMPLE_BD_B, + HNS3_CAPS_TX_PUSH_B, + HNS3_CAPS_PHY_IMP_B, + HNS3_CAPS_TQP_TXRX_INDEP_B, + HNS3_CAPS_HW_PAD_B, + HNS3_CAPS_STASH_B, +}; +#define HNS3_QUERY_CAP_LENGTH 3 struct hns3_query_version_cmd { uint32_t firmware; - uint32_t firmware_rsv[5]; + uint32_t hardware; + uint32_t rsv; + uint32_t caps[HNS3_QUERY_CAP_LENGTH]; /* capabilities of device */ }; #define HNS3_RX_PRIV_EN_B 15 diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c index fab1914c3..44fd69fa1 100644 --- a/drivers/net/hns3/hns3_ethdev.c +++ b/drivers/net/hns3/hns3_ethdev.c @@ -2837,9 +2837,6 @@ hns3_get_capability(struct hns3_hw *hw) } hw->revision = revision; - if (revision >= PCI_REVISION_ID_HIP09_A) - hns3_set_bit(hw->capability, HNS3_DEV_SUPPORT_COPPER_B, 1); - return 0; } diff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h index 0e665e59b..1914e588d 100644 --- a/drivers/net/hns3/hns3_ethdev.h +++ b/drivers/net/hns3/hns3_ethdev.h @@ -535,13 +535,42 @@ struct hns3_adapter { #define HNS3_DEV_SUPPORT_DCB_B 0x0 #define HNS3_DEV_SUPPORT_COPPER_B 0x1 +#define HNS3_DEV_SUPPORT_UDP_GSO_B 0x2 +#define HNS3_DEV_SUPPORT_ADQ_B 0x3 +#define HNS3_DEV_SUPPORT_PTP_B 0x4 +#define HNS3_DEV_SUPPORT_TX_PUSH_B 0x5 +#define HNS3_DEV_SUPPORT_INDEP_TXRX_B 0x6 +#define HNS3_DEV_SUPPORT_STASH_B 0x7 #define hns3_dev_dcb_supported(hw) \ hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_DCB_B) +/* Support copper media type */ #define hns3_dev_copper_supported(hw) \ hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_COPPER_B) +/* Support UDP GSO offload */ +#define hns3_dev_udp_gso_supported(hw) \ + hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_UDP_GSO_B) + +/* Support Application Device Queue */ +#define hns3_dev_adq_supported(hw) \ + hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_ADQ_B) + +/* Support PTP timestamp offload */ +#define hns3_dev_ptp_supported(hw) \ + hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_PTP_B) + +#define hns3_dev_tx_push_supported(hw) \ + hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_TX_PUSH_B) + +/* Support to Independently enable/disable/reset Tx or Rx queues */ +#define hns3_dev_indep_txrx_supported(hw) \ + hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_INDEP_TXRX_B) + +#define hns3_dev_stash_supported(hw) \ + hns3_get_bit((hw)->capability, HNS3_DEV_SUPPORT_STASH_B) + #define HNS3_DEV_PRIVATE_TO_HW(adapter) \ (&((struct hns3_adapter *)adapter)->hw) #define HNS3_DEV_PRIVATE_TO_ADAPTER(adapter) \ -- 2.27.0