From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B732BA04B1; Wed, 26 Aug 2020 17:19:40 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id BA7A11C1AB; Wed, 26 Aug 2020 17:15:35 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 5D51414583 for ; Wed, 26 Aug 2020 17:15:09 +0200 (CEST) IronPort-SDR: qpWGwJZGu57zJR854N4R403LICoulk3Wk9wpyya59h3cFwYuvT1M+GLGuBKe3kW3cODTld+YCp tfE16fKarmnQ== X-IronPort-AV: E=McAfee;i="6000,8403,9725"; a="153879564" X-IronPort-AV: E=Sophos;i="5.76,356,1592895600"; d="scan'208";a="153879564" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Aug 2020 08:15:08 -0700 IronPort-SDR: 06w5SqNfGCjznC4NZyXSPMyK/1eLQQ7v3uNtNdZFA3ME8qAGOm4qY5CGCARYgQcCHKY/2o/P2L B09HrPHsPrjQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,356,1592895600"; d="scan'208";a="444081379" Received: from silpixa00400573.ir.intel.com (HELO silpixa00400573.ger.corp.intel.com) ([10.237.223.107]) by orsmga004.jf.intel.com with ESMTP; 26 Aug 2020 08:15:08 -0700 From: Cristian Dumitrescu To: dev@dpdk.org Date: Wed, 26 Aug 2020 16:14:26 +0100 Message-Id: <20200826151445.51500-22-cristian.dumitrescu@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200826151445.51500-1-cristian.dumitrescu@intel.com> References: <20200826151445.51500-1-cristian.dumitrescu@intel.com> Subject: [dpdk-dev] [PATCH 21/40] pipeline: introduce shl instruction X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The shl (i.e. shift left) instruction source can be header field (H), meta-data field (M), extern object (E) or function (F) mailbox field, table entry action data field (T) or immediate value (I). The destination is HMEF. Signed-off-by: Cristian Dumitrescu --- lib/librte_pipeline/rte_swx_pipeline.c | 168 +++++++++++++++++++++++++ 1 file changed, 168 insertions(+) diff --git a/lib/librte_pipeline/rte_swx_pipeline.c b/lib/librte_pipeline/rte_swx_pipeline.c index 20a831fb4..c22bc007c 100644 --- a/lib/librte_pipeline/rte_swx_pipeline.c +++ b/lib/librte_pipeline/rte_swx_pipeline.c @@ -327,6 +327,17 @@ enum instruction_type { INSTR_ALU_XOR, /* dst = MEF, src = MEFT */ INSTR_ALU_XOR_S, /* (dst, src) = (MEF, H) or (dst, src) = (H, MEFT) */ INSTR_ALU_XOR_I, /* dst = HMEF, src = I */ + + /* shl dst src + * dst <<= src + * dst = HMEF, src = HMEFTI + */ + INSTR_ALU_SHL, /* dst = MEF, src = MEF */ + INSTR_ALU_SHL_MH, /* dst = MEF, src = H */ + INSTR_ALU_SHL_HM, /* dst = H, src = MEF */ + INSTR_ALU_SHL_HH, /* dst = H, src = H */ + INSTR_ALU_SHL_MI, /* dst = MEF, src = I */ + INSTR_ALU_SHL_HI, /* dst = H, src = I */ }; struct instr_operand { @@ -3094,6 +3105,58 @@ instr_alu_cksub_translate(struct rte_swx_pipeline *p, return 0; } +static int +instr_alu_shl_translate(struct rte_swx_pipeline *p, + struct action *action, + char **tokens, + int n_tokens, + struct instruction *instr, + struct instruction_data *data __rte_unused) +{ + char *dst = tokens[1], *src = tokens[2]; + struct field *fdst, *fsrc; + uint32_t dst_struct_id, src_struct_id, src_val; + + CHECK(n_tokens == 3, EINVAL); + + fdst = struct_field_parse(p, NULL, dst, &dst_struct_id); + CHECK(fdst, EINVAL); + + /* SHL, SHL_HM, SHL_MH, SHL_HH. */ + fsrc = struct_field_parse(p, action, src, &src_struct_id); + if (fsrc) { + instr->type = INSTR_ALU_SHL; + if (dst[0] == 'h' && src[0] == 'm') + instr->type = INSTR_ALU_SHL_HM; + if (dst[0] == 'm' && src[0] == 'h') + instr->type = INSTR_ALU_SHL_MH; + if (dst[0] == 'h' && src[0] == 'h') + instr->type = INSTR_ALU_SHL_HH; + + instr->alu.dst.struct_id = (uint8_t)dst_struct_id; + instr->alu.dst.n_bits = fdst->n_bits; + instr->alu.dst.offset = fdst->offset / 8; + instr->alu.src.struct_id = (uint8_t)src_struct_id; + instr->alu.src.n_bits = fsrc->n_bits; + instr->alu.src.offset = fsrc->offset / 8; + return 0; + } + + /* SHL_MI, SHL_HI. */ + src_val = strtoul(src, &src, 0); + CHECK(!src[0], EINVAL); + + instr->type = INSTR_ALU_SHL_MI; + if (dst[0] == 'h') + instr->type = INSTR_ALU_SHL_HI; + + instr->alu.dst.struct_id = (uint8_t)dst_struct_id; + instr->alu.dst.n_bits = fdst->n_bits; + instr->alu.dst.offset = fdst->offset / 8; + instr->alu.src_val = (uint32_t)src_val; + return 0; +} + static int instr_alu_and_translate(struct rte_swx_pipeline *p, struct action *action, @@ -3421,6 +3484,96 @@ instr_alu_sub_hi_exec(struct rte_swx_pipeline *p) thread_ip_inc(p); } +static inline void +instr_alu_shl_exec(struct rte_swx_pipeline *p) +{ + struct thread *t = &p->threads[p->thread_id]; + struct instruction *ip = t->ip; + + TRACE("[Thread %2u] shl\n", p->thread_id); + + /* Structs. */ + ALU(t, ip, <<); + + /* Thread. */ + thread_ip_inc(p); +} + +static inline void +instr_alu_shl_mh_exec(struct rte_swx_pipeline *p) +{ + struct thread *t = &p->threads[p->thread_id]; + struct instruction *ip = t->ip; + + TRACE("[Thread %2u] shl (mh)\n", p->thread_id); + + /* Structs. */ + ALU_MH(t, ip, <<); + + /* Thread. */ + thread_ip_inc(p); +} + +static inline void +instr_alu_shl_hm_exec(struct rte_swx_pipeline *p) +{ + struct thread *t = &p->threads[p->thread_id]; + struct instruction *ip = t->ip; + + TRACE("[Thread %2u] shl (hm)\n", p->thread_id); + + /* Structs. */ + ALU_HM(t, ip, <<); + + /* Thread. */ + thread_ip_inc(p); +} + +static inline void +instr_alu_shl_hh_exec(struct rte_swx_pipeline *p) +{ + struct thread *t = &p->threads[p->thread_id]; + struct instruction *ip = t->ip; + + TRACE("[Thread %2u] shl (hh)\n", p->thread_id); + + /* Structs. */ + ALU_HH(t, ip, <<); + + /* Thread. */ + thread_ip_inc(p); +} + +static inline void +instr_alu_shl_mi_exec(struct rte_swx_pipeline *p) +{ + struct thread *t = &p->threads[p->thread_id]; + struct instruction *ip = t->ip; + + TRACE("[Thread %2u] shl (mi)\n", p->thread_id); + + /* Structs. */ + ALU_MI(t, ip, <<); + + /* Thread. */ + thread_ip_inc(p); +} + +static inline void +instr_alu_shl_hi_exec(struct rte_swx_pipeline *p) +{ + struct thread *t = &p->threads[p->thread_id]; + struct instruction *ip = t->ip; + + TRACE("[Thread %2u] shl (hi)\n", p->thread_id); + + /* Structs. */ + ALU_HI(t, ip, <<); + + /* Thread. */ + thread_ip_inc(p); +} + static inline void instr_alu_and_exec(struct rte_swx_pipeline *p) { @@ -3947,6 +4100,14 @@ instr_translate(struct rte_swx_pipeline *p, instr, data); + if (!strcmp(tokens[tpos], "shl")) + return instr_alu_shl_translate(p, + action, + &tokens[tpos], + n_tokens - tpos, + instr, + data); + CHECK(0, EINVAL); } @@ -4135,6 +4296,13 @@ static instr_exec_t instruction_table[] = { [INSTR_ALU_XOR] = instr_alu_xor_exec, [INSTR_ALU_XOR_S] = instr_alu_xor_s_exec, [INSTR_ALU_XOR_I] = instr_alu_xor_i_exec, + + [INSTR_ALU_SHL] = instr_alu_shl_exec, + [INSTR_ALU_SHL_MH] = instr_alu_shl_mh_exec, + [INSTR_ALU_SHL_HM] = instr_alu_shl_hm_exec, + [INSTR_ALU_SHL_HH] = instr_alu_shl_hh_exec, + [INSTR_ALU_SHL_MI] = instr_alu_shl_mi_exec, + [INSTR_ALU_SHL_HI] = instr_alu_shl_hi_exec, }; static inline void -- 2.17.1