From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8C1D0A04AC; Tue, 1 Sep 2020 05:28:07 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8FFCF1C114; Tue, 1 Sep 2020 05:28:00 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id D3CF41C0D2 for ; Tue, 1 Sep 2020 05:27:58 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 0813PpRo024462; Mon, 31 Aug 2020 20:27:53 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=qVMEqjDGQZ18HPGrVYmW1AejLPIXOm4QagAszbgsDsM=; b=OA7OIBE3fJPFmu2th6dBS3PXyOAZnslS5QRyXVDm0/2NkwUahmoQRRPnmq+sH9ye2rRy GiOztEn/9cbkvdrDVsGVjkShZLxJEXZcAr6xM9QMVsAhX2GACYZeNc6Br9iOOYWW/7Tx QTVLC2PfxddrP5XSRINPGpotdyfPpD+ZwXzgyaljJ7UTEDrqrhKRvToGU7aiE3NmKgMg oFOox2y/rMcUd0KUUxgHeILcNDjXxfsA3zCC1cD6hYuyGV557dkdw3UizgKLloSkaMDs EaAvfX5RI2SyAYouoksuYCvcqV5cLG374Sg8vrey6Srj4LMC8SS8o/0bbXpdz/bz8R6b gw== Received: from sc-exch02.marvell.com ([199.233.58.182]) by mx0a-0016f401.pphosted.com with ESMTP id 337mcq61wa-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Mon, 31 Aug 2020 20:27:53 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 31 Aug 2020 20:27:52 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 31 Aug 2020 20:27:52 -0700 Received: from localhost.localdomain (unknown [10.28.34.15]) by maili.marvell.com (Postfix) with ESMTP id 25EF63F7043; Mon, 31 Aug 2020 20:27:40 -0700 (PDT) From: To: Jerin Jacob , Nithin Dabilpuram , Kiran Kumar K CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Date: Tue, 1 Sep 2020 08:57:07 +0530 Message-ID: <20200901032708.58247-3-kirankumark@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200901032708.58247-1-kirankumark@marvell.com> References: <20200821110330.214931-1-kirankumark@marvell.com> <20200901032708.58247-1-kirankumark@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-09-01_01:2020-08-31, 2020-09-01 signatures=0 Subject: [dpdk-dev] [PATCH v7 3/3] net/octeontx2: add rss hash level support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kiran Kumar K Add support to choose rss hash level from ethdev rss config. Signed-off-by: Kiran Kumar K --- drivers/net/octeontx2/otx2_ethdev.h | 2 +- drivers/net/octeontx2/otx2_rss.c | 9 +++++++-- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h index e9efe52bb..a11411239 100644 --- a/drivers/net/octeontx2/otx2_ethdev.h +++ b/drivers/net/octeontx2/otx2_ethdev.h @@ -119,7 +119,7 @@ #define NIX_RSS_OFFLOAD (ETH_RSS_PORT | ETH_RSS_IP | ETH_RSS_UDP |\ ETH_RSS_TCP | ETH_RSS_SCTP | \ ETH_RSS_TUNNEL | ETH_RSS_L2_PAYLOAD | \ - NIX_RSS_L3_L4_SRC_DST) + NIX_RSS_L3_L4_SRC_DST | ETH_RSS_LEVEL_MASK) #define NIX_TX_OFFLOAD_CAPA ( \ DEV_TX_OFFLOAD_MBUF_FAST_FREE | \ diff --git a/drivers/net/octeontx2/otx2_rss.c b/drivers/net/octeontx2/otx2_rss.c index d859937e6..194f4e8af 100644 --- a/drivers/net/octeontx2/otx2_rss.c +++ b/drivers/net/octeontx2/otx2_rss.c @@ -323,6 +323,7 @@ otx2_nix_rss_hash_update(struct rte_eth_dev *eth_dev, struct rte_eth_rss_conf *rss_conf) { struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev); + uint8_t rss_hash_level; uint32_t flowkey_cfg; uint8_t alg_idx; int rc; @@ -339,7 +340,9 @@ otx2_nix_rss_hash_update(struct rte_eth_dev *eth_dev, otx2_nix_rss_set_key(dev, rss_conf->rss_key, (uint32_t)rss_conf->rss_key_len); - flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_conf->rss_hf, 0); + rss_hash_level = ETH_RSS_LEVEL(rss_conf->rss_hf); + flowkey_cfg = + otx2_rss_ethdev_to_nix(dev, rss_conf->rss_hf, rss_hash_level); rc = otx2_rss_set_hf(dev, flowkey_cfg, &alg_idx, NIX_DEFAULT_RSS_CTX_GROUP, @@ -375,6 +378,7 @@ otx2_nix_rss_config(struct rte_eth_dev *eth_dev) { struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev); uint32_t idx, qcnt = eth_dev->data->nb_rx_queues; + uint8_t rss_hash_level; uint32_t flowkey_cfg; uint64_t rss_hf; uint8_t alg_idx; @@ -399,7 +403,8 @@ otx2_nix_rss_config(struct rte_eth_dev *eth_dev) } rss_hf = eth_dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf; - flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_hf, 0); + rss_hash_level = ETH_RSS_LEVEL(rss_hf); + flowkey_cfg = otx2_rss_ethdev_to_nix(dev, rss_hf, rss_hash_level); rc = otx2_rss_set_hf(dev, flowkey_cfg, &alg_idx, NIX_DEFAULT_RSS_CTX_GROUP, -- 2.25.1