From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6C2E7A04AC; Tue, 1 Sep 2020 13:51:32 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C494B1C0AD; Tue, 1 Sep 2020 13:51:14 +0200 (CEST) Received: from smtpbgbr2.qq.com (smtpbgbr2.qq.com [54.207.22.56]) by dpdk.org (Postfix) with ESMTP id DC676DE0 for ; Tue, 1 Sep 2020 13:51:10 +0200 (CEST) X-QQ-mid: bizesmtp5t1598961066tc89407zl Received: from localhost.localdomain.com (unknown [183.129.236.74]) by esmtp6.qq.com (ESMTP) with id ; Tue, 01 Sep 2020 19:51:06 +0800 (CST) X-QQ-SSF: 01400000000000B0C000000A0000000 X-QQ-FEAT: wuWYJu59shXzBefOqDGDYFctsDxsmKeyvyRloFEgJRYJV2EvVy0FfRwzyJSDF YAFKN5QX7Mjzr5lxVhGy3o7GAfEY1Kl9dw2g2X+pMMUboSIU0eXmBTvU1SgKZiRixQdAemD 3XUN8zCTM+hj2TAziKtMceFTQJZEWOYzxaliHnQoLrZwKgStE1Fx8KCPeZNzao6uWbOfheJ XP9bfEecn2cqGfBgL8uoHi4qS4xBUlXKOf7M99rOnNkKPkQwvByK5S2W+y7Y9YM9plIJicF Bt/0kyq6tJffsqGWwIWU2g0mBFYhvbUspVirqSfp/QTeYkdPSbPErsMdnJn6MhIfcHbPcDr pP98o1qHzcMQHfh6sA= X-QQ-GoodBg: 2 From: Jiawen Wu To: dev@dpdk.org Cc: Jiawen Wu Date: Tue, 1 Sep 2020 19:50:35 +0800 Message-Id: <20200901115113.1529675-4-jiawenwu@trustnetic.com> X-Mailer: git-send-email 2.18.4 In-Reply-To: <20200901115113.1529675-1-jiawenwu@trustnetic.com> References: <20200901115113.1529675-1-jiawenwu@trustnetic.com> X-QQ-SENDSIZE: 520 Feedback-ID: bizesmtp:trustnetic.com:qybgforeign:qybgforeign6 X-QQ-Bgrelay: 1 Subject: [dpdk-dev] [PATCH v1 04/42] net/txgbe: add error types and dummy function X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add error types and dummy function. Signed-off-by: Jiawen Wu --- drivers/net/txgbe/base/txgbe_dummy.h | 739 ++++++++++++++++++++++++++ drivers/net/txgbe/base/txgbe_status.h | 122 +++++ drivers/net/txgbe/base/txgbe_type.h | 263 ++++++++- 3 files changed, 1123 insertions(+), 1 deletion(-) create mode 100644 drivers/net/txgbe/base/txgbe_dummy.h create mode 100644 drivers/net/txgbe/base/txgbe_status.h diff --git a/drivers/net/txgbe/base/txgbe_dummy.h b/drivers/net/txgbe/base/txgbe_dummy.h new file mode 100644 index 000000000..2039fa596 --- /dev/null +++ b/drivers/net/txgbe/base/txgbe_dummy.h @@ -0,0 +1,739 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2015-2020 + */ + +#ifndef _TXGBE_TYPE_DUMMY_H_ +#define _TXGBE_TYPE_DUMMY_H_ + +#ifdef TUP +#elif defined(__GNUC__) +#define TUP(x) x##_unused __attribute__((unused)) +#elif defined(__LCLINT__) +#define TUP(x) x /*@unused@*/ +#else +#define TUP(x) x +#endif /*TUP*/ +#define TUP0 TUP(p0) +#define TUP1 TUP(p1) +#define TUP2 TUP(p2) +#define TUP3 TUP(p3) +#define TUP4 TUP(p4) +#define TUP5 TUP(p5) +#define TUP6 TUP(p6) +#define TUP7 TUP(p7) +#define TUP8 TUP(p8) +#define TUP9 TUP(p9) + +/* struct txgbe_bus_operations */ +static inline s32 txgbe_bus_get_bus_info_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline void txgbe_bus_set_lan_id_dummy(struct txgbe_hw *TUP0) +{ + return; +} +/* struct txgbe_rom_operations */ +static inline s32 txgbe_rom_init_params_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_rom_read16_dummy(struct txgbe_hw *TUP0, u32 TUP1, u16 *TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_rom_readw_buffer_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, void *TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_rom_readw_sw_dummy(struct txgbe_hw *TUP0, u32 TUP1, u16 *TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_rom_read32_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 *TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_rom_read_buffer_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, void *TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_rom_write16_dummy(struct txgbe_hw *TUP0, u32 TUP1, u16 TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_rom_writew_buffer_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, void *TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_rom_writew_sw_dummy(struct txgbe_hw *TUP0, u32 TUP1, u16 TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_rom_write32_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_rom_write_buffer_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, void *TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_rom_validate_checksum_dummy(struct txgbe_hw *TUP0, u16 *TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_rom_update_checksum_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_rom_calc_checksum_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} + +/* struct txgbe_mac_operations */ +static inline s32 txgbe_mac_init_hw_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_reset_hw_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_start_hw_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_stop_hw_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_clear_hw_cntrs_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline void txgbe_mac_enable_relaxed_ordering_dummy(struct txgbe_hw *TUP0) +{ + return; +} +static inline u64 txgbe_mac_get_supported_physical_layer_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_get_mac_addr_dummy(struct txgbe_hw *TUP0, u8 *TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_get_san_mac_addr_dummy(struct txgbe_hw *TUP0, u8 *TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_set_san_mac_addr_dummy(struct txgbe_hw *TUP0, u8 *TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_get_device_caps_dummy(struct txgbe_hw *TUP0, u16 *TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_get_wwn_prefix_dummy(struct txgbe_hw *TUP0, u16 *TUP1, u16 *TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_get_fcoe_boot_status_dummy(struct txgbe_hw *TUP0, u16 *TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_read_analog_reg8_dummy(struct txgbe_hw *TUP0, u32 TUP1, u8 *TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_write_analog_reg8_dummy(struct txgbe_hw *TUP0, u32 TUP1, u8 TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_setup_sfp_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_enable_rx_dma_dummy(struct txgbe_hw *TUP0, u32 TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_disable_sec_rx_path_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_enable_sec_rx_path_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_disable_sec_tx_path_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_enable_sec_tx_path_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_acquire_swfw_sync_dummy(struct txgbe_hw *TUP0, u32 TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline void txgbe_mac_release_swfw_sync_dummy(struct txgbe_hw *TUP0, u32 TUP1) +{ + return; +} +static inline void txgbe_mac_init_swfw_sync_dummy(struct txgbe_hw *TUP0) +{ + return; +} +static inline u64 txgbe_mac_autoc_read_dummy(struct txgbe_hw *TUP0) +{ + return 0; +} +static inline void txgbe_mac_autoc_write_dummy(struct txgbe_hw *TUP0, u64 TUP1) +{ + return; +} +static inline s32 txgbe_mac_prot_autoc_read_dummy(struct txgbe_hw *TUP0, bool *TUP1, u64 *TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_prot_autoc_write_dummy(struct txgbe_hw *TUP0, bool TUP1, u64 TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_negotiate_api_version_dummy(struct txgbe_hw *TUP0, int TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline void txgbe_mac_disable_tx_laser_dummy(struct txgbe_hw *TUP0) +{ + return; +} +static inline void txgbe_mac_enable_tx_laser_dummy(struct txgbe_hw *TUP0) +{ + return; +} +static inline void txgbe_mac_flap_tx_laser_dummy(struct txgbe_hw *TUP0) +{ + return; +} +static inline s32 txgbe_mac_setup_link_dummy(struct txgbe_hw *TUP0, u32 TUP1, bool TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_setup_mac_link_dummy(struct txgbe_hw *TUP0, u32 TUP1, bool TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_check_link_dummy(struct txgbe_hw *TUP0, u32 *TUP1, bool *TUP3, bool TUP4) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_get_link_capabilities_dummy(struct txgbe_hw *TUP0, u32 *TUP1, bool *TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline void txgbe_mac_set_rate_select_speed_dummy(struct txgbe_hw *TUP0, u32 TUP1) +{ + return; +} +static inline void txgbe_mac_setup_pba_dummy(struct txgbe_hw *TUP0, int TUP1, u32 TUP2, int TUP3) +{ + return; +} +static inline s32 txgbe_mac_led_on_dummy(struct txgbe_hw *TUP0, u32 TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_led_off_dummy(struct txgbe_hw *TUP0, u32 TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_blink_led_start_dummy(struct txgbe_hw *TUP0, u32 TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_blink_led_stop_dummy(struct txgbe_hw *TUP0, u32 TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_init_led_link_act_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_set_rar_dummy(struct txgbe_hw *TUP0, u32 TUP1, u8 *TUP2, u32 TUP3, u32 TUP4) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_set_uc_addr_dummy(struct txgbe_hw *TUP0, u32 TUP1, u8 *TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_clear_rar_dummy(struct txgbe_hw *TUP0, u32 TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_insert_mac_addr_dummy(struct txgbe_hw *TUP0, u8 *TUP1, u32 TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_set_vmdq_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_set_vmdq_san_mac_dummy(struct txgbe_hw *TUP0, u32 TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_clear_vmdq_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_init_rx_addrs_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_update_uc_addr_list_dummy(struct txgbe_hw *TUP0, u8 *TUP1, u32 TUP2, txgbe_mc_addr_itr TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_update_mc_addr_list_dummy(struct txgbe_hw *TUP0, u8 *TUP1, u32 TUP2, txgbe_mc_addr_itr TUP3, bool TUP4) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_enable_mc_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_disable_mc_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_clear_vfta_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_set_vfta_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, bool TUP3, bool TUP4) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_set_vlvf_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, bool TUP3, u32 *TUP4, u32 TUP5, bool TUP6) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_init_uta_tables_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline void txgbe_mac_set_mac_anti_spoofing_dummy(struct txgbe_hw *TUP0, bool TUP1, int TUP2) +{ + return; +} +static inline void txgbe_mac_set_vlan_anti_spoofing_dummy(struct txgbe_hw *TUP0, bool TUP1, int TUP2) +{ + return; +} +static inline s32 txgbe_mac_update_xcast_mode_dummy(struct txgbe_hw *TUP0, int TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_set_rlpml_dummy(struct txgbe_hw *TUP0, u16 TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_fc_enable_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_setup_fc_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline void txgbe_mac_fc_autoneg_dummy(struct txgbe_hw *TUP0) +{ + return; +} +static inline s32 txgbe_mac_set_fw_drv_ver_dummy(struct txgbe_hw *TUP0, u8 TUP1, u8 TUP2, u8 TUP3, u8 TUP4, u16 TUP5, const char *TUP6) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_get_thermal_sensor_data_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_init_thermal_sensor_thresh_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline void txgbe_mac_get_rtrup2tc_dummy(struct txgbe_hw *TUP0, u8 *TUP1) +{ + return; +} +static inline void txgbe_mac_disable_rx_dummy(struct txgbe_hw *TUP0) +{ + return; +} +static inline void txgbe_mac_enable_rx_dummy(struct txgbe_hw *TUP0) +{ + return; +} +static inline void txgbe_mac_set_source_address_pruning_dummy(struct txgbe_hw *TUP0, bool TUP1, unsigned int TUP2) +{ + return; +} +static inline void txgbe_mac_set_ethertype_anti_spoofing_dummy(struct txgbe_hw *TUP0, bool TUP1, int TUP2) +{ + return; +} +static inline s32 txgbe_mac_dmac_update_tcs_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_dmac_config_tcs_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_dmac_config_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_setup_eee_dummy(struct txgbe_hw *TUP0, bool TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_read_iosf_sb_reg_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, u32 *TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mac_write_iosf_sb_reg_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, u32 TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline void txgbe_mac_disable_mdd_dummy(struct txgbe_hw *TUP0) +{ + return; +} +static inline void txgbe_mac_enable_mdd_dummy(struct txgbe_hw *TUP0) +{ + return; +} +static inline void txgbe_mac_mdd_event_dummy(struct txgbe_hw *TUP0, u32 *TUP1) +{ + return; +} +static inline void txgbe_mac_restore_mdd_vf_dummy(struct txgbe_hw *TUP0, u32 TUP1) +{ + return; +} +static inline bool txgbe_mac_fw_recovery_mode_dummy(struct txgbe_hw *TUP0) +{ + return false; +} + +/* struct txgbe_phy_operations */ +static inline u32 txgbe_phy_get_media_type_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_identify_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_identify_sfp_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_init_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_reset_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_read_reg_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, u16 *TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_write_reg_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, u16 TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_read_reg_mdi_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, u16 *TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_write_reg_mdi_dummy(struct txgbe_hw *TUP0, u32 TUP1, u32 TUP2, u16 TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_setup_link_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_setup_internal_link_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_setup_link_speed_dummy(struct txgbe_hw *TUP0, u32 TUP1, bool TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_check_link_dummy(struct txgbe_hw *TUP0, u32 *TUP1, bool *TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_get_firmware_version_dummy(struct txgbe_hw *TUP0, u32 *TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_read_i2c_byte_dummy(struct txgbe_hw *TUP0, u8 TUP1, u8 TUP2, u8 *TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_write_i2c_byte_dummy(struct txgbe_hw *TUP0, u8 TUP1, u8 TUP2, u8 TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_read_i2c_sff8472_dummy(struct txgbe_hw *TUP0, u8 TUP1, u8 *TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_read_i2c_eeprom_dummy(struct txgbe_hw *TUP0, u8 TUP1, u8 *TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_write_i2c_eeprom_dummy(struct txgbe_hw *TUP0, u8 TUP1, u8 TUP2) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline void txgbe_phy_i2c_bus_clear_dummy(struct txgbe_hw *TUP0) +{ + return; +} +static inline s32 txgbe_phy_check_overtemp_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_set_phy_power_dummy(struct txgbe_hw *TUP0, bool TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_enter_lplu_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_handle_lasi_dummy(struct txgbe_hw *TUP0) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_read_i2c_byte_unlocked_dummy(struct txgbe_hw *TUP0, u8 TUP1, u8 TUP2, u8 *TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_phy_write_i2c_byte_unlocked_dummy(struct txgbe_hw *TUP0, u8 TUP1, u8 TUP2, u8 TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} + +/* struct txgbe_link_operations */ +static inline s32 txgbe_link_read_link_dummy(struct txgbe_hw *TUP0, u8 TUP1, u16 TUP2, u16 *TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_link_read_link_unlocked_dummy(struct txgbe_hw *TUP0, u8 TUP1, u16 TUP2, u16 *TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_link_write_link_dummy(struct txgbe_hw *TUP0, u8 TUP1, u16 TUP2, u16 TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_link_write_link_unlocked_dummy(struct txgbe_hw *TUP0, u8 TUP1, u16 TUP2, u16 TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} + +/* struct txgbe_mbx_operations */ +static inline void txgbe_mbx_init_params_dummy(struct txgbe_hw *TUP0) +{ + return; +} +static inline s32 txgbe_mbx_read_dummy(struct txgbe_hw *TUP0, u32 *TUP1, u16 TUP2, u16 TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mbx_write_dummy(struct txgbe_hw *TUP0, u32 *TUP1, u16 TUP2, u16 TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mbx_read_posted_dummy(struct txgbe_hw *TUP0, u32 *TUP1, u16 TUP2, u16 TUP3) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mbx_write_posted_dummy(struct txgbe_hw *TUP0, u32 *TUP1, u16 TUP2, u16 TUP4) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mbx_check_for_msg_dummy(struct txgbe_hw *TUP0, u16 TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mbx_check_for_ack_dummy(struct txgbe_hw *TUP0, u16 TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} +static inline s32 txgbe_mbx_check_for_rst_dummy(struct txgbe_hw *TUP0, u16 TUP1) +{ + return TXGBE_ERR_OPS_DUMMY; +} + + +static inline void txgbe_init_ops_dummy(struct txgbe_hw *hw) +{ + hw->bus.get_bus_info = txgbe_bus_get_bus_info_dummy; + hw->bus.set_lan_id = txgbe_bus_set_lan_id_dummy; + hw->rom.init_params = txgbe_rom_init_params_dummy; + hw->rom.read16 = txgbe_rom_read16_dummy; + hw->rom.readw_buffer = txgbe_rom_readw_buffer_dummy; + hw->rom.readw_sw = txgbe_rom_readw_sw_dummy; + hw->rom.read32 = txgbe_rom_read32_dummy; + hw->rom.read_buffer = txgbe_rom_read_buffer_dummy; + hw->rom.write16 = txgbe_rom_write16_dummy; + hw->rom.writew_buffer = txgbe_rom_writew_buffer_dummy; + hw->rom.writew_sw = txgbe_rom_writew_sw_dummy; + hw->rom.write32 = txgbe_rom_write32_dummy; + hw->rom.write_buffer = txgbe_rom_write_buffer_dummy; + hw->rom.validate_checksum = txgbe_rom_validate_checksum_dummy; + hw->rom.update_checksum = txgbe_rom_update_checksum_dummy; + hw->rom.calc_checksum = txgbe_rom_calc_checksum_dummy; + hw->mac.init_hw = txgbe_mac_init_hw_dummy; + hw->mac.reset_hw = txgbe_mac_reset_hw_dummy; + hw->mac.start_hw = txgbe_mac_start_hw_dummy; + hw->mac.stop_hw = txgbe_mac_stop_hw_dummy; + hw->mac.clear_hw_cntrs = txgbe_mac_clear_hw_cntrs_dummy; + hw->mac.enable_relaxed_ordering = txgbe_mac_enable_relaxed_ordering_dummy; + hw->mac.get_supported_physical_layer = txgbe_mac_get_supported_physical_layer_dummy; + hw->mac.get_mac_addr = txgbe_mac_get_mac_addr_dummy; + hw->mac.get_san_mac_addr = txgbe_mac_get_san_mac_addr_dummy; + hw->mac.set_san_mac_addr = txgbe_mac_set_san_mac_addr_dummy; + hw->mac.get_device_caps = txgbe_mac_get_device_caps_dummy; + hw->mac.get_wwn_prefix = txgbe_mac_get_wwn_prefix_dummy; + hw->mac.get_fcoe_boot_status = txgbe_mac_get_fcoe_boot_status_dummy; + hw->mac.read_analog_reg8 = txgbe_mac_read_analog_reg8_dummy; + hw->mac.write_analog_reg8 = txgbe_mac_write_analog_reg8_dummy; + hw->mac.setup_sfp = txgbe_mac_setup_sfp_dummy; + hw->mac.enable_rx_dma = txgbe_mac_enable_rx_dma_dummy; + hw->mac.disable_sec_rx_path = txgbe_mac_disable_sec_rx_path_dummy; + hw->mac.enable_sec_rx_path = txgbe_mac_enable_sec_rx_path_dummy; + hw->mac.disable_sec_tx_path = txgbe_mac_disable_sec_tx_path_dummy; + hw->mac.enable_sec_tx_path = txgbe_mac_enable_sec_tx_path_dummy; + hw->mac.acquire_swfw_sync = txgbe_mac_acquire_swfw_sync_dummy; + hw->mac.release_swfw_sync = txgbe_mac_release_swfw_sync_dummy; + hw->mac.init_swfw_sync = txgbe_mac_init_swfw_sync_dummy; + hw->mac.autoc_read = txgbe_mac_autoc_read_dummy; + hw->mac.autoc_write = txgbe_mac_autoc_write_dummy; + hw->mac.prot_autoc_read = txgbe_mac_prot_autoc_read_dummy; + hw->mac.prot_autoc_write = txgbe_mac_prot_autoc_write_dummy; + hw->mac.negotiate_api_version = txgbe_mac_negotiate_api_version_dummy; + hw->mac.disable_tx_laser = txgbe_mac_disable_tx_laser_dummy; + hw->mac.enable_tx_laser = txgbe_mac_enable_tx_laser_dummy; + hw->mac.flap_tx_laser = txgbe_mac_flap_tx_laser_dummy; + hw->mac.setup_link = txgbe_mac_setup_link_dummy; + hw->mac.setup_mac_link = txgbe_mac_setup_mac_link_dummy; + hw->mac.check_link = txgbe_mac_check_link_dummy; + hw->mac.get_link_capabilities = txgbe_mac_get_link_capabilities_dummy; + hw->mac.set_rate_select_speed = txgbe_mac_set_rate_select_speed_dummy; + hw->mac.setup_pba = txgbe_mac_setup_pba_dummy; + hw->mac.led_on = txgbe_mac_led_on_dummy; + hw->mac.led_off = txgbe_mac_led_off_dummy; + hw->mac.blink_led_start = txgbe_mac_blink_led_start_dummy; + hw->mac.blink_led_stop = txgbe_mac_blink_led_stop_dummy; + hw->mac.init_led_link_act = txgbe_mac_init_led_link_act_dummy; + hw->mac.set_rar = txgbe_mac_set_rar_dummy; + hw->mac.set_uc_addr = txgbe_mac_set_uc_addr_dummy; + hw->mac.clear_rar = txgbe_mac_clear_rar_dummy; + hw->mac.insert_mac_addr = txgbe_mac_insert_mac_addr_dummy; + hw->mac.set_vmdq = txgbe_mac_set_vmdq_dummy; + hw->mac.set_vmdq_san_mac = txgbe_mac_set_vmdq_san_mac_dummy; + hw->mac.clear_vmdq = txgbe_mac_clear_vmdq_dummy; + hw->mac.init_rx_addrs = txgbe_mac_init_rx_addrs_dummy; + hw->mac.update_uc_addr_list = txgbe_mac_update_uc_addr_list_dummy; + hw->mac.update_mc_addr_list = txgbe_mac_update_mc_addr_list_dummy; + hw->mac.enable_mc = txgbe_mac_enable_mc_dummy; + hw->mac.disable_mc = txgbe_mac_disable_mc_dummy; + hw->mac.clear_vfta = txgbe_mac_clear_vfta_dummy; + hw->mac.set_vfta = txgbe_mac_set_vfta_dummy; + hw->mac.set_vlvf = txgbe_mac_set_vlvf_dummy; + hw->mac.init_uta_tables = txgbe_mac_init_uta_tables_dummy; + hw->mac.set_mac_anti_spoofing = txgbe_mac_set_mac_anti_spoofing_dummy; + hw->mac.set_vlan_anti_spoofing = txgbe_mac_set_vlan_anti_spoofing_dummy; + hw->mac.update_xcast_mode = txgbe_mac_update_xcast_mode_dummy; + hw->mac.set_rlpml = txgbe_mac_set_rlpml_dummy; + hw->mac.fc_enable = txgbe_mac_fc_enable_dummy; + hw->mac.setup_fc = txgbe_mac_setup_fc_dummy; + hw->mac.fc_autoneg = txgbe_mac_fc_autoneg_dummy; + hw->mac.set_fw_drv_ver = txgbe_mac_set_fw_drv_ver_dummy; + hw->mac.get_thermal_sensor_data = txgbe_mac_get_thermal_sensor_data_dummy; + hw->mac.init_thermal_sensor_thresh = txgbe_mac_init_thermal_sensor_thresh_dummy; + hw->mac.get_rtrup2tc = txgbe_mac_get_rtrup2tc_dummy; + hw->mac.disable_rx = txgbe_mac_disable_rx_dummy; + hw->mac.enable_rx = txgbe_mac_enable_rx_dummy; + hw->mac.set_source_address_pruning = txgbe_mac_set_source_address_pruning_dummy; + hw->mac.set_ethertype_anti_spoofing = txgbe_mac_set_ethertype_anti_spoofing_dummy; + hw->mac.dmac_update_tcs = txgbe_mac_dmac_update_tcs_dummy; + hw->mac.dmac_config_tcs = txgbe_mac_dmac_config_tcs_dummy; + hw->mac.dmac_config = txgbe_mac_dmac_config_dummy; + hw->mac.setup_eee = txgbe_mac_setup_eee_dummy; + hw->mac.read_iosf_sb_reg = txgbe_mac_read_iosf_sb_reg_dummy; + hw->mac.write_iosf_sb_reg = txgbe_mac_write_iosf_sb_reg_dummy; + hw->mac.disable_mdd = txgbe_mac_disable_mdd_dummy; + hw->mac.enable_mdd = txgbe_mac_enable_mdd_dummy; + hw->mac.mdd_event = txgbe_mac_mdd_event_dummy; + hw->mac.restore_mdd_vf = txgbe_mac_restore_mdd_vf_dummy; + hw->mac.fw_recovery_mode = txgbe_mac_fw_recovery_mode_dummy; + hw->phy.get_media_type = txgbe_phy_get_media_type_dummy; + hw->phy.identify = txgbe_phy_identify_dummy; + hw->phy.identify_sfp = txgbe_phy_identify_sfp_dummy; + hw->phy.init = txgbe_phy_init_dummy; + hw->phy.reset = txgbe_phy_reset_dummy; + hw->phy.read_reg = txgbe_phy_read_reg_dummy; + hw->phy.write_reg = txgbe_phy_write_reg_dummy; + hw->phy.read_reg_mdi = txgbe_phy_read_reg_mdi_dummy; + hw->phy.write_reg_mdi = txgbe_phy_write_reg_mdi_dummy; + hw->phy.setup_link = txgbe_phy_setup_link_dummy; + hw->phy.setup_internal_link = txgbe_phy_setup_internal_link_dummy; + hw->phy.setup_link_speed = txgbe_phy_setup_link_speed_dummy; + hw->phy.check_link = txgbe_phy_check_link_dummy; + hw->phy.get_firmware_version = txgbe_phy_get_firmware_version_dummy; + hw->phy.read_i2c_byte = txgbe_phy_read_i2c_byte_dummy; + hw->phy.write_i2c_byte = txgbe_phy_write_i2c_byte_dummy; + hw->phy.read_i2c_sff8472 = txgbe_phy_read_i2c_sff8472_dummy; + hw->phy.read_i2c_eeprom = txgbe_phy_read_i2c_eeprom_dummy; + hw->phy.write_i2c_eeprom = txgbe_phy_write_i2c_eeprom_dummy; + hw->phy.i2c_bus_clear = txgbe_phy_i2c_bus_clear_dummy; + hw->phy.check_overtemp = txgbe_phy_check_overtemp_dummy; + hw->phy.set_phy_power = txgbe_phy_set_phy_power_dummy; + hw->phy.enter_lplu = txgbe_phy_enter_lplu_dummy; + hw->phy.handle_lasi = txgbe_phy_handle_lasi_dummy; + hw->phy.read_i2c_byte_unlocked = txgbe_phy_read_i2c_byte_unlocked_dummy; + hw->phy.write_i2c_byte_unlocked = txgbe_phy_write_i2c_byte_unlocked_dummy; + hw->link.read_link = txgbe_link_read_link_dummy; + hw->link.read_link_unlocked = txgbe_link_read_link_unlocked_dummy; + hw->link.write_link = txgbe_link_write_link_dummy; + hw->link.write_link_unlocked = txgbe_link_write_link_unlocked_dummy; + hw->mbx.init_params = txgbe_mbx_init_params_dummy; + hw->mbx.read = txgbe_mbx_read_dummy; + hw->mbx.write = txgbe_mbx_write_dummy; + hw->mbx.read_posted = txgbe_mbx_read_posted_dummy; + hw->mbx.write_posted = txgbe_mbx_write_posted_dummy; + hw->mbx.check_for_msg = txgbe_mbx_check_for_msg_dummy; + hw->mbx.check_for_ack = txgbe_mbx_check_for_ack_dummy; + hw->mbx.check_for_rst = txgbe_mbx_check_for_rst_dummy; +} + +#endif /* _TXGBE_TYPE_DUMMY_H_ */ + diff --git a/drivers/net/txgbe/base/txgbe_status.h b/drivers/net/txgbe/base/txgbe_status.h new file mode 100644 index 000000000..db5e521e4 --- /dev/null +++ b/drivers/net/txgbe/base/txgbe_status.h @@ -0,0 +1,122 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(c) 2015-2020 + */ + +#ifndef _TXGBE_STATUS_H_ +#define _TXGBE_STATUS_H_ + +/* Error Codes: + * common error + * module error(simple) + * module error(detailed) + * + * (-256, 256): reserved for non-txgbe defined error code + */ +#define TERR_BASE (0x100) +enum txgbe_error { + TERR_NULL = TERR_BASE, + TERR_ANY, + TERR_NOSUPP, + TERR_NOIMPL, + TERR_NOMEM, + TERR_NOSPACE, + TERR_NOENTRY, + TERR_CONFIG, + TERR_ARGS, + TERR_PARAM, + TERR_INVALID, + TERR_TIMEOUT, + TERR_VERSION, + TERR_REGISTER, + TERR_FEATURE, + TERR_RESET, + TERR_AUTONEG, + TERR_MBX, + TERR_I2C, + TERR_FC, + TERR_FLASH, + TERR_DEVICE, + TERR_HOSTIF, + TERR_SRAM, + TERR_EEPROM, + TERR_EEPROM_CHECKSUM, + TERR_EEPROM_PROTECT, + TERR_EEPROM_VERSION, + TERR_MAC, + TERR_MAC_ADDR, + TERR_SFP, + TERR_SFP_INITSEQ, + TERR_SFP_PRESENT, + TERR_SFP_SUPPORT, + TERR_SFP_SETUP, + TERR_PHY, + TERR_PHY_ADDR, + TERR_PHY_INIT, + TERR_FDIR_CMD, + TERR_FDIR_REINIT, + TERR_SWFW_SYNC, + TERR_SWFW_COMMAND, + TERR_FC_CFG, + TERR_FC_NEGO, + TERR_LINK_SETUP, + TERR_PCIE_PENDING, + TERR_PBA_SECTION, + TERR_OVERTEMP, + TERR_UNDERTEMP, + TERR_XPCS_POWERUP, +}; + +/* WARNING: just for legacy compatibility */ +#define TXGBE_NOT_IMPLEMENTED 0x7FFFFFFF +#define TXGBE_ERR_OPS_DUMMY 0x3FFFFFFF + +/* Error Codes */ +#define TXGBE_ERR_EEPROM -(TERR_BASE + 1) +#define TXGBE_ERR_EEPROM_CHECKSUM -(TERR_BASE + 2) +#define TXGBE_ERR_PHY -(TERR_BASE + 3) +#define TXGBE_ERR_CONFIG -(TERR_BASE + 4) +#define TXGBE_ERR_PARAM -(TERR_BASE + 5) +#define TXGBE_ERR_MAC_TYPE -(TERR_BASE + 6) +#define TXGBE_ERR_UNKNOWN_PHY -(TERR_BASE + 7) +#define TXGBE_ERR_LINK_SETUP -(TERR_BASE + 8) +#define TXGBE_ERR_ADAPTER_STOPPED -(TERR_BASE + 9) +#define TXGBE_ERR_INVALID_MAC_ADDR -(TERR_BASE + 10) +#define TXGBE_ERR_DEVICE_NOT_SUPPORTED -(TERR_BASE + 11) +#define TXGBE_ERR_MASTER_REQUESTS_PENDING -(TERR_BASE + 12) +#define TXGBE_ERR_INVALID_LINK_SETTINGS -(TERR_BASE + 13) +#define TXGBE_ERR_AUTONEG_NOT_COMPLETE -(TERR_BASE + 14) +#define TXGBE_ERR_RESET_FAILED -(TERR_BASE + 15) +#define TXGBE_ERR_SWFW_SYNC -(TERR_BASE + 16) +#define TXGBE_ERR_PHY_ADDR_INVALID -(TERR_BASE + 17) +#define TXGBE_ERR_I2C -(TERR_BASE + 18) +#define TXGBE_ERR_SFP_NOT_SUPPORTED -(TERR_BASE + 19) +#define TXGBE_ERR_SFP_NOT_PRESENT -(TERR_BASE + 20) +#define TXGBE_ERR_SFP_NO_INIT_SEQ_PRESENT -(TERR_BASE + 21) +#define TXGBE_ERR_NO_SAN_ADDR_PTR -(TERR_BASE + 22) +#define TXGBE_ERR_FDIR_REINIT_FAILED -(TERR_BASE + 23) +#define TXGBE_ERR_EEPROM_VERSION -(TERR_BASE + 24) +#define TXGBE_ERR_NO_SPACE -(TERR_BASE + 25) +#define TXGBE_ERR_OVERTEMP -(TERR_BASE + 26) +#define TXGBE_ERR_FC_NOT_NEGOTIATED -(TERR_BASE + 27) +#define TXGBE_ERR_FC_NOT_SUPPORTED -(TERR_BASE + 28) +#define TXGBE_ERR_SFP_SETUP_NOT_COMPLETE -(TERR_BASE + 30) +#define TXGBE_ERR_PBA_SECTION -(TERR_BASE + 31) +#define TXGBE_ERR_INVALID_ARGUMENT -(TERR_BASE + 32) +#define TXGBE_ERR_HOST_INTERFACE_COMMAND -(TERR_BASE + 33) +#define TXGBE_ERR_OUT_OF_MEM -(TERR_BASE + 34) +#define TXGBE_ERR_FEATURE_NOT_SUPPORTED -(TERR_BASE + 36) +#define TXGBE_ERR_EEPROM_PROTECTED_REGION -(TERR_BASE + 37) +#define TXGBE_ERR_FDIR_CMD_INCOMPLETE -(TERR_BASE + 38) +#define TXGBE_ERR_FW_RESP_INVALID -(TERR_BASE + 39) +#define TXGBE_ERR_TOKEN_RETRY -(TERR_BASE + 40) +#define TXGBE_ERR_FLASH_LOADING_FAILED -(TERR_BASE + 41) + +#define TXGBE_ERR_NOSUPP -(TERR_BASE + 42) +#define TXGBE_ERR_UNDERTEMP -(TERR_BASE + 43) +#define TXGBE_ERR_XPCS_POWER_UP_FAILED -(TERR_BASE + 44) +#define TXGBE_ERR_PHY_INIT_NOT_DONE -(TERR_BASE + 45) +#define TXGBE_ERR_TIMEOUT -(TERR_BASE + 46) +#define TXGBE_ERR_REGISTER -(TERR_BASE + 47) +#define TXGBE_ERR_MNG_ACCESS_FAILED -(TERR_BASE + 49) + +#endif /* _TXGBE_STATUS_H_ */ diff --git a/drivers/net/txgbe/base/txgbe_type.h b/drivers/net/txgbe/base/txgbe_type.h index ad4eba21a..1264a83d9 100644 --- a/drivers/net/txgbe/base/txgbe_type.h +++ b/drivers/net/txgbe/base/txgbe_type.h @@ -7,9 +7,17 @@ #define TXGBE_ALIGN 128 /* as intel did */ +#include "txgbe_status.h" #include "txgbe_osdep.h" #include "txgbe_devids.h" +enum txgbe_eeprom_type { + txgbe_eeprom_unknown = 0, + txgbe_eeprom_spi, + txgbe_eeprom_flash, + txgbe_eeprom_none /* No NVM support */ +}; + enum txgbe_mac_type { txgbe_mac_unknown = 0, txgbe_mac_raptor, @@ -90,10 +98,218 @@ enum txgbe_media_type { txgbe_media_type_virtual }; + +/* PCI bus types */ +enum txgbe_bus_type { + txgbe_bus_type_unknown = 0, + txgbe_bus_type_pci, + txgbe_bus_type_pcix, + txgbe_bus_type_pci_express, + txgbe_bus_type_internal, + txgbe_bus_type_reserved +}; + +/* PCI bus speeds */ +enum txgbe_bus_speed { + txgbe_bus_speed_unknown = 0, + txgbe_bus_speed_33 = 33, + txgbe_bus_speed_66 = 66, + txgbe_bus_speed_100 = 100, + txgbe_bus_speed_120 = 120, + txgbe_bus_speed_133 = 133, + txgbe_bus_speed_2500 = 2500, + txgbe_bus_speed_5000 = 5000, + txgbe_bus_speed_8000 = 8000, + txgbe_bus_speed_reserved +}; + +/* PCI bus widths */ +enum txgbe_bus_width { + txgbe_bus_width_unknown = 0, + txgbe_bus_width_pcie_x1 = 1, + txgbe_bus_width_pcie_x2 = 2, + txgbe_bus_width_pcie_x4 = 4, + txgbe_bus_width_pcie_x8 = 8, + txgbe_bus_width_32 = 32, + txgbe_bus_width_64 = 64, + txgbe_bus_width_reserved +}; + +struct txgbe_hw; + +/* Bus parameters */ +struct txgbe_bus_info { + s32 (*get_bus_info)(struct txgbe_hw *); + void (*set_lan_id)(struct txgbe_hw *); + + enum txgbe_bus_speed speed; + enum txgbe_bus_width width; + enum txgbe_bus_type type; + + u16 func; + u8 lan_id; + u16 instance_id; +}; struct txgbe_hw_stats { u64 counter; }; + +/* iterator type for walking multicast address lists */ +typedef u8* (*txgbe_mc_addr_itr) (struct txgbe_hw *hw, u8 **mc_addr_ptr, + u32 *vmdq); + +struct txgbe_link_info { + s32 (*read_link)(struct txgbe_hw *, u8 addr, u16 reg, u16 *val); + s32 (*read_link_unlocked)(struct txgbe_hw *, u8 addr, u16 reg, + u16 *val); + s32 (*write_link)(struct txgbe_hw *, u8 addr, u16 reg, u16 val); + s32 (*write_link_unlocked)(struct txgbe_hw *, u8 addr, u16 reg, + u16 val); + + u8 addr; +}; + +struct txgbe_rom_info { + s32 (*init_params)(struct txgbe_hw *); + s32 (*read16)(struct txgbe_hw *, u32, u16 *); + s32 (*readw_sw)(struct txgbe_hw *, u32, u16 *); + s32 (*readw_buffer)(struct txgbe_hw *, u32, u32, void *); + s32 (*read32)(struct txgbe_hw *, u32, u32 *); + s32 (*read_buffer)(struct txgbe_hw *, u32, u32, void *); + s32 (*write16)(struct txgbe_hw *, u32, u16); + s32 (*writew_sw)(struct txgbe_hw *, u32, u16); + s32 (*writew_buffer)(struct txgbe_hw *, u32, u32, void *); + s32 (*write32)(struct txgbe_hw *, u32, u32); + s32 (*write_buffer)(struct txgbe_hw *, u32, u32, void *); + s32 (*validate_checksum)(struct txgbe_hw *, u16 *); + s32 (*update_checksum)(struct txgbe_hw *); + s32 (*calc_checksum)(struct txgbe_hw *); + + enum txgbe_eeprom_type type; + u32 semaphore_delay; + u16 word_size; + u16 address_bits; + u16 word_page_size; + u16 ctrl_word_3; + + u32 sw_addr; +}; + + +struct txgbe_flash_info { + s32 (*init_params)(struct txgbe_hw *); + s32 (*read_buffer)(struct txgbe_hw *, u32, u32, u32 *); + s32 (*write_buffer)(struct txgbe_hw *, u32, u32, u32 *); + u32 semaphore_delay; + u32 dword_size; + u16 address_bits; +}; + struct txgbe_mac_info { + s32 (*init_hw)(struct txgbe_hw *); + s32 (*reset_hw)(struct txgbe_hw *); + s32 (*start_hw)(struct txgbe_hw *); + s32 (*stop_hw)(struct txgbe_hw *); + s32 (*clear_hw_cntrs)(struct txgbe_hw *); + void (*enable_relaxed_ordering)(struct txgbe_hw *); + u64 (*get_supported_physical_layer)(struct txgbe_hw *); + s32 (*get_mac_addr)(struct txgbe_hw *, u8 *); + s32 (*get_san_mac_addr)(struct txgbe_hw *, u8 *); + s32 (*set_san_mac_addr)(struct txgbe_hw *, u8 *); + s32 (*get_device_caps)(struct txgbe_hw *, u16 *); + s32 (*get_wwn_prefix)(struct txgbe_hw *, u16 *, u16 *); + s32 (*get_fcoe_boot_status)(struct txgbe_hw *, u16 *); + s32 (*read_analog_reg8)(struct txgbe_hw*, u32, u8*); + s32 (*write_analog_reg8)(struct txgbe_hw*, u32, u8); + s32 (*setup_sfp)(struct txgbe_hw *); + s32 (*enable_rx_dma)(struct txgbe_hw *, u32); + s32 (*disable_sec_rx_path)(struct txgbe_hw *); + s32 (*enable_sec_rx_path)(struct txgbe_hw *); + s32 (*disable_sec_tx_path)(struct txgbe_hw *); + s32 (*enable_sec_tx_path)(struct txgbe_hw *); + s32 (*acquire_swfw_sync)(struct txgbe_hw *, u32); + void (*release_swfw_sync)(struct txgbe_hw *, u32); + void (*init_swfw_sync)(struct txgbe_hw *); + u64 (*autoc_read)(struct txgbe_hw *); + void (*autoc_write)(struct txgbe_hw *, u64); + s32 (*prot_autoc_read)(struct txgbe_hw *, bool *, u64 *); + s32 (*prot_autoc_write)(struct txgbe_hw *, bool, u64); + s32 (*negotiate_api_version)(struct txgbe_hw *hw, int api); + + /* Link */ + void (*disable_tx_laser)(struct txgbe_hw *); + void (*enable_tx_laser)(struct txgbe_hw *); + void (*flap_tx_laser)(struct txgbe_hw *); + s32 (*setup_link)(struct txgbe_hw *, u32, bool); + s32 (*setup_mac_link)(struct txgbe_hw *, u32, bool); + s32 (*check_link)(struct txgbe_hw *, u32 *, bool *, bool); + s32 (*get_link_capabilities)(struct txgbe_hw *, u32 *, + bool *); + void (*set_rate_select_speed)(struct txgbe_hw *, u32); + + /* Packet Buffer manipulation */ + void (*setup_pba)(struct txgbe_hw *, int, u32, int); + + /* LED */ + s32 (*led_on)(struct txgbe_hw *, u32); + s32 (*led_off)(struct txgbe_hw *, u32); + s32 (*blink_led_start)(struct txgbe_hw *, u32); + s32 (*blink_led_stop)(struct txgbe_hw *, u32); + s32 (*init_led_link_act)(struct txgbe_hw *); + + /* RAR, Multicast, VLAN */ + s32 (*set_rar)(struct txgbe_hw *, u32, u8 *, u32, u32); + s32 (*set_uc_addr)(struct txgbe_hw *, u32, u8 *); + s32 (*clear_rar)(struct txgbe_hw *, u32); + s32 (*insert_mac_addr)(struct txgbe_hw *, u8 *, u32); + s32 (*set_vmdq)(struct txgbe_hw *, u32, u32); + s32 (*set_vmdq_san_mac)(struct txgbe_hw *, u32); + s32 (*clear_vmdq)(struct txgbe_hw *, u32, u32); + s32 (*init_rx_addrs)(struct txgbe_hw *); + s32 (*update_uc_addr_list)(struct txgbe_hw *, u8 *, u32, + txgbe_mc_addr_itr); + s32 (*update_mc_addr_list)(struct txgbe_hw *, u8 *, u32, + txgbe_mc_addr_itr, bool clear); + s32 (*enable_mc)(struct txgbe_hw *); + s32 (*disable_mc)(struct txgbe_hw *); + s32 (*clear_vfta)(struct txgbe_hw *); + s32 (*set_vfta)(struct txgbe_hw *, u32, u32, bool, bool); + s32 (*set_vlvf)(struct txgbe_hw *, u32, u32, bool, u32 *, u32, + bool); + s32 (*init_uta_tables)(struct txgbe_hw *); + void (*set_mac_anti_spoofing)(struct txgbe_hw *, bool, int); + void (*set_vlan_anti_spoofing)(struct txgbe_hw *, bool, int); + s32 (*update_xcast_mode)(struct txgbe_hw *, int); + s32 (*set_rlpml)(struct txgbe_hw *, u16); + + /* Flow Control */ + s32 (*fc_enable)(struct txgbe_hw *); + s32 (*setup_fc)(struct txgbe_hw *); + void (*fc_autoneg)(struct txgbe_hw *); + + /* Manageability interface */ + s32 (*set_fw_drv_ver)(struct txgbe_hw *, u8, u8, u8, u8, u16, + const char *); + s32 (*get_thermal_sensor_data)(struct txgbe_hw *); + s32 (*init_thermal_sensor_thresh)(struct txgbe_hw *hw); + void (*get_rtrup2tc)(struct txgbe_hw *hw, u8 *map); + void (*disable_rx)(struct txgbe_hw *hw); + void (*enable_rx)(struct txgbe_hw *hw); + void (*set_source_address_pruning)(struct txgbe_hw *, bool, + unsigned int); + void (*set_ethertype_anti_spoofing)(struct txgbe_hw *, bool, int); + s32 (*dmac_update_tcs)(struct txgbe_hw *hw); + s32 (*dmac_config_tcs)(struct txgbe_hw *hw); + s32 (*dmac_config)(struct txgbe_hw *hw); + s32 (*setup_eee)(struct txgbe_hw *hw, bool enable_eee); + s32 (*read_iosf_sb_reg)(struct txgbe_hw *, u32, u32, u32 *); + s32 (*write_iosf_sb_reg)(struct txgbe_hw *, u32, u32, u32); + void (*disable_mdd)(struct txgbe_hw *hw); + void (*enable_mdd)(struct txgbe_hw *hw); + void (*mdd_event)(struct txgbe_hw *hw, u32 *vf_bitmap); + void (*restore_mdd_vf)(struct txgbe_hw *hw, u32 vf); + bool (*fw_recovery_mode)(struct txgbe_hw *hw); + enum txgbe_mac_type type; u8 addr[ETH_ADDR_LEN]; u8 perm_addr[ETH_ADDR_LEN]; @@ -103,16 +319,60 @@ struct txgbe_mac_info { }; struct txgbe_phy_info { + u32 (*get_media_type)(struct txgbe_hw *); + s32 (*identify)(struct txgbe_hw *); + s32 (*identify_sfp)(struct txgbe_hw *); + s32 (*init)(struct txgbe_hw *); + s32 (*reset)(struct txgbe_hw *); + s32 (*read_reg)(struct txgbe_hw *, u32, u32, u16 *); + s32 (*write_reg)(struct txgbe_hw *, u32, u32, u16); + s32 (*read_reg_mdi)(struct txgbe_hw *, u32, u32, u16 *); + s32 (*write_reg_mdi)(struct txgbe_hw *, u32, u32, u16); + s32 (*setup_link)(struct txgbe_hw *); + s32 (*setup_internal_link)(struct txgbe_hw *); + s32 (*setup_link_speed)(struct txgbe_hw *, u32, bool); + s32 (*check_link)(struct txgbe_hw *, u32 *, bool *); + s32 (*get_firmware_version)(struct txgbe_hw *, u32 *); + s32 (*read_i2c_byte)(struct txgbe_hw *, u8, u8, u8 *); + s32 (*write_i2c_byte)(struct txgbe_hw *, u8, u8, u8); + s32 (*read_i2c_sff8472)(struct txgbe_hw *, u8, u8 *); + s32 (*read_i2c_eeprom)(struct txgbe_hw *, u8, u8 *); + s32 (*write_i2c_eeprom)(struct txgbe_hw *, u8, u8); + void (*i2c_bus_clear)(struct txgbe_hw *); + s32 (*check_overtemp)(struct txgbe_hw *); + s32 (*set_phy_power)(struct txgbe_hw *, bool on); + s32 (*enter_lplu)(struct txgbe_hw *); + s32 (*handle_lasi)(struct txgbe_hw *hw); + s32 (*read_i2c_byte_unlocked)(struct txgbe_hw *, u8 offset, u8 addr, + u8 *value); + s32 (*write_i2c_byte_unlocked)(struct txgbe_hw *, u8 offset, u8 addr, + u8 value); + enum txgbe_phy_type type; enum txgbe_sfp_type sfp_type; }; +struct txgbe_mbx_info { + void (*init_params)(struct txgbe_hw *hw); + s32 (*read)(struct txgbe_hw *, u32 *, u16, u16); + s32 (*write)(struct txgbe_hw *, u32 *, u16, u16); + s32 (*read_posted)(struct txgbe_hw *, u32 *, u16, u16); + s32 (*write_posted)(struct txgbe_hw *, u32 *, u16, u16); + s32 (*check_for_msg)(struct txgbe_hw *, u16); + s32 (*check_for_ack)(struct txgbe_hw *, u16); + s32 (*check_for_rst)(struct txgbe_hw *, u16); +}; + struct txgbe_hw { void IOMEM *hw_addr; void *back; struct txgbe_mac_info mac; struct txgbe_phy_info phy; - + struct txgbe_link_info link; + struct txgbe_rom_info rom; + struct txgbe_flash_info flash; + struct txgbe_bus_info bus; + struct txgbe_mbx_info mbx; u16 device_id; u16 vendor_id; u16 subsystem_device_id; @@ -125,5 +385,6 @@ struct txgbe_hw { }; #include "txgbe_regs.h" +#include "txgbe_dummy.h" #endif /* _TXGBE_TYPE_H_ */ -- 2.18.4