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* [dpdk-dev] [PATCH 00/40] ice base code update
@ 2020-09-07 11:27 Qi Zhang
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 01/40] net/ice/base: handle error gracefully in HW table calloc Qi Zhang
                   ` (41 more replies)
  0 siblings, 42 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:27 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang

main changes:
1. Added support for outer IP filter for GTPC.
2. Added support for outer IP filter for GPTU control packet (no inner IP)
3. Added support for QinQ switch filter
4. code refactor and bug fixes

Qi Zhang (40):
  net/ice/base: handle error gracefully in HW table calloc
  net/ice/base: split caps discover into two functions
  net/ice/base: avoid unnecessary single-member variable-length structs
  net/ice/base: fix issues around move nodes
  net/ice/base: cleanup stack hog
  net/ice/base: clean the code wrapping
  net/ice/base: cleanup misleading comment
  net/ice/base: silence static analysis warning
  net/ice/base: replace single-element array used for C struct hack
  net/ice/base: introduce and use bitmap set API
  net/ice/base: introduce and use bitmap hamming weight API
  net/ice/base: add function header
  net/ice/base: introduce and use for each bit iterator
  net/ice/base: correct abbreviations
  net/ice/base: add AQ cmd 0X0A0A LLDP fltr control
  net/ice/base: add support for GTP-U type switch rule
  net/ice/base: join format strings to same line
  net/ice/base: introduce Tx rate limiting on port level
  net/ice/base: reduce profile to recip info get from firmware
  net/ice/base: refactor DCB related variables
  net/ice/base: support outer IP filter for GTPC
  net/ice/base: support outer IP filter for GTPU without inner IP
  net/ice/base: move a function
  net/ice/base: clear advanced rules in reset preparation
  net/ice/base: move a function
  net/ice/base: add check for failed acts allocation
  net/ice/base: remove repeated words
  net/ice/base: remove function ACL count query
  net/ice/base: preserve NVM capabilities in safe mode
  net/ice/base: misc minor ACL changes
  net/ice/base: adjust rate limit profile ids runtime database
  net/ice/base: enable QinQ filter for switch advanced rule
  net/ice/base: create flash info structure and separate NVM version
  net/ice/base: remove unused parameter
  net/ice/base: minor code clean
  net/ice/base: cache NVM module bank information
  net/ice/base: rename function
  net/ice/base: remove unnecessary conditional
  net/ice/base: rename ACL priority values
  net/ice/base: preserve default aggr vsi information

 drivers/net/ice/base/ice_acl.c           |  40 +-
 drivers/net/ice/base/ice_acl.h           |  22 +-
 drivers/net/ice/base/ice_acl_ctrl.c      | 200 ++++----
 drivers/net/ice/base/ice_adminq_cmd.h    |  83 +---
 drivers/net/ice/base/ice_bitops.h        |  47 ++
 drivers/net/ice/base/ice_common.c        | 434 +++++++++---------
 drivers/net/ice/base/ice_common.h        |   6 +-
 drivers/net/ice/base/ice_controlq.c      |  42 +-
 drivers/net/ice/base/ice_dcb.c           |  44 +-
 drivers/net/ice/base/ice_dcb.h           |  10 +-
 drivers/net/ice/base/ice_flex_pipe.c     | 266 ++++++-----
 drivers/net/ice/base/ice_flex_type.h     |  49 +-
 drivers/net/ice/base/ice_flow.c          | 280 ++++++------
 drivers/net/ice/base/ice_flow.h          |   1 +
 drivers/net/ice/base/ice_nvm.c           | 293 ++++++++----
 drivers/net/ice/base/ice_protocol_type.h |  15 +
 drivers/net/ice/base/ice_sched.c         | 213 +++++----
 drivers/net/ice/base/ice_sched.h         |  10 +-
 drivers/net/ice/base/ice_switch.c        | 755 +++++++++++++++++++++++++------
 drivers/net/ice/base/ice_switch.h        |  60 ++-
 drivers/net/ice/base/ice_type.h          |  77 +++-
 drivers/net/ice/ice_ethdev.c             |  20 +-
 22 files changed, 1803 insertions(+), 1164 deletions(-)

-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 01/40] net/ice/base: handle error gracefully in HW table calloc
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
@ 2020-09-07 11:27 ` Qi Zhang
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 02/40] net/ice/base: split caps discover into two functions Qi Zhang
                   ` (40 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:27 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Surabhi Boob

In the ice_init_hw_tbls API, if the ice_calloc for es->written
fails, catch that error and bail out gracefully, instead of
continuing with a NULL pointer.

Signed-off-by: Surabhi Boob <surabhi.boob@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flex_pipe.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 999ad6be3..bf8530e89 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -3908,11 +3908,19 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
 		es->ref_count = (u16 *)
 			ice_calloc(hw, es->count, sizeof(*es->ref_count));
 
+		if (!es->ref_count)
+			goto err;
+
 		es->written = (u8 *)
 			ice_calloc(hw, es->count, sizeof(*es->written));
+
+		if (!es->written)
+			goto err;
+
 		es->mask_ena = (u32 *)
 			ice_calloc(hw, es->count, sizeof(*es->mask_ena));
-		if (!es->ref_count)
+
+		if (!es->mask_ena)
 			goto err;
 	}
 	return ICE_SUCCESS;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 02/40] net/ice/base: split caps discover into two functions
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 01/40] net/ice/base: handle error gracefully in HW table calloc Qi Zhang
@ 2020-09-07 11:27 ` Qi Zhang
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 03/40] net/ice/base: avoid unnecessary single-member variable-length structs Qi Zhang
                   ` (39 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:27 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Jacob Keller

Using the new ice_aq_list_caps and ice_parse_(dev|func)_caps functions,
replace ice_discover_caps with two functions that each take a pointer to
the dev_caps and func_caps structures respectively.

This makes the side effect of updating the hw->dev_caps and
hw->func_caps obvious from reading the implementation of the function.
Additionally, it opens the way for enabling reading of device
capabilities outside of the initialization flow. By passing in
a pointer, another caller will be able to read the capabilities without
modifying the hw capabilities structures.

As there are no other callers, it is safe to now remove
ice_aq_discover_caps and ice_parse_caps.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 94 ++++++++++++++++-----------------------
 1 file changed, 39 insertions(+), 55 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 6168fb4f0..ec8d46017 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -87,7 +87,8 @@ enum ice_status ice_clear_pf_cfg(struct ice_hw *hw)
  * is returned in user specified buffer. Please interpret user specified
  * buffer as "manage_mac_read" response.
  * Response such as various MAC addresses are stored in HW struct (port.mac)
- * ice_aq_discover_caps is expected to be called before this function is called.
+ * ice_discover_dev_caps is expected to be called before this function is
+ * called.
  */
 static enum ice_status
 ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size,
@@ -2156,30 +2157,6 @@ ice_parse_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
 }
 
 /**
- * ice_parse_caps - parse function/device capabilities
- * @hw: pointer to the HW struct
- * @buf: pointer to a buffer containing function/device capability records
- * @cap_count: number of capability records in the list
- * @opc: type of capabilities list to parse
- *
- * Helper function to parse function(0x000a)/device(0x000b) capabilities list.
- */
-static void
-ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
-	       enum ice_adminq_opc opc)
-{
-	if (!buf)
-		return;
-
-	if (opc == ice_aqc_opc_list_dev_caps)
-		ice_parse_dev_caps(hw, &hw->dev_caps, buf, cap_count);
-	else if (opc == ice_aqc_opc_list_func_caps)
-		ice_parse_func_caps(hw, &hw->func_caps, buf, cap_count);
-	else
-		ice_debug(hw, ICE_DBG_INIT, "wrong opcode\n");
-}
-
-/**
  * ice_aq_list_caps - query function/device capabilities
  * @hw: pointer to the HW struct
  * @buf: a buffer to hold the capabilities
@@ -2222,47 +2199,52 @@ ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count,
 }
 
 /**
- * ice_aq_discover_caps - query function/device capabilities
- * @hw: pointer to the HW struct
- * @buf: a virtual buffer to hold the capabilities
- * @buf_size: Size of the virtual buffer
- * @cap_count: cap count needed if AQ err==ENOMEM
- * @opc: capabilities type to discover - pass in the command opcode
- * @cd: pointer to command details structure or NULL
- *
- * Get the function(0x000a)/device(0x000b) capabilities description from
- * the firmware.
+ * ice_discover_dev_caps - Read and extract device capabilities
+ * @hw: pointer to the hardware structure
+ * @dev_caps: pointer to device capabilities structure
  *
- * NOTE: this function has the side effect of updating the hw->dev_caps or
- * hw->func_caps by way of calling ice_parse_caps.
+ * Read the device capabilities and extract them into the dev_caps structure
+ * for later use.
  */
 static enum ice_status
-ice_aq_discover_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count,
-		     enum ice_adminq_opc opc, struct ice_sq_cd *cd)
+ice_discover_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_caps)
 {
-	u32 local_cap_count = 0;
 	enum ice_status status;
+	u32 cap_count = 0;
+	void *cbuf;
 
-	status = ice_aq_list_caps(hw, buf, buf_size, &local_cap_count,
-				  opc, cd);
+	cbuf = ice_malloc(hw, ICE_AQ_MAX_BUF_LEN);
+	if (!cbuf)
+		return ICE_ERR_NO_MEMORY;
+
+	/* Although the driver doesn't know the number of capabilities the
+	 * device will return, we can simply send a 4KB buffer, the maximum
+	 * possible size that firmware can return.
+	 */
+	cap_count = ICE_AQ_MAX_BUF_LEN / sizeof(struct ice_aqc_list_caps_elem);
+
+	status = ice_aq_list_caps(hw, cbuf, ICE_AQ_MAX_BUF_LEN, &cap_count,
+				  ice_aqc_opc_list_dev_caps, NULL);
 	if (!status)
-		ice_parse_caps(hw, buf, local_cap_count, opc);
-	else if (hw->adminq.sq_last_status == ICE_AQ_RC_ENOMEM)
-		*cap_count = local_cap_count;
+		ice_parse_dev_caps(hw, dev_caps, cbuf, cap_count);
+	ice_free(hw, cbuf);
 
 	return status;
 }
 
 /**
- * ice_discover_caps - get info about the HW
+ * ice_discover_func_caps - Read and extract function capabilities
  * @hw: pointer to the hardware structure
- * @opc: capabilities type to discover - pass in the command opcode
+ * @func_caps: pointer to function capabilities structure
+ *
+ * Read the function capabilities and extract them into the func_caps structure
+ * for later use.
  */
 static enum ice_status
-ice_discover_caps(struct ice_hw *hw, enum ice_adminq_opc opc)
+ice_discover_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_caps)
 {
 	enum ice_status status;
-	u32 cap_count;
+	u32 cap_count = 0;
 	void *cbuf;
 
 	cbuf = ice_malloc(hw, ICE_AQ_MAX_BUF_LEN);
@@ -2275,8 +2257,10 @@ ice_discover_caps(struct ice_hw *hw, enum ice_adminq_opc opc)
 	 */
 	cap_count = ICE_AQ_MAX_BUF_LEN / sizeof(struct ice_aqc_list_caps_elem);
 
-	status = ice_aq_discover_caps(hw, cbuf, ICE_AQ_MAX_BUF_LEN, &cap_count,
-				      opc, NULL);
+	status = ice_aq_list_caps(hw, cbuf, ICE_AQ_MAX_BUF_LEN, &cap_count,
+				  ice_aqc_opc_list_func_caps, NULL);
+	if (!status)
+		ice_parse_func_caps(hw, func_caps, cbuf, cap_count);
 	ice_free(hw, cbuf);
 
 	return status;
@@ -2354,11 +2338,11 @@ enum ice_status ice_get_caps(struct ice_hw *hw)
 {
 	enum ice_status status;
 
-	status = ice_discover_caps(hw, ice_aqc_opc_list_dev_caps);
-	if (!status)
-		status = ice_discover_caps(hw, ice_aqc_opc_list_func_caps);
+	status = ice_discover_dev_caps(hw, &hw->dev_caps);
+	if (status)
+		return status;
 
-	return status;
+	return ice_discover_func_caps(hw, &hw->func_caps);
 }
 
 /**
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 03/40] net/ice/base: avoid unnecessary single-member variable-length structs
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 01/40] net/ice/base: handle error gracefully in HW table calloc Qi Zhang
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 02/40] net/ice/base: split caps discover into two functions Qi Zhang
@ 2020-09-07 11:27 ` Qi Zhang
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 04/40] net/ice/base: fix issues around move nodes Qi Zhang
                   ` (38 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:27 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Bruce Allan

There are a number of structures that consist of a one-element array as the
only struct member.  Some of those are unused (ice_aqc_add_get_recipe_data,
ice_aqc_get_port_options_data, ice_aqc_dis_txq, etc.) so remove them.
Others are used to index into a buffer/array consisting of a variable
number of a different data or structure type.  Those are unnecessary since
we can use simple pointer arithmetic or index directly into the buffer to
access individual elements of the buffer/array.

Additional code cleanups were done near areas affected by this change.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_adminq_cmd.h | 63 ++---------------------------
 drivers/net/ice/base/ice_common.c     |  4 +-
 drivers/net/ice/base/ice_common.h     |  2 +-
 drivers/net/ice/base/ice_dcb.c        |  4 +-
 drivers/net/ice/base/ice_sched.c      | 76 ++++++++++++++++-------------------
 drivers/net/ice/base/ice_sched.h      | 10 ++---
 drivers/net/ice/base/ice_switch.c     | 38 +++++++++---------
 drivers/net/ice/base/ice_switch.h     | 10 ++---
 drivers/net/ice/ice_ethdev.c          |  6 +--
 9 files changed, 75 insertions(+), 138 deletions(-)

diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index e17369f5e..df41cce06 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -224,13 +224,6 @@ struct ice_aqc_get_sw_cfg_resp_elem {
 #define ICE_AQC_GET_SW_CONF_RESP_IS_VF		BIT(15)
 };
 
-/* The response buffer is as follows. Note that the length of the
- * elements array varies with the length of the command response.
- */
-struct ice_aqc_get_sw_cfg_resp {
-	struct ice_aqc_get_sw_cfg_resp_elem elements[1];
-};
-
 /* These resource type defines are used for all switch resource
  * commands where a resource type is required, such as:
  * Get Resource Allocation command (indirect 0x0204)
@@ -294,15 +287,6 @@ struct ice_aqc_get_res_resp_elem {
 	__le16 total_free; /* Resources un-allocated/not reserved by any PF */
 };
 
-/* Buffer for Get Resource command */
-struct ice_aqc_get_res_resp {
-	/* Number of resource entries to be calculated using
-	 * datalen/sizeof(struct ice_aqc_cmd_resp)).
-	 * Value of 'datalen' gets updated as part of response.
-	 */
-	struct ice_aqc_get_res_resp_elem elem[1];
-};
-
 /* Allocate Resources command (indirect 0x0208)
  * Free Resources command (indirect 0x0209)
  */
@@ -350,10 +334,6 @@ struct ice_aqc_get_allocd_res_desc {
 	__le32 addr_low;
 };
 
-struct ice_aqc_get_allocd_res_desc_resp {
-	struct ice_aqc_res_elem elem[1];
-};
-
 /* Add VSI (indirect 0x0210)
  * Update VSI (indirect 0x0211)
  * Get VSI (indirect 0x0212)
@@ -729,13 +709,6 @@ struct ice_aqc_recipe_data_elem {
 	u8 rsvd2[20];
 };
 
-/* This struct contains a number of entries as per the
- * num_sub_recipes in the command
- */
-struct ice_aqc_add_get_recipe_data {
-	struct ice_aqc_recipe_data_elem recipe[1];
-};
-
 /* Set/Get Recipes to Profile Association (direct 0x0291/0x0293) */
 struct ice_aqc_recipe_to_profile {
 	__le16 profile_id;
@@ -757,7 +730,6 @@ struct ice_aqc_sw_rules {
 	__le32 addr_low;
 };
 
-#pragma pack(1)
 /* Add/Update/Get/Remove lookup Rx/Tx command/response entry
  * This structures describes the lookup rules and associated actions. "index"
  * is returned as part of a response to a successful Add command, and can be
@@ -842,7 +814,6 @@ struct ice_sw_rule_lkup_rx_tx {
 	__le16 hdr_len;
 	u8 hdr[1];
 };
-#pragma pack()
 
 /* Add/Update/Remove large action command/response entry
  * "index" is returned as part of a response to a successful Add command, and
@@ -851,7 +822,6 @@ struct ice_sw_rule_lkup_rx_tx {
 struct ice_sw_rule_lg_act {
 	__le16 index; /* Index in large action table */
 	__le16 size;
-	__le32 act[1]; /* array of size for actions */
 	/* Max number of large actions */
 #define ICE_MAX_LG_ACT	4
 	/* Bit 0:1 - Action type */
@@ -902,6 +872,7 @@ struct ice_sw_rule_lg_act {
 #define ICE_LG_ACT_STAT_COUNT		0x7
 #define ICE_LG_ACT_STAT_COUNT_S		3
 #define ICE_LG_ACT_STAT_COUNT_M		(0x7F << ICE_LG_ACT_STAT_COUNT_S)
+	__le32 act[1]; /* array of size for actions */
 };
 
 /* Add/Update/Remove VSI list command/response entry
@@ -1009,14 +980,6 @@ struct ice_aqc_sched_elem_cmd {
 	__le32 addr_low;
 };
 
-/* This is the buffer for:
- * Suspend Nodes (indirect 0x0409)
- * Resume Nodes (indirect 0x040A)
- */
-struct ice_aqc_suspend_resume_elem {
-	__le32 teid[1];
-};
-
 struct ice_aqc_txsched_move_grp_info_hdr {
 	__le32 src_parent_teid;
 	__le32 dest_parent_teid;
@@ -1082,14 +1045,6 @@ struct ice_aqc_add_elem {
 	struct ice_aqc_txsched_elem_data generic[1];
 };
 
-struct ice_aqc_conf_elem {
-	struct ice_aqc_txsched_elem_data generic[1];
-};
-
-struct ice_aqc_get_elem {
-	struct ice_aqc_txsched_elem_data generic[1];
-};
-
 struct ice_aqc_get_topo_elem {
 	struct ice_aqc_txsched_topo_grp_info_hdr hdr;
 	struct ice_aqc_txsched_elem_data
@@ -1161,10 +1116,6 @@ struct ice_aqc_rl_profile_elem {
 	__le16 rl_encode;
 };
 
-struct ice_aqc_rl_profile_generic_elem {
-	struct ice_aqc_rl_profile_elem generic[1];
-};
-
 /* Configure L2 Node CGD (indirect 0x0414)
  * This indirect command allows configuring a congestion domain for given L2
  * node TEIDs in the scheduler topology.
@@ -1182,10 +1133,6 @@ struct ice_aqc_cfg_l2_node_cgd_elem {
 	u8 reserved[3];
 };
 
-struct ice_aqc_cfg_l2_node_cgd_data {
-	struct ice_aqc_cfg_l2_node_cgd_elem elem[1];
-};
-
 /* Query Scheduler Resource Allocation (indirect 0x0412)
  * This indirect command retrieves the scheduler resources allocated by
  * EMP Firmware to the given PF.
@@ -2512,23 +2459,21 @@ struct ice_aqc_dis_txqs {
  * added before the start of the next group, to allow correct
  * alignment of the parent_teid field.
  */
+#pragma pack(1)
 struct ice_aqc_dis_txq_item {
 	__le32 parent_teid;
 	u8 num_qs;
 	u8 rsvd;
 	/* The length of the q_id array varies according to num_qs */
-	__le16 q_id[1];
-	/* This only applies from F8 onward */
 #define ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S		15
 #define ICE_AQC_Q_DIS_BUF_ELEM_TYPE_LAN_Q	\
 			(0 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S)
 #define ICE_AQC_Q_DIS_BUF_ELEM_TYPE_RDMA_QSET	\
 			(1 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S)
+	__le16 q_id[1];
 };
 
-struct ice_aqc_dis_txq {
-	struct ice_aqc_dis_txq_item qgrps[1];
-};
+#pragma pack()
 
 /* Tx LAN Queues Cleanup Event (0x0C31) */
 struct ice_aqc_txqs_cleanup {
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index ec8d46017..4be363047 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -4596,14 +4596,14 @@ ice_stat_update_repc(struct ice_hw *hw, u16 vsi_handle, bool prev_stat_loaded,
  */
 enum ice_status
 ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
-		     struct ice_aqc_get_elem *buf)
+		     struct ice_aqc_txsched_elem_data *buf)
 {
 	u16 buf_size, num_elem_ret = 0;
 	enum ice_status status;
 
 	buf_size = sizeof(*buf);
 	ice_memset(buf, 0, buf_size, ICE_NONDMA_MEM);
-	buf->generic[0].node_teid = CPU_TO_LE32(node_teid);
+	buf->node_teid = CPU_TO_LE32(node_teid);
 	status = ice_aq_query_sched_elems(hw, 1, buf, buf_size, &num_elem_ret,
 					  NULL);
 	if (status != ICE_SUCCESS || num_elem_ret != 1)
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 329d0b50f..1aea915ad 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -219,7 +219,7 @@ enum ice_fw_modes ice_get_fw_mode(struct ice_hw *hw);
 void ice_print_rollback_msg(struct ice_hw *hw);
 enum ice_status
 ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
-		     struct ice_aqc_get_elem *buf);
+		     struct ice_aqc_txsched_elem_data *buf);
 enum ice_status
 ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
 		    struct ice_sq_cd *cd);
diff --git a/drivers/net/ice/base/ice_dcb.c b/drivers/net/ice/base/ice_dcb.c
index b9643b5ce..01cee227e 100644
--- a/drivers/net/ice/base/ice_dcb.c
+++ b/drivers/net/ice/base/ice_dcb.c
@@ -1328,7 +1328,7 @@ ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
 			    struct ice_aqc_port_ets_elem *buf)
 {
 	struct ice_sched_node *node, *tc_node;
-	struct ice_aqc_get_elem elem;
+	struct ice_aqc_txsched_elem_data elem;
 	enum ice_status status = ICE_SUCCESS;
 	u32 teid1, teid2;
 	u8 i, j;
@@ -1370,7 +1370,7 @@ ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
 		/* new TC */
 		status = ice_sched_query_elem(pi->hw, teid2, &elem);
 		if (!status)
-			status = ice_sched_add_node(pi, 1, &elem.generic[0]);
+			status = ice_sched_add_node(pi, 1, &elem);
 		if (status)
 			break;
 		/* update the TC number */
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 8ee4b708e..cf9a6a777 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -130,7 +130,7 @@ ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
  */
 enum ice_status
 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
-			 struct ice_aqc_get_elem *buf, u16 buf_size,
+			 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
 			 u16 *elems_ret, struct ice_sq_cd *cd)
 {
 	return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_get_sched_elems,
@@ -150,8 +150,8 @@ enum ice_status
 ice_sched_add_node(struct ice_port_info *pi, u8 layer,
 		   struct ice_aqc_txsched_elem_data *info)
 {
+	struct ice_aqc_txsched_elem_data elem;
 	struct ice_sched_node *parent;
-	struct ice_aqc_get_elem elem;
 	struct ice_sched_node *node;
 	enum ice_status status;
 	struct ice_hw *hw;
@@ -194,7 +194,7 @@ ice_sched_add_node(struct ice_port_info *pi, u8 layer,
 	node->parent = parent;
 	node->tx_sched_layer = layer;
 	parent->children[parent->num_children++] = node;
-	node->info = elem.generic[0];
+	node->info = elem;
 	return ICE_SUCCESS;
 }
 
@@ -422,7 +422,7 @@ ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
  */
 static enum ice_status
 ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
-		       struct ice_aqc_conf_elem *buf, u16 buf_size,
+		       struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
 		       u16 *elems_cfgd, struct ice_sq_cd *cd)
 {
 	return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_cfg_sched_elems,
@@ -463,8 +463,7 @@ ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
  * Suspend scheduling elements (0x0409)
  */
 static enum ice_status
-ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req,
-			   struct ice_aqc_suspend_resume_elem *buf,
+ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
 			   u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
 {
 	return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_suspend_sched_elems,
@@ -484,8 +483,7 @@ ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req,
  * resume scheduling elements (0x040A)
  */
 static enum ice_status
-ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req,
-			  struct ice_aqc_suspend_resume_elem *buf,
+ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
 			  u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
 {
 	return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_resume_sched_elems,
@@ -526,18 +524,17 @@ static enum ice_status
 ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
 			       bool suspend)
 {
-	struct ice_aqc_suspend_resume_elem *buf;
 	u16 i, buf_size, num_elem_ret = 0;
 	enum ice_status status;
+	__le32 *buf;
 
 	buf_size = sizeof(*buf) * num_nodes;
-	buf = (struct ice_aqc_suspend_resume_elem *)
-		ice_malloc(hw, buf_size);
+	buf = (__le32 *)ice_malloc(hw, buf_size);
 	if (!buf)
 		return ICE_ERR_NO_MEMORY;
 
 	for (i = 0; i < num_nodes; i++)
-		buf->teid[i] = CPU_TO_LE32(node_teids[i]);
+		buf[i] = CPU_TO_LE32(node_teids[i]);
 
 	if (suspend)
 		status = ice_aq_suspend_sched_elems(hw, num_nodes, buf,
@@ -610,7 +607,7 @@ ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
  */
 static enum ice_status
 ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
-		  u16 num_profiles, struct ice_aqc_rl_profile_generic_elem *buf,
+		  u16 num_profiles, struct ice_aqc_rl_profile_elem *buf,
 		  u16 buf_size, u16 *num_processed, struct ice_sq_cd *cd)
 {
 	struct ice_aqc_rl_profile *cmd;
@@ -641,13 +638,11 @@ ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
  */
 static enum ice_status
 ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
-		      struct ice_aqc_rl_profile_generic_elem *buf,
-		      u16 buf_size, u16 *num_profiles_added,
-		      struct ice_sq_cd *cd)
+		      struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
+		      u16 *num_profiles_added, struct ice_sq_cd *cd)
 {
-	return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles,
-				 num_profiles, buf,
-				 buf_size, num_profiles_added, cd);
+	return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles, num_profiles,
+				 buf, buf_size, num_profiles_added, cd);
 }
 
 /**
@@ -662,8 +657,8 @@ ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
  */
 enum ice_status
 ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
-			struct ice_aqc_rl_profile_generic_elem *buf,
-			u16 buf_size, struct ice_sq_cd *cd)
+			struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
+			struct ice_sq_cd *cd)
 {
 	return ice_aq_rl_profile(hw, ice_aqc_opc_query_rl_profiles,
 				 num_profiles, buf, buf_size, NULL, cd);
@@ -682,13 +677,12 @@ ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
  */
 static enum ice_status
 ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
-			 struct ice_aqc_rl_profile_generic_elem *buf,
-			 u16 buf_size, u16 *num_profiles_removed,
-			 struct ice_sq_cd *cd)
+			 struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
+			 u16 *num_profiles_removed, struct ice_sq_cd *cd)
 {
 	return ice_aq_rl_profile(hw, ice_aqc_opc_remove_rl_profiles,
-				 num_profiles, buf,
-				 buf_size, num_profiles_removed, cd);
+				 num_profiles, buf, buf_size,
+				 num_profiles_removed, cd);
 }
 
 /**
@@ -704,7 +698,7 @@ static enum ice_status
 ice_sched_del_rl_profile(struct ice_hw *hw,
 			 struct ice_aqc_rl_profile_info *rl_info)
 {
-	struct ice_aqc_rl_profile_generic_elem *buf;
+	struct ice_aqc_rl_profile_elem *buf;
 	u16 num_profiles_removed;
 	enum ice_status status;
 	u16 num_profiles = 1;
@@ -713,8 +707,7 @@ ice_sched_del_rl_profile(struct ice_hw *hw,
 		return ICE_ERR_IN_USE;
 
 	/* Safe to remove profile ID */
-	buf = (struct ice_aqc_rl_profile_generic_elem *)
-		&rl_info->profile;
+	buf = &rl_info->profile;
 	status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
 					  &num_profiles_removed, NULL);
 	if (status || num_profiles_removed != num_profiles)
@@ -860,7 +853,7 @@ void ice_sched_cleanup_all(struct ice_hw *hw)
  */
 enum ice_status
 ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,
-		       struct ice_aqc_cfg_l2_node_cgd_data *buf,
+		       struct ice_aqc_cfg_l2_node_cgd_elem *buf,
 		       u16 buf_size, struct ice_sq_cd *cd)
 {
 	struct ice_aqc_cfg_l2_node_cgd *cmd;
@@ -1602,7 +1595,7 @@ ice_sched_get_agg_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
  */
 static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)
 {
-	struct ice_aqc_get_elem buf;
+	struct ice_aqc_txsched_elem_data buf;
 	enum ice_status status;
 	u32 node_teid;
 
@@ -1611,7 +1604,7 @@ static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)
 	if (status != ICE_SUCCESS)
 		return false;
 
-	if (memcmp(buf.generic, &node->info, sizeof(*buf.generic))) {
+	if (memcmp(&buf, &node->info, sizeof(buf))) {
 		ice_debug(hw, ICE_DBG_SCHED, "Node mismatch for teid=0x%x\n",
 			  node_teid);
 		return false;
@@ -2140,7 +2133,7 @@ bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node)
  */
 enum ice_status
 ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
-			  struct ice_aqc_get_elem *buf, u16 buf_size,
+			  struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
 			  struct ice_sq_cd *cd)
 {
 	struct ice_aqc_query_node_to_root *cmd;
@@ -2904,7 +2897,7 @@ static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
  * @node: pointer to node
  * @info: node info to update
  *
- * It updates the HW DB, and local SW DB of node. It updates the scheduling
+ * Update the HW DB, and local SW DB of node. Update the scheduling
  * parameters of node from argument info data buffer (Info->data buf) and
  * returns success or error on config sched element failure. The caller
  * needs to hold scheduler lock.
@@ -2913,18 +2906,18 @@ static enum ice_status
 ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
 		      struct ice_aqc_txsched_elem_data *info)
 {
-	struct ice_aqc_conf_elem buf;
+	struct ice_aqc_txsched_elem_data buf;
 	enum ice_status status;
 	u16 elem_cfgd = 0;
 	u16 num_elems = 1;
 
-	buf.generic[0] = *info;
+	buf = *info;
 	/* Parent TEID is reserved field in this aq call */
-	buf.generic[0].parent_teid = 0;
+	buf.parent_teid = 0;
 	/* Element type is reserved field in this aq call */
-	buf.generic[0].data.elem_type = 0;
+	buf.data.elem_type = 0;
 	/* Flags is reserved field in this aq call */
-	buf.generic[0].data.flags = 0;
+	buf.data.flags = 0;
 
 	/* Update HW DB */
 	/* Configure element node */
@@ -3875,9 +3868,9 @@ static struct ice_aqc_rl_profile_info *
 ice_sched_add_rl_profile(struct ice_port_info *pi,
 			 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
 {
-	struct ice_aqc_rl_profile_generic_elem *buf;
 	struct ice_aqc_rl_profile_info *rl_prof_elem;
 	u16 profiles_added = 0, num_profiles = 1;
+	struct ice_aqc_rl_profile_elem *buf;
 	enum ice_status status;
 	struct ice_hw *hw;
 	u8 profile_type;
@@ -3926,8 +3919,7 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
 	rl_prof_elem->profile.max_burst_size = CPU_TO_LE16(hw->max_burst_size);
 
 	/* Create new entry in HW DB */
-	buf = (struct ice_aqc_rl_profile_generic_elem *)
-		&rl_prof_elem->profile;
+	buf = &rl_prof_elem->profile;
 	status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),
 				       &profiles_added, NULL);
 	if (status || profiles_added != num_profiles)
diff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h
index 57bf4b59d..da2604c75 100644
--- a/drivers/net/ice/base/ice_sched.h
+++ b/drivers/net/ice/base/ice_sched.h
@@ -75,15 +75,15 @@ struct ice_sched_agg_info {
 /* FW AQ command calls */
 enum ice_status
 ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
-			struct ice_aqc_rl_profile_generic_elem *buf,
-			u16 buf_size, struct ice_sq_cd *cd);
+			struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
+			struct ice_sq_cd *cd);
 enum ice_status
 ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_nodes,
-		       struct ice_aqc_cfg_l2_node_cgd_data *buf, u16 buf_size,
+		       struct ice_aqc_cfg_l2_node_cgd_elem *buf, u16 buf_size,
 		       struct ice_sq_cd *cd);
 enum ice_status
 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
-			 struct ice_aqc_get_elem *buf, u16 buf_size,
+			 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
 			 u16 *elems_ret, struct ice_sq_cd *cd);
 enum ice_status ice_sched_init_port(struct ice_port_info *pi);
 enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw);
@@ -117,7 +117,7 @@ ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
 bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node);
 enum ice_status
 ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
-			  struct ice_aqc_get_elem *buf, u16 buf_size,
+			  struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
 			  struct ice_sq_cd *cd);
 
 /* Tx scheduler rate limiter functions */
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index ebf405f7a..e0eebe3d5 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1421,7 +1421,7 @@ ice_init_def_sw_recp(struct ice_hw *hw, struct ice_sw_recipe **recp_list)
  * @num_elems: pointer to number of elements
  * @cd: pointer to command details structure or NULL
  *
- * Get switch configuration (0x0200) to be placed in 'buff'.
+ * Get switch configuration (0x0200) to be placed in buf.
  * This admin command returns information such as initial VSI/port number
  * and switch ID it belongs to.
  *
@@ -1438,13 +1438,13 @@ ice_init_def_sw_recp(struct ice_hw *hw, struct ice_sw_recipe **recp_list)
  * parsing the response buffer.
  */
 static enum ice_status
-ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp *buf,
+ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp_elem *buf,
 		  u16 buf_size, u16 *req_desc, u16 *num_elems,
 		  struct ice_sq_cd *cd)
 {
 	struct ice_aqc_get_sw_cfg *cmd;
-	enum ice_status status;
 	struct ice_aq_desc desc;
+	enum ice_status status;
 
 	ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_sw_cfg);
 	cmd = &desc.params.get_sw_conf;
@@ -2438,7 +2438,7 @@ ice_init_port_info(struct ice_port_info *pi, u16 vsi_port_num, u8 type,
  */
 enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)
 {
-	struct ice_aqc_get_sw_cfg_resp *rbuf;
+	struct ice_aqc_get_sw_cfg_resp_elem *rbuf;
 	enum ice_status status;
 	u8 num_total_ports;
 	u16 req_desc = 0;
@@ -2448,7 +2448,7 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)
 
 	num_total_ports = 1;
 
-	rbuf = (struct ice_aqc_get_sw_cfg_resp *)
+	rbuf = (struct ice_aqc_get_sw_cfg_resp_elem *)
 		ice_malloc(hw, ICE_SW_CFG_MAX_BUF_LEN);
 
 	if (!rbuf)
@@ -2460,19 +2460,19 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)
 	 * writing a non-zero value in req_desc
 	 */
 	do {
+		struct ice_aqc_get_sw_cfg_resp_elem *ele;
+
 		status = ice_aq_get_sw_cfg(hw, rbuf, ICE_SW_CFG_MAX_BUF_LEN,
 					   &req_desc, &num_elems, NULL);
 
 		if (status)
 			break;
 
-		for (i = 0; i < num_elems; i++) {
-			struct ice_aqc_get_sw_cfg_resp_elem *ele;
+		for (i = 0, ele = rbuf; i < num_elems; i++, ele++) {
 			u16 pf_vf_num, swid, vsi_port_num;
 			bool is_vf = false;
 			u8 res_type;
 
-			ele = rbuf[i].elements;
 			vsi_port_num = LE16_TO_CPU(ele->vsi_port_num) &
 				ICE_AQC_GET_SW_CONF_RESP_VSI_PORT_NUM_M;
 
@@ -3613,17 +3613,18 @@ ice_remove_rule_internal(struct ice_hw *hw, struct ice_sw_recipe *recp_list,
  * ice_aq_get_res_alloc - get allocated resources
  * @hw: pointer to the HW struct
  * @num_entries: pointer to u16 to store the number of resource entries returned
- * @buf: pointer to user-supplied buffer
- * @buf_size: size of buff
+ * @buf: pointer to buffer
+ * @buf_size: size of buf
  * @cd: pointer to command details structure or NULL
  *
- * The user-supplied buffer must be large enough to store the resource
+ * The caller-supplied buffer must be large enough to store the resource
  * information for all resource types. Each resource type is an
- * ice_aqc_get_res_resp_data_elem structure.
+ * ice_aqc_get_res_resp_elem structure.
  */
 enum ice_status
-ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,
-		     u16 buf_size, struct ice_sq_cd *cd)
+ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries,
+		     struct ice_aqc_get_res_resp_elem *buf, u16 buf_size,
+		     struct ice_sq_cd *cd)
 {
 	struct ice_aqc_get_res_alloc *resp;
 	enum ice_status status;
@@ -3650,8 +3651,8 @@ ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,
  * ice_aq_get_res_descs - get allocated resource descriptors
  * @hw: pointer to the hardware structure
  * @num_entries: number of resource entries in buffer
- * @buf: Indirect buffer to hold data parameters and response
- * @buf_size: size of buffer for indirect commands
+ * @buf: structure to hold response data buffer
+ * @buf_size: size of buffer
  * @res_type: resource type
  * @res_shared: is resource shared
  * @desc_id: input - first desc ID to start; output - next desc ID
@@ -3659,9 +3660,8 @@ ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,
  */
 enum ice_status
 ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
-		     struct ice_aqc_get_allocd_res_desc_resp *buf,
-		     u16 buf_size, u16 res_type, bool res_shared, u16 *desc_id,
-		     struct ice_sq_cd *cd)
+		     struct ice_aqc_res_elem *buf, u16 buf_size, u16 res_type,
+		     bool res_shared, u16 *desc_id, struct ice_sq_cd *cd)
 {
 	struct ice_aqc_get_allocd_res_desc *cmd;
 	struct ice_aq_desc desc;
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 77c70d3b2..fe7b86f12 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -408,13 +408,13 @@ ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
 enum ice_status
 ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id);
 enum ice_status
-ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,
-		     u16 buf_size, struct ice_sq_cd *cd);
+ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries,
+		     struct ice_aqc_get_res_resp_elem *buf, u16 buf_size,
+		     struct ice_sq_cd *cd);
 enum ice_status
 ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
-		     struct ice_aqc_get_allocd_res_desc_resp *buf,
-		     u16 buf_size, u16 res_type, bool res_shared, u16 *desc_id,
-		     struct ice_sq_cd *cd);
+		     struct ice_aqc_res_elem *buf, u16 buf_size, u16 res_type,
+		     bool res_shared, u16 *desc_id, struct ice_sq_cd *cd);
 enum ice_status
 ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
 enum ice_status
diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index 4a161ae8a..b0a7a6707 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -2056,7 +2056,7 @@ ice_get_hw_res(struct ice_hw *hw, uint16_t res_type,
 		uint16_t num, uint16_t desc_id,
 		uint16_t *prof_buf, uint16_t *num_prof)
 {
-	struct ice_aqc_get_allocd_res_desc_resp *resp_buf;
+	struct ice_aqc_res_elem *resp_buf;
 	int ret;
 	uint16_t buf_len;
 	bool res_shared = 1;
@@ -2065,7 +2065,7 @@ ice_get_hw_res(struct ice_hw *hw, uint16_t res_type,
 	struct ice_aqc_get_allocd_res_desc *cmd =
 			&aq_desc.params.get_res_desc;
 
-	buf_len = sizeof(resp_buf->elem) * num;
+	buf_len = sizeof(*resp_buf) * num;
 	resp_buf = ice_malloc(hw, buf_len);
 	if (!resp_buf)
 		return -ENOMEM;
@@ -2084,7 +2084,7 @@ ice_get_hw_res(struct ice_hw *hw, uint16_t res_type,
 	else
 		goto exit;
 
-	ice_memcpy(prof_buf, resp_buf->elem, sizeof(resp_buf->elem) *
+	ice_memcpy(prof_buf, resp_buf, sizeof(*resp_buf) *
 			(*num_prof), ICE_NONDMA_TO_NONDMA);
 
 exit:
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 04/40] net/ice/base: fix issues around move nodes
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (2 preceding siblings ...)
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 03/40] net/ice/base: avoid unnecessary single-member variable-length structs Qi Zhang
@ 2020-09-07 11:27 ` Qi Zhang
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 05/40] net/ice/base: cleanup stack hog Qi Zhang
                   ` (37 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:27 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, stable, Victor Raj

1. Fixed the max children check when moving the last(8th) children. This
allows the parent node to hold 8 children instead of 7.
2. Check whether the VSI is already part of the given aggregator subtree
before moving it.

Fixes: 29a0c11489ef ("net/ice/base: clean code")
Cc: stable@dpdk.org

Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_sched.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index cf9a6a777..edd90aecb 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -2267,7 +2267,7 @@ ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
 		return ICE_ERR_PARAM;
 
 	/* Does parent have enough space */
-	if (parent->num_children + num_items >=
+	if (parent->num_children + num_items >
 	    hw->max_children[parent->tx_sched_layer])
 		return ICE_ERR_AQ_FULL;
 
@@ -2335,6 +2335,10 @@ ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
 	if (!vsi_node)
 		return ICE_ERR_DOES_NOT_EXIST;
 
+	/* Is this VSI already part of given aggregator? */
+	if (ice_sched_find_node_in_subtree(pi->hw, agg_node, vsi_node))
+		return ICE_SUCCESS;
+
 	aggl = ice_sched_get_agg_layer(pi->hw);
 	vsil = ice_sched_get_vsi_layer(pi->hw);
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 05/40] net/ice/base: cleanup stack hog
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (3 preceding siblings ...)
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 04/40] net/ice/base: fix issues around move nodes Qi Zhang
@ 2020-09-07 11:27 ` Qi Zhang
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 06/40] net/ice/base: clean the code wrapping Qi Zhang
                   ` (36 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:27 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Bruce Allan

In ice_flow_add_prof_sync(), struct ice_flow_prof_params has recently
grown in size hogging stack space when allocated there.  Hogging stack
space should be avoided.  Change allocation to be on the heap when needed.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flow.c | 55 +++++++++++++++++++++++------------------
 1 file changed, 31 insertions(+), 24 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 6035bdfcf..d68a9ca5d 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1815,52 +1815,57 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,
 		       struct ice_flow_action *acts, u8 acts_cnt,
 		       struct ice_flow_prof **prof)
 {
-	struct ice_flow_prof_params params;
+	struct ice_flow_prof_params *params;
 	enum ice_status status;
 	u8 i;
 
 	if (!prof || (acts_cnt && !acts))
 		return ICE_ERR_BAD_PTR;
 
-	ice_memset(&params, 0, sizeof(params), ICE_NONDMA_MEM);
-	params.prof = (struct ice_flow_prof *)
-		ice_malloc(hw, sizeof(*params.prof));
-	if (!params.prof)
+	params = (struct ice_flow_prof_params *)ice_malloc(hw, sizeof(*params));
+	if (!params)
 		return ICE_ERR_NO_MEMORY;
 
+	params->prof = (struct ice_flow_prof *)
+		ice_malloc(hw, sizeof(*params->prof));
+	if (!params->prof) {
+		status = ICE_ERR_NO_MEMORY;
+		goto free_params;
+	}
+
 	/* initialize extraction sequence to all invalid (0xff) */
 	for (i = 0; i < ICE_MAX_FV_WORDS; i++) {
-		params.es[i].prot_id = ICE_PROT_INVALID;
-		params.es[i].off = ICE_FV_OFFSET_INVAL;
+		params->es[i].prot_id = ICE_PROT_INVALID;
+		params->es[i].off = ICE_FV_OFFSET_INVAL;
 	}
 
-	params.blk = blk;
-	params.prof->id = prof_id;
-	params.prof->dir = dir;
-	params.prof->segs_cnt = segs_cnt;
+	params->blk = blk;
+	params->prof->id = prof_id;
+	params->prof->dir = dir;
+	params->prof->segs_cnt = segs_cnt;
 
 	/* Make a copy of the segments that need to be persistent in the flow
 	 * profile instance
 	 */
 	for (i = 0; i < segs_cnt; i++)
-		ice_memcpy(&params.prof->segs[i], &segs[i], sizeof(*segs),
+		ice_memcpy(&params->prof->segs[i], &segs[i], sizeof(*segs),
 			   ICE_NONDMA_TO_NONDMA);
 
 	/* Make a copy of the actions that need to be persistent in the flow
 	 * profile instance.
 	 */
 	if (acts_cnt) {
-		params.prof->acts = (struct ice_flow_action *)
+		params->prof->acts = (struct ice_flow_action *)
 			ice_memdup(hw, acts, acts_cnt * sizeof(*acts),
 				   ICE_NONDMA_TO_NONDMA);
 
-		if (!params.prof->acts) {
+		if (!params->prof->acts) {
 			status = ICE_ERR_NO_MEMORY;
 			goto out;
 		}
 	}
 
-	status = ice_flow_proc_segs(hw, &params);
+	status = ice_flow_proc_segs(hw, params);
 	if (status) {
 		ice_debug(hw, ICE_DBG_FLOW,
 			  "Error processing a flow's packet segments\n");
@@ -1868,24 +1873,26 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,
 	}
 
 	/* Add a HW profile for this flow profile */
-	status = ice_add_prof(hw, blk, prof_id, (u8 *)params.ptypes,
-			      params.attr, params.attr_cnt, params.es,
-			      params.mask);
+	status = ice_add_prof(hw, blk, prof_id, (u8 *)params->ptypes,
+			      params->attr, params->attr_cnt, params->es,
+			      params->mask);
 	if (status) {
 		ice_debug(hw, ICE_DBG_FLOW, "Error adding a HW flow profile\n");
 		goto out;
 	}
 
-	INIT_LIST_HEAD(&params.prof->entries);
-	ice_init_lock(&params.prof->entries_lock);
-	*prof = params.prof;
+	INIT_LIST_HEAD(&params->prof->entries);
+	ice_init_lock(&params->prof->entries_lock);
+	*prof = params->prof;
 
 out:
 	if (status) {
-		if (params.prof->acts)
-			ice_free(hw, params.prof->acts);
-		ice_free(hw, params.prof);
+		if (params->prof->acts)
+			ice_free(hw, params->prof->acts);
+		ice_free(hw, params->prof);
 	}
+free_params:
+	ice_free(hw, params);
 
 	return status;
 }
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 06/40] net/ice/base: clean the code wrapping
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (4 preceding siblings ...)
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 05/40] net/ice/base: cleanup stack hog Qi Zhang
@ 2020-09-07 11:27 ` Qi Zhang
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 07/40] net/ice/base: cleanup misleading comment Qi Zhang
                   ` (35 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:27 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Tony Nguyen

To make the wrapping a little cleaner, move the variables only applicable
to ICE_FC_AUTO into that case. Also move caching of the value to only occur
on succcess.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 37 +++++++++++++++++++++----------------
 1 file changed, 21 insertions(+), 16 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 4be363047..92b2df741 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2754,36 +2754,39 @@ static enum ice_status
 ice_cfg_phy_fc(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
 	       enum ice_fc_mode req_mode)
 {
-	struct ice_aqc_get_phy_caps_data *pcaps = NULL;
 	struct ice_phy_cache_mode_data cache_data;
-	enum ice_status status = ICE_SUCCESS;
 	u8 pause_mask = 0x0;
 
 	if (!pi || !cfg)
 		return ICE_ERR_BAD_PTR;
 
-	pcaps = (struct ice_aqc_get_phy_caps_data *)
-		ice_malloc(pi->hw, sizeof(*pcaps));
-	if (!pcaps)
-		return ICE_ERR_NO_MEMORY;
-
-	/* Cache user FC request */
-	cache_data.data.curr_user_fc_req = req_mode;
-	ice_cache_phy_user_req(pi, cache_data, ICE_FC_MODE);
-
 	switch (req_mode) {
 	case ICE_FC_AUTO:
+	{
+		struct ice_aqc_get_phy_caps_data *pcaps;
+		enum ice_status status;
+
+		pcaps = (struct ice_aqc_get_phy_caps_data *)
+			ice_malloc(pi->hw, sizeof(*pcaps));
+		if (!pcaps)
+			return ICE_ERR_NO_MEMORY;
+
 		/* Query the value of FC that both the NIC and attached media
 		 * can do.
 		 */
 		status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_TOPO_CAP,
 					     pcaps, NULL);
-		if (status)
-			goto out;
+		if (status) {
+			ice_free(pi->hw, pcaps);
+			return status;
+		}
 
 		pause_mask |= pcaps->caps & ICE_AQC_PHY_EN_TX_LINK_PAUSE;
 		pause_mask |= pcaps->caps & ICE_AQC_PHY_EN_RX_LINK_PAUSE;
+
+		ice_free(pi->hw, pcaps);
 		break;
+	}
 	case ICE_FC_FULL:
 		pause_mask |= ICE_AQC_PHY_EN_TX_LINK_PAUSE;
 		pause_mask |= ICE_AQC_PHY_EN_RX_LINK_PAUSE;
@@ -2805,9 +2808,11 @@ ice_cfg_phy_fc(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
 	/* set the new capabilities */
 	cfg->caps |= pause_mask;
 
-out:
-	ice_free(pi->hw, pcaps);
-	return status;
+	/* Cache user FC request */
+	cache_data.data.curr_user_fc_req = req_mode;
+	ice_cache_phy_user_req(pi, cache_data, ICE_FC_MODE);
+
+	return ICE_SUCCESS;
 }
 
 /**
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 07/40] net/ice/base: cleanup misleading comment
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (5 preceding siblings ...)
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 06/40] net/ice/base: clean the code wrapping Qi Zhang
@ 2020-09-07 11:27 ` Qi Zhang
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 08/40] net/ice/base: silence static analysis warning Qi Zhang
                   ` (34 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:27 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Bruce Allan

The maximum Admin Queue buffer size and NVM shadow RAM sector size are both
4 Kilobytes. Some comments refer to those as 4Kb which can be confused with
4 Kilobits. Update the comments to use the commonly used KB symbol instead.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_nvm.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index bfeade6f9..2befe68d7 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -58,7 +58,7 @@ ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,
  *
  * Reads a portion of the NVM, as a flat memory space. This function correctly
  * breaks read requests across Shadow RAM sectors and ensures that no single
- * read request exceeds the maximum 4Kb read for a single AdminQ command.
+ * read request exceeds the maximum 4KB read for a single AdminQ command.
  *
  * Returns a status code on failure. Note that the data pointer may be
  * partially updated if some reads succeed before a failure.
@@ -86,10 +86,10 @@ ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,
 	do {
 		u32 read_size, sector_offset;
 
-		/* ice_aq_read_nvm cannot read more than 4Kb at a time.
+		/* ice_aq_read_nvm cannot read more than 4KB at a time.
 		 * Additionally, a read from the Shadow RAM may not cross over
 		 * a sector boundary. Conveniently, the sector size is also
-		 * 4Kb.
+		 * 4KB.
 		 */
 		sector_offset = offset % ICE_AQ_MAX_BUF_LEN;
 		read_size = MIN_T(u32, ICE_AQ_MAX_BUF_LEN - sector_offset,
@@ -164,7 +164,7 @@ ice_read_sr_buf_aq(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
 
 	ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
 
-	/* ice_read_flat_nvm takes into account the 4Kb AdminQ and Shadow RAM
+	/* ice_read_flat_nvm takes into account the 4KB AdminQ and Shadow RAM
 	 * sector restrictions necessary when reading from the NVM.
 	 */
 	status = ice_read_flat_nvm(hw, offset * 2, &bytes, (u8 *)data, true);
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 08/40] net/ice/base: silence static analysis warning
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (6 preceding siblings ...)
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 07/40] net/ice/base: cleanup misleading comment Qi Zhang
@ 2020-09-07 11:27 ` Qi Zhang
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 09/40] net/ice/base: replace single-element array used for C struct hack Qi Zhang
                   ` (33 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:27 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Bruce Allan

Sparse warns about these casts to/from restricted types which are not
actual problems; silence the warnings.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_nvm.c    | 2 +-
 drivers/net/ice/base/ice_switch.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 2befe68d7..22d7d9439 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -138,7 +138,7 @@ ice_read_sr_word_aq(struct ice_hw *hw, u16 offset, u16 *data)
 	 * boundary
 	 */
 	status = ice_read_flat_nvm(hw, offset * sizeof(u16), &bytes,
-				   (u8 *)&data_local, true);
+				   (_FORCE_ u8 *)&data_local, true);
 	if (status)
 		return status;
 
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index e0eebe3d5..875922459 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -5774,7 +5774,7 @@ ice_fill_valid_words(struct ice_adv_lkup_elem *rule,
 			lkup_exts->fv_words[word].prot_id =
 				ice_prot_id_tbl[rule->type].protocol_id;
 			lkup_exts->field_mask[word] =
-				BE16_TO_CPU(((__be16 *)&rule->m_u)[j]);
+				BE16_TO_CPU(((_FORCE_ __be16 *)&rule->m_u)[j]);
 			word++;
 		}
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 09/40] net/ice/base: replace single-element array used for C struct hack
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (7 preceding siblings ...)
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 08/40] net/ice/base: silence static analysis warning Qi Zhang
@ 2020-09-07 11:27 ` Qi Zhang
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 10/40] net/ice/base: introduce and use bitmap set API Qi Zhang
                   ` (32 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:27 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Bruce Allan

Convert the pre-C90-extension "C struct hack" method (using a single-
element array at the end of a structure for implementing variable-length
types) to the preferred use of C99 flexible array member.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_adminq_cmd.h | 22 +++++-----
 drivers/net/ice/base/ice_common.c     | 77 ++++++++++++++++++-----------------
 drivers/net/ice/base/ice_dcb.h        | 10 +----
 drivers/net/ice/base/ice_flex_pipe.c  | 33 ++++++++++-----
 drivers/net/ice/base/ice_flex_type.h  | 49 +++++++++-------------
 drivers/net/ice/base/ice_sched.c      | 10 +++--
 drivers/net/ice/base/ice_switch.c     | 32 ++++++---------
 drivers/net/ice/base/ice_switch.h     | 24 ++++-------
 drivers/net/ice/base/ice_type.h       |  7 ++++
 9 files changed, 129 insertions(+), 135 deletions(-)

diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index df41cce06..d7a57fe6b 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -312,7 +312,7 @@ struct ice_aqc_alloc_free_res_elem {
 #define ICE_AQC_RES_TYPE_VSI_PRUNE_LIST_M	\
 				(0xF << ICE_AQC_RES_TYPE_VSI_PRUNE_LIST_S)
 	__le16 num_elems;
-	struct ice_aqc_res_elem elem[1];
+	struct ice_aqc_res_elem elem[STRUCT_HACK_VAR_LEN];
 };
 
 /* Get Allocated Resource Descriptors Command (indirect 0x020A) */
@@ -812,7 +812,7 @@ struct ice_sw_rule_lkup_rx_tx {
 	 * lookup-type
 	 */
 	__le16 hdr_len;
-	u8 hdr[1];
+	u8 hdr[STRUCT_HACK_VAR_LEN];
 };
 
 /* Add/Update/Remove large action command/response entry
@@ -872,7 +872,7 @@ struct ice_sw_rule_lg_act {
 #define ICE_LG_ACT_STAT_COUNT		0x7
 #define ICE_LG_ACT_STAT_COUNT_S		3
 #define ICE_LG_ACT_STAT_COUNT_M		(0x7F << ICE_LG_ACT_STAT_COUNT_S)
-	__le32 act[1]; /* array of size for actions */
+	__le32 act[STRUCT_HACK_VAR_LEN]; /* array of size for actions */
 };
 
 /* Add/Update/Remove VSI list command/response entry
@@ -882,7 +882,7 @@ struct ice_sw_rule_lg_act {
 struct ice_sw_rule_vsi_list {
 	__le16 index; /* Index of VSI/Prune list */
 	__le16 number_vsi;
-	__le16 vsi[1]; /* Array of number_vsi VSI numbers */
+	__le16 vsi[STRUCT_HACK_VAR_LEN]; /* Array of number_vsi VSI numbers */
 };
 
 #pragma pack(1)
@@ -989,7 +989,7 @@ struct ice_aqc_txsched_move_grp_info_hdr {
 
 struct ice_aqc_move_elem {
 	struct ice_aqc_txsched_move_grp_info_hdr hdr;
-	__le32 teid[1];
+	__le32 teid[STRUCT_HACK_VAR_LEN];
 };
 
 struct ice_aqc_elem_info_bw {
@@ -1042,7 +1042,7 @@ struct ice_aqc_txsched_topo_grp_info_hdr {
 
 struct ice_aqc_add_elem {
 	struct ice_aqc_txsched_topo_grp_info_hdr hdr;
-	struct ice_aqc_txsched_elem_data generic[1];
+	struct ice_aqc_txsched_elem_data generic[STRUCT_HACK_VAR_LEN];
 };
 
 struct ice_aqc_get_topo_elem {
@@ -1053,7 +1053,7 @@ struct ice_aqc_get_topo_elem {
 
 struct ice_aqc_delete_elem {
 	struct ice_aqc_txsched_topo_grp_info_hdr hdr;
-	__le32 teid[1];
+	__le32 teid[STRUCT_HACK_VAR_LEN];
 };
 
 /* Query Port ETS (indirect 0x040E)
@@ -2426,7 +2426,7 @@ struct ice_aqc_add_tx_qgrp {
 	__le32 parent_teid;
 	u8 num_txqs;
 	u8 rsvd[3];
-	struct ice_aqc_add_txqs_perq txqs[1];
+	struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
 };
 
 /* Disable Tx LAN Queues (indirect 0x0C31) */
@@ -2470,7 +2470,7 @@ struct ice_aqc_dis_txq_item {
 			(0 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S)
 #define ICE_AQC_Q_DIS_BUF_ELEM_TYPE_RDMA_QSET	\
 			(1 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S)
-	__le16 q_id[1];
+	__le16 q_id[STRUCT_HACK_VAR_LEN];
 };
 
 #pragma pack()
@@ -2514,7 +2514,7 @@ struct ice_aqc_move_txqs_elem {
 struct ice_aqc_move_txqs_data {
 	__le32 src_teid;
 	__le32 dest_teid;
-	struct ice_aqc_move_txqs_elem txqs[1];
+	struct ice_aqc_move_txqs_elem txqs[STRUCT_HACK_VAR_LEN];
 };
 
 /* Download Package (indirect 0x0C40) */
@@ -2567,7 +2567,7 @@ struct ice_aqc_get_pkg_info {
 /* Get Package Info List response buffer format (0x0C43) */
 struct ice_aqc_get_pkg_info_resp {
 	__le32 count;
-	struct ice_aqc_get_pkg_info pkg_info[1];
+	struct ice_aqc_get_pkg_info pkg_info[STRUCT_HACK_VAR_LEN];
 };
 
 /* Driver Shared Parameters (direct, 0x0C90) */
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 92b2df741..d9ad3217a 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1739,9 +1739,8 @@ ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res)
 	enum ice_status status;
 	u16 buf_len;
 
-	buf_len = ice_struct_size(buf, elem, num - 1);
-	buf = (struct ice_aqc_alloc_free_res_elem *)
-		ice_malloc(hw, buf_len);
+	buf_len = ice_struct_size(buf, elem, num);
+	buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
 	if (!buf)
 		return ICE_ERR_NO_MEMORY;
 
@@ -1757,7 +1756,7 @@ ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res)
 	if (status)
 		goto ice_alloc_res_exit;
 
-	ice_memcpy(res, buf->elem, sizeof(buf->elem) * num,
+	ice_memcpy(res, buf->elem, sizeof(*buf->elem) * num,
 		   ICE_NONDMA_TO_NONDMA);
 
 ice_alloc_res_exit:
@@ -1778,7 +1777,7 @@ enum ice_status ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)
 	enum ice_status status;
 	u16 buf_len;
 
-	buf_len = ice_struct_size(buf, elem, num - 1);
+	buf_len = ice_struct_size(buf, elem, num);
 	buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
 	if (!buf)
 		return ICE_ERR_NO_MEMORY;
@@ -1786,7 +1785,7 @@ enum ice_status ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)
 	/* Prepare buffer to free resource. */
 	buf->num_elems = CPU_TO_LE16(num);
 	buf->res_type = CPU_TO_LE16(type);
-	ice_memcpy(buf->elem, res, sizeof(buf->elem) * num,
+	ice_memcpy(buf->elem, res, sizeof(*buf->elem) * num,
 		   ICE_NONDMA_TO_NONDMA);
 
 	status = ice_aq_alloc_free_res(hw, num, buf, buf_len,
@@ -3474,10 +3473,10 @@ ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,
 		   struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
 		   struct ice_sq_cd *cd)
 {
-	u16 i, sum_header_size, sum_q_size = 0;
 	struct ice_aqc_add_tx_qgrp *list;
 	struct ice_aqc_add_txqs *cmd;
 	struct ice_aq_desc desc;
+	u16 i, sum_size = 0;
 
 	ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
 
@@ -3491,18 +3490,13 @@ ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,
 	if (num_qgrps > ICE_LAN_TXQ_MAX_QGRPS)
 		return ICE_ERR_PARAM;
 
-	sum_header_size = num_qgrps *
-		(sizeof(*qg_list) - sizeof(*qg_list->txqs));
-
-	list = qg_list;
-	for (i = 0; i < num_qgrps; i++) {
-		struct ice_aqc_add_txqs_perq *q = list->txqs;
-
-		sum_q_size += list->num_txqs * sizeof(*q);
-		list = (struct ice_aqc_add_tx_qgrp *)(q + list->num_txqs);
+	for (i = 0, list = qg_list; i < num_qgrps; i++) {
+		sum_size += ice_struct_size(list, txqs, list->num_txqs);
+		list = (struct ice_aqc_add_tx_qgrp *)(list->txqs +
+						      list->num_txqs);
 	}
 
-	if (buf_size != (sum_header_size + sum_q_size))
+	if (buf_size != sum_size)
 		return ICE_ERR_PARAM;
 
 	desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
@@ -3530,6 +3524,7 @@ ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps,
 		   enum ice_disq_rst_src rst_src, u16 vmvf_num,
 		   struct ice_sq_cd *cd)
 {
+	struct ice_aqc_dis_txq_item *item;
 	struct ice_aqc_dis_txqs *cmd;
 	struct ice_aq_desc desc;
 	enum ice_status status;
@@ -3573,16 +3568,16 @@ ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps,
 	 */
 	desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
 
-	for (i = 0; i < num_qgrps; ++i) {
-		/* Calculate the size taken up by the queue IDs in this group */
-		sz += qg_list[i].num_qs * sizeof(qg_list[i].q_id);
-
-		/* Add the size of the group header */
-		sz += sizeof(qg_list[i]) - sizeof(qg_list[i].q_id);
+	for (i = 0, item = qg_list; i < num_qgrps; i++) {
+		u16 item_size = ice_struct_size(item, q_id, item->num_qs);
 
 		/* If the num of queues is even, add 2 bytes of padding */
-		if ((qg_list[i].num_qs % 2) == 0)
-			sz += 2;
+		if ((item->num_qs % 2) == 0)
+			item_size += 2;
+
+		sz += item_size;
+
+		item = (struct ice_aqc_dis_txq_item *)((u8 *)item + item_size);
 	}
 
 	if (buf_size != sz)
@@ -4268,24 +4263,32 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
 		struct ice_sq_cd *cd)
 {
 	enum ice_status status = ICE_ERR_DOES_NOT_EXIST;
-	struct ice_aqc_dis_txq_item qg_list;
+	struct ice_aqc_dis_txq_item *qg_list;
 	struct ice_q_ctx *q_ctx;
-	u16 i;
+	struct ice_hw *hw;
+	u16 i, buf_size;
 
 	if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
 		return ICE_ERR_CFG;
 
+	hw = pi->hw;
+
 	if (!num_queues) {
 		/* if queue is disabled already yet the disable queue command
 		 * has to be sent to complete the VF reset, then call
 		 * ice_aq_dis_lan_txq without any queue information
 		 */
 		if (rst_src)
-			return ice_aq_dis_lan_txq(pi->hw, 0, NULL, 0, rst_src,
+			return ice_aq_dis_lan_txq(hw, 0, NULL, 0, rst_src,
 						  vmvf_num, NULL);
 		return ICE_ERR_CFG;
 	}
 
+	buf_size = ice_struct_size(qg_list, q_id, 1);
+	qg_list = (struct ice_aqc_dis_txq_item *)ice_malloc(hw, buf_size);
+	if (!qg_list)
+		return ICE_ERR_NO_MEMORY;
+
 	ice_acquire_lock(&pi->sched_lock);
 
 	for (i = 0; i < num_queues; i++) {
@@ -4294,23 +4297,22 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
 		node = ice_sched_find_node_by_teid(pi->root, q_teids[i]);
 		if (!node)
 			continue;
-		q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handles[i]);
+		q_ctx = ice_get_lan_q_ctx(hw, vsi_handle, tc, q_handles[i]);
 		if (!q_ctx) {
-			ice_debug(pi->hw, ICE_DBG_SCHED, "invalid queue handle%d\n",
+			ice_debug(hw, ICE_DBG_SCHED, "invalid queue handle%d\n",
 				  q_handles[i]);
 			continue;
 		}
 		if (q_ctx->q_handle != q_handles[i]) {
-			ice_debug(pi->hw, ICE_DBG_SCHED, "Err:handles %d %d\n",
+			ice_debug(hw, ICE_DBG_SCHED, "Err:handles %d %d\n",
 				  q_ctx->q_handle, q_handles[i]);
 			continue;
 		}
-		qg_list.parent_teid = node->info.parent_teid;
-		qg_list.num_qs = 1;
-		qg_list.q_id[0] = CPU_TO_LE16(q_ids[i]);
-		status = ice_aq_dis_lan_txq(pi->hw, 1, &qg_list,
-					    sizeof(qg_list), rst_src, vmvf_num,
-					    cd);
+		qg_list->parent_teid = node->info.parent_teid;
+		qg_list->num_qs = 1;
+		qg_list->q_id[0] = CPU_TO_LE16(q_ids[i]);
+		status = ice_aq_dis_lan_txq(hw, 1, qg_list, buf_size, rst_src,
+					    vmvf_num, cd);
 
 		if (status != ICE_SUCCESS)
 			break;
@@ -4318,6 +4320,7 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
 		q_ctx->q_handle = ICE_INVAL_Q_HANDLE;
 	}
 	ice_release_lock(&pi->sched_lock);
+	ice_free(hw, qg_list);
 	return status;
 }
 
diff --git a/drivers/net/ice/base/ice_dcb.h b/drivers/net/ice/base/ice_dcb.h
index 83b6e4d8f..8f0e09d50 100644
--- a/drivers/net/ice/base/ice_dcb.h
+++ b/drivers/net/ice/base/ice_dcb.h
@@ -103,17 +103,11 @@
 #define ICE_IEEE_APP_TLV_LEN		11
 
 #pragma pack(1)
-/* IEEE 802.1AB LLDP TLV structure */
-struct ice_lldp_generic_tlv {
-	__be16 typelen;
-	u8 tlvinfo[1];
-};
-
 /* IEEE 802.1AB LLDP Organization specific TLV */
 struct ice_lldp_org_tlv {
 	__be16 typelen;
 	__be32 ouisubtype;
-	u8 tlvinfo[1];
+	u8 tlvinfo[STRUCT_HACK_VAR_LEN];
 };
 #pragma pack()
 
@@ -136,7 +130,7 @@ struct ice_cee_feat_tlv {
 #define ICE_CEE_FEAT_TLV_WILLING_M	0x40
 #define ICE_CEE_FEAT_TLV_ERR_M		0x20
 	u8 subtype;
-	u8 tlvinfo[1];
+	u8 tlvinfo[STRUCT_HACK_VAR_LEN];
 };
 
 #pragma pack(1)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index bf8530e89..25d79b5c4 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1138,7 +1138,7 @@ static enum ice_status ice_get_pkg_info(struct ice_hw *hw)
 
 	ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
 
-	size = ice_struct_size(pkg_info, pkg_info, ICE_PKG_CNT - 1);
+	size = ice_struct_size(pkg_info, pkg_info, ICE_PKG_CNT);
 	pkg_info = (struct ice_aqc_get_pkg_info_resp *)ice_malloc(hw, size);
 	if (!pkg_info)
 		return ICE_ERR_NO_MEMORY;
@@ -1197,7 +1197,7 @@ static enum ice_status ice_verify_pkg(struct ice_pkg_hdr *pkg, u32 len)
 	u32 seg_count;
 	u32 i;
 
-	if (len < sizeof(*pkg))
+	if (len < ice_struct_size(pkg, seg_offset, 1))
 		return ICE_ERR_BUF_TOO_SHORT;
 
 	if (pkg->pkg_format_ver.major != ICE_PKG_FMT_VER_MAJ ||
@@ -1212,7 +1212,7 @@ static enum ice_status ice_verify_pkg(struct ice_pkg_hdr *pkg, u32 len)
 		return ICE_ERR_CFG;
 
 	/* make sure segment array fits in package length */
-	if (len < ice_struct_size(pkg, seg_offset, seg_count - 1))
+	if (len < ice_struct_size(pkg, seg_offset, seg_count))
 		return ICE_ERR_BUF_TOO_SHORT;
 
 	/* all segments must fit within length */
@@ -1321,7 +1321,7 @@ ice_chk_pkg_compat(struct ice_hw *hw, struct ice_pkg_hdr *ospkg,
 	}
 
 	/* Check if FW is compatible with the OS package */
-	size = ice_struct_size(pkg, pkg_info, ICE_PKG_CNT - 1);
+	size = ice_struct_size(pkg, pkg_info, ICE_PKG_CNT);
 	pkg = (struct ice_aqc_get_pkg_info_resp *)ice_malloc(hw, size);
 	if (!pkg)
 		return ICE_ERR_NO_MEMORY;
@@ -2049,14 +2049,14 @@ ice_create_tunnel(struct ice_hw *hw, enum ice_tunnel_type type, u16 port)
 
 	sect_rx = (struct ice_boost_tcam_section *)
 		ice_pkg_buf_alloc_section(bld, ICE_SID_RXPARSER_BOOST_TCAM,
-					  sizeof(*sect_rx));
+					  ice_struct_size(sect_rx, tcam, 1));
 	if (!sect_rx)
 		goto ice_create_tunnel_err;
 	sect_rx->count = CPU_TO_LE16(1);
 
 	sect_tx = (struct ice_boost_tcam_section *)
 		ice_pkg_buf_alloc_section(bld, ICE_SID_TXPARSER_BOOST_TCAM,
-					  sizeof(*sect_tx));
+					  ice_struct_size(sect_tx, tcam, 1));
 	if (!sect_tx)
 		goto ice_create_tunnel_err;
 	sect_tx->count = CPU_TO_LE16(1);
@@ -2134,7 +2134,7 @@ enum ice_status ice_destroy_tunnel(struct ice_hw *hw, u16 port, bool all)
 	}
 
 	/* size of section - there is at least one entry */
-	size = ice_struct_size(sect_rx, tcam, count - 1);
+	size = ice_struct_size(sect_rx, tcam, count);
 
 	bld = ice_pkg_buf_alloc(hw);
 	if (!bld) {
@@ -4092,7 +4092,9 @@ ice_prof_bld_es(struct ice_hw *hw, enum ice_block blk,
 
 			id = ice_sect_id(blk, ICE_VEC_TBL);
 			p = (struct ice_pkg_es *)
-				ice_pkg_buf_alloc_section(bld, id, sizeof(*p) +
+				ice_pkg_buf_alloc_section(bld, id,
+							  ice_struct_size(p, es,
+									  1) +
 							  vec_size -
 							  sizeof(p->es[0]));
 
@@ -4129,7 +4131,10 @@ ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
 
 			id = ice_sect_id(blk, ICE_PROF_TCAM);
 			p = (struct ice_prof_id_section *)
-				ice_pkg_buf_alloc_section(bld, id, sizeof(*p));
+				ice_pkg_buf_alloc_section(bld, id,
+							  ice_struct_size(p,
+									  entry,
+									  1));
 
 			if (!p)
 				return ICE_ERR_MAX_LIMIT;
@@ -4166,7 +4171,10 @@ ice_prof_bld_xlt1(enum ice_block blk, struct ice_buf_build *bld,
 
 			id = ice_sect_id(blk, ICE_XLT1);
 			p = (struct ice_xlt1_section *)
-				ice_pkg_buf_alloc_section(bld, id, sizeof(*p));
+				ice_pkg_buf_alloc_section(bld, id,
+							  ice_struct_size(p,
+									  value,
+									  1));
 
 			if (!p)
 				return ICE_ERR_MAX_LIMIT;
@@ -4201,7 +4209,10 @@ ice_prof_bld_xlt2(enum ice_block blk, struct ice_buf_build *bld,
 		case ICE_VSIG_REM:
 			id = ice_sect_id(blk, ICE_XLT2);
 			p = (struct ice_xlt2_section *)
-				ice_pkg_buf_alloc_section(bld, id, sizeof(*p));
+				ice_pkg_buf_alloc_section(bld, id,
+							  ice_struct_size(p,
+									  value,
+									  1));
 
 			if (!p)
 				return ICE_ERR_MAX_LIMIT;
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index b58007fb3..8f33efdd6 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -27,7 +27,7 @@ struct ice_fv {
 struct ice_pkg_hdr {
 	struct ice_pkg_ver pkg_format_ver;
 	__le32 seg_count;
-	__le32 seg_offset[1];
+	__le32 seg_offset[STRUCT_HACK_VAR_LEN];
 };
 
 /* generic segment */
@@ -58,12 +58,12 @@ struct ice_device_id_entry {
 struct ice_seg {
 	struct ice_generic_seg_hdr hdr;
 	__le32 device_table_count;
-	struct ice_device_id_entry device_table[1];
+	struct ice_device_id_entry device_table[STRUCT_HACK_VAR_LEN];
 };
 
 struct ice_nvm_table {
 	__le32 table_count;
-	__le32 vers[1];
+	__le32 vers[STRUCT_HACK_VAR_LEN];
 };
 
 struct ice_buf {
@@ -73,7 +73,7 @@ struct ice_buf {
 
 struct ice_buf_table {
 	__le32 buf_count;
-	struct ice_buf buf_array[1];
+	struct ice_buf buf_array[STRUCT_HACK_VAR_LEN];
 };
 
 /* global metadata specific segment */
@@ -106,11 +106,12 @@ struct ice_section_entry {
 struct ice_buf_hdr {
 	__le16 section_count;
 	__le16 data_end;
-	struct ice_section_entry section_entry[1];
+	struct ice_section_entry section_entry[STRUCT_HACK_VAR_LEN];
 };
 
 #define ICE_MAX_ENTRIES_IN_BUF(hd_sz, ent_sz) ((ICE_PKG_BUF_SIZE - \
-	sizeof(struct ice_buf_hdr) - (hd_sz)) / (ent_sz))
+	ice_struct_size((struct ice_buf_hdr *)0, section_entry, 1) - (hd_sz)) /\
+	(ent_sz))
 
 /* ice package section IDs */
 #define ICE_SID_XLT0_SW			10
@@ -400,17 +401,17 @@ struct ice_label {
 
 struct ice_label_section {
 	__le16 count;
-	struct ice_label label[1];
+	struct ice_label label[STRUCT_HACK_VAR_LEN];
 };
 
 #define ICE_MAX_LABELS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \
-	sizeof(struct ice_label_section) - sizeof(struct ice_label), \
-	sizeof(struct ice_label))
+	ice_struct_size((struct ice_label_section *)0, label, 1) - \
+	sizeof(struct ice_label), sizeof(struct ice_label))
 
 struct ice_sw_fv_section {
 	__le16 count;
 	__le16 base_offset;
-	struct ice_fv fv[1];
+	struct ice_fv fv[STRUCT_HACK_VAR_LEN];
 };
 
 struct ice_sw_fv_list_entry {
@@ -455,43 +456,32 @@ struct ice_boost_tcam_entry {
 struct ice_boost_tcam_section {
 	__le16 count;
 	__le16 reserved;
-	struct ice_boost_tcam_entry tcam[1];
+	struct ice_boost_tcam_entry tcam[STRUCT_HACK_VAR_LEN];
 };
 
 #define ICE_MAX_BST_TCAMS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \
-	sizeof(struct ice_boost_tcam_section) - \
+	ice_struct_size((struct ice_boost_tcam_section *)0, tcam, 1) - \
 	sizeof(struct ice_boost_tcam_entry), \
 	sizeof(struct ice_boost_tcam_entry))
 
-#pragma pack(1)
 struct ice_xlt1_section {
 	__le16 count;
 	__le16 offset;
-	u8 value[1];
+	u8 value[STRUCT_HACK_VAR_LEN];
 };
-#pragma pack()
-
-#define ICE_XLT1_SIZE(n)	(sizeof(struct ice_xlt1_section) + \
-				 (sizeof(u8) * ((n) - 1)))
 
 struct ice_xlt2_section {
 	__le16 count;
 	__le16 offset;
-	__le16 value[1];
+	__le16 value[STRUCT_HACK_VAR_LEN];
 };
 
-#define ICE_XLT2_SIZE(n)	(sizeof(struct ice_xlt2_section) + \
-				 (sizeof(u16) * ((n) - 1)))
-
 struct ice_prof_redir_section {
 	__le16 count;
 	__le16 offset;
-	u8 redir_value[1];
+	u8 redir_value[STRUCT_HACK_VAR_LEN];
 };
 
-#define ICE_PROF_REDIR_SIZE(n)	(sizeof(struct ice_prof_redir_section) + \
-				 (sizeof(u8) * ((n) - 1)))
-
 /* package buffer building */
 
 struct ice_buf_build {
@@ -548,7 +538,7 @@ struct ice_tunnel_table {
 struct ice_pkg_es {
 	__le16 count;
 	__le16 offset;
-	struct ice_fv_word es[1];
+	struct ice_fv_word es[STRUCT_HACK_VAR_LEN];
 };
 
 struct ice_es {
@@ -703,11 +693,12 @@ struct ice_prof_tcam_entry {
 	u8 prof_id;
 };
 
+#pragma pack()
+
 struct ice_prof_id_section {
 	__le16 count;
-	struct ice_prof_tcam_entry entry[1];
+	struct ice_prof_tcam_entry entry[STRUCT_HACK_VAR_LEN];
 };
-#pragma pack()
 
 struct ice_prof_tcam {
 	u32 sid;
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index edd90aecb..e189e95f7 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -237,7 +237,7 @@ ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
 	enum ice_status status;
 	u16 buf_size;
 
-	buf_size = sizeof(*buf) + sizeof(u32) * (num_nodes - 1);
+	buf_size = ice_struct_size(buf, teid, num_nodes);
 	buf = (struct ice_aqc_delete_elem *)ice_malloc(hw, buf_size);
 	if (!buf)
 		return ICE_ERR_NO_MEMORY;
@@ -892,7 +892,7 @@ ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
 	u16 buf_size;
 	u32 teid;
 
-	buf_size = ice_struct_size(buf, generic, num_nodes - 1);
+	buf_size = ice_struct_size(buf, generic, num_nodes);
 	buf = (struct ice_aqc_add_elem *)ice_malloc(hw, buf_size);
 	if (!buf)
 		return ICE_ERR_NO_MEMORY;
@@ -2260,6 +2260,7 @@ ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
 	struct ice_sched_node *node;
 	u16 i, grps_movd = 0;
 	struct ice_hw *hw;
+	u16 buf_len;
 
 	hw = pi->hw;
 
@@ -2271,7 +2272,8 @@ ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
 	    hw->max_children[parent->tx_sched_layer])
 		return ICE_ERR_AQ_FULL;
 
-	buf = (struct ice_aqc_move_elem *)ice_malloc(hw, sizeof(*buf));
+	buf_len = ice_struct_size(buf, teid, 1);
+	buf = (struct ice_aqc_move_elem *)ice_malloc(hw, buf_len);
 	if (!buf)
 		return ICE_ERR_NO_MEMORY;
 
@@ -2286,7 +2288,7 @@ ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
 		buf->hdr.dest_parent_teid = parent->info.node_teid;
 		buf->teid[0] = node->info.node_teid;
 		buf->hdr.num_elems = CPU_TO_LE16(1);
-		status = ice_aq_move_sched_elems(hw, 1, buf, sizeof(*buf),
+		status = ice_aq_move_sched_elems(hw, 1, buf, buf_len,
 						 &grps_movd, NULL);
 		if (status && grps_movd != 1) {
 			status = ICE_ERR_CFG;
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 875922459..858a73222 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1478,9 +1478,8 @@ ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
 	enum ice_status status;
 	u16 buf_len;
 
-	buf_len = sizeof(*sw_buf);
-	sw_buf = (struct ice_aqc_alloc_free_res_elem *)
-		   ice_malloc(hw, buf_len);
+	buf_len = ice_struct_size(sw_buf, elem, 1);
+	sw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
 	if (!sw_buf)
 		return ICE_ERR_NO_MEMORY;
 
@@ -1560,9 +1559,8 @@ enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
 	enum ice_status status, ret_status;
 	u16 buf_len;
 
-	buf_len = sizeof(*sw_buf);
-	sw_buf = (struct ice_aqc_alloc_free_res_elem *)
-		   ice_malloc(hw, buf_len);
+	buf_len = ice_struct_size(sw_buf, elem, 1);
+	sw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
 	if (!sw_buf)
 		return ICE_ERR_NO_MEMORY;
 
@@ -2103,9 +2101,8 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
 	enum ice_status status;
 	u16 buf_len;
 
-	buf_len = sizeof(*sw_buf);
-	sw_buf = (struct ice_aqc_alloc_free_res_elem *)
-		ice_malloc(hw, buf_len);
+	buf_len = ice_struct_size(sw_buf, elem, 1);
+	sw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
 	if (!sw_buf)
 		return ICE_ERR_NO_MEMORY;
 	sw_buf->num_elems = CPU_TO_LE16(1);
@@ -2387,7 +2384,7 @@ enum ice_status ice_alloc_recipe(struct ice_hw *hw, u16 *rid)
 	enum ice_status status;
 	u16 buf_len;
 
-	buf_len = sizeof(*sw_buf);
+	buf_len = ice_struct_size(sw_buf, elem, 1);
 	sw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
 	if (!sw_buf)
 		return ICE_ERR_NO_MEMORY;
@@ -5253,9 +5250,8 @@ ice_alloc_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
 	u16 buf_len;
 
 	/* Allocate resource */
-	buf_len = sizeof(*buf);
-	buf = (struct ice_aqc_alloc_free_res_elem *)
-		ice_malloc(hw, buf_len);
+	buf_len = ice_struct_size(buf, elem, 1);
+	buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
 	if (!buf)
 		return ICE_ERR_NO_MEMORY;
 
@@ -5292,9 +5288,8 @@ ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
 	u16 buf_len;
 
 	/* Free resource */
-	buf_len = sizeof(*buf);
-	buf = (struct ice_aqc_alloc_free_res_elem *)
-		ice_malloc(hw, buf_len);
+	buf_len = ice_struct_size(buf, elem, 1);
+	buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
 	if (!buf)
 		return ICE_ERR_NO_MEMORY;
 
@@ -5354,9 +5349,8 @@ ice_alloc_res_lg_act(struct ice_hw *hw, u16 *l_id, u16 num_acts)
 		return ICE_ERR_PARAM;
 
 	/* Allocate resource for large action */
-	buf_len = sizeof(*sw_buf);
-	sw_buf = (struct ice_aqc_alloc_free_res_elem *)
-		ice_malloc(hw, buf_len);
+	buf_len = ice_struct_size(sw_buf, elem, 1);
+	sw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
 	if (!sw_buf)
 		return ICE_ERR_NO_MEMORY;
 
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index fe7b86f12..aa446774c 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -45,25 +45,17 @@
 
 #define DUMMY_ETH_HDR_LEN		16
 #define ICE_SW_RULE_RX_TX_ETH_HDR_SIZE \
-	(sizeof(struct ice_aqc_sw_rules_elem) - \
-	 FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \
-	 sizeof(struct ice_sw_rule_lkup_rx_tx) + DUMMY_ETH_HDR_LEN - 1)
+	(offsetof(struct ice_aqc_sw_rules_elem, pdata.lkup_tx_rx.hdr) + \
+	 (DUMMY_ETH_HDR_LEN * \
+	  sizeof(((struct ice_sw_rule_lkup_rx_tx *)0)->hdr[0])))
 #define ICE_SW_RULE_RX_TX_NO_HDR_SIZE \
-	(sizeof(struct ice_aqc_sw_rules_elem) - \
-	 FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \
-	 sizeof(struct ice_sw_rule_lkup_rx_tx) - 1)
+	(offsetof(struct ice_aqc_sw_rules_elem, pdata.lkup_tx_rx.hdr))
 #define ICE_SW_RULE_LG_ACT_SIZE(n) \
-	(sizeof(struct ice_aqc_sw_rules_elem) - \
-	 FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \
-	 sizeof(struct ice_sw_rule_lg_act) - \
-	 FIELD_SIZEOF(struct ice_sw_rule_lg_act, act) + \
-	 ((n) * FIELD_SIZEOF(struct ice_sw_rule_lg_act, act)))
+	(offsetof(struct ice_aqc_sw_rules_elem, pdata.lg_act.act) + \
+	 ((n) * sizeof(((struct ice_sw_rule_lg_act *)0)->act[0])))
 #define ICE_SW_RULE_VSI_LIST_SIZE(n) \
-	(sizeof(struct ice_aqc_sw_rules_elem) - \
-	 FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \
-	 sizeof(struct ice_sw_rule_vsi_list) - \
-	 FIELD_SIZEOF(struct ice_sw_rule_vsi_list, vsi) + \
-	 ((n) * FIELD_SIZEOF(struct ice_sw_rule_vsi_list, vsi)))
+	(offsetof(struct ice_aqc_sw_rules_elem, pdata.vsi_list.vsi) + \
+	 ((n) * sizeof(((struct ice_sw_rule_vsi_list *)0)->vsi[0])))
 
 /* Worst case buffer length for ice_aqc_opc_get_res_alloc */
 #define ICE_MAX_RES_TYPES 0x80
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 3775689a9..be6bdf9e7 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -34,6 +34,13 @@
 
 #define IS_ASCII(_ch)	((_ch) < 0x80)
 
+#define STRUCT_HACK_VAR_LEN
+/**
+ * ice_struct_size - size of struct with C99 flexible array member
+ * @ptr: pointer to structure
+ * @field: flexible array member (last member of the structure)
+ * @num: number of elements of that flexible array member
+ */
 #define ice_struct_size(ptr, field, num) \
 	(sizeof(*(ptr)) + sizeof(*(ptr)->field) * (num))
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 10/40] net/ice/base: introduce and use bitmap set API
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (8 preceding siblings ...)
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 09/40] net/ice/base: replace single-element array used for C struct hack Qi Zhang
@ 2020-09-07 11:27 ` Qi Zhang
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 11/40] net/ice/base: introduce and use bitmap hamming weight API Qi Zhang
                   ` (31 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:27 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Bruce Allan

Introduce ice_bitmap_set() and use it instead of open-coding that
functionality.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_acl_ctrl.c  |  4 +---
 drivers/net/ice/base/ice_bitops.h    | 19 +++++++++++++++++++
 drivers/net/ice/base/ice_flex_pipe.c |  9 ++-------
 drivers/net/ice/base/ice_switch.c    |  3 +--
 4 files changed, 23 insertions(+), 12 deletions(-)

diff --git a/drivers/net/ice/base/ice_acl_ctrl.c b/drivers/net/ice/base/ice_acl_ctrl.c
index 5310b9d9f..a732397ce 100644
--- a/drivers/net/ice/base/ice_acl_ctrl.c
+++ b/drivers/net/ice/base/ice_acl_ctrl.c
@@ -354,7 +354,6 @@ ice_acl_create_tbl(struct ice_hw *hw, struct ice_acl_tbl_params *params)
 
 	/* call the AQ command to create the ACL table with these values */
 	status = ice_aq_alloc_acl_tbl(hw, &tbl_alloc, NULL);
-
 	if (status) {
 		if (LE16_TO_CPU(tbl_alloc.buf.resp_buf.alloc_id) <
 		    ICE_AQC_ALLOC_ID_LESS_THAN_4K)
@@ -415,8 +414,7 @@ ice_acl_create_tbl(struct ice_hw *hw, struct ice_acl_tbl_params *params)
 		(tbl->last_entry / ICE_ACL_ENTRY_ALLOC_UNIT);
 
 	/* Indicate available entries in the table */
-	for (i = first_e; i <= last_e; i++)
-		ice_set_bit(i, tbl->avail);
+	ice_bitmap_set(tbl->avail, first_e, last_e - first_e + 1);
 
 	INIT_LIST_HEAD(&tbl->scens);
 out:
diff --git a/drivers/net/ice/base/ice_bitops.h b/drivers/net/ice/base/ice_bitops.h
index 3022116a4..8352b5dd7 100644
--- a/drivers/net/ice/base/ice_bitops.h
+++ b/drivers/net/ice/base/ice_bitops.h
@@ -376,6 +376,25 @@ static inline void ice_cp_bitmap(ice_bitmap_t *dst, ice_bitmap_t *src, u16 size)
 }
 
 /**
+ * ice_bitmap_set - set a number of bits in bitmap from a starting position
+ * @dst: bitmap destination
+ * @pos: first bit position to set
+ * @num_bits: number of bits to set
+ *
+ * This function sets bits in a bitmap from pos to (pos + num_bits) - 1.
+ * Note that this function assumes it is operating on a bitmap declared using
+ * ice_declare_bitmap.
+ */
+static inline void
+ice_bitmap_set(ice_bitmap_t *dst, u16 pos, u16 num_bits)
+{
+	u16 i;
+
+	for (i = pos; i < num_bits; i++)
+		ice_set_bit(i, dst);
+}
+
+/**
  * ice_cmp_bitmaps - compares two bitmaps.
  * @bmp1: the bitmap to compare
  * @bmp2: the bitmap to compare with bmp1
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 25d79b5c4..a08390992 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1580,18 +1580,13 @@ ice_get_sw_fv_bitmap(struct ice_hw *hw, enum ice_prof_type req_profs,
 	struct ice_seg *ice_seg;
 	struct ice_fv *fv;
 
-	ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM);
-
 	if (req_profs == ICE_PROF_ALL) {
-		u16 i;
-
-		for (i = 0; i < ICE_MAX_NUM_PROFILES; i++)
-			ice_set_bit(i, bm);
+		ice_bitmap_set(bm, 0, ICE_MAX_NUM_PROFILES);
 		return;
 	}
 
+	ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM);
 	ice_zero_bitmap(bm, ICE_MAX_NUM_PROFILES);
-
 	ice_seg = hw->seg;
 	do {
 		enum ice_prof_type prof_type;
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 858a73222..41ebfedc6 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -5940,8 +5940,7 @@ ice_find_free_recp_res_idx(struct ice_hw *hw, const ice_bitmap_t *profiles,
 	ice_zero_bitmap(used_idx, ICE_MAX_FV_WORDS);
 	ice_zero_bitmap(free_idx, ICE_MAX_FV_WORDS);
 
-	for (count = 0; count < ICE_MAX_FV_WORDS; count++)
-		ice_set_bit(count, possible_idx);
+	ice_bitmap_set(possible_idx, 0, ICE_MAX_FV_WORDS);
 
 	/* For each profile we are going to associate the recipe with, add the
 	 * recipes that are associated with that profile. This will give us
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 11/40] net/ice/base: introduce and use bitmap hamming weight API
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (9 preceding siblings ...)
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 10/40] net/ice/base: introduce and use bitmap set API Qi Zhang
@ 2020-09-07 11:27 ` Qi Zhang
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 12/40] net/ice/base: add function header Qi Zhang
                   ` (30 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:27 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Bruce Allan

Introduce ice_bitmap_hweight() and use it instead of open-coding that
functionality.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_bitops.h | 23 +++++++++++++++++++++++
 drivers/net/ice/base/ice_switch.c | 11 +----------
 2 files changed, 24 insertions(+), 10 deletions(-)

diff --git a/drivers/net/ice/base/ice_bitops.h b/drivers/net/ice/base/ice_bitops.h
index 8352b5dd7..a56d55455 100644
--- a/drivers/net/ice/base/ice_bitops.h
+++ b/drivers/net/ice/base/ice_bitops.h
@@ -395,6 +395,29 @@ ice_bitmap_set(ice_bitmap_t *dst, u16 pos, u16 num_bits)
 }
 
 /**
+ * ice_bitmap_hweight - hamming weight of bitmap
+ * @bm: bitmap pointer
+ * @size: size of bitmap (in bits)
+ *
+ * This function determines the number of set bits in a bitmap.
+ * Note that this function assumes it is operating on a bitmap declared using
+ * ice_declare_bitmap.
+ */
+static inline int
+ice_bitmap_hweight(ice_bitmap_t *bm, u16 size)
+{
+	int count = 0;
+	u16 bit = 0;
+
+	while (size > (bit = ice_find_next_bit(bm, size, bit))) {
+		count++;
+		bit++;
+	}
+
+	return count;
+}
+
+/**
  * ice_cmp_bitmaps - compares two bitmaps.
  * @bmp1: the bitmap to compare
  * @bmp2: the bitmap to compare with bmp1
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 41ebfedc6..ecb411714 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -5932,7 +5932,6 @@ ice_find_free_recp_res_idx(struct ice_hw *hw, const ice_bitmap_t *profiles,
 	ice_declare_bitmap(possible_idx, ICE_MAX_FV_WORDS);
 	ice_declare_bitmap(recipes, ICE_MAX_NUM_RECIPES);
 	ice_declare_bitmap(used_idx, ICE_MAX_FV_WORDS);
-	u16 count = 0;
 	u16 bit;
 
 	ice_zero_bitmap(possible_idx, ICE_MAX_FV_WORDS);
@@ -5971,15 +5970,7 @@ ice_find_free_recp_res_idx(struct ice_hw *hw, const ice_bitmap_t *profiles,
 	ice_xor_bitmap(free_idx, used_idx, possible_idx, ICE_MAX_FV_WORDS);
 
 	/* return number of free indexes */
-	count = 0;
-	bit = 0;
-	while (ICE_MAX_FV_WORDS >
-	       (bit = ice_find_next_bit(free_idx, ICE_MAX_FV_WORDS, bit))) {
-		count++;
-		bit++;
-	}
-
-	return count;
+	return (u16)ice_bitmap_hweight(free_idx, ICE_MAX_FV_WORDS);
 }
 
 /**
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 12/40] net/ice/base: add function header
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (10 preceding siblings ...)
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 11/40] net/ice/base: introduce and use bitmap hamming weight API Qi Zhang
@ 2020-09-07 11:27 ` Qi Zhang
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 13/40] net/ice/base: introduce and use for each bit iterator Qi Zhang
                   ` (29 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:27 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Tony Nguyen

Add a function header for ice_cfg_phy_fc()

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index d9ad3217a..fdde85774 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2749,6 +2749,12 @@ enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options)
 	return ICE_FEC_NONE;
 }
 
+/**
+ * ice_cfg_phy_fc - Configure PHY FC data based on FC mode
+ * @pi: port information structure
+ * @cfg: PHY configuration data to set FC mode
+ * @req_mode: FC mode to configure
+ */
 static enum ice_status
 ice_cfg_phy_fc(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
 	       enum ice_fc_mode req_mode)
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 13/40] net/ice/base: introduce and use for each bit iterator
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (11 preceding siblings ...)
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 12/40] net/ice/base: add function header Qi Zhang
@ 2020-09-07 11:27 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 14/40] net/ice/base: correct abbreviations Qi Zhang
                   ` (28 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:27 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Bruce Allan

A number of code flows iterate over a block of memory to do something for
every bit set in that memory. Use existing bit operations in a new iterator
macro to make those code flows cleaner.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_acl_ctrl.c  | 17 +++-----
 drivers/net/ice/base/ice_bitops.h    |  5 +++
 drivers/net/ice/base/ice_flex_pipe.c | 66 ++++++++++++++-----------------
 drivers/net/ice/base/ice_flow.c      | 75 +++++++++++-------------------------
 drivers/net/ice/base/ice_switch.c    | 59 ++++++++++++----------------
 5 files changed, 85 insertions(+), 137 deletions(-)

diff --git a/drivers/net/ice/base/ice_acl_ctrl.c b/drivers/net/ice/base/ice_acl_ctrl.c
index a732397ce..49c4f3675 100644
--- a/drivers/net/ice/base/ice_acl_ctrl.c
+++ b/drivers/net/ice/base/ice_acl_ctrl.c
@@ -1028,9 +1028,8 @@ ice_acl_prog_act(struct ice_hw *hw, struct ice_acl_scen *scen,
 	entry_tcam = ICE_ACL_TBL_TCAM_IDX(scen->start);
 	idx = ICE_ACL_TBL_TCAM_ENTRY_IDX(scen->start + entry_idx);
 
-	i = ice_find_first_bit(scen->act_mem_bitmap,
-			       ICE_AQC_MAX_ACTION_MEMORIES);
-	while (i < ICE_AQC_MAX_ACTION_MEMORIES) {
+	ice_for_each_set_bit(i, scen->act_mem_bitmap,
+			     ICE_AQC_MAX_ACTION_MEMORIES) {
 		struct ice_acl_act_mem *mem = &hw->acl_tbl->act_mems[i];
 
 		if (actx_idx >= acts_cnt)
@@ -1057,9 +1056,6 @@ ice_acl_prog_act(struct ice_hw *hw, struct ice_acl_scen *scen,
 			}
 			actx_idx++;
 		}
-
-		i = ice_find_next_bit(scen->act_mem_bitmap,
-				      ICE_AQC_MAX_ACTION_MEMORIES, i + 1);
 	}
 
 	if (!status && actx_idx < acts_cnt)
@@ -1111,9 +1107,9 @@ ice_acl_rem_entry(struct ice_hw *hw, struct ice_acl_scen *scen, u16 entry_idx)
 	}
 
 	ice_memset(&act_buf, 0, sizeof(act_buf), ICE_NONDMA_MEM);
-	i = ice_find_first_bit(scen->act_mem_bitmap,
-			       ICE_AQC_MAX_ACTION_MEMORIES);
-	while (i < ICE_AQC_MAX_ACTION_MEMORIES) {
+
+	ice_for_each_set_bit(i, scen->act_mem_bitmap,
+			     ICE_AQC_MAX_ACTION_MEMORIES) {
 		struct ice_acl_act_mem *mem = &hw->acl_tbl->act_mems[i];
 
 		if (mem->member_of_tcam >= entry_tcam &&
@@ -1126,9 +1122,6 @@ ice_acl_rem_entry(struct ice_hw *hw, struct ice_acl_scen *scen, u16 entry_idx)
 					  "program actpair failed.status: %d\n",
 					  status);
 		}
-
-		i = ice_find_next_bit(scen->act_mem_bitmap,
-				      ICE_AQC_MAX_ACTION_MEMORIES, i + 1);
 	}
 
 	ice_acl_scen_free_entry_idx(scen, entry_idx);
diff --git a/drivers/net/ice/base/ice_bitops.h b/drivers/net/ice/base/ice_bitops.h
index a56d55455..f954a7436 100644
--- a/drivers/net/ice/base/ice_bitops.h
+++ b/drivers/net/ice/base/ice_bitops.h
@@ -346,6 +346,11 @@ static inline u16 ice_find_first_bit(const ice_bitmap_t *bitmap, u16 size)
 	return ice_find_next_bit(bitmap, size, 0);
 }
 
+#define ice_for_each_set_bit(_bitpos, _addr, _maxlen)	\
+	for ((_bitpos) = ice_find_first_bit((_addr), (_maxlen)); \
+	     (_bitpos) < (_maxlen); \
+	     (_bitpos) = ice_find_next_bit((_addr), (_maxlen), (_bitpos) + 1))
+
 /**
  * ice_is_any_bit_set - Return true of any bit in the bitmap is set
  * @bitmap: the bitmap to check
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index a08390992..3df7b8596 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -4665,50 +4665,42 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
 			byte++;
 			continue;
 		}
+
 		/* Examine 8 bits per byte */
-		for (bit = 0; bit < 8; bit++) {
-			if (ptypes[byte] & BIT(bit)) {
-				u16 ptype;
-				u8 ptg;
-				u8 m;
+		ice_for_each_set_bit(bit, (ice_bitmap_t *)&ptypes[byte],
+				     BITS_PER_BYTE) {
+			u16 ptype;
+			u8 ptg;
 
-				ptype = byte * BITS_PER_BYTE + bit;
+			ptype = byte * BITS_PER_BYTE + bit;
 
-				/* The package should place all ptypes in a
-				 * non-zero PTG, so the following call should
-				 * never fail.
-				 */
-				if (ice_ptg_find_ptype(hw, blk, ptype, &ptg))
-					continue;
+			/* The package should place all ptypes in a non-zero
+			 * PTG, so the following call should never fail.
+			 */
+			if (ice_ptg_find_ptype(hw, blk, ptype, &ptg))
+				continue;
 
-				/* If PTG is already added, skip and continue */
-				if (ice_is_bit_set(ptgs_used, ptg))
-					continue;
+			/* If PTG is already added, skip and continue */
+			if (ice_is_bit_set(ptgs_used, ptg))
+				continue;
 
-				ice_set_bit(ptg, ptgs_used);
-				/* Check to see there are any attributes for
-				 * this ptype, and add them if found.
+			ice_set_bit(ptg, ptgs_used);
+			/* Check to see there are any attributes for this
+			 * ptype, and add them if found.
+			 */
+			status = ice_add_prof_attrib(prof, ptg, ptype, attr,
+						     attr_cnt);
+			if (status == ICE_ERR_MAX_LIMIT)
+				break;
+			if (status) {
+				/* This is simple a ptype/PTG with no
+				 * attribute
 				 */
-				status = ice_add_prof_attrib(prof, ptg, ptype,
-							     attr, attr_cnt);
-				if (status == ICE_ERR_MAX_LIMIT)
-					break;
-				if (status) {
-					/* This is simple a ptype/PTG with no
-					 * attribute
-					 */
-					prof->ptg[prof->ptg_cnt] = ptg;
-					prof->attr[prof->ptg_cnt].flags = 0;
-					prof->attr[prof->ptg_cnt].mask = 0;
-
-					if (++prof->ptg_cnt >=
-					    ICE_MAX_PTG_PER_PROFILE)
-						break;
-				}
+				prof->ptg[prof->ptg_cnt] = ptg;
+				prof->attr[prof->ptg_cnt].flags = 0;
+				prof->attr[prof->ptg_cnt].mask = 0;
 
-				/* nothing left in byte, then exit */
-				m = ~(u8)((1 << (bit + 1)) - 1);
-				if (!(ptypes[byte] & m))
+				if (++prof->ptg_cnt >= ICE_MAX_PTG_PER_PROFILE)
 					break;
 			}
 		}
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index d68a9ca5d..cd56f46f4 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1340,16 +1340,12 @@ ice_flow_create_xtrct_seq(struct ice_hw *hw,
 		u64 match = params->prof->segs[i].match;
 		enum ice_flow_field j;
 
-		for (j = 0; j < ICE_FLOW_FIELD_IDX_MAX && match; j++) {
-			const u64 bit = BIT_ULL(j);
-
-			if (match & bit) {
-				status = ice_flow_xtract_fld(hw, params, i, j,
-							     match);
-				if (status)
-					return status;
-				match &= ~bit;
-			}
+		ice_for_each_set_bit(j, (ice_bitmap_t *)&match,
+				     ICE_FLOW_FIELD_IDX_MAX) {
+			status = ice_flow_xtract_fld(hw, params, i, j, match);
+			if (status)
+				return status;
+			ice_clear_bit(j, (ice_bitmap_t *)&match);
 		}
 
 		/* Process raw matching bytes */
@@ -1406,17 +1402,12 @@ ice_flow_acl_def_entry_frmt(struct ice_flow_prof_params *params)
 
 	for (i = 0; i < params->prof->segs_cnt; i++) {
 		struct ice_flow_seg_info *seg = &params->prof->segs[i];
-		u64 match = seg->match;
 		u8 j;
 
-		for (j = 0; j < ICE_FLOW_FIELD_IDX_MAX && match; j++) {
-			struct ice_flow_fld_info *fld;
-			const u64 bit = BIT_ULL(j);
+		ice_for_each_set_bit(j, (ice_bitmap_t *)&seg->match,
+				     ICE_FLOW_FIELD_IDX_MAX) {
+			struct ice_flow_fld_info *fld = &seg->fields[j];
 
-			if (!(match & bit))
-				continue;
-
-			fld = &seg->fields[j];
 			fld->entry.mask = ICE_FLOW_FLD_OFF_INVAL;
 
 			if (fld->type == ICE_FLOW_FLD_TYPE_RANGE) {
@@ -1448,8 +1439,6 @@ ice_flow_acl_def_entry_frmt(struct ice_flow_prof_params *params)
 				fld->entry.val = index;
 				index += fld->entry.last;
 			}
-
-			match &= ~bit;
 		}
 
 		for (j = 0; j < seg->raws_cnt; j++) {
@@ -2028,25 +2017,18 @@ ice_flow_acl_set_xtrct_seq(struct ice_hw *hw, struct ice_flow_prof *prof)
 
 		for (i = 0; i < prof->segs_cnt; i++) {
 			struct ice_flow_seg_info *seg = &prof->segs[i];
-			u64 match = seg->match;
 			u16 j;
 
-			for (j = 0; j < ICE_FLOW_FIELD_IDX_MAX && match; j++) {
-				const u64 bit = BIT_ULL(j);
-
-				if (!(match & bit))
-					continue;
-
+			ice_for_each_set_bit(j, (ice_bitmap_t *)&seg->match,
+					     ICE_FLOW_FIELD_IDX_MAX) {
 				info = &seg->fields[j];
 
 				if (info->type == ICE_FLOW_FLD_TYPE_RANGE)
 					buf.word_selection[info->entry.val] =
-								info->xtrct.idx;
+						info->xtrct.idx;
 				else
 					ice_flow_acl_set_xtrct_seq_fld(&buf,
 								       info);
-
-				match &= ~bit;
 			}
 
 			for (j = 0; j < seg->raws_cnt; j++) {
@@ -2549,17 +2531,11 @@ ice_flow_acl_frmt_entry(struct ice_hw *hw, struct ice_flow_prof *prof,
 
 	for (i = 0; i < prof->segs_cnt; i++) {
 		struct ice_flow_seg_info *seg = &prof->segs[i];
-		u64 match = seg->match;
-		u16 j;
-
-		for (j = 0; j < ICE_FLOW_FIELD_IDX_MAX && match; j++) {
-			struct ice_flow_fld_info *info;
-			const u64 bit = BIT_ULL(j);
-
-			if (!(match & bit))
-				continue;
+		u8 j;
 
-			info = &seg->fields[j];
+		ice_for_each_set_bit(j, (ice_bitmap_t *)&seg->match,
+				     ICE_FLOW_FIELD_IDX_MAX) {
+			struct ice_flow_fld_info *info = &seg->fields[j];
 
 			if (info->type == ICE_FLOW_FLD_TYPE_RANGE)
 				ice_flow_acl_frmt_entry_range(j, info,
@@ -2568,8 +2544,6 @@ ice_flow_acl_frmt_entry(struct ice_hw *hw, struct ice_flow_prof *prof,
 			else
 				ice_flow_acl_frmt_entry_fld(j, info, buf,
 							    dontcare, data);
-
-			match &= ~bit;
 		}
 
 		for (j = 0; j < seg->raws_cnt; j++) {
@@ -3271,20 +3245,15 @@ static enum ice_status
 ice_flow_set_rss_seg_info(struct ice_flow_seg_info *segs, u64 hash_fields,
 			  u32 flow_hdr)
 {
-	u64 val = hash_fields;
+	u64 val;
 	u8 i;
 
-	for (i = 0; val && i < ICE_FLOW_FIELD_IDX_MAX; i++) {
-		u64 bit = BIT_ULL(i);
+	ice_for_each_set_bit(i, (ice_bitmap_t *)&hash_fields,
+			     ICE_FLOW_FIELD_IDX_MAX)
+		ice_flow_set_fld(segs, (enum ice_flow_field)i,
+				 ICE_FLOW_FLD_OFF_INVAL, ICE_FLOW_FLD_OFF_INVAL,
+				 ICE_FLOW_FLD_OFF_INVAL, false);
 
-		if (val & bit) {
-			ice_flow_set_fld(segs, (enum ice_flow_field)i,
-					 ICE_FLOW_FLD_OFF_INVAL,
-					 ICE_FLOW_FLD_OFF_INVAL,
-					 ICE_FLOW_FLD_OFF_INVAL, false);
-			val &= ~bit;
-		}
-	}
 	ICE_FLOW_SET_HDRS(segs, flow_hdr);
 
 	if (segs->hdrs & ~ICE_FLOW_RSS_SEG_HDR_VAL_MASKS &
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index ecb411714..f2d8514be 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1374,9 +1374,8 @@ static void ice_get_recp_to_prof_map(struct ice_hw *hw)
 			continue;
 		ice_cp_bitmap(profile_to_recipe[i], r_bitmap,
 			      ICE_MAX_NUM_RECIPES);
-		for (j = 0; j < ICE_MAX_NUM_RECIPES; j++)
-			if (ice_is_bit_set(r_bitmap, j))
-				ice_set_bit(i, recipe_to_profile[j]);
+		ice_for_each_set_bit(j, r_bitmap, ICE_MAX_NUM_RECIPES)
+			ice_set_bit(i, recipe_to_profile[j]);
 	}
 }
 
@@ -5946,26 +5945,21 @@ ice_find_free_recp_res_idx(struct ice_hw *hw, const ice_bitmap_t *profiles,
 	 * the set of recipes that our recipe may collide with. Also, determine
 	 * what possible result indexes are usable given this set of profiles.
 	 */
-	bit = 0;
-	while (ICE_MAX_NUM_PROFILES >
-	       (bit = ice_find_next_bit(profiles, ICE_MAX_NUM_PROFILES, bit))) {
+	ice_for_each_set_bit(bit, profiles, ICE_MAX_NUM_PROFILES) {
 		ice_or_bitmap(recipes, recipes, profile_to_recipe[bit],
 			      ICE_MAX_NUM_RECIPES);
 		ice_and_bitmap(possible_idx, possible_idx,
 			       hw->switch_info->prof_res_bm[bit],
 			       ICE_MAX_FV_WORDS);
-		bit++;
 	}
 
 	/* For each recipe that our new recipe may collide with, determine
 	 * which indexes have been used.
 	 */
-	for (bit = 0; bit < ICE_MAX_NUM_RECIPES; bit++)
-		if (ice_is_bit_set(recipes, bit)) {
-			ice_or_bitmap(used_idx, used_idx,
-				      hw->switch_info->recp_list[bit].res_idxs,
-				      ICE_MAX_FV_WORDS);
-		}
+	ice_for_each_set_bit(bit, recipes, ICE_MAX_NUM_RECIPES)
+		ice_or_bitmap(used_idx, used_idx,
+			      hw->switch_info->recp_list[bit].res_idxs,
+			      ICE_MAX_FV_WORDS);
 
 	ice_xor_bitmap(free_idx, used_idx, possible_idx, ICE_MAX_FV_WORDS);
 
@@ -6650,18 +6644,17 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
 	if (LIST_EMPTY(&rm->fv_list)) {
 		u16 j;
 
-		for (j = 0; j < ICE_MAX_NUM_PROFILES; j++)
-			if (ice_is_bit_set(fv_bitmap, j)) {
-				struct ice_sw_fv_list_entry *fvl;
-
-				fvl = (struct ice_sw_fv_list_entry *)
-					ice_malloc(hw, sizeof(*fvl));
-				if (!fvl)
-					goto err_unroll;
-				fvl->fv_ptr = NULL;
-				fvl->profile_id = j;
-				LIST_ADD(&fvl->list_entry, &rm->fv_list);
-			}
+		ice_for_each_set_bit(j, fv_bitmap, ICE_MAX_NUM_PROFILES) {
+			struct ice_sw_fv_list_entry *fvl;
+
+			fvl = (struct ice_sw_fv_list_entry *)
+				ice_malloc(hw, sizeof(*fvl));
+			if (!fvl)
+				goto err_unroll;
+			fvl->fv_ptr = NULL;
+			fvl->profile_id = j;
+			LIST_ADD(&fvl->list_entry, &rm->fv_list);
+		}
 	}
 
 	/* get bitmap of all profiles the recipe will be associated with */
@@ -6716,10 +6709,9 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
 			      ICE_MAX_NUM_RECIPES);
 
 		/* Update recipe to profile bitmap array */
-		for (j = 0; j < ICE_MAX_NUM_RECIPES; j++)
-			if (ice_is_bit_set(r_bitmap, j))
-				ice_set_bit((u16)fvit->profile_id,
-					    recipe_to_profile[j]);
+		ice_for_each_set_bit(j, rm->r_bitmap, ICE_MAX_NUM_RECIPES)
+			ice_set_bit((u16)fvit->profile_id,
+				    recipe_to_profile[j]);
 	}
 
 	*rid = rm->root_rid;
@@ -7909,6 +7901,7 @@ ice_replay_fltr(struct ice_hw *hw, u8 recp_id, struct LIST_HEAD_TYPE *list_head)
 	LIST_FOR_EACH_ENTRY(itr, &l_head, ice_fltr_mgmt_list_entry,
 			    list_entry) {
 		struct ice_fltr_list_entry f_entry;
+		u16 vsi_handle;
 
 		f_entry.fltr_info = itr->fltr_info;
 		if (itr->vsi_count < 2 && recp_id != ICE_SW_LKUP_VLAN) {
@@ -7920,12 +7913,8 @@ ice_replay_fltr(struct ice_hw *hw, u8 recp_id, struct LIST_HEAD_TYPE *list_head)
 		}
 
 		/* Add a filter per VSI separately */
-		while (1) {
-			u16 vsi_handle;
-
-			vsi_handle =
-				ice_find_first_bit(itr->vsi_list_info->vsi_map,
-						   ICE_MAX_VSI);
+		ice_for_each_set_bit(vsi_handle, itr->vsi_list_info->vsi_map,
+				     ICE_MAX_VSI) {
 			if (!ice_is_vsi_valid(hw, vsi_handle))
 				break;
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 14/40] net/ice/base: correct abbreviations
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (12 preceding siblings ...)
  2020-09-07 11:27 ` [dpdk-dev] [PATCH 13/40] net/ice/base: introduce and use for each bit iterator Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 15/40] net/ice/base: add AQ cmd 0X0A0A LLDP fltr control Qi Zhang
                   ` (27 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Tony Nguyen

Correct abbreviations as identified by abbrevcheck

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flex_pipe.c |  6 +++---
 drivers/net/ice/base/ice_sched.c     | 16 ++++++++--------
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 3df7b8596..d4b2e4f29 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -5228,7 +5228,7 @@ ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,
 
 	/* for re-enabling, reallocate a TCAM */
 	/* for entries with empty attribute masks, allocate entry from
-	 * the bottom of the tcam table; otherwise, allocate from the
+	 * the bottom of the TCAM table; otherwise, allocate from the
 	 * top of the table in order to give it higher priority
 	 */
 	status = ice_alloc_tcam_ent(hw, blk, tcam->attr.mask == 0,
@@ -5439,7 +5439,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
 
 		/* allocate the TCAM entry index */
 		/* for entries with empty attribute masks, allocate entry from
-		 * the bottom of the tcam table; otherwise, allocate from the
+		 * the bottom of the TCAM table; otherwise, allocate from the
 		 * top of the table in order to give it higher priority
 		 */
 		status = ice_alloc_tcam_ent(hw, blk, map->attr[i].mask == 0,
@@ -5872,7 +5872,7 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
 
 			if (last_profile) {
 				/* If there are no profiles left for this VSIG,
-				 * then simply remove the the VSIG.
+				 * then simply remove the VSIG.
 				 */
 				status = ice_rem_vsig(hw, blk, vsig, &chg);
 				if (status)
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index e189e95f7..f5f3b85d6 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -1435,14 +1435,14 @@ ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
 }
 
 /**
- * ice_sched_get_free_qgrp - Scan all Q group siblings and find a free node
+ * ice_sched_get_free_qgrp - Scan all queue group siblings and find a free node
  * @pi: port information structure
  * @vsi_node: software VSI handle
- * @qgrp_node: first Q group node identified for scanning
+ * @qgrp_node: first queue group node identified for scanning
  * @owner: LAN or RDMA
  *
- * This function retrieves a free LAN or RDMA Q group node by scanning
- * qgrp_node and its siblings for the Q group with the fewest number
+ * This function retrieves a free LAN or RDMA queue group node by scanning
+ * qgrp_node and its siblings for the queue group with the fewest number
  * of queues currently assigned.
  */
 static struct ice_sched_node *
@@ -1459,17 +1459,17 @@ ice_sched_get_free_qgrp(struct ice_port_info *pi,
 	if (!min_children)
 		return qgrp_node;
 	min_qgrp = qgrp_node;
-	/* scan all Q groups until find a node which has less than the
-	 * minimum number of children. This way all Q group nodes get
+	/* scan all queue groups until find a node which has less than the
+	 * minimum number of children. This way all queue group nodes get
 	 * equal number of shares and active. The bandwidth will be equally
-	 * distributed across all Qs.
+	 * distributed across all queues.
 	 */
 	while (qgrp_node) {
 		/* make sure the qgroup node is part of the VSI subtree */
 		if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
 			if (qgrp_node->num_children < min_children &&
 			    qgrp_node->owner == owner) {
-				/* replace the new min Q group node */
+				/* replace the new min queue group node */
 				min_qgrp = qgrp_node;
 				min_children = min_qgrp->num_children;
 				/* break if it has no children, */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 15/40] net/ice/base: add AQ cmd 0X0A0A LLDP fltr control
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (13 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 14/40] net/ice/base: correct abbreviations Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 16/40] net/ice/base: add support for GTP-U type switch rule Qi Zhang
                   ` (26 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Dave Ertman

As of NVM ver 1.7.1 there is a new AQ command to add and remove
LLDP filters for Rx flow.  This patch implements the support
structure to implement this functionality.

Signed-off-by: Dave Ertman <david.m.ertman@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 47 +++++++++++++++++++++++++++++++++++++++
 drivers/net/ice/base/ice_common.h |  3 +++
 drivers/net/ice/base/ice_type.h   |  4 ++++
 3 files changed, 54 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index fdde85774..87dc9db43 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -4799,3 +4799,50 @@ ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
 
 	return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
 }
+
+/**
+ * ice_fw_supports_lldp_fltr - check NVM version supports lldp_fltr_ctrl
+ * @hw: pointer to HW struct
+ */
+bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw)
+{
+	if (hw->mac_type != ICE_MAC_E810)
+		return false;
+
+	if (hw->api_maj_ver == ICE_FW_API_LLDP_FLTR_MAJ) {
+		if (hw->api_min_ver > ICE_FW_API_LLDP_FLTR_MIN)
+			return true;
+		if (hw->api_min_ver == ICE_FW_API_LLDP_FLTR_MIN &&
+		    hw->api_patch >= ICE_FW_API_LLDP_FLTR_PATCH)
+			return true;
+	} else if (hw->api_maj_ver > ICE_FW_API_LLDP_FLTR_MAJ) {
+		return true;
+	}
+	return false;
+}
+
+/**
+ * ice_lldp_fltr_add_remove - add or remove a LLDP Rx switch filter
+ * @hw: pointer to HW struct
+ * @vsi_num: absolute HW index for VSI
+ * @add: boolean for if adding or removing a filter
+ */
+enum ice_status
+ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add)
+{
+	struct ice_aqc_lldp_filter_ctrl *cmd;
+	struct ice_aq_desc desc;
+
+	cmd = &desc.params.lldp_filter_ctrl;
+
+	ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_filter_ctrl);
+
+	if (add)
+		cmd->cmd_flags = ICE_AQC_LLDP_FILTER_ACTION_ADD;
+	else
+		cmd->cmd_flags = ICE_AQC_LLDP_FILTER_ACTION_DELETE;
+
+	cmd->vsi_num = CPU_TO_LE16(vsi_num);
+
+	return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+}
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 1aea915ad..d176f7495 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -223,4 +223,7 @@ ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
 enum ice_status
 ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
 		    struct ice_sq_cd *cd);
+bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw);
+enum ice_status
+ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add);
 #endif /* _ICE_COMMON_H_ */
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index be6bdf9e7..c558a1cb0 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -1122,4 +1122,8 @@ enum ice_sw_fwd_act_type {
 #define GLPCI_LBARCTRL_VF_PE_DB_SIZE_8KB 0x1
 #define GLPCI_LBARCTRL_VF_PE_DB_SIZE_64KB 0x2
 
+/* AQ API version for LLDP_FILTER_CONTROL */
+#define ICE_FW_API_LLDP_FLTR_MAJ	1
+#define ICE_FW_API_LLDP_FLTR_MIN	7
+#define ICE_FW_API_LLDP_FLTR_PATCH	1
 #endif /* _ICE_TYPE_H_ */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 16/40] net/ice/base: add support for GTP-U type switch rule
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (14 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 15/40] net/ice/base: add AQ cmd 0X0A0A LLDP fltr control Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 17/40] net/ice/base: join format strings to same line Qi Zhang
                   ` (25 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Wei Zhao

This patch add support for GTP-U type of switch rule.
It enable all GTP-U related ptype.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_protocol_type.h |   7 +
 drivers/net/ice/base/ice_switch.c        | 299 ++++++++++++++++++++++++++++++-
 drivers/net/ice/base/ice_switch.h        |  26 ++-
 3 files changed, 328 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index 7cc44c172..4d3136fb2 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -51,6 +51,7 @@ enum ice_protocol_type {
 	ICE_ESP,
 	ICE_AH,
 	ICE_NAT_T,
+	ICE_GTP_NO_PAY,
 	ICE_PROTOCOL_LAST
 };
 
@@ -71,6 +72,12 @@ enum ice_sw_tunnel_type {
 	ICE_SW_IPV6_TCP,
 	ICE_SW_IPV6_UDP,
 	ICE_SW_TUN_GTP,
+	ICE_SW_TUN_IPV4_GTPU_NO_PAY,
+	ICE_SW_TUN_IPV6_GTPU_NO_PAY,
+	ICE_SW_TUN_IPV4_GTPU_IPV4,
+	ICE_SW_TUN_IPV4_GTPU_IPV6,
+	ICE_SW_TUN_IPV6_GTPU_IPV4,
+	ICE_SW_TUN_IPV6_GTPU_IPV6,
 	ICE_SW_TUN_PPPOE,
 	ICE_SW_TUN_PPPOE_PAY,
 	ICE_SW_TUN_PPPOE_IPV4,
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index f2d8514be..69fa64ac9 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -535,6 +535,207 @@ static const u8 dummy_udp_gtp_packet[] = {
 	0x00, 0x00, 0x00, 0x00,
 };
 
+static const
+struct ice_dummy_pkt_offsets dummy_ipv4_gtpu_ipv4_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_IPV4_OFOS,	14 },
+	{ ICE_UDP_OF,		34 },
+	{ ICE_GTP,		42 },
+	{ ICE_IPV4_IL,		62 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_ipv4_gtpu_ipv4_packet[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x08, 0x00,
+
+	0x45, 0x00, 0x00, 0x44, /* ICE_IPV4_OFOS 14 */
+	0x00, 0x00, 0x40, 0x00,
+	0x40, 0x11, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x08, 0x68, 0x08, 0x68, /* ICE_UDP_OF 34 */
+	0x00, 0x00, 0x00, 0x00,
+
+	0x34, 0xff, 0x00, 0x28,  /* ICE_GTP 42 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x85,
+
+	0x02, 0x00, 0x00, 0x00, /* PDU Session extension header */
+	0x00, 0x00, 0x00, 0x00,
+
+	0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 62 */
+	0x00, 0x00, 0x40, 0x00,
+	0x40, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00,
+};
+
+static const
+struct ice_dummy_pkt_offsets dummy_ipv4_gtpu_ipv6_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_IPV4_OFOS,	14 },
+	{ ICE_UDP_OF,		34 },
+	{ ICE_GTP,		42 },
+	{ ICE_IPV6_IL,		62 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_ipv4_gtpu_ipv6_packet[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x08, 0x00,
+
+	0x45, 0x00, 0x00, 0x58, /* ICE_IPV4_OFOS 14 */
+	0x00, 0x00, 0x40, 0x00,
+	0x40, 0x11, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x08, 0x68, 0x08, 0x68, /* ICE_UDP_OF 34 */
+	0x00, 0x00, 0x00, 0x00,
+
+	0x34, 0xff, 0x00, 0x28,  /* ICE_GTP 42 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x85,
+
+	0x02, 0x00, 0x00, 0x00, /* PDU Session extension header */
+	0x00, 0x00, 0x00, 0x00,
+
+	0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_IL 62 */
+	0x00, 0x00, 0x3b, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00,
+};
+
+static const
+struct ice_dummy_pkt_offsets dummy_ipv6_gtpu_ipv4_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_IPV6_OFOS,	14 },
+	{ ICE_UDP_OF,		54 },
+	{ ICE_GTP,		62 },
+	{ ICE_IPV4_IL,		82 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_ipv6_gtpu_ipv4_packet[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x86, 0xdd,
+
+	0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 14 */
+	0x00, 0x58, 0x11, 0x00, /* Next header UDP*/
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x08, 0x68, 0x08, 0x68, /* ICE_UDP_OF 54 */
+	0x00, 0x00, 0x00, 0x00,
+
+	0x34, 0xff, 0x00, 0x28,  /* ICE_GTP 62 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x85,
+
+	0x02, 0x00, 0x00, 0x00, /* PDU Session extension header */
+	0x00, 0x00, 0x00, 0x00,
+
+	0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 82 */
+	0x00, 0x00, 0x40, 0x00,
+	0x40, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00,
+};
+
+static const
+struct ice_dummy_pkt_offsets dummy_ipv6_gtpu_ipv6_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_IPV6_OFOS,	14 },
+	{ ICE_UDP_OF,		54 },
+	{ ICE_GTP,		62 },
+	{ ICE_IPV6_IL,		82 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_ipv6_gtpu_ipv6_packet[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x86, 0xdd,
+
+	0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 14 */
+	0x00, 0x6c, 0x11, 0x00, /* Next header UDP*/
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x08, 0x68, 0x08, 0x68, /* ICE_UDP_OF 54 */
+	0x00, 0x00, 0x00, 0x00,
+
+	0x34, 0xff, 0x00, 0x28,  /* ICE_GTP 62 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x85,
+
+	0x02, 0x00, 0x00, 0x00, /* PDU Session extension header */
+	0x00, 0x00, 0x00, 0x00,
+
+	0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFIL 82 */
+	0x00, 0x00, 0x3b, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00,
+};
+
+static const
+struct ice_dummy_pkt_offsets dummy_ipv4_gtp_no_pay_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_IPV4_OFOS,	14 },
+	{ ICE_UDP_OF,		34 },
+	{ ICE_GTP_NO_PAY,	42 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const
+struct ice_dummy_pkt_offsets dummy_ipv6_gtp_no_pay_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_IPV6_OFOS,	14 },
+	{ ICE_UDP_OF,		54 },
+	{ ICE_GTP_NO_PAY,	62 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
 static const struct ice_dummy_pkt_offsets dummy_pppoe_packet_offsets[] = {
 	{ ICE_MAC_OFOS,		0 },
 	{ ICE_ETYPE_OL,		12 },
@@ -1070,11 +1271,13 @@ static enum ice_sw_tunnel_type ice_get_tun_type_for_recipe(u8 rid)
 		}
 
 		if (j >= ICE_PROFID_IPV4_GTPU_EH_IPV4_OTHER &&
-		    j <= ICE_PROFID_IPV6_GTPU_IPV6_OTHER)
+		    j <= ICE_PROFID_IPV6_GTPU_IPV6_TCP)
 			gtp_valid = true;
 
-		if (j >= ICE_PROFID_IPV4_ESP &&
-		    j <= ICE_PROFID_IPV6_PFCP_SESSION)
+		if ((j >= ICE_PROFID_IPV4_ESP &&
+		     j <= ICE_PROFID_IPV6_PFCP_SESSION) ||
+		    (j >= ICE_PROFID_IPV4_GTPC_TEID &&
+		     j <= ICE_PROFID_IPV6_GTPU_TEID))
 			flag_valid = true;
 	}
 
@@ -1092,6 +1295,8 @@ static enum ice_sw_tunnel_type ice_get_tun_type_for_recipe(u8 rid)
 	else if (non_tun_valid && !vxlan_valid && !gre_valid && !gtp_valid &&
 		 !pppoe_valid)
 		tun_type = ICE_NON_TUN;
+	else
+		tun_type = ICE_NON_TUN;
 
 	if (profile_num > 1 && tun_type == ICE_SW_TUN_PPPOE) {
 		i = ice_is_bit_set(recipe_to_profile[rid],
@@ -1104,6 +1309,21 @@ static enum ice_sw_tunnel_type ice_get_tun_type_for_recipe(u8 rid)
 			tun_type = ICE_SW_TUN_PPPOE_IPV6;
 	}
 
+	if (tun_type == ICE_SW_TUN_GTP) {
+		if (ice_is_bit_set(recipe_to_profile[rid],
+				   ICE_PROFID_IPV4_GTPU_IPV4_OTHER))
+			tun_type = ICE_SW_TUN_IPV4_GTPU_IPV4;
+		else if (ice_is_bit_set(recipe_to_profile[rid],
+					ICE_PROFID_IPV4_GTPU_IPV6_OTHER))
+			tun_type = ICE_SW_TUN_IPV4_GTPU_IPV6;
+		else if (ice_is_bit_set(recipe_to_profile[rid],
+					ICE_PROFID_IPV6_GTPU_IPV4_OTHER))
+			tun_type = ICE_SW_TUN_IPV6_GTPU_IPV4;
+		else if (ice_is_bit_set(recipe_to_profile[rid],
+					ICE_PROFID_IPV6_GTPU_IPV6_OTHER))
+			tun_type = ICE_SW_TUN_IPV6_GTPU_IPV6;
+	}
+
 	if (profile_num == 1 && (flag_valid || non_tun_valid || pppoe_valid)) {
 		for (j = 0; j < ICE_MAX_NUM_PROFILES; j++) {
 			if (ice_is_bit_set(recipe_to_profile[rid], j)) {
@@ -1181,6 +1401,12 @@ static enum ice_sw_tunnel_type ice_get_tun_type_for_recipe(u8 rid)
 				case ICE_PROFID_MAC_IPV6_L2TPV3:
 					tun_type = ICE_SW_TUN_IPV6_L2TPV3;
 					break;
+				case ICE_PROFID_IPV4_GTPU_TEID:
+					tun_type = ICE_SW_TUN_IPV4_GTPU_NO_PAY;
+					break;
+				case ICE_PROFID_IPV6_GTPU_TEID:
+					tun_type = ICE_SW_TUN_IPV6_GTPU_NO_PAY;
+					break;
 				default:
 					break;
 				}
@@ -5608,6 +5834,7 @@ static const struct ice_prot_ext_tbl_entry ice_prot_ext[ICE_PROTOCOL_LAST] = {
 	{ ICE_ESP,		{ 0, 2, 4, 6 } },
 	{ ICE_AH,		{ 0, 2, 4, 6, 8, 10 } },
 	{ ICE_NAT_T,		{ 8, 10, 12, 14 } },
+	{ ICE_GTP_NO_PAY,	{ 8, 10, 12, 14 } },
 };
 
 /* The following table describes preferred grouping of recipes.
@@ -5640,6 +5867,7 @@ static const struct ice_protocol_entry ice_prot_id_tbl[ICE_PROTOCOL_LAST] = {
 	{ ICE_ESP,		ICE_ESP_HW },
 	{ ICE_AH,		ICE_AH_HW },
 	{ ICE_NAT_T,		ICE_UDP_ILOS_HW },
+	{ ICE_GTP_NO_PAY,	ICE_UDP_ILOS_HW },
 };
 
 /**
@@ -6507,6 +6735,38 @@ ice_get_compat_fv_bitmap(struct ice_hw *hw, struct ice_adv_rule_info *rinfo,
 	case ICE_SW_IPV6_UDP:
 		ice_set_bit(ICE_PROFID_IPV6_UDP, bm);
 		return;
+	case ICE_SW_TUN_IPV4_GTPU_IPV4:
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_EH_IPV4_OTHER, bm);
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_IPV4_OTHER, bm);
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_EH_IPV4_UDP, bm);
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_IPV4_UDP, bm);
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_EH_IPV4_TCP, bm);
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_IPV4_TCP, bm);
+		return;
+	case ICE_SW_TUN_IPV6_GTPU_IPV4:
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_EH_IPV4_OTHER, bm);
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_IPV4_OTHER, bm);
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_EH_IPV4_UDP, bm);
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_IPV4_UDP, bm);
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_EH_IPV4_TCP, bm);
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_IPV4_TCP, bm);
+		return;
+	case ICE_SW_TUN_IPV4_GTPU_IPV6:
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_EH_IPV6_OTHER, bm);
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_IPV6_OTHER, bm);
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_EH_IPV6_UDP, bm);
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_IPV6_UDP, bm);
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_EH_IPV6_TCP, bm);
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_IPV6_TCP, bm);
+		return;
+	case ICE_SW_TUN_IPV6_GTPU_IPV6:
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_EH_IPV6_OTHER, bm);
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_IPV6_OTHER, bm);
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_EH_IPV6_UDP, bm);
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_IPV6_UDP, bm);
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_EH_IPV6_TCP, bm);
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_IPV6_TCP, bm);
+		return;
 	case ICE_SW_TUN_AND_NON_TUN:
 	default:
 		prof_type = ICE_PROF_ALL;
@@ -6797,6 +7057,38 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
 			tcp = true;
 	}
 
+	if (tun_type == ICE_SW_TUN_IPV4_GTPU_NO_PAY) {
+		*pkt = dummy_ipv4_gtpu_ipv4_packet;
+		*pkt_len = sizeof(dummy_ipv4_gtpu_ipv4_packet);
+		*offsets = dummy_ipv4_gtp_no_pay_packet_offsets;
+		return;
+	} else if (tun_type == ICE_SW_TUN_IPV6_GTPU_NO_PAY) {
+		*pkt = dummy_ipv6_gtpu_ipv6_packet;
+		*pkt_len = sizeof(dummy_ipv6_gtpu_ipv6_packet);
+		*offsets = dummy_ipv6_gtp_no_pay_packet_offsets;
+		return;
+	} else if (tun_type == ICE_SW_TUN_IPV4_GTPU_IPV4) {
+		*pkt = dummy_ipv4_gtpu_ipv4_packet;
+		*pkt_len = sizeof(dummy_ipv4_gtpu_ipv4_packet);
+		*offsets = dummy_ipv4_gtpu_ipv4_packet_offsets;
+		return;
+	} else if (tun_type == ICE_SW_TUN_IPV4_GTPU_IPV6) {
+		*pkt = dummy_ipv4_gtpu_ipv6_packet;
+		*pkt_len = sizeof(dummy_ipv4_gtpu_ipv6_packet);
+		*offsets = dummy_ipv4_gtpu_ipv6_packet_offsets;
+		return;
+	} else if (tun_type == ICE_SW_TUN_IPV6_GTPU_IPV4) {
+		*pkt = dummy_ipv6_gtpu_ipv4_packet;
+		*pkt_len = sizeof(dummy_ipv6_gtpu_ipv4_packet);
+		*offsets = dummy_ipv6_gtpu_ipv4_packet_offsets;
+		return;
+	} else if (tun_type == ICE_SW_TUN_IPV6_GTPU_IPV6) {
+		*pkt = dummy_ipv6_gtpu_ipv6_packet;
+		*pkt_len = sizeof(dummy_ipv6_gtpu_ipv6_packet);
+		*offsets = dummy_ipv6_gtpu_ipv6_packet_offsets;
+		return;
+	}
+
 	if (tun_type == ICE_SW_TUN_IPV4_ESP) {
 		*pkt = dummy_ipv4_esp_pkt;
 		*pkt_len = sizeof(dummy_ipv4_esp_pkt);
@@ -7111,6 +7403,7 @@ ice_fill_adv_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
 			break;
 
 		case ICE_GTP:
+		case ICE_GTP_NO_PAY:
 			len = sizeof(struct ice_udp_gtp_hdr);
 			break;
 		case ICE_PPPOE:
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index aa446774c..a7e94344c 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -28,8 +28,32 @@
 #define ICE_PROFID_PPPOE_IPV6_UDP	39
 #define ICE_PROFID_PPPOE_IPV6_OTHER	40
 #define ICE_PROFID_IPV4_GTPC_TEID	41
+#define ICE_PROFID_IPV4_GTPU_TEID		43
+#define ICE_PROFID_IPV6_GTPU_TEID		46
 #define ICE_PROFID_IPV4_GTPU_EH_IPV4_OTHER	47
-#define ICE_PROFID_IPV6_GTPU_IPV6_OTHER	70
+#define ICE_PROFID_IPV4_GTPU_IPV4_OTHER		48
+#define ICE_PROFID_IPV4_GTPU_EH_IPV4_UDP	49
+#define ICE_PROFID_IPV4_GTPU_IPV4_UDP		50
+#define ICE_PROFID_IPV4_GTPU_EH_IPV4_TCP	51
+#define ICE_PROFID_IPV4_GTPU_IPV4_TCP		52
+#define ICE_PROFID_IPV6_GTPU_EH_IPV4_OTHER	53
+#define ICE_PROFID_IPV6_GTPU_IPV4_OTHER		54
+#define ICE_PROFID_IPV6_GTPU_EH_IPV4_UDP	55
+#define ICE_PROFID_IPV6_GTPU_IPV4_UDP		56
+#define ICE_PROFID_IPV6_GTPU_EH_IPV4_TCP	57
+#define ICE_PROFID_IPV6_GTPU_IPV4_TCP		58
+#define ICE_PROFID_IPV4_GTPU_EH_IPV6_OTHER	59
+#define ICE_PROFID_IPV4_GTPU_IPV6_OTHER		60
+#define ICE_PROFID_IPV4_GTPU_EH_IPV6_UDP	61
+#define ICE_PROFID_IPV4_GTPU_IPV6_UDP		62
+#define ICE_PROFID_IPV4_GTPU_EH_IPV6_TCP	63
+#define ICE_PROFID_IPV4_GTPU_IPV6_TCP		64
+#define ICE_PROFID_IPV6_GTPU_EH_IPV6_OTHER	65
+#define ICE_PROFID_IPV6_GTPU_IPV6_OTHER		66
+#define ICE_PROFID_IPV6_GTPU_EH_IPV6_UDP	67
+#define ICE_PROFID_IPV6_GTPU_IPV6_UDP		68
+#define ICE_PROFID_IPV6_GTPU_EH_IPV6_TCP	69
+#define ICE_PROFID_IPV6_GTPU_IPV6_TCP		70
 #define ICE_PROFID_IPV4_ESP		71
 #define ICE_PROFID_IPV6_ESP		72
 #define ICE_PROFID_IPV4_AH		73
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 17/40] net/ice/base: join format strings to same line
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (15 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 16/40] net/ice/base: add support for GTP-U type switch rule Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 18/40] net/ice/base: introduce Tx rate limiting on port level Qi Zhang
                   ` (24 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Jacob Keller

When printing messages with ice_debug, align the printed string to the
origin line of the message in order to ease debugging and tracking
messages back to their source.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_acl_ctrl.c  |  30 ++++------
 drivers/net/ice/base/ice_common.c    | 103 ++++++++++++-----------------------
 drivers/net/ice/base/ice_controlq.c  |  42 +++++---------
 drivers/net/ice/base/ice_flex_pipe.c |  27 +++------
 drivers/net/ice/base/ice_flow.c      |   9 +--
 drivers/net/ice/base/ice_nvm.c       |  30 ++++------
 drivers/net/ice/base/ice_sched.c     |  24 +++-----
 drivers/net/ice/base/ice_switch.c    |  39 +++++--------
 8 files changed, 102 insertions(+), 202 deletions(-)

diff --git a/drivers/net/ice/base/ice_acl_ctrl.c b/drivers/net/ice/base/ice_acl_ctrl.c
index 49c4f3675..0ecf38496 100644
--- a/drivers/net/ice/base/ice_acl_ctrl.c
+++ b/drivers/net/ice/base/ice_acl_ctrl.c
@@ -357,12 +357,10 @@ ice_acl_create_tbl(struct ice_hw *hw, struct ice_acl_tbl_params *params)
 	if (status) {
 		if (LE16_TO_CPU(tbl_alloc.buf.resp_buf.alloc_id) <
 		    ICE_AQC_ALLOC_ID_LESS_THAN_4K)
-			ice_debug(hw, ICE_DBG_ACL,
-				  "Alloc ACL table failed. Unavailable resource.\n");
+			ice_debug(hw, ICE_DBG_ACL, "Alloc ACL table failed. Unavailable resource.\n");
 		else
-			ice_debug(hw, ICE_DBG_ACL,
-				  "AQ allocation of ACL failed with error. status: %d\n",
-				   status);
+			ice_debug(hw, ICE_DBG_ACL, "AQ allocation of ACL failed with error. status: %d\n",
+				  status);
 		return status;
 	}
 
@@ -402,8 +400,7 @@ ice_acl_create_tbl(struct ice_hw *hw, struct ice_acl_tbl_params *params)
 	if (status) {
 		ice_free(hw, tbl);
 		hw->acl_tbl = NULL;
-		ice_debug(hw, ICE_DBG_ACL,
-			  "Initialization of TCAM entries failed. status: %d\n",
+		ice_debug(hw, ICE_DBG_ACL, "Initialization of TCAM entries failed. status: %d\n",
 			  status);
 		goto out;
 	}
@@ -830,8 +827,7 @@ ice_acl_create_scen(struct ice_hw *hw, u16 match_width, u16 num_entries,
 
 	status = ice_aq_alloc_acl_scen(hw, scen_id, &scen_buf, NULL);
 	if (status) {
-		ice_debug(hw, ICE_DBG_ACL,
-			  "AQ allocation of ACL scenario failed. status: %d\n",
+		ice_debug(hw, ICE_DBG_ACL, "AQ allocation of ACL scenario failed. status: %d\n",
 			  status);
 		ice_free(hw, scen);
 		return status;
@@ -898,10 +894,8 @@ enum ice_status ice_acl_destroy_tbl(struct ice_hw *hw)
 
 	/* call the AQ command to destroy the ACL table */
 	status = ice_aq_dealloc_acl_tbl(hw, hw->acl_tbl->id, &resp_buf, NULL);
-
 	if (status) {
-		ice_debug(hw, ICE_DBG_ACL,
-			  "AQ de-allocation of ACL failed. status: %d\n",
+		ice_debug(hw, ICE_DBG_ACL, "AQ de-allocation of ACL failed. status: %d\n",
 			  status);
 		return status;
 	}
@@ -977,8 +971,7 @@ ice_acl_add_entry(struct ice_hw *hw, struct ice_acl_scen *scen,
 		status = ice_aq_program_acl_entry(hw, entry_tcam + offset, idx,
 						  &buf, NULL);
 		if (status) {
-			ice_debug(hw, ICE_DBG_ACL,
-				  "aq program acl entry failed status: %d\n",
+			ice_debug(hw, ICE_DBG_ACL, "aq program acl entry failed status: %d\n",
 				  status);
 			goto out;
 		}
@@ -1049,8 +1042,7 @@ ice_acl_prog_act(struct ice_hw *hw, struct ice_acl_scen *scen,
 			status = ice_aq_program_actpair(hw, i, idx, &act_buf,
 							NULL);
 			if (status) {
-				ice_debug(hw, ICE_DBG_ACL,
-					  "program actpair failed status: %d\n",
+				ice_debug(hw, ICE_DBG_ACL, "program actpair failed status: %d\n",
 					  status);
 				break;
 			}
@@ -1101,8 +1093,7 @@ ice_acl_rem_entry(struct ice_hw *hw, struct ice_acl_scen *scen, u16 entry_idx)
 		status = ice_aq_program_acl_entry(hw, entry_tcam + i, idx, &buf,
 						  NULL);
 		if (status)
-			ice_debug(hw, ICE_DBG_ACL,
-				  "AQ program ACL entry failed status: %d\n",
+			ice_debug(hw, ICE_DBG_ACL, "AQ program ACL entry failed status: %d\n",
 				  status);
 	}
 
@@ -1118,8 +1109,7 @@ ice_acl_rem_entry(struct ice_hw *hw, struct ice_acl_scen *scen, u16 entry_idx)
 			status = ice_aq_program_actpair(hw, i, idx, &act_buf,
 							NULL);
 			if (status)
-				ice_debug(hw, ICE_DBG_ACL,
-					  "program actpair failed.status: %d\n",
+				ice_debug(hw, ICE_DBG_ACL, "program actpair failed status: %d\n",
 					  status);
 		}
 	}
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 87dc9db43..3d2489113 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -760,8 +760,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
 	/* Query the allocated resources for Tx scheduler */
 	status = ice_sched_query_res_alloc(hw);
 	if (status) {
-		ice_debug(hw, ICE_DBG_SCHED,
-			  "Failed to get scheduler allocated resources\n");
+		ice_debug(hw, ICE_DBG_SCHED, "Failed to get scheduler allocated resources\n");
 		goto err_unroll_alloc;
 	}
 	ice_sched_get_psm_clk_freq(hw);
@@ -770,7 +769,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
 	status = ice_sched_init_port(hw->port_info);
 	if (status)
 		goto err_unroll_sched;
-
 	pcaps = (struct ice_aqc_get_phy_caps_data *)
 		ice_malloc(hw, sizeof(*pcaps));
 	if (!pcaps) {
@@ -783,7 +781,8 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
 				     ICE_AQC_REPORT_TOPO_CAP, pcaps, NULL);
 	ice_free(hw, pcaps);
 	if (status)
-		goto err_unroll_sched;
+		ice_debug(hw, ICE_DBG_PHY, "%s: Get PHY capabilities failed, continuing anyway\n",
+			  __func__);
 
 	/* Initialize port_info struct with link information */
 	status = ice_aq_get_link_info(hw->port_info, false, NULL, NULL);
@@ -898,8 +897,7 @@ enum ice_status ice_check_reset(struct ice_hw *hw)
 	}
 
 	if (cnt == grst_timeout) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Global reset polling failed to complete.\n");
+		ice_debug(hw, ICE_DBG_INIT, "Global reset polling failed to complete.\n");
 		return ICE_ERR_RESET_FAILED;
 	}
 
@@ -917,16 +915,14 @@ enum ice_status ice_check_reset(struct ice_hw *hw)
 	for (cnt = 0; cnt < ICE_PF_RESET_WAIT_COUNT; cnt++) {
 		reg = rd32(hw, GLNVM_ULD) & uld_mask;
 		if (reg == uld_mask) {
-			ice_debug(hw, ICE_DBG_INIT,
-				  "Global reset processes done. %d\n", cnt);
+			ice_debug(hw, ICE_DBG_INIT, "Global reset processes done. %d\n", cnt);
 			break;
 		}
 		ice_msec_delay(10, true);
 	}
 
 	if (cnt == ICE_PF_RESET_WAIT_COUNT) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Wait for Reset Done timed out. GLNVM_ULD = 0x%x\n",
+		ice_debug(hw, ICE_DBG_INIT, "Wait for Reset Done timed out. GLNVM_ULD = 0x%x\n",
 			  reg);
 		return ICE_ERR_RESET_FAILED;
 	}
@@ -978,8 +974,7 @@ static enum ice_status ice_pf_reset(struct ice_hw *hw)
 	}
 
 	if (cnt == ICE_PF_RESET_WAIT_COUNT) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "PF reset polling failed to complete.\n");
+		ice_debug(hw, ICE_DBG_INIT, "PF reset polling failed to complete.\n");
 		return ICE_ERR_RESET_FAILED;
 	}
 
@@ -1626,8 +1621,7 @@ ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
 		goto ice_acquire_res_exit;
 
 	if (status)
-		ice_debug(hw, ICE_DBG_RES,
-			  "resource %d acquire type %d failed.\n", res, access);
+		ice_debug(hw, ICE_DBG_RES, "resource %d acquire type %d failed.\n", res, access);
 
 	/* If necessary, poll until the current lock owner timeouts */
 	timeout = time_left;
@@ -1650,11 +1644,9 @@ ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
 ice_acquire_res_exit:
 	if (status == ICE_ERR_AQ_NO_WORK) {
 		if (access == ICE_RES_WRITE)
-			ice_debug(hw, ICE_DBG_RES,
-				  "resource indicates no work to do.\n");
+			ice_debug(hw, ICE_DBG_RES, "resource indicates no work to do.\n");
 		else
-			ice_debug(hw, ICE_DBG_RES,
-				  "Warning: ICE_ERR_AQ_NO_WORK not expected\n");
+			ice_debug(hw, ICE_DBG_RES, "Warning: ICE_ERR_AQ_NO_WORK not expected\n");
 	}
 	return status;
 }
@@ -1846,60 +1838,48 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,
 	switch (cap) {
 	case ICE_AQC_CAPS_VALID_FUNCTIONS:
 		caps->valid_functions = number;
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: valid_functions (bitmap) = %d\n", prefix,
+		ice_debug(hw, ICE_DBG_INIT, "%s: valid_functions (bitmap) = %d\n", prefix,
 			  caps->valid_functions);
 		break;
 	case ICE_AQC_CAPS_DCB:
 		caps->dcb = (number == 1);
 		caps->active_tc_bitmap = logical_id;
 		caps->maxtc = phys_id;
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: dcb = %d\n", prefix, caps->dcb);
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: active_tc_bitmap = %d\n", prefix,
+		ice_debug(hw, ICE_DBG_INIT, "%s: dcb = %d\n", prefix, caps->dcb);
+		ice_debug(hw, ICE_DBG_INIT, "%s: active_tc_bitmap = %d\n", prefix,
 			  caps->active_tc_bitmap);
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: maxtc = %d\n", prefix, caps->maxtc);
+		ice_debug(hw, ICE_DBG_INIT, "%s: maxtc = %d\n", prefix, caps->maxtc);
 		break;
 	case ICE_AQC_CAPS_RSS:
 		caps->rss_table_size = number;
 		caps->rss_table_entry_width = logical_id;
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: rss_table_size = %d\n", prefix,
+		ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_size = %d\n", prefix,
 			  caps->rss_table_size);
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: rss_table_entry_width = %d\n", prefix,
+		ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_entry_width = %d\n", prefix,
 			  caps->rss_table_entry_width);
 		break;
 	case ICE_AQC_CAPS_RXQS:
 		caps->num_rxq = number;
 		caps->rxq_first_id = phys_id;
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: num_rxq = %d\n", prefix,
+		ice_debug(hw, ICE_DBG_INIT, "%s: num_rxq = %d\n", prefix,
 			  caps->num_rxq);
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: rxq_first_id = %d\n", prefix,
+		ice_debug(hw, ICE_DBG_INIT, "%s: rxq_first_id = %d\n", prefix,
 			  caps->rxq_first_id);
 		break;
 	case ICE_AQC_CAPS_TXQS:
 		caps->num_txq = number;
 		caps->txq_first_id = phys_id;
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: num_txq = %d\n", prefix,
+		ice_debug(hw, ICE_DBG_INIT, "%s: num_txq = %d\n", prefix,
 			  caps->num_txq);
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: txq_first_id = %d\n", prefix,
+		ice_debug(hw, ICE_DBG_INIT, "%s: txq_first_id = %d\n", prefix,
 			  caps->txq_first_id);
 		break;
 	case ICE_AQC_CAPS_MSIX:
 		caps->num_msix_vectors = number;
 		caps->msix_vector_first_id = phys_id;
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: num_msix_vectors = %d\n", prefix,
+		ice_debug(hw, ICE_DBG_INIT, "%s: num_msix_vectors = %d\n", prefix,
 			  caps->num_msix_vectors);
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: msix_vector_first_id = %d\n", prefix,
+		ice_debug(hw, ICE_DBG_INIT, "%s: msix_vector_first_id = %d\n", prefix,
 			  caps->msix_vector_first_id);
 		break;
 	case ICE_AQC_CAPS_MAX_MTU:
@@ -1933,8 +1913,7 @@ ice_recalc_port_limited_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps)
 	if (hw->dev_caps.num_funcs > 4) {
 		/* Max 4 TCs per port */
 		caps->maxtc = 4;
-		ice_debug(hw, ICE_DBG_INIT,
-			  "reducing maxtc to %d (based on #ports)\n",
+		ice_debug(hw, ICE_DBG_INIT, "reducing maxtc to %d (based on #ports)\n",
 			  caps->maxtc);
 	}
 }
@@ -1983,11 +1962,9 @@ ice_parse_fdir_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,
 		GLQF_FD_SIZE_FD_BSIZE_S;
 	func_p->fd_fltr_best_effort = val;
 
-	ice_debug(hw, ICE_DBG_INIT,
-		  "func caps: fd_fltr_guar = %d\n",
+	ice_debug(hw, ICE_DBG_INIT, "func caps: fd_fltr_guar = %d\n",
 		  func_p->fd_fltr_guar);
-	ice_debug(hw, ICE_DBG_INIT,
-		  "func caps: fd_fltr_best_effort = %d\n",
+	ice_debug(hw, ICE_DBG_INIT, "func caps: fd_fltr_best_effort = %d\n",
 		  func_p->fd_fltr_best_effort);
 }
 
@@ -2033,8 +2010,7 @@ ice_parse_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,
 		default:
 			/* Don't list common capabilities as unknown */
 			if (!found)
-				ice_debug(hw, ICE_DBG_INIT,
-					  "func caps: unknown capability[%d]: 0x%x\n",
+				ice_debug(hw, ICE_DBG_INIT, "func caps: unknown capability[%d]: 0x%x\n",
 					  i, cap);
 			break;
 		}
@@ -2145,8 +2121,7 @@ ice_parse_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
 		default:
 			/* Don't list common capabilities as unknown */
 			if (!found)
-				ice_debug(hw, ICE_DBG_INIT,
-					  "dev caps: unknown capability[%d]: 0x%x\n",
+				ice_debug(hw, ICE_DBG_INIT, "dev caps: unknown capability[%d]: 0x%x\n",
 					  i, cap);
 			break;
 		}
@@ -2598,8 +2573,7 @@ ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,
 
 	/* Ensure that only valid bits of cfg->caps can be turned on. */
 	if (cfg->caps & ~ICE_AQ_PHY_ENA_VALID_MASK) {
-		ice_debug(hw, ICE_DBG_PHY,
-			  "Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\n",
+		ice_debug(hw, ICE_DBG_PHY, "Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\n",
 			  cfg->caps);
 
 		cfg->caps &= ICE_AQ_PHY_ENA_VALID_MASK;
@@ -3083,8 +3057,7 @@ enum ice_status ice_get_link_status(struct ice_port_info *pi, bool *link_up)
 		status = ice_update_link_info(pi);
 
 		if (status)
-			ice_debug(pi->hw, ICE_DBG_LINK,
-				  "get link status error, status = %d\n",
+			ice_debug(pi->hw, ICE_DBG_LINK, "get link status error, status = %d\n",
 				  status);
 	}
 
@@ -3879,8 +3852,7 @@ ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,
 		 * of the endianness of the machine.
 		 */
 		if (ce_info[f].width > (ce_info[f].size_of * BITS_PER_BYTE)) {
-			ice_debug(hw, ICE_DBG_QCTX,
-				  "Field %d width of %d bits larger than size of %d byte(s) ... skipping write\n",
+			ice_debug(hw, ICE_DBG_QCTX, "Field %d width of %d bits larger than size of %d byte(s) ... skipping write\n",
 				  f, ce_info[f].width, ce_info[f].size_of);
 			continue;
 		}
@@ -4692,8 +4664,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
 	status = ice_get_pfa_module_tlv(hw, &tlv, &tlv_len,
 					ICE_SR_LINK_DEFAULT_OVERRIDE_PTR);
 	if (status) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Failed to read link override TLV.\n");
+		ice_debug(hw, ICE_DBG_INIT, "Failed to read link override TLV.\n");
 		return status;
 	}
 
@@ -4704,8 +4675,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
 	/* link options first */
 	status = ice_read_sr_word(hw, tlv_start, &buf);
 	if (status) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Failed to read override link options.\n");
+		ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n");
 		return status;
 	}
 	ldo->options = buf & ICE_LINK_OVERRIDE_OPT_M;
@@ -4716,8 +4686,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
 	offset = tlv_start + ICE_SR_PFA_LINK_OVERRIDE_FEC_OFFSET;
 	status = ice_read_sr_word(hw, offset, &buf);
 	if (status) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Failed to read override phy config.\n");
+		ice_debug(hw, ICE_DBG_INIT, "Failed to read override phy config.\n");
 		return status;
 	}
 	ldo->fec_options = buf & ICE_LINK_OVERRIDE_FEC_OPT_M;
@@ -4727,8 +4696,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
 	for (i = 0; i < ICE_SR_PFA_LINK_OVERRIDE_PHY_WORDS; i++) {
 		status = ice_read_sr_word(hw, (offset + i), &buf);
 		if (status) {
-			ice_debug(hw, ICE_DBG_INIT,
-				  "Failed to read override link options.\n");
+			ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n");
 			return status;
 		}
 		/* shift 16 bits at a time to fill 64 bits */
@@ -4741,8 +4709,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
 	for (i = 0; i < ICE_SR_PFA_LINK_OVERRIDE_PHY_WORDS; i++) {
 		status = ice_read_sr_word(hw, (offset + i), &buf);
 		if (status) {
-			ice_debug(hw, ICE_DBG_INIT,
-				  "Failed to read override link options.\n");
+			ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n");
 			return status;
 		}
 		/* shift 16 bits at a time to fill 64 bits */
diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c
index f278ef636..111288184 100644
--- a/drivers/net/ice/base/ice_controlq.c
+++ b/drivers/net/ice/base/ice_controlq.c
@@ -697,8 +697,7 @@ enum ice_status ice_init_all_ctrlq(struct ice_hw *hw)
 		if (status != ICE_ERR_AQ_FW_CRITICAL)
 			break;
 
-		ice_debug(hw, ICE_DBG_AQ_MSG,
-			  "Retry Admin Queue init due to FW critical error\n");
+		ice_debug(hw, ICE_DBG_AQ_MSG, "Retry Admin Queue init due to FW critical error\n");
 		ice_shutdown_ctrlq(hw, ICE_CTL_Q_ADMIN);
 		ice_msec_delay(ICE_CTL_Q_ADMIN_INIT_MSEC, true);
 	} while (retry++ < ICE_CTL_Q_ADMIN_INIT_TIMEOUT);
@@ -793,8 +792,7 @@ static u16 ice_clean_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
 	details = ICE_CTL_Q_DETAILS(*sq, ntc);
 
 	while (rd32(hw, cq->sq.head) != ntc) {
-		ice_debug(hw, ICE_DBG_AQ_MSG,
-			  "ntc %d head %d.\n", ntc, rd32(hw, cq->sq.head));
+		ice_debug(hw, ICE_DBG_AQ_MSG, "ntc %d head %d.\n", ntc, rd32(hw, cq->sq.head));
 		ice_memset(desc, 0, sizeof(*desc), ICE_DMA_MEM);
 		ice_memset(details, 0, sizeof(*details), ICE_NONDMA_MEM);
 		ntc++;
@@ -832,8 +830,7 @@ static void ice_debug_cq(struct ice_hw *hw, void *desc, void *buf, u16 buf_len)
 	datalen = LE16_TO_CPU(cq_desc->datalen);
 	flags = LE16_TO_CPU(cq_desc->flags);
 
-	ice_debug(hw, ICE_DBG_AQ_DESC,
-		  "CQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
+	ice_debug(hw, ICE_DBG_AQ_DESC, "CQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
 		  LE16_TO_CPU(cq_desc->opcode), flags, datalen,
 		  LE16_TO_CPU(cq_desc->retval));
 	ice_debug(hw, ICE_DBG_AQ_DESC, "\tcookie (h,l) 0x%08X 0x%08X\n",
@@ -906,8 +903,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 	cq->sq_last_status = ICE_AQ_RC_OK;
 
 	if (!cq->sq.count) {
-		ice_debug(hw, ICE_DBG_AQ_MSG,
-			  "Control Send queue not initialized.\n");
+		ice_debug(hw, ICE_DBG_AQ_MSG, "Control Send queue not initialized.\n");
 		status = ICE_ERR_AQ_EMPTY;
 		goto sq_send_command_error;
 	}
@@ -919,8 +915,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 
 	if (buf) {
 		if (buf_size > cq->sq_buf_size) {
-			ice_debug(hw, ICE_DBG_AQ_MSG,
-				  "Invalid buffer size for Control Send queue: %d.\n",
+			ice_debug(hw, ICE_DBG_AQ_MSG, "Invalid buffer size for Control Send queue: %d.\n",
 				  buf_size);
 			status = ICE_ERR_INVAL_SIZE;
 			goto sq_send_command_error;
@@ -933,8 +928,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 
 	val = rd32(hw, cq->sq.head);
 	if (val >= cq->num_sq_entries) {
-		ice_debug(hw, ICE_DBG_AQ_MSG,
-			  "head overrun at %d in the Control Send Queue ring\n",
+		ice_debug(hw, ICE_DBG_AQ_MSG, "head overrun at %d in the Control Send Queue ring\n",
 			  val);
 		status = ICE_ERR_AQ_EMPTY;
 		goto sq_send_command_error;
@@ -952,8 +946,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 	 * called in a separate thread in case of asynchronous completions.
 	 */
 	if (ice_clean_sq(hw, cq) == 0) {
-		ice_debug(hw, ICE_DBG_AQ_MSG,
-			  "Error: Control Send Queue is full.\n");
+		ice_debug(hw, ICE_DBG_AQ_MSG, "Error: Control Send Queue is full.\n");
 		status = ICE_ERR_AQ_FULL;
 		goto sq_send_command_error;
 	}
@@ -982,8 +975,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 	}
 
 	/* Debug desc and buffer */
-	ice_debug(hw, ICE_DBG_AQ_DESC,
-		  "ATQ: Control Send queue desc and buffer:\n");
+	ice_debug(hw, ICE_DBG_AQ_DESC, "ATQ: Control Send queue desc and buffer:\n");
 
 	ice_debug_cq(hw, (void *)desc_on_ring, buf, buf_size);
 
@@ -1009,8 +1001,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 			u16 copy_size = LE16_TO_CPU(desc->datalen);
 
 			if (copy_size > buf_size) {
-				ice_debug(hw, ICE_DBG_AQ_MSG,
-					  "Return len %d > than buf len %d\n",
+				ice_debug(hw, ICE_DBG_AQ_MSG, "Return len %d > than buf len %d\n",
 					  copy_size, buf_size);
 				status = ICE_ERR_AQ_ERROR;
 			} else {
@@ -1020,8 +1011,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 		}
 		retval = LE16_TO_CPU(desc->retval);
 		if (retval) {
-			ice_debug(hw, ICE_DBG_AQ_MSG,
-				  "Control Send Queue command 0x%04X completed with error 0x%X\n",
+			ice_debug(hw, ICE_DBG_AQ_MSG, "Control Send Queue command 0x%04X completed with error 0x%X\n",
 				  LE16_TO_CPU(desc->opcode),
 				  retval);
 
@@ -1034,8 +1024,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 		cq->sq_last_status = (enum ice_aq_err)retval;
 	}
 
-	ice_debug(hw, ICE_DBG_AQ_MSG,
-		  "ATQ: desc and buffer writeback:\n");
+	ice_debug(hw, ICE_DBG_AQ_MSG, "ATQ: desc and buffer writeback:\n");
 
 	ice_debug_cq(hw, (void *)desc, buf, buf_size);
 
@@ -1051,8 +1040,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 			ice_debug(hw, ICE_DBG_AQ_MSG, "Critical FW error.\n");
 			status = ICE_ERR_AQ_FW_CRITICAL;
 		} else {
-			ice_debug(hw, ICE_DBG_AQ_MSG,
-				  "Control Send Queue Writeback timeout.\n");
+			ice_debug(hw, ICE_DBG_AQ_MSG, "Control Send Queue Writeback timeout.\n");
 			status = ICE_ERR_AQ_TIMEOUT;
 		}
 	}
@@ -1137,8 +1125,7 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 	ice_acquire_lock(&cq->rq_lock);
 
 	if (!cq->rq.count) {
-		ice_debug(hw, ICE_DBG_AQ_MSG,
-			  "Control Receive queue not initialized.\n");
+		ice_debug(hw, ICE_DBG_AQ_MSG, "Control Receive queue not initialized.\n");
 		ret_code = ICE_ERR_AQ_EMPTY;
 		goto clean_rq_elem_err;
 	}
@@ -1160,8 +1147,7 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 	flags = LE16_TO_CPU(desc->flags);
 	if (flags & ICE_AQ_FLAG_ERR) {
 		ret_code = ICE_ERR_AQ_ERROR;
-		ice_debug(hw, ICE_DBG_AQ_MSG,
-			  "Control Receive Queue Event 0x%04X received with error 0x%X\n",
+		ice_debug(hw, ICE_DBG_AQ_MSG, "Control Receive Queue Event 0x%04X received with error 0x%X\n",
 			  LE16_TO_CPU(desc->opcode),
 			  cq->rq_last_status);
 	}
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index d4b2e4f29..923d99448 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -712,8 +712,7 @@ ice_acquire_global_cfg_lock(struct ice_hw *hw,
 				 ICE_GLOBAL_CFG_LOCK_TIMEOUT);
 
 	if (status == ICE_ERR_AQ_NO_WORK)
-		ice_debug(hw, ICE_DBG_PKG,
-			  "Global config lock: No work to do\n");
+		ice_debug(hw, ICE_DBG_PKG, "Global config lock: No work to do\n");
 
 	return status;
 }
@@ -920,8 +919,7 @@ ice_update_pkg(struct ice_hw *hw, struct ice_buf *bufs, u32 count)
 					   last, &offset, &info, NULL);
 
 		if (status) {
-			ice_debug(hw, ICE_DBG_PKG,
-				  "Update pkg failed: err %d off %d inf %d\n",
+			ice_debug(hw, ICE_DBG_PKG, "Update pkg failed: err %d off %d inf %d\n",
 				  status, offset, info);
 			break;
 		}
@@ -999,8 +997,7 @@ ice_dwnld_cfg_bufs(struct ice_hw *hw, struct ice_buf *bufs, u32 count)
 		/* Save AQ status from download package */
 		hw->pkg_dwnld_status = hw->adminq.sq_last_status;
 		if (status) {
-			ice_debug(hw, ICE_DBG_PKG,
-				  "Pkg download failed: err %d off %d inf %d\n",
+			ice_debug(hw, ICE_DBG_PKG, "Pkg download failed: err %d off %d inf %d\n",
 				  status, offset, info);
 			break;
 		}
@@ -1097,8 +1094,7 @@ ice_init_pkg_info(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)
 			  meta_seg->pkg_ver.update, meta_seg->pkg_ver.draft,
 			  meta_seg->pkg_name);
 	} else {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Did not find metadata segment in driver package\n");
+		ice_debug(hw, ICE_DBG_INIT, "Did not find metadata segment in driver package\n");
 		return ICE_ERR_CFG;
 	}
 
@@ -1115,8 +1111,7 @@ ice_init_pkg_info(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)
 			  seg_hdr->seg_format_ver.draft,
 			  seg_hdr->seg_id);
 	} else {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Did not find ice segment in driver package\n");
+		ice_debug(hw, ICE_DBG_INIT, "Did not find ice segment in driver package\n");
 		return ICE_ERR_CFG;
 	}
 
@@ -1339,8 +1334,7 @@ ice_chk_pkg_compat(struct ice_hw *hw, struct ice_pkg_hdr *ospkg,
 		    (*seg)->hdr.seg_format_ver.minor >
 			pkg->pkg_info[i].ver.minor) {
 			status = ICE_ERR_FW_DDP_MISMATCH;
-			ice_debug(hw, ICE_DBG_INIT,
-				  "OS package is not compatible with NVM.\n");
+			ice_debug(hw, ICE_DBG_INIT, "OS package is not compatible with NVM.\n");
 		}
 		/* done processing NVM package so break */
 		break;
@@ -1408,8 +1402,7 @@ enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
 	ice_init_pkg_hints(hw, seg);
 	status = ice_download_pkg(hw, seg);
 	if (status == ICE_ERR_AQ_NO_WORK) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "package previously loaded - no work.\n");
+		ice_debug(hw, ICE_DBG_INIT, "package previously loaded - no work.\n");
 		status = ICE_SUCCESS;
 	}
 
@@ -4059,8 +4052,7 @@ ice_has_prof_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl)
 		if (ent->profile_cookie == hdl)
 			return true;
 
-	ice_debug(hw, ICE_DBG_INIT,
-		  "Characteristic list for VSI group %d not found.\n",
+	ice_debug(hw, ICE_DBG_INIT, "Characteristic list for VSI group %d not found.\n",
 		  vsig);
 	return false;
 }
@@ -5372,8 +5364,7 @@ ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,
 			if (attr_used_cnt < ICE_MAX_PTG_ATTRS)
 				attr_used[attr_used_cnt++] = &t->tcam[i];
 			else
-				ice_debug(hw, ICE_DBG_INIT,
-					  "Warn: ICE_MAX_PTG_ATTRS exceeded\n");
+				ice_debug(hw, ICE_DBG_INIT, "Warn: ICE_MAX_PTG_ATTRS exceeded\n");
 		}
 	}
 
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index cd56f46f4..0afd7cbc3 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1856,8 +1856,7 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,
 
 	status = ice_flow_proc_segs(hw, params);
 	if (status) {
-		ice_debug(hw, ICE_DBG_FLOW,
-			  "Error processing a flow's packet segments\n");
+		ice_debug(hw, ICE_DBG_FLOW, "Error processing a flow's packet segments\n");
 		goto out;
 	}
 
@@ -2106,8 +2105,7 @@ ice_flow_assoc_prof(struct ice_hw *hw, enum ice_block blk,
 		if (!status)
 			ice_set_bit(vsi_handle, prof->vsis);
 		else
-			ice_debug(hw, ICE_DBG_FLOW,
-				  "HW profile add failed, %d\n",
+			ice_debug(hw, ICE_DBG_FLOW, "HW profile add failed, %d\n",
 				  status);
 	}
 
@@ -2138,8 +2136,7 @@ ice_flow_disassoc_prof(struct ice_hw *hw, enum ice_block blk,
 		if (!status)
 			ice_clear_bit(vsi_handle, prof->vsis);
 		else
-			ice_debug(hw, ICE_DBG_FLOW,
-				  "HW profile remove failed, %d\n",
+			ice_debug(hw, ICE_DBG_FLOW, "HW profile remove failed, %d\n",
 				  status);
 	}
 
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 22d7d9439..b4fb28bfb 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -78,8 +78,7 @@ ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,
 
 	/* Verify the length of the read if this is for the Shadow RAM */
 	if (read_shadow_ram && ((offset + inlen) > (hw->nvm.sr_words * 2u))) {
-		ice_debug(hw, ICE_DBG_NVM,
-			  "NVM error: requested data is beyond Shadow RAM limit\n");
+		ice_debug(hw, ICE_DBG_NVM, "NVM error: requested data is beyond Shadow RAM limit\n");
 		return ICE_ERR_PARAM;
 	}
 
@@ -340,16 +339,14 @@ ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size)
 	 */
 	pba_size--;
 	if (pba_num_size < (((u32)pba_size * 2) + 1)) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Buffer too small for PBA data.\n");
+		ice_debug(hw, ICE_DBG_INIT, "Buffer too small for PBA data.\n");
 		return ICE_ERR_PARAM;
 	}
 
 	for (i = 0; i < pba_size; i++) {
 		status = ice_read_sr_word(hw, (pba_tlv + 2 + 1) + i, &pba_word);
 		if (status != ICE_SUCCESS) {
-			ice_debug(hw, ICE_DBG_INIT,
-				  "Failed to read PBA Block word %d.\n", i);
+			ice_debug(hw, ICE_DBG_INIT, "Failed to read PBA Block word %d.\n", i);
 			return status;
 		}
 
@@ -378,8 +375,7 @@ static enum ice_status ice_get_orom_ver_info(struct ice_hw *hw)
 	status = ice_get_pfa_module_tlv(hw, &boot_cfg_tlv, &boot_cfg_tlv_len,
 					ICE_SR_BOOT_CFG_PTR);
 	if (status) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Failed to read Boot Configuration Block TLV.\n");
+		ice_debug(hw, ICE_DBG_INIT, "Failed to read Boot Configuration Block TLV.\n");
 		return status;
 	}
 
@@ -387,8 +383,7 @@ static enum ice_status ice_get_orom_ver_info(struct ice_hw *hw)
 	 * (Combo Image Version High and Combo Image Version Low)
 	 */
 	if (boot_cfg_tlv_len < 2) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Invalid Boot Configuration Block TLV size.\n");
+		ice_debug(hw, ICE_DBG_INIT, "Invalid Boot Configuration Block TLV size.\n");
 		return ICE_ERR_INVAL_SIZE;
 	}
 
@@ -444,14 +439,12 @@ static enum ice_status ice_discover_flash_size(struct ice_hw *hw)
 		status = ice_read_flat_nvm(hw, offset, &len, &data, false);
 		if (status == ICE_ERR_AQ_ERROR &&
 		    hw->adminq.sq_last_status == ICE_AQ_RC_EINVAL) {
-			ice_debug(hw, ICE_DBG_NVM,
-				  "%s: New upper bound of %u bytes\n",
+			ice_debug(hw, ICE_DBG_NVM, "%s: New upper bound of %u bytes\n",
 				  __func__, offset);
 			status = ICE_SUCCESS;
 			max_size = offset;
 		} else if (!status) {
-			ice_debug(hw, ICE_DBG_NVM,
-				  "%s: New lower bound of %u bytes\n",
+			ice_debug(hw, ICE_DBG_NVM, "%s: New lower bound of %u bytes\n",
 				  __func__, offset);
 			min_size = offset;
 		} else {
@@ -460,8 +453,7 @@ static enum ice_status ice_discover_flash_size(struct ice_hw *hw)
 		}
 	}
 
-	ice_debug(hw, ICE_DBG_NVM,
-		  "Predicted flash size is %u bytes\n", max_size);
+	ice_debug(hw, ICE_DBG_NVM, "Predicted flash size is %u bytes\n", max_size);
 
 	hw->nvm.flash_size = max_size;
 
@@ -504,8 +496,7 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)
 	} else {
 		/* Blank programming mode */
 		nvm->blank_nvm_mode = true;
-		ice_debug(hw, ICE_DBG_NVM,
-			  "NVM init error: unsupported blank mode.\n");
+		ice_debug(hw, ICE_DBG_NVM, "NVM init error: unsupported blank mode.\n");
 		return ICE_ERR_NVM_BLANK_MODE;
 	}
 
@@ -805,8 +796,7 @@ ice_nvm_access_write(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
 		break;
 	}
 
-	ice_debug(hw, ICE_DBG_NVM,
-		  "NVM access: writing register %08x with value %08x\n",
+	ice_debug(hw, ICE_DBG_NVM, "NVM access: writing register %08x with value %08x\n",
 		  cmd->offset, data->regval);
 
 	/* Write the data field to the specified register */
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index f5f3b85d6..fab538f78 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -165,8 +165,7 @@ ice_sched_add_node(struct ice_port_info *pi, u8 layer,
 	parent = ice_sched_find_node_by_teid(pi->root,
 					     LE32_TO_CPU(info->parent_teid));
 	if (!parent) {
-		ice_debug(hw, ICE_DBG_SCHED,
-			  "Parent Node not found for parent_teid=0x%x\n",
+		ice_debug(hw, ICE_DBG_SCHED, "Parent Node not found for parent_teid=0x%x\n",
 			  LE32_TO_CPU(info->parent_teid));
 		return ICE_ERR_PARAM;
 	}
@@ -742,8 +741,7 @@ static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
 			rl_prof_elem->prof_id_ref = 0;
 			status = ice_sched_del_rl_profile(hw, rl_prof_elem);
 			if (status) {
-				ice_debug(hw, ICE_DBG_SCHED,
-					  "Remove rl profile failed\n");
+				ice_debug(hw, ICE_DBG_SCHED, "Remove rl profile failed\n");
 				/* On error, free mem required */
 				LIST_DEL(&rl_prof_elem->list_entry);
 				ice_free(hw, rl_prof_elem);
@@ -930,8 +928,7 @@ ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
 	for (i = 0; i < num_nodes; i++) {
 		status = ice_sched_add_node(pi, layer, &buf->generic[i]);
 		if (status != ICE_SUCCESS) {
-			ice_debug(hw, ICE_DBG_SCHED,
-				  "add nodes in SW DB failed status =%d\n",
+			ice_debug(hw, ICE_DBG_SCHED, "add nodes in SW DB failed status =%d\n",
 				  status);
 			break;
 		}
@@ -939,8 +936,7 @@ ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
 		teid = LE32_TO_CPU(buf->generic[i].node_teid);
 		new_node = ice_sched_find_node_by_teid(parent, teid);
 		if (!new_node) {
-			ice_debug(hw, ICE_DBG_SCHED,
-				  "Node is missing for teid =%d\n", teid);
+			ice_debug(hw, ICE_DBG_SCHED, "Node is missing for teid =%d\n", teid);
 			break;
 		}
 
@@ -1297,8 +1293,7 @@ struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid)
 	ice_release_lock(&pi->sched_lock);
 
 	if (!node)
-		ice_debug(pi->hw, ICE_DBG_SCHED,
-			  "Node not found for teid=0x%x\n", teid);
+		ice_debug(pi->hw, ICE_DBG_SCHED, "Node not found for teid=0x%x\n", teid);
 
 	return node;
 }
@@ -2048,8 +2043,7 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
 			continue;
 
 		if (ice_sched_is_leaf_node_present(vsi_node)) {
-			ice_debug(pi->hw, ICE_DBG_SCHED,
-				  "VSI has leaf nodes in TC %d\n", i);
+			ice_debug(pi->hw, ICE_DBG_SCHED, "VSI has leaf nodes in TC %d\n", i);
 			status = ICE_ERR_IN_USE;
 			goto exit_sched_rm_vsi_cfg;
 		}
@@ -2891,8 +2885,7 @@ static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
 					 &pi->rl_prof_list[ln],
 					 ice_aqc_rl_profile_info, list_entry) {
 			if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
-				ice_debug(pi->hw, ICE_DBG_SCHED,
-					  "Removed rl profile\n");
+				ice_debug(hw, ICE_DBG_SCHED, "Removed rl profile\n");
 		}
 	}
 }
@@ -4143,8 +4136,7 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
 			/* Remove old profile ID from database */
 			status = ice_sched_del_rl_profile(pi->hw, rl_prof_elem);
 			if (status && status != ICE_ERR_IN_USE)
-				ice_debug(pi->hw, ICE_DBG_SCHED,
-					  "Remove rl profile failed\n");
+				ice_debug(pi->hw, ICE_DBG_SCHED, "Remove rl profile failed\n");
 			break;
 		}
 	if (status == ICE_ERR_IN_USE)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 69fa64ac9..a82af6fa0 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1823,8 +1823,7 @@ enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
 	status = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,
 				       ice_aqc_opc_free_res, NULL);
 	if (status) {
-		ice_debug(hw, ICE_DBG_SW,
-			  "VEB counter resource could not be freed\n");
+		ice_debug(hw, ICE_DBG_SW, "VEB counter resource could not be freed\n");
 		ret_status = status;
 	}
 
@@ -2218,8 +2217,7 @@ ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,
 			return ICE_ERR_PARAM;
 		break;
 	default:
-		ice_debug(hw, ICE_DBG_SW,
-			  "Error due to unsupported rule_type %u\n", rule_type);
+		ice_debug(hw, ICE_DBG_SW, "Error due to unsupported rule_type %u\n", rule_type);
 		return ICE_ERR_OUT_OF_RANGE;
 	}
 
@@ -2241,8 +2239,7 @@ ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,
 			 * than ICE_MAX_VSI, if not return with error.
 			 */
 			if (id >= ICE_MAX_VSI) {
-				ice_debug(hw, ICE_DBG_SW,
-					  "Error VSI index (%u) out-of-range\n",
+				ice_debug(hw, ICE_DBG_SW, "Error VSI index (%u) out-of-range\n",
 					  id);
 				ice_free(hw, mr_list);
 				return ICE_ERR_OUT_OF_RANGE;
@@ -2649,8 +2646,7 @@ ice_init_port_info(struct ice_port_info *pi, u16 vsi_port_num, u8 type,
 		pi->dflt_rx_vsi_num = ICE_DFLT_VSI_INVAL;
 		break;
 	default:
-		ice_debug(pi->hw, ICE_DBG_SW,
-			  "incorrect VSI/port type received\n");
+		ice_debug(pi->hw, ICE_DBG_SW, "incorrect VSI/port type received\n");
 		break;
 	}
 }
@@ -2714,8 +2710,7 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)
 			case ICE_AQC_GET_SW_CONF_RESP_PHYS_PORT:
 			case ICE_AQC_GET_SW_CONF_RESP_VIRT_PORT:
 				if (j == num_total_ports) {
-					ice_debug(hw, ICE_DBG_SW,
-						  "more ports than expected\n");
+					ice_debug(hw, ICE_DBG_SW, "more ports than expected\n");
 					status = ICE_ERR_CFG;
 					goto out;
 				}
@@ -3709,8 +3704,7 @@ ice_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
 		tmp_fltr_info.vsi_handle = rem_vsi_handle;
 		status = ice_update_pkt_fwd_rule(hw, &tmp_fltr_info);
 		if (status) {
-			ice_debug(hw, ICE_DBG_SW,
-				  "Failed to update pkt fwd rule to FWD_TO_VSI on HW VSI %d, error %d\n",
+			ice_debug(hw, ICE_DBG_SW, "Failed to update pkt fwd rule to FWD_TO_VSI on HW VSI %d, error %d\n",
 				  tmp_fltr_info.fwd_id.hw_vsi_id, status);
 			return status;
 		}
@@ -3726,8 +3720,7 @@ ice_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
 		/* Remove the VSI list since it is no longer used */
 		status = ice_remove_vsi_list_rule(hw, vsi_list_id, lkup_type);
 		if (status) {
-			ice_debug(hw, ICE_DBG_SW,
-				  "Failed to remove VSI list %d, error %d\n",
+			ice_debug(hw, ICE_DBG_SW, "Failed to remove VSI list %d, error %d\n",
 				  vsi_list_id, status);
 			return status;
 		}
@@ -4188,8 +4181,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_sw_recipe *recp_list,
 		 */
 		if (v_list_itr->vsi_count > 1 &&
 		    v_list_itr->vsi_list_info->ref_cnt > 1) {
-			ice_debug(hw, ICE_DBG_SW,
-				  "Invalid configuration: Optimization to reuse VSI list with more than one VSI is not being done yet\n");
+			ice_debug(hw, ICE_DBG_SW, "Invalid configuration: Optimization to reuse VSI list with more than one VSI is not being done yet\n");
 			status = ICE_ERR_CFG;
 			goto exit;
 		}
@@ -5403,8 +5395,7 @@ ice_remove_vsi_lkup_fltr(struct ice_hw *hw, u16 vsi_handle,
 		ice_remove_eth_mac(hw, &remove_list_head);
 		break;
 	case ICE_SW_LKUP_DFLT:
-		ice_debug(hw, ICE_DBG_SW,
-			  "Remove filters for this lookup type hasn't been implemented yet\n");
+		ice_debug(hw, ICE_DBG_SW, "Remove filters for this lookup type hasn't been implemented yet\n");
 		break;
 	case ICE_SW_LKUP_LAST:
 		ice_debug(hw, ICE_DBG_SW, "Unsupported lookup type\n");
@@ -5526,8 +5517,7 @@ ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
 	status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,
 				       ice_aqc_opc_free_res, NULL);
 	if (status)
-		ice_debug(hw, ICE_DBG_SW,
-			  "counter resource could not be freed\n");
+		ice_debug(hw, ICE_DBG_SW, "counter resource could not be freed\n");
 
 	ice_free(hw, buf);
 	return status;
@@ -6306,8 +6296,7 @@ ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm,
 			 * that can be used.
 			 */
 			if (chain_idx >= ICE_MAX_FV_WORDS) {
-				ice_debug(hw, ICE_DBG_SW,
-					  "No chain index available\n");
+				ice_debug(hw, ICE_DBG_SW, "No chain index available\n");
 				status = ICE_ERR_MAX_LIMIT;
 				goto err_unroll;
 			}
@@ -7948,8 +7937,7 @@ ice_adv_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
 		 */
 		status = ice_update_pkt_fwd_rule(hw, &tmp_fltr);
 		if (status) {
-			ice_debug(hw, ICE_DBG_SW,
-				  "Failed to update pkt fwd rule to FWD_TO_VSI on HW VSI %d, error %d\n",
+			ice_debug(hw, ICE_DBG_SW, "Failed to update pkt fwd rule to FWD_TO_VSI on HW VSI %d, error %d\n",
 				  tmp_fltr.fwd_id.hw_vsi_id, status);
 			return status;
 		}
@@ -7958,8 +7946,7 @@ ice_adv_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
 		/* Remove the VSI list since it is no longer used */
 		status = ice_remove_vsi_list_rule(hw, vsi_list_id, lkup_type);
 		if (status) {
-			ice_debug(hw, ICE_DBG_SW,
-				  "Failed to remove VSI list %d, error %d\n",
+			ice_debug(hw, ICE_DBG_SW, "Failed to remove VSI list %d, error %d\n",
 				  vsi_list_id, status);
 			return status;
 		}
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 18/40] net/ice/base: introduce Tx rate limiting on port level
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (16 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 17/40] net/ice/base: join format strings to same line Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 19/40] net/ice/base: reduce profile to recip info get from firmware Qi Zhang
                   ` (23 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Shibin Koikkara Reeny

The PSM Configuration has a Rate Limiter for each associated
switch port based on its relative speed from the total BW of
switch ports connected to LAN controller. The rate limiters
will be dynamic get readjusted if switch port speeds are
changed at the root node layer of the scheduler tree. Adding
a function to directly modify the EIR of root node.

Signed-off-by: Shibin Koikkara Reeny <shibin.koikkara.reeny@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c |  5 +++++
 drivers/net/ice/base/ice_common.h |  1 +
 drivers/net/ice/base/ice_sched.c  | 20 ++++++++++++++++++++
 drivers/net/ice/base/ice_type.h   |  1 +
 4 files changed, 27 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 3d2489113..46754a333 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -4382,6 +4382,7 @@ static bool ice_is_main_vsi(struct ice_hw *hw, u16 vsi_handle)
 static enum ice_status
 ice_replay_pre_init(struct ice_hw *hw, struct ice_switch_info *sw)
 {
+	enum ice_status status;
 	u8 i;
 
 	/* Delete old entries from replay filter list head if there is any */
@@ -4395,6 +4396,10 @@ ice_replay_pre_init(struct ice_hw *hw, struct ice_switch_info *sw)
 				  &sw->recp_list[i].filt_replay_rules);
 	ice_sched_replay_agg_vsi_preinit(hw);
 
+	status = ice_sched_replay_root_node_bw(hw->port_info);
+	if (status)
+		return status;
+
 	return ice_sched_replay_tc_node_bw(hw->port_info);
 }
 
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index d176f7495..393e2d3f6 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -202,6 +202,7 @@ void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw);
 void ice_sched_replay_agg(struct ice_hw *hw);
 enum ice_status ice_sched_replay_tc_node_bw(struct ice_port_info *pi);
 enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle);
+enum ice_status ice_sched_replay_root_node_bw(struct ice_port_info *pi);
 enum ice_status
 ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx);
 struct ice_q_ctx *
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index fab538f78..cbe0e4b5b 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -5382,6 +5382,26 @@ void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
 }
 
 /**
+ * ice_sched_replay_root_node_bw - replay root node BW
+ * @pi: port information structure
+ *
+ * Replay root node BW settings.
+ */
+enum ice_status ice_sched_replay_root_node_bw(struct ice_port_info *pi)
+{
+	enum ice_status status = ICE_SUCCESS;
+
+	if (!pi->hw)
+		return ICE_ERR_PARAM;
+	ice_acquire_lock(&pi->sched_lock);
+
+	status = ice_sched_replay_node_bw(pi->hw, pi->root,
+					  &pi->root_node_bw_t_info);
+	ice_release_lock(&pi->sched_lock);
+	return status;
+}
+
+/**
  * ice_sched_replay_tc_node_bw - replay TC node(s) BW
  * @pi: port information structure
  *
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index c558a1cb0..997f97e0d 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -776,6 +776,7 @@ struct ice_port_info {
 		sib_head[ICE_MAX_TRAFFIC_CLASS][ICE_AQC_TOPO_MAX_LEVEL_NUM];
 	/* List contain profile ID(s) and other params per layer */
 	struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];
+	struct ice_bw_type_info root_node_bw_t_info;
 	struct ice_bw_type_info tc_node_bw_t_info[ICE_MAX_TRAFFIC_CLASS];
 	struct ice_dcbx_cfg local_dcbx_cfg;	/* Oper/Local Cfg */
 	/* DCBX info */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 19/40] net/ice/base: reduce profile to recip info get from firmware
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (17 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 18/40] net/ice/base: introduce Tx rate limiting on port level Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 20/40] net/ice/base: refactor DCB related variables Qi Zhang
                   ` (22 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Wei Zhao

Only need to get profile_to_recip info from firmware for
profiles used by switch, no need for other free profile
in order that we can reduce the time consumed when
download a switch rule.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flex_pipe.c | 115 +++++++++++++++++++++++++----------
 drivers/net/ice/base/ice_switch.c    |   2 +-
 drivers/net/ice/base/ice_type.h      |   1 +
 3 files changed, 85 insertions(+), 33 deletions(-)

diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 923d99448..8d918eff7 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1345,6 +1345,88 @@ ice_chk_pkg_compat(struct ice_hw *hw, struct ice_pkg_hdr *ospkg,
 }
 
 /**
+ * ice_sw_fv_handler
+ * @sect_type: section type
+ * @section: pointer to section
+ * @index: index of the field vector entry to be returned
+ * @offset: ptr to variable that receives the offset in the field vector table
+ *
+ * This is a callback function that can be passed to ice_pkg_enum_entry.
+ * This function treats the given section as of type ice_sw_fv_section and
+ * enumerates offset field. "offset" is an index into the field vector table.
+ */
+static void *
+ice_sw_fv_handler(u32 sect_type, void *section, u32 index, u32 *offset)
+{
+	struct ice_sw_fv_section *fv_section =
+		(struct ice_sw_fv_section *)section;
+
+	if (!section || sect_type != ICE_SID_FLD_VEC_SW)
+		return NULL;
+	if (index >= LE16_TO_CPU(fv_section->count))
+		return NULL;
+	if (offset)
+		/* "index" passed in to this function is relative to a given
+		 * 4k block. To get to the true index into the field vector
+		 * table need to add the relative index to the base_offset
+		 * field of this section
+		 */
+		*offset = LE16_TO_CPU(fv_section->base_offset) + index;
+	return fv_section->fv + index;
+}
+
+/**
+ * ice_get_prof_index_max - get the max profile index for used profile
+ * @hw: pointer to the HW struct
+ *
+ * Calling this function will get the max profile index for used profile
+ * and store the index number in struct ice_switch_info *switch_info
+ * in hw for following use.
+ */
+static int ice_get_prof_index_max(struct ice_hw *hw)
+{
+	u16 prof_index = 0, j, max_prof_index = 0;
+	struct ice_pkg_enum state;
+	struct ice_seg *ice_seg;
+	bool flag = false;
+	struct ice_fv *fv;
+	u32 offset;
+
+	ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM);
+
+	if (!hw->seg)
+		return ICE_ERR_PARAM;
+
+	ice_seg = hw->seg;
+
+	do {
+		fv = (struct ice_fv *)
+			ice_pkg_enum_entry(ice_seg, &state, ICE_SID_FLD_VEC_SW,
+					   &offset, ice_sw_fv_handler);
+		if (!fv)
+			break;
+		ice_seg = NULL;
+
+		/* in the profile that not be used, the prot_id is set to 0xff
+		 * and the off is set to 0x1ff for all the field vectors.
+		 */
+		for (j = 0; j < hw->blk[ICE_BLK_SW].es.fvw; j++)
+			if (fv->ew[j].prot_id != ICE_PROT_INVALID ||
+			    fv->ew[j].off != ICE_FV_OFFSET_INVAL)
+				flag = true;
+		if (flag && prof_index > max_prof_index)
+			max_prof_index = prof_index;
+
+		prof_index++;
+		flag = false;
+	} while (fv);
+
+	hw->switch_info->max_used_prof_index = max_prof_index;
+
+	return ICE_SUCCESS;
+}
+
+/**
  * ice_init_pkg - initialize/download package
  * @hw: pointer to the hardware structure
  * @buf: pointer to the package buffer
@@ -1423,6 +1505,7 @@ enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
 		 */
 		ice_init_pkg_regs(hw);
 		ice_fill_blk_tbls(hw);
+		ice_get_prof_index_max(hw);
 	} else {
 		ice_debug(hw, ICE_DBG_INIT, "package load failed, %d\n",
 			  status);
@@ -1500,38 +1583,6 @@ static struct ice_buf_build *ice_pkg_buf_alloc(struct ice_hw *hw)
 }
 
 /**
- * ice_sw_fv_handler
- * @sect_type: section type
- * @section: pointer to section
- * @index: index of the field vector entry to be returned
- * @offset: ptr to variable that receives the offset in the field vector table
- *
- * This is a callback function that can be passed to ice_pkg_enum_entry.
- * This function treats the given section as of type ice_sw_fv_section and
- * enumerates offset field. "offset" is an index into the field vector
- * vector table.
- */
-static void *
-ice_sw_fv_handler(u32 sect_type, void *section, u32 index, u32 *offset)
-{
-	struct ice_sw_fv_section *fv_section =
-		(struct ice_sw_fv_section *)section;
-
-	if (!section || sect_type != ICE_SID_FLD_VEC_SW)
-		return NULL;
-	if (index >= LE16_TO_CPU(fv_section->count))
-		return NULL;
-	if (offset)
-		/* "index" passed in to this function is relative to a given
-		 * 4k block. To get to the true index into the field vector
-		 * table need to add the relative index to the base_offset
-		 * field of this section
-		 */
-		*offset = LE16_TO_CPU(fv_section->base_offset) + index;
-	return fv_section->fv + index;
-}
-
-/**
  * ice_get_sw_prof_type - determine switch profile type
  * @hw: pointer to the HW structure
  * @fv: pointer to the switch field vector
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index a82af6fa0..4d193b30f 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1591,7 +1591,7 @@ static void ice_get_recp_to_prof_map(struct ice_hw *hw)
 	ice_declare_bitmap(r_bitmap, ICE_MAX_NUM_RECIPES);
 	u16 i;
 
-	for (i = 0; i < ICE_MAX_NUM_PROFILES; i++) {
+	for (i = 0; i < hw->switch_info->max_used_prof_index + 1; i++) {
 		u16 j;
 
 		ice_zero_bitmap(profile_to_recipe[i], ICE_MAX_NUM_RECIPES);
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 997f97e0d..266f5500a 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -792,6 +792,7 @@ struct ice_switch_info {
 	struct LIST_HEAD_TYPE vsi_list_map_head;
 	struct ice_sw_recipe *recp_list;
 	u16 prof_res_bm_init;
+	u16 max_used_prof_index;
 
 	ice_declare_bitmap(prof_res_bm[ICE_MAX_NUM_PROFILES], ICE_MAX_FV_WORDS);
 };
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 20/40] net/ice/base: refactor DCB related variables
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (18 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 19/40] net/ice/base: reduce profile to recip info get from firmware Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 21/40] net/ice/base: support outer IP filter for GTPC Qi Zhang
                   ` (21 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Chinh T Cao

In this patch, the DCB related variables will be refactored out of the
ice_port_info_struct. The goal is to make the ice_port_info struct
cleaner.

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_dcb.c  | 40 ++++++++++++++++++++--------------------
 drivers/net/ice/base/ice_type.h | 16 +++++++++-------
 2 files changed, 29 insertions(+), 27 deletions(-)

diff --git a/drivers/net/ice/base/ice_dcb.c b/drivers/net/ice/base/ice_dcb.c
index 01cee227e..f5f375a7a 100644
--- a/drivers/net/ice/base/ice_dcb.c
+++ b/drivers/net/ice/base/ice_dcb.c
@@ -850,9 +850,9 @@ ice_get_ieee_or_cee_dcb_cfg(struct ice_port_info *pi, u8 dcbx_mode)
 		return ICE_ERR_PARAM;
 
 	if (dcbx_mode == ICE_DCBX_MODE_IEEE)
-		dcbx_cfg = &pi->local_dcbx_cfg;
+		dcbx_cfg = &pi->qos_cfg.local_dcbx_cfg;
 	else if (dcbx_mode == ICE_DCBX_MODE_CEE)
-		dcbx_cfg = &pi->desired_dcbx_cfg;
+		dcbx_cfg = &pi->qos_cfg.desired_dcbx_cfg;
 
 	/* Get Local DCB Config in case of ICE_DCBX_MODE_IEEE
 	 * or get CEE DCB Desired Config in case of ICE_DCBX_MODE_CEE
@@ -863,7 +863,7 @@ ice_get_ieee_or_cee_dcb_cfg(struct ice_port_info *pi, u8 dcbx_mode)
 		goto out;
 
 	/* Get Remote DCB Config */
-	dcbx_cfg = &pi->remote_dcbx_cfg;
+	dcbx_cfg = &pi->qos_cfg.remote_dcbx_cfg;
 	ret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_REMOTE,
 				 ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID, dcbx_cfg);
 	/* Don't treat ENOENT as an error for Remote MIBs */
@@ -892,14 +892,14 @@ enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi)
 	ret = ice_aq_get_cee_dcb_cfg(pi->hw, &cee_cfg, NULL);
 	if (ret == ICE_SUCCESS) {
 		/* CEE mode */
-		dcbx_cfg = &pi->local_dcbx_cfg;
+		dcbx_cfg = &pi->qos_cfg.local_dcbx_cfg;
 		dcbx_cfg->dcbx_mode = ICE_DCBX_MODE_CEE;
 		dcbx_cfg->tlv_status = LE32_TO_CPU(cee_cfg.tlv_status);
 		ice_cee_to_dcb_cfg(&cee_cfg, dcbx_cfg);
 		ret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_CEE);
 	} else if (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT) {
 		/* CEE mode not enabled try querying IEEE data */
-		dcbx_cfg = &pi->local_dcbx_cfg;
+		dcbx_cfg = &pi->qos_cfg.local_dcbx_cfg;
 		dcbx_cfg->dcbx_mode = ICE_DCBX_MODE_IEEE;
 		ret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_IEEE);
 	}
@@ -916,26 +916,26 @@ enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi)
  */
 enum ice_status ice_init_dcb(struct ice_hw *hw, bool enable_mib_change)
 {
-	struct ice_port_info *pi = hw->port_info;
+	struct ice_qos_cfg *qos_cfg = &hw->port_info->qos_cfg;
 	enum ice_status ret = ICE_SUCCESS;
 
 	if (!hw->func_caps.common_cap.dcb)
 		return ICE_ERR_NOT_SUPPORTED;
 
-	pi->is_sw_lldp = true;
+	qos_cfg->is_sw_lldp = true;
 
 	/* Get DCBX status */
-	pi->dcbx_status = ice_get_dcbx_status(hw);
+	qos_cfg->dcbx_status = ice_get_dcbx_status(hw);
 
-	if (pi->dcbx_status == ICE_DCBX_STATUS_DONE ||
-	    pi->dcbx_status == ICE_DCBX_STATUS_IN_PROGRESS ||
-	    pi->dcbx_status == ICE_DCBX_STATUS_NOT_STARTED) {
+	if (qos_cfg->dcbx_status == ICE_DCBX_STATUS_DONE ||
+	    qos_cfg->dcbx_status == ICE_DCBX_STATUS_IN_PROGRESS ||
+	    qos_cfg->dcbx_status == ICE_DCBX_STATUS_NOT_STARTED) {
 		/* Get current DCBX configuration */
-		ret = ice_get_dcb_cfg(pi);
+		ret = ice_get_dcb_cfg(hw->port_info);
 		if (ret)
 			return ret;
-		pi->is_sw_lldp = false;
-	} else if (pi->dcbx_status == ICE_DCBX_STATUS_DIS) {
+		qos_cfg->is_sw_lldp = false;
+	} else if (qos_cfg->dcbx_status == ICE_DCBX_STATUS_DIS) {
 		return ICE_ERR_NOT_READY;
 	}
 
@@ -943,7 +943,7 @@ enum ice_status ice_init_dcb(struct ice_hw *hw, bool enable_mib_change)
 	if (enable_mib_change) {
 		ret = ice_aq_cfg_lldp_mib_change(hw, true, NULL);
 		if (ret)
-			pi->is_sw_lldp = true;
+			qos_cfg->is_sw_lldp = true;
 	}
 
 	return ret;
@@ -958,21 +958,21 @@ enum ice_status ice_init_dcb(struct ice_hw *hw, bool enable_mib_change)
  */
 enum ice_status ice_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_mib)
 {
-	struct ice_port_info *pi = hw->port_info;
+	struct ice_qos_cfg *qos_cfg = &hw->port_info->qos_cfg;
 	enum ice_status ret;
 
 	if (!hw->func_caps.common_cap.dcb)
 		return ICE_ERR_NOT_SUPPORTED;
 
 	/* Get DCBX status */
-	pi->dcbx_status = ice_get_dcbx_status(hw);
+	qos_cfg->dcbx_status = ice_get_dcbx_status(hw);
 
-	if (pi->dcbx_status == ICE_DCBX_STATUS_DIS)
+	if (qos_cfg->dcbx_status == ICE_DCBX_STATUS_DIS)
 		return ICE_ERR_NOT_READY;
 
 	ret = ice_aq_cfg_lldp_mib_change(hw, ena_mib, NULL);
 	if (!ret)
-		pi->is_sw_lldp = !ena_mib;
+		qos_cfg->is_sw_lldp = !ena_mib;
 
 	return ret;
 }
@@ -1269,7 +1269,7 @@ enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi)
 	hw = pi->hw;
 
 	/* update the HW local config */
-	dcbcfg = &pi->local_dcbx_cfg;
+	dcbcfg = &pi->qos_cfg.local_dcbx_cfg;
 	/* Allocate the LLDPDU */
 	lldpmib = (u8 *)ice_malloc(hw, ICE_LLDPDU_SIZE);
 	if (!lldpmib)
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 266f5500a..f80e19df9 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -753,6 +753,14 @@ struct ice_dcbx_cfg {
 #define ICE_DCBX_APPS_NON_WILLING	0x1
 };
 
+struct ice_qos_cfg {
+	struct ice_dcbx_cfg local_dcbx_cfg;	/* Oper/Local Cfg */
+	struct ice_dcbx_cfg desired_dcbx_cfg;	/* CEE Desired Cfg */
+	struct ice_dcbx_cfg remote_dcbx_cfg;	/* Peer Cfg */
+	u8 dcbx_status : 3;			/* see ICE_DCBX_STATUS_DIS */
+	u8 is_sw_lldp : 1;
+};
+
 struct ice_port_info {
 	struct ice_sched_node *root;	/* Root Node per Port */
 	struct ice_hw *hw;		/* back pointer to HW instance */
@@ -778,13 +786,7 @@ struct ice_port_info {
 	struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];
 	struct ice_bw_type_info root_node_bw_t_info;
 	struct ice_bw_type_info tc_node_bw_t_info[ICE_MAX_TRAFFIC_CLASS];
-	struct ice_dcbx_cfg local_dcbx_cfg;	/* Oper/Local Cfg */
-	/* DCBX info */
-	struct ice_dcbx_cfg remote_dcbx_cfg;	/* Peer Cfg */
-	struct ice_dcbx_cfg desired_dcbx_cfg;	/* CEE Desired Cfg */
-	/* LLDP/DCBX Status */
-	u8 dcbx_status:3;		/* see ICE_DCBX_STATUS_DIS */
-	u8 is_sw_lldp:1;
+	struct ice_qos_cfg qos_cfg;
 	u8 is_vf:1;
 };
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 21/40] net/ice/base: support outer IP filter for GTPC
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (19 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 20/40] net/ice/base: refactor DCB related variables Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 22/40] net/ice/base: support outer IP filter for GTPU without inner IP Qi Zhang
                   ` (20 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang

Add ptype MAC_IPV4_GTPC_TEID and MAC_IPV4_GTPC into
ice_ptypes_ipv4_ofos, ice_ptypes_ipv4_ofos_all and ice_ipv4_ofos_no_l4

Add ptype MAC_IPV6_GTPC_TEID and MAC_IPV6_GTPC into
ice_ptypes_ipv6_ofos, ice_ptypes_ipv6_ofos_all and ice_ipv6_ofos_no_l4

So outer IP can be configured as input set for GTPC packet.

Also add MAC_IPV4_GTPC_TEID and MAC_IPV6_GTPC_TEID into
ice_ptypes_gtpc, so when ICE_FLOW_SEG_HDR_GTPC is requested, it can
take effect on all GTPC packets (with or without TEID).

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flow.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 0afd7cbc3..919f6aba6 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -224,7 +224,7 @@ static const u32 ice_ptypes_macvlan_il[] = {
 static const u32 ice_ptypes_ipv4_ofos[] = {
 	0x1DC00000, 0x04000800, 0x00000000, 0x00000000,
 	0x00000000, 0x00000155, 0x00000000, 0x00000000,
-	0x00000000, 0x000FC000, 0x00000000, 0x00000000,
+	0x00000000, 0x000FC000, 0x000000A0, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -238,7 +238,7 @@ static const u32 ice_ptypes_ipv4_ofos[] = {
 static const u32 ice_ptypes_ipv4_ofos_all[] = {
 	0x1DC00000, 0x04000800, 0x00000000, 0x00000000,
 	0x00000000, 0x00000155, 0x00000000, 0x00000000,
-	0x00000000, 0x000FC000, 0x83E0F800, 0x00000101,
+	0x00000000, 0x000FC000, 0x83E0F8A0, 0x00000101,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -264,7 +264,7 @@ static const u32 ice_ptypes_ipv4_il[] = {
 static const u32 ice_ptypes_ipv6_ofos[] = {
 	0x00000000, 0x00000000, 0x77000000, 0x10002000,
 	0x00000000, 0x000002AA, 0x00000000, 0x00000000,
-	0x00000000, 0x03F00000, 0x00000000, 0x00000000,
+	0x00000000, 0x03F00000, 0x00000140, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -278,7 +278,7 @@ static const u32 ice_ptypes_ipv6_ofos[] = {
 static const u32 ice_ptypes_ipv6_ofos_all[] = {
 	0x00000000, 0x00000000, 0x77000000, 0x10002000,
 	0x00000000, 0x000002AA, 0x00000000, 0x00000000,
-	0x00080F00, 0x03F00000, 0x7C1F0000, 0x00000206,
+	0x00080F00, 0x03F00000, 0x7C1F0140, 0x00000206,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -302,7 +302,7 @@ static const u32 ice_ptypes_ipv6_il[] = {
 static const u32 ice_ipv4_ofos_no_l4[] = {
 	0x10C00000, 0x04000800, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
-	0x00000000, 0x000cc000, 0x00000000, 0x00000000,
+	0x00000000, 0x000cc000, 0x000000A0, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -326,7 +326,7 @@ static const u32 ice_ipv4_il_no_l4[] = {
 static const u32 ice_ipv6_ofos_no_l4[] = {
 	0x00000000, 0x00000000, 0x43000000, 0x10002000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
-	0x00000000, 0x02300000, 0x00000000, 0x00000000,
+	0x00000000, 0x02300000, 0x00000140, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -448,7 +448,7 @@ static const u32 ice_ptypes_mac_il[] = {
 static const u32 ice_ptypes_gtpc[] = {
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
-	0x00000000, 0x00000000, 0x00000180, 0x00000000,
+	0x00000000, 0x00000000, 0x000001E0, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 22/40] net/ice/base: support outer IP filter for GTPU without inner IP
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (20 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 21/40] net/ice/base: support outer IP filter for GTPC Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 23/40] net/ice/base: move a function Qi Zhang
                   ` (19 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang

Add ptype MAC_IPV4_GTPU into
ice_ptypes_ipv4_ofos, ice_ptypes_ipv4_ofos_all and ice_ipv4_ofos_no_l4

Add ptype MAC_IPV6_GTPU into
ice_ptypes_ipv6_ofos, ice_ptypes_ipv6_ofos_all and ice_ipv6_ofos_no_l4

Add ptype MAC_IPV4_GTPU and MAC_IPV6_GTPU into
the new ice_ptypes_gtpu_no_ip

So outer IP can be configured as input set for GTPU packet that without
inner IP layer.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flow.c | 29 ++++++++++++++++++++++-------
 drivers/net/ice/base/ice_flow.h |  1 +
 2 files changed, 23 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 919f6aba6..00ea42655 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -224,7 +224,7 @@ static const u32 ice_ptypes_macvlan_il[] = {
 static const u32 ice_ptypes_ipv4_ofos[] = {
 	0x1DC00000, 0x04000800, 0x00000000, 0x00000000,
 	0x00000000, 0x00000155, 0x00000000, 0x00000000,
-	0x00000000, 0x000FC000, 0x000000A0, 0x00000000,
+	0x00000000, 0x000FC000, 0x000002A0, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -238,7 +238,7 @@ static const u32 ice_ptypes_ipv4_ofos[] = {
 static const u32 ice_ptypes_ipv4_ofos_all[] = {
 	0x1DC00000, 0x04000800, 0x00000000, 0x00000000,
 	0x00000000, 0x00000155, 0x00000000, 0x00000000,
-	0x00000000, 0x000FC000, 0x83E0F8A0, 0x00000101,
+	0x00000000, 0x000FC000, 0x83E0FAA0, 0x00000101,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -264,7 +264,7 @@ static const u32 ice_ptypes_ipv4_il[] = {
 static const u32 ice_ptypes_ipv6_ofos[] = {
 	0x00000000, 0x00000000, 0x77000000, 0x10002000,
 	0x00000000, 0x000002AA, 0x00000000, 0x00000000,
-	0x00000000, 0x03F00000, 0x00000140, 0x00000000,
+	0x00000000, 0x03F00000, 0x00000540, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -278,7 +278,7 @@ static const u32 ice_ptypes_ipv6_ofos[] = {
 static const u32 ice_ptypes_ipv6_ofos_all[] = {
 	0x00000000, 0x00000000, 0x77000000, 0x10002000,
 	0x00000000, 0x000002AA, 0x00000000, 0x00000000,
-	0x00080F00, 0x03F00000, 0x7C1F0140, 0x00000206,
+	0x00080F00, 0x03F00000, 0x7C1F0540, 0x00000206,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -302,7 +302,7 @@ static const u32 ice_ptypes_ipv6_il[] = {
 static const u32 ice_ipv4_ofos_no_l4[] = {
 	0x10C00000, 0x04000800, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
-	0x00000000, 0x000cc000, 0x000000A0, 0x00000000,
+	0x00000000, 0x000cc000, 0x000002A0, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -326,7 +326,7 @@ static const u32 ice_ipv4_il_no_l4[] = {
 static const u32 ice_ipv6_ofos_no_l4[] = {
 	0x00000000, 0x00000000, 0x43000000, 0x10002000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
-	0x00000000, 0x02300000, 0x00000140, 0x00000000,
+	0x00000000, 0x02300000, 0x00000540, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -667,6 +667,17 @@ static const u32 ice_ptypes_mac_non_ip_ofos[] = {
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 };
 
+static const u32 ice_ptypes_gtpu_no_ip[] = {
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000600, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+};
+
 /* Manage parameters and info. used during the creation of a flow profile */
 struct ice_flow_prof_params {
 	enum ice_block blk;
@@ -691,7 +702,7 @@ struct ice_flow_prof_params {
 	ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_GTPU | \
 	ICE_FLOW_SEG_HDR_PFCP_SESSION | ICE_FLOW_SEG_HDR_L2TPV3 | \
 	ICE_FLOW_SEG_HDR_ESP | ICE_FLOW_SEG_HDR_AH | \
-	ICE_FLOW_SEG_HDR_NAT_T_ESP)
+	ICE_FLOW_SEG_HDR_NAT_T_ESP | ICE_FLOW_SEG_HDR_GTPU_NON_IP)
 
 #define ICE_FLOW_SEG_HDRS_L2_MASK	\
 	(ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN)
@@ -911,6 +922,10 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
 			src = (const ice_bitmap_t *)ice_ptypes_gtpc_tid;
 			ice_and_bitmap(params->ptypes, params->ptypes,
 				       src, ICE_FLOW_PTYPE_MAX);
+		} else if (hdrs & ICE_FLOW_SEG_HDR_GTPU_NON_IP) {
+			src = (const ice_bitmap_t *)ice_ptypes_gtpu_no_ip;
+			ice_and_bitmap(params->ptypes, params->ptypes,
+				       src, ICE_FLOW_PTYPE_MAX);
 		} else if (hdrs & ICE_FLOW_SEG_HDR_GTPU_DWN) {
 			src = (const ice_bitmap_t *)ice_ptypes_gtpu;
 			ice_and_bitmap(params->ptypes, params->ptypes,
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 92987664e..0a52409d5 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -178,6 +178,7 @@ enum ice_flow_seg_hdr {
 	ICE_FLOW_SEG_HDR_AH		= 0x00200000,
 	ICE_FLOW_SEG_HDR_NAT_T_ESP	= 0x00400000,
 	ICE_FLOW_SEG_HDR_ETH_NON_IP	= 0x00800000,
+	ICE_FLOW_SEG_HDR_GTPU_NON_IP	= 0x01000000,
 	/* The following is an additive bit for ICE_FLOW_SEG_HDR_IPV4 and
 	 * ICE_FLOW_SEG_HDR_IPV6 which include the IPV4 other PTYPEs
 	 */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 23/40] net/ice/base: move a function
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (21 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 22/40] net/ice/base: support outer IP filter for GTPU without inner IP Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 24/40] net/ice/base: clear advanced rules in reset preparation Qi Zhang
                   ` (18 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Tony Nguyen

The only caller of this function is within the file so mark it as static
and move it up in the file to avoid a forward declaration.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_acl.h      |  1 -
 drivers/net/ice/base/ice_acl_ctrl.c | 93 ++++++++++++++++++-------------------
 2 files changed, 45 insertions(+), 49 deletions(-)

diff --git a/drivers/net/ice/base/ice_acl.h b/drivers/net/ice/base/ice_acl.h
index 500db0c35..cd75e1c17 100644
--- a/drivers/net/ice/base/ice_acl.h
+++ b/drivers/net/ice/base/ice_acl.h
@@ -132,7 +132,6 @@ enum ice_status ice_acl_destroy_tbl(struct ice_hw *hw);
 enum ice_status
 ice_acl_create_scen(struct ice_hw *hw, u16 match_width, u16 num_entries,
 		    u16 *scen_id);
-enum ice_status ice_acl_destroy_scen(struct ice_hw *hw, u16 scen_id);
 enum ice_status
 ice_aq_alloc_acl_tbl(struct ice_hw *hw, struct ice_acl_alloc_tbl *tbl,
 		     struct ice_sq_cd *cd);
diff --git a/drivers/net/ice/base/ice_acl_ctrl.c b/drivers/net/ice/base/ice_acl_ctrl.c
index 0ecf38496..02a1dd34f 100644
--- a/drivers/net/ice/base/ice_acl_ctrl.c
+++ b/drivers/net/ice/base/ice_acl_ctrl.c
@@ -842,6 +842,51 @@ ice_acl_create_scen(struct ice_hw *hw, u16 match_width, u16 num_entries,
 }
 
 /**
+ * ice_acl_destroy_scen - Destroy an ACL scenario
+ * @hw: pointer to the HW struct
+ * @scen_id: ID of the remove scenario
+ */
+static enum ice_status ice_acl_destroy_scen(struct ice_hw *hw, u16 scen_id)
+{
+	struct ice_acl_scen *scen, *tmp_scen;
+	struct ice_flow_prof *p, *tmp;
+	enum ice_status status;
+
+	if (!hw->acl_tbl)
+		return ICE_ERR_DOES_NOT_EXIST;
+
+	/* Remove profiles that use "scen_id" scenario */
+	LIST_FOR_EACH_ENTRY_SAFE(p, tmp, &hw->fl_profs[ICE_BLK_ACL],
+				 ice_flow_prof, l_entry)
+		if (p->cfg.scen && p->cfg.scen->id == scen_id) {
+			status = ice_flow_rem_prof(hw, ICE_BLK_ACL, p->id);
+			if (status) {
+				ice_debug(hw, ICE_DBG_ACL, "ice_flow_rem_prof failed. status: %d\n",
+					  status);
+				return status;
+			}
+		}
+
+	/* Call the AQ command to destroy the targeted scenario */
+	status = ice_aq_dealloc_acl_scen(hw, scen_id, NULL);
+	if (status) {
+		ice_debug(hw, ICE_DBG_ACL, "AQ de-allocation of scenario failed. status: %d\n",
+			  status);
+		return status;
+	}
+
+	/* Remove scenario from hw->acl_tbl->scens */
+	LIST_FOR_EACH_ENTRY_SAFE(scen, tmp_scen, &hw->acl_tbl->scens,
+				 ice_acl_scen, list_entry)
+		if (scen->id == scen_id) {
+			LIST_DEL(&scen->list_entry);
+			ice_free(hw, scen);
+		}
+
+	return ICE_SUCCESS;
+}
+
+/**
  * ice_acl_destroy_tbl - Destroy a previously created LEM table for ACL
  * @hw: pointer to the HW struct
  */
@@ -1118,51 +1163,3 @@ ice_acl_rem_entry(struct ice_hw *hw, struct ice_acl_scen *scen, u16 entry_idx)
 
 	return status;
 }
-
-/**
- * ice_acl_destroy_scen - Destroy an ACL scenario
- * @hw: pointer to the HW struct
- * @scen_id: ID of the remove scenario
- */
-enum ice_status ice_acl_destroy_scen(struct ice_hw *hw, u16 scen_id)
-{
-	struct ice_acl_scen *scen, *tmp_scen;
-	struct ice_flow_prof *p, *tmp;
-	enum ice_status status;
-
-	if (!hw->acl_tbl)
-		return ICE_ERR_DOES_NOT_EXIST;
-
-	/* Remove profiles that use "scen_id" scenario */
-	LIST_FOR_EACH_ENTRY_SAFE(p, tmp, &hw->fl_profs[ICE_BLK_ACL],
-				 ice_flow_prof, l_entry)
-		if (p->cfg.scen && p->cfg.scen->id == scen_id) {
-			status = ice_flow_rem_prof(hw, ICE_BLK_ACL, p->id);
-			if (status) {
-				ice_debug(hw, ICE_DBG_ACL,
-					  "ice_flow_rem_prof failed. status: %d\n",
-					  status);
-				goto exit;
-			}
-		}
-
-	/* Call the AQ command to destroy the targeted scenario */
-	status = ice_aq_dealloc_acl_scen(hw, scen_id, NULL);
-
-	if (status) {
-		ice_debug(hw, ICE_DBG_ACL,
-			  "AQ de-allocation of scenario failed. status: %d\n",
-			  status);
-		goto exit;
-	}
-
-	/* Remove scenario from hw->acl_tbl->scens */
-	LIST_FOR_EACH_ENTRY_SAFE(scen, tmp_scen, &hw->acl_tbl->scens,
-				 ice_acl_scen, list_entry)
-		if (scen->id == scen_id) {
-			LIST_DEL(&scen->list_entry);
-			ice_free(hw, scen);
-		}
-exit:
-	return status;
-}
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 24/40] net/ice/base: clear advanced rules in reset preparation
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (22 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 23/40] net/ice/base: move a function Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 25/40] net/ice/base: move a function Qi Zhang
                   ` (17 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, NorbertX Ciosek

Clear advanced rules from SW and HW before reset.

Signed-off-by: NorbertX Ciosek <norbertx.ciosek@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 30 +++++++++++++++++++-----------
 1 file changed, 19 insertions(+), 11 deletions(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 4d193b30f..d1bc10539 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -8114,13 +8114,12 @@ ice_rem_adv_rule_by_id(struct ice_hw *hw,
  */
 enum ice_status ice_rem_adv_rule_for_vsi(struct ice_hw *hw, u16 vsi_handle)
 {
-	struct ice_adv_fltr_mgmt_list_entry *list_itr;
+	struct ice_adv_fltr_mgmt_list_entry *list_itr, *tmp_entry;
 	struct ice_vsi_list_map_info *map_info;
 	struct LIST_HEAD_TYPE *list_head;
 	struct ice_adv_rule_info rinfo;
 	struct ice_switch_info *sw;
 	enum ice_status status;
-	u16 vsi_list_id = 0;
 	u8 rid;
 
 	sw = hw->switch_info;
@@ -8129,22 +8128,31 @@ enum ice_status ice_rem_adv_rule_for_vsi(struct ice_hw *hw, u16 vsi_handle)
 			continue;
 		if (!sw->recp_list[rid].adv_rule)
 			continue;
+
 		list_head = &sw->recp_list[rid].filt_rules;
-		map_info = NULL;
-		LIST_FOR_EACH_ENTRY(list_itr, list_head,
-				    ice_adv_fltr_mgmt_list_entry, list_entry) {
-			map_info = ice_find_vsi_list_entry(&sw->recp_list[rid],
-							   vsi_handle,
-							   &vsi_list_id);
-			if (!map_info)
-				continue;
+		LIST_FOR_EACH_ENTRY_SAFE(list_itr, tmp_entry, list_head,
+					 ice_adv_fltr_mgmt_list_entry,
+					 list_entry) {
 			rinfo = list_itr->rule_info;
+
+			if (rinfo.sw_act.fltr_act == ICE_FWD_TO_VSI_LIST) {
+				map_info = list_itr->vsi_list_info;
+				if (!map_info)
+					continue;
+
+				if (!ice_is_bit_set(map_info->vsi_map,
+						    vsi_handle))
+					continue;
+			} else if (rinfo.sw_act.vsi_handle != vsi_handle) {
+				continue;
+			}
+
 			rinfo.sw_act.vsi_handle = vsi_handle;
 			status = ice_rem_adv_rule(hw, list_itr->lkups,
 						  list_itr->lkups_cnt, &rinfo);
+
 			if (status)
 				return status;
-			map_info = NULL;
 		}
 	}
 	return ICE_SUCCESS;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 25/40] net/ice/base: move a function
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (23 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 24/40] net/ice/base: clear advanced rules in reset preparation Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 26/40] net/ice/base: add check for failed acts allocation Qi Zhang
                   ` (16 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Tony Nguyen

Move ice_flow_get_hw_prof, this is not necessary for DPDK, just
sync the code with other compile option which ice_flow_get_hw_prof
is declared as a static function.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flow.c | 48 ++++++++++++++++++++---------------------
 1 file changed, 24 insertions(+), 24 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 00ea42655..0ae39c094 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1642,6 +1642,30 @@ ice_dealloc_flow_entry(struct ice_hw *hw, struct ice_flow_entry *entry)
 	ice_free(hw, entry);
 }
 
+/**
+ * ice_flow_get_hw_prof - return the HW profile for a specific profile ID handle
+ * @hw: pointer to the HW struct
+ * @blk: classification stage
+ * @prof_id: the profile ID handle
+ * @hw_prof_id: pointer to variable to receive the HW profile ID
+ */
+enum ice_status
+ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
+		     u8 *hw_prof_id)
+{
+	enum ice_status status = ICE_ERR_DOES_NOT_EXIST;
+	struct ice_prof_map *map;
+
+	ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);
+	map = ice_search_prof_id(hw, blk, prof_id);
+	if (map) {
+		*hw_prof_id = map->prof_id;
+		status = ICE_SUCCESS;
+	}
+	ice_release_lock(&hw->blk[blk].es.prof_map_lock);
+	return status;
+}
+
 #define ICE_ACL_INVALID_SCEN	0x3f
 
 /**
@@ -2233,30 +2257,6 @@ ice_flow_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id)
 }
 
 /**
- * ice_flow_get_hw_prof - return the HW profile for a specific profile ID handle
- * @hw: pointer to the HW struct
- * @blk: classification stage
- * @prof_id: the profile ID handle
- * @hw_prof_id: pointer to variable to receive the HW profile ID
- */
-enum ice_status
-ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
-		     u8 *hw_prof_id)
-{
-	enum ice_status status = ICE_ERR_DOES_NOT_EXIST;
-	struct ice_prof_map *map;
-
-	ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);
-	map = ice_search_prof_id(hw, blk, prof_id);
-	if (map) {
-		*hw_prof_id = map->prof_id;
-		status = ICE_SUCCESS;
-	}
-	ice_release_lock(&hw->blk[blk].es.prof_map_lock);
-	return status;
-}
-
-/**
  * ice_flow_find_entry - look for a flow entry using its unique ID
  * @hw: pointer to the HW struct
  * @blk: classification stage
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 26/40] net/ice/base: add check for failed acts allocation
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (24 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 25/40] net/ice/base: move a function Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 27/40] net/ice/base: remove repeated words Qi Zhang
                   ` (15 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Tony Nguyen

There is no check for failed allocation of 'acts'. Add a check and return
if memory was not successfully allocated. Also, as all 'goto out' occur
after this check there is no need to perform a check for 'acts' as we will
have returned if it is not set.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flow.c | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 0ae39c094..9e7f73229 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1712,8 +1712,8 @@ ice_flow_acl_is_prof_in_use(struct ice_hw *hw, struct ice_flow_prof *prof,
 	    buf->pf_scenario_num[6] == ICE_ACL_INVALID_SCEN &&
 	    buf->pf_scenario_num[7] == ICE_ACL_INVALID_SCEN)
 		return ICE_SUCCESS;
-	else
-		return ICE_ERR_IN_USE;
+
+	return ICE_ERR_IN_USE;
 }
 
 /**
@@ -2861,7 +2861,6 @@ ice_flow_acl_add_scen_entry_sync(struct ice_hw *hw, struct ice_flow_prof *prof,
 	 */
 	exist = ice_flow_acl_find_scen_entry_cond(prof, e, &do_chg_action,
 						  &do_add_entry, &do_rem_entry);
-
 	if (do_rem_entry) {
 		status = ice_flow_rem_entry_sync(hw, ICE_BLK_ACL, exist);
 		if (status)
@@ -2869,8 +2868,11 @@ ice_flow_acl_add_scen_entry_sync(struct ice_hw *hw, struct ice_flow_prof *prof,
 	}
 
 	/* Prepare the result action buffer */
-	acts = (struct ice_acl_act_entry *)ice_calloc
-		(hw, e->entry_sz, sizeof(struct ice_acl_act_entry));
+	acts = (struct ice_acl_act_entry *)
+		ice_calloc(hw, e->entry_sz, sizeof(struct ice_acl_act_entry));
+	if (!acts)
+		return ICE_ERR_NO_MEMORY;
+
 	for (i = 0; i < e->acts_cnt; i++)
 		ice_memcpy(&acts[i], &e->acts[i].data.acl_act,
 			   sizeof(struct ice_acl_act_entry),
@@ -2937,8 +2939,7 @@ ice_flow_acl_add_scen_entry_sync(struct ice_hw *hw, struct ice_flow_prof *prof,
 		*(entry) = exist;
 	}
 out:
-	if (acts)
-		ice_free(hw, acts);
+	ice_free(hw, acts);
 
 	return status;
 }
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 27/40] net/ice/base: remove repeated words
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (25 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 26/40] net/ice/base: add check for failed acts allocation Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 28/40] net/ice/base: remove function ACL count query Qi Zhang
                   ` (14 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Bruce Allan

A new test in checkpatch detects repeated words; cleanup all pre-existing
occurrences of those now.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_adminq_cmd.h | 2 +-
 drivers/net/ice/base/ice_common.c     | 2 +-
 drivers/net/ice/base/ice_flow.c       | 4 ++--
 drivers/net/ice/base/ice_nvm.c        | 2 +-
 drivers/net/ice/base/ice_switch.c     | 4 ++--
 5 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index d7a57fe6b..bc71ec531 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -2130,7 +2130,7 @@ struct ice_aqc_acl_update_query_scen {
  */
 struct ice_aqc_acl_scen {
 	struct {
-		/* Byte [x] selection for the TCAM key. This value must be set
+		/* Byte [x] selection for the TCAM key. This value must be
 		 * set to 0x0 for unusued TCAM.
 		 * Only Bit 6..0 is used in each byte and MSB is reserved
 		 */
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 46754a333..f5b1a0ce8 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2084,7 +2084,7 @@ ice_parse_fdir_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
  * @cap_count: the number of capabilities
  *
  * Helper device to parse device (0x000B) capabilities list. For
- * capabilities shared between device and device, this relies on
+ * capabilities shared between device and function, this relies on
  * ice_parse_common_caps.
  *
  * Loop through the list of provided capabilities and extract the relevant
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 9e7f73229..b093955d3 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1254,7 +1254,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
  * ice_flow_xtract_raws - Create extract sequence entries for raw bytes
  * @hw: pointer to the HW struct
  * @params: information about the flow to be processed
- * @seg: index of packet segment whose raw fields are to be be extracted
+ * @seg: index of packet segment whose raw fields are to be extracted
  */
 static enum ice_status
 ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params,
@@ -3106,7 +3106,7 @@ enum ice_status ice_flow_rem_entry(struct ice_hw *hw, enum ice_block blk,
  *
  * This helper function stores information of a field being matched, including
  * the type of the field and the locations of the value to match, the mask, and
- * and the upper-bound value in the start of the input buffer for a flow entry.
+ * the upper-bound value in the start of the input buffer for a flow entry.
  * This function should only be used for fixed-size data structures.
  *
  * This function also opportunistically determines the protocol headers to be
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index b4fb28bfb..5df07133b 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -629,7 +629,7 @@ ice_nvm_access_get_features(struct ice_nvm_access_cmd *cmd,
 {
 	/* The provided data_size must be at least as large as our NVM
 	 * features structure. A larger size should not be treated as an
-	 * error, to allow future extensions to to the features structure to
+	 * error, to allow future extensions to the features structure to
 	 * work on older drivers.
 	 */
 	if (cmd->data_size < sizeof(struct ice_nvm_features))
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index d1bc10539..1c07c60a1 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2367,7 +2367,7 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
  * @hw: pointer to the HW struct
  * @bcast_thresh: represents the upper threshold for broadcast storm control
  * @mcast_thresh: represents the upper threshold for multicast storm control
- * @ctl_bitmask: storm control control knobs
+ * @ctl_bitmask: storm control knobs
  *
  * Sets the storm control configuration (0x0280)
  */
@@ -2394,7 +2394,7 @@ ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,
  * @hw: pointer to the HW struct
  * @bcast_thresh: represents the upper threshold for broadcast storm control
  * @mcast_thresh: represents the upper threshold for multicast storm control
- * @ctl_bitmask: storm control control knobs
+ * @ctl_bitmask: storm control knobs
  *
  * Gets the storm control configuration (0x0281)
  */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 28/40] net/ice/base: remove function ACL count query
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (26 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 27/40] net/ice/base: remove repeated words Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 29/40] net/ice/base: preserve NVM capabilities in safe mode Qi Zhang
                   ` (13 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang

Remove debug function ice_aq_query_acl_cntrs.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_acl.c | 36 ------------------------------------
 drivers/net/ice/base/ice_acl.h |  3 ---
 2 files changed, 39 deletions(-)

diff --git a/drivers/net/ice/base/ice_acl.c b/drivers/net/ice/base/ice_acl.c
index fd12507d7..435a0cb51 100644
--- a/drivers/net/ice/base/ice_acl.c
+++ b/drivers/net/ice/base/ice_acl.c
@@ -435,42 +435,6 @@ ice_aq_dealloc_acl_cntrs(struct ice_hw *hw, struct ice_acl_cntrs *cntrs,
 }
 
 /**
- * ice_aq_query_acl_cntrs - query ACL counter
- * @hw: pointer to the HW struct
- * @bank: queries counter bank
- * @index: queried counter index
- * @cntr_val: pointer to counter or packet counter value
- * @cd: pointer to command details structure or NULL
- *
- * Query ACL counter (direct 0x0C27)
- */
-enum ice_status
-ice_aq_query_acl_cntrs(struct ice_hw *hw, u8 bank, u16 index, u64 *cntr_val,
-		       struct ice_sq_cd *cd)
-{
-	struct ice_aqc_acl_query_counter *cmd;
-	struct ice_aq_desc desc;
-	enum ice_status status;
-
-	if (!cntr_val)
-		return ICE_ERR_PARAM;
-
-	ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_acl_counter);
-	cmd = &desc.params.query_counter;
-	cmd->counter_index = CPU_TO_LE16(index);
-	cmd->counter_bank = bank;
-	status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
-	if (!status) {
-		__le64 resp_val = 0;
-
-		ice_memcpy(&resp_val, cmd->ops.resp.val,
-			   sizeof(cmd->ops.resp.val), ICE_NONDMA_TO_NONDMA);
-		*cntr_val = LE64_TO_CPU(resp_val);
-	}
-	return status;
-}
-
-/**
  * ice_prog_acl_prof_ranges - program ACL profile ranges
  * @hw: pointer to the HW struct
  * @prof_id: programmed or updated profile ID
diff --git a/drivers/net/ice/base/ice_acl.h b/drivers/net/ice/base/ice_acl.h
index cd75e1c17..be27a545b 100644
--- a/drivers/net/ice/base/ice_acl.h
+++ b/drivers/net/ice/base/ice_acl.h
@@ -172,9 +172,6 @@ enum ice_status
 ice_aq_dealloc_acl_cntrs(struct ice_hw *hw, struct ice_acl_cntrs *cntrs,
 			 struct ice_sq_cd *cd);
 enum ice_status
-ice_aq_query_acl_cntrs(struct ice_hw *hw, u8 bank, u16 index, u64 *cntr_val,
-		       struct ice_sq_cd *cd);
-enum ice_status
 ice_prog_acl_prof_ranges(struct ice_hw *hw, u8 prof_id,
 			 struct ice_aqc_acl_profile_ranges *buf,
 			 struct ice_sq_cd *cd);
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 29/40] net/ice/base: preserve NVM capabilities in safe mode
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (27 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 28/40] net/ice/base: remove function ACL count query Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 30/40] net/ice/base: misc minor ACL changes Qi Zhang
                   ` (12 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Jacob Keller

If the driver initializes in safe mode, it will call
ice_set_safe_mode_caps. This results in clearing the capabilities
structures, in order to set them up for operating in safe mode, ensuring
many features are disabled.

This has a side effect of also clearing the capability bits that relate
to NVM update. The result is that the device driver will not indicate
support for unified update, even if the firmware is capable.

Fix this by adding the relevant capability fields to the list of values
we preserve. To simplify the code, use a common_cap structure instead of
a handful of local variables. To reduce some duplication of the
capability name, introduce a couple of macros used to restore the
capabilities values from the cached copy.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 43 +++++++++++++++++++--------------------
 1 file changed, 21 insertions(+), 22 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index f5b1a0ce8..d917f8be7 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2248,26 +2248,25 @@ void ice_set_safe_mode_caps(struct ice_hw *hw)
 {
 	struct ice_hw_func_caps *func_caps = &hw->func_caps;
 	struct ice_hw_dev_caps *dev_caps = &hw->dev_caps;
-	u32 valid_func, rxq_first_id, txq_first_id;
-	u32 msix_vector_first_id, max_mtu;
+	struct ice_hw_common_caps cached_caps;
 	u32 num_funcs;
 
 	/* cache some func_caps values that should be restored after memset */
-	valid_func = func_caps->common_cap.valid_functions;
-	txq_first_id = func_caps->common_cap.txq_first_id;
-	rxq_first_id = func_caps->common_cap.rxq_first_id;
-	msix_vector_first_id = func_caps->common_cap.msix_vector_first_id;
-	max_mtu = func_caps->common_cap.max_mtu;
+	cached_caps = func_caps->common_cap;
 
 	/* unset func capabilities */
 	memset(func_caps, 0, sizeof(*func_caps));
 
+#define ICE_RESTORE_FUNC_CAP(name) \
+	func_caps->common_cap.name = cached_caps.name
+
 	/* restore cached values */
-	func_caps->common_cap.valid_functions = valid_func;
-	func_caps->common_cap.txq_first_id = txq_first_id;
-	func_caps->common_cap.rxq_first_id = rxq_first_id;
-	func_caps->common_cap.msix_vector_first_id = msix_vector_first_id;
-	func_caps->common_cap.max_mtu = max_mtu;
+	ICE_RESTORE_FUNC_CAP(valid_functions);
+	ICE_RESTORE_FUNC_CAP(txq_first_id);
+	ICE_RESTORE_FUNC_CAP(rxq_first_id);
+	ICE_RESTORE_FUNC_CAP(msix_vector_first_id);
+	ICE_RESTORE_FUNC_CAP(max_mtu);
+	ICE_RESTORE_FUNC_CAP(nvm_unified_update);
 
 	/* one Tx and one Rx queue in safe mode */
 	func_caps->common_cap.num_rxq = 1;
@@ -2278,22 +2277,22 @@ void ice_set_safe_mode_caps(struct ice_hw *hw)
 	func_caps->guar_num_vsi = 1;
 
 	/* cache some dev_caps values that should be restored after memset */
-	valid_func = dev_caps->common_cap.valid_functions;
-	txq_first_id = dev_caps->common_cap.txq_first_id;
-	rxq_first_id = dev_caps->common_cap.rxq_first_id;
-	msix_vector_first_id = dev_caps->common_cap.msix_vector_first_id;
-	max_mtu = dev_caps->common_cap.max_mtu;
+	cached_caps = dev_caps->common_cap;
 	num_funcs = dev_caps->num_funcs;
 
 	/* unset dev capabilities */
 	memset(dev_caps, 0, sizeof(*dev_caps));
 
+#define ICE_RESTORE_DEV_CAP(name) \
+	dev_caps->common_cap.name = cached_caps.name
+
 	/* restore cached values */
-	dev_caps->common_cap.valid_functions = valid_func;
-	dev_caps->common_cap.txq_first_id = txq_first_id;
-	dev_caps->common_cap.rxq_first_id = rxq_first_id;
-	dev_caps->common_cap.msix_vector_first_id = msix_vector_first_id;
-	dev_caps->common_cap.max_mtu = max_mtu;
+	ICE_RESTORE_DEV_CAP(valid_functions);
+	ICE_RESTORE_DEV_CAP(txq_first_id);
+	ICE_RESTORE_DEV_CAP(rxq_first_id);
+	ICE_RESTORE_DEV_CAP(msix_vector_first_id);
+	ICE_RESTORE_DEV_CAP(max_mtu);
+	ICE_RESTORE_DEV_CAP(nvm_unified_update);
 	dev_caps->num_funcs = num_funcs;
 
 	/* one Tx and one Rx queue per function in safe mode */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 30/40] net/ice/base: misc minor ACL changes
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (28 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 29/40] net/ice/base: preserve NVM capabilities in safe mode Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 31/40] net/ice/base: adjust rate limit profile ids runtime database Qi Zhang
                   ` (11 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Tony Nguyen

This is a collection of minor ACL style changes including:

- When there is nothing to unroll, return a value directly.
- Return ICE_SUCCESS(0) in cases where an error was previously checked
  so ICE_SUCCESS is the only possible return.
- Remove unnecessary parentheses and newlines
- Move unroll of allocation to end of function and use goto on errors to
  free.
- Fix function header comment style
- Remove 'else' from an 'if else' condition where both conditions return
  a value to reduce indentation.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_acl_ctrl.c | 24 +++++++++++-------------
 1 file changed, 11 insertions(+), 13 deletions(-)

diff --git a/drivers/net/ice/base/ice_acl_ctrl.c b/drivers/net/ice/base/ice_acl_ctrl.c
index 02a1dd34f..bd09e9d77 100644
--- a/drivers/net/ice/base/ice_acl_ctrl.c
+++ b/drivers/net/ice/base/ice_acl_ctrl.c
@@ -149,10 +149,8 @@ static enum ice_status ice_acl_init_tbl(struct ice_hw *hw)
 	u16 idx;
 
 	tbl = hw->acl_tbl;
-	if (!tbl) {
-		status = ICE_ERR_CFG;
-		return status;
-	}
+	if (!tbl)
+		return ICE_ERR_CFG;
 
 	ice_memset(&buf, 0, sizeof(buf), ICE_NONDMA_MEM);
 	ice_memset(&act_buf, 0, sizeof(act_buf), ICE_NONDMA_MEM);
@@ -526,7 +524,7 @@ ice_acl_alloc_partition(struct ice_hw *hw, struct ice_acl_scen *req)
 			break;
 		}
 
-		row = (dir > 0) ? (row + width) : (row - width);
+		row = dir > 0 ? row + width : row - width;
 		if (row > hw->acl_tbl->last_tcam ||
 		    row < hw->acl_tbl->first_tcam) {
 			/* All rows have been checked. Increment 'off' that
@@ -668,8 +666,7 @@ static void
 ice_acl_assign_act_mem_for_scen(struct ice_acl_tbl *tbl,
 				struct ice_acl_scen *scen,
 				struct ice_aqc_acl_scen *scen_buf,
-				u8 current_tcam_idx,
-				u8 target_tcam_idx)
+				u8 current_tcam_idx, u8 target_tcam_idx)
 {
 	u8 i;
 
@@ -761,10 +758,8 @@ ice_acl_create_scen(struct ice_hw *hw, u16 match_width, u16 num_entries,
 	scen->num_entry = num_entries;
 
 	status = ice_acl_alloc_partition(hw, scen);
-	if (status) {
-		ice_free(hw, scen);
-		return status;
-	}
+	if (status)
+		goto out;
 
 	ice_memset(&scen_buf, 0, sizeof(scen_buf), ICE_NONDMA_MEM);
 
@@ -829,8 +824,7 @@ ice_acl_create_scen(struct ice_hw *hw, u16 match_width, u16 num_entries,
 	if (status) {
 		ice_debug(hw, ICE_DBG_ACL, "AQ allocation of ACL scenario failed. status: %d\n",
 			  status);
-		ice_free(hw, scen);
-		return status;
+		goto out;
 	}
 
 	scen->id = *scen_id;
@@ -838,6 +832,10 @@ ice_acl_create_scen(struct ice_hw *hw, u16 match_width, u16 num_entries,
 	ice_acl_init_entry(scen);
 	LIST_ADD(&scen->list_entry, &hw->acl_tbl->scens);
 
+out:
+	if (status)
+		ice_free(hw, scen);
+
 	return status;
 }
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 31/40] net/ice/base: adjust rate limit profile ids runtime database
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (29 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 30/40] net/ice/base: misc minor ACL changes Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 32/40] net/ice/base: enable QinQ filter for switch advanced rule Qi Zhang
                   ` (10 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Shibin Koikkara Reeny

Moving the runtime profile ids database/storage to the hw structure.

Signed-off-by: Shibin Koikkara Reeny <shibin.koikkara.reeny@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_sched.c | 52 +++++++++++++++++++---------------------
 drivers/net/ice/base/ice_type.h  |  4 ++--
 2 files changed, 27 insertions(+), 29 deletions(-)

diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index cbe0e4b5b..4be449f61 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -727,15 +727,15 @@ ice_sched_del_rl_profile(struct ice_hw *hw,
 static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
 {
 	u16 ln;
+	struct ice_hw *hw = pi->hw;
 
-	for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
+	for (ln = 0; ln < hw->num_tx_sched_layers; ln++) {
 		struct ice_aqc_rl_profile_info *rl_prof_elem;
 		struct ice_aqc_rl_profile_info *rl_prof_tmp;
 
 		LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
-					 &pi->rl_prof_list[ln],
+					 &hw->rl_prof_list[ln],
 					 ice_aqc_rl_profile_info, list_entry) {
-			struct ice_hw *hw = pi->hw;
 			enum ice_status status;
 
 			rl_prof_elem->prof_id_ref = 0;
@@ -1260,7 +1260,7 @@ enum ice_status ice_sched_init_port(struct ice_port_info *pi)
 	pi->port_state = ICE_SCHED_PORT_STATE_READY;
 	ice_init_lock(&pi->sched_lock);
 	for (i = 0; i < ICE_AQC_TOPO_MAX_LEVEL_NUM; i++)
-		INIT_LIST_HEAD(&pi->rl_prof_list[i]);
+		INIT_LIST_HEAD(&hw->rl_prof_list[i]);
 
 err_init_port:
 	if (status && pi->root) {
@@ -2868,23 +2868,23 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
 
 /**
  * ice_sched_rm_unused_rl_prof - remove unused RL profile
- * @pi: port information structure
+ * @hw: pointer to the hardware structure
  *
  * This function removes unused rate limit profiles from the HW and
  * SW DB. The caller needs to hold scheduler lock.
  */
-static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
+static void ice_sched_rm_unused_rl_prof(struct ice_hw *hw)
 {
 	u16 ln;
 
-	for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
+	for (ln = 0; ln < hw->num_tx_sched_layers; ln++) {
 		struct ice_aqc_rl_profile_info *rl_prof_elem;
 		struct ice_aqc_rl_profile_info *rl_prof_tmp;
 
 		LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
-					 &pi->rl_prof_list[ln],
+					 &hw->rl_prof_list[ln],
 					 ice_aqc_rl_profile_info, list_entry) {
-			if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
+			if (!ice_sched_del_rl_profile(hw, rl_prof_elem))
 				ice_debug(hw, ICE_DBG_SCHED, "Removed rl profile\n");
 		}
 	}
@@ -3031,7 +3031,7 @@ enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
 	ice_free(pi->hw, agg_info);
 
 	/* Remove unused RL profile IDs from HW and SW DB */
-	ice_sched_rm_unused_rl_prof(pi);
+	ice_sched_rm_unused_rl_prof(pi->hw);
 
 exit_ice_rm_agg_cfg:
 	ice_release_lock(&pi->sched_lock);
@@ -3852,7 +3852,7 @@ ice_sched_bw_to_rl_profile(struct ice_hw *hw, u32 bw,
 
 /**
  * ice_sched_add_rl_profile - add RL profile
- * @pi: port information structure
+ * @hw: pointer to the hardware structure
  * @rl_type: type of rate limit BW - min, max, or shared
  * @bw: bandwidth in Kbps - Kilo bits per sec
  * @layer_num: specifies in which layer to create profile
@@ -3864,14 +3864,13 @@ ice_sched_bw_to_rl_profile(struct ice_hw *hw, u32 bw,
  * The caller needs to hold the scheduler lock.
  */
 static struct ice_aqc_rl_profile_info *
-ice_sched_add_rl_profile(struct ice_port_info *pi,
-			 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
+ice_sched_add_rl_profile(struct ice_hw *hw, enum ice_rl_type rl_type,
+			 u32 bw, u8 layer_num)
 {
 	struct ice_aqc_rl_profile_info *rl_prof_elem;
 	u16 profiles_added = 0, num_profiles = 1;
 	struct ice_aqc_rl_profile_elem *buf;
 	enum ice_status status;
-	struct ice_hw *hw;
 	u8 profile_type;
 
 	if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
@@ -3890,10 +3889,9 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
 		return NULL;
 	}
 
-	if (!pi)
+	if (!hw)
 		return NULL;
-	hw = pi->hw;
-	LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
+	LIST_FOR_EACH_ENTRY(rl_prof_elem, &hw->rl_prof_list[layer_num],
 			    ice_aqc_rl_profile_info, list_entry)
 		if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
 		    profile_type && rl_prof_elem->bw == bw)
@@ -3926,7 +3924,7 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
 
 	/* Good entry - add in the list */
 	rl_prof_elem->prof_id_ref = 0;
-	LIST_ADD(&rl_prof_elem->list_entry, &pi->rl_prof_list[layer_num]);
+	LIST_ADD(&rl_prof_elem->list_entry, &hw->rl_prof_list[layer_num]);
 	return rl_prof_elem;
 
 exit_add_rl_prof:
@@ -4105,7 +4103,7 @@ ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
 
 /**
  * ice_sched_rm_rl_profile - remove RL profile ID
- * @pi: port information structure
+ * @hw: pointer to the hardware structure
  * @layer_num: layer number where profiles are saved
  * @profile_type: profile type like EIR, CIR, or SRL
  * @profile_id: profile ID to remove
@@ -4115,7 +4113,7 @@ ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
  * scheduler lock.
  */
 static enum ice_status
-ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
+ice_sched_rm_rl_profile(struct ice_hw *hw, u8 layer_num, u8 profile_type,
 			u16 profile_id)
 {
 	struct ice_aqc_rl_profile_info *rl_prof_elem;
@@ -4124,7 +4122,7 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
 	if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
 		return ICE_ERR_PARAM;
 	/* Check the existing list for RL profile */
-	LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
+	LIST_FOR_EACH_ENTRY(rl_prof_elem, &hw->rl_prof_list[layer_num],
 			    ice_aqc_rl_profile_info, list_entry)
 		if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
 		    profile_type &&
@@ -4134,9 +4132,9 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
 				rl_prof_elem->prof_id_ref--;
 
 			/* Remove old profile ID from database */
-			status = ice_sched_del_rl_profile(pi->hw, rl_prof_elem);
+			status = ice_sched_del_rl_profile(hw, rl_prof_elem);
 			if (status && status != ICE_ERR_IN_USE)
-				ice_debug(pi->hw, ICE_DBG_SCHED, "Remove rl profile failed\n");
+				ice_debug(hw, ICE_DBG_SCHED, "Remove rl profile failed\n");
 			break;
 		}
 	if (status == ICE_ERR_IN_USE)
@@ -4196,7 +4194,7 @@ ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
 	    old_id == ICE_SCHED_INVAL_PROF_ID)
 		return ICE_SUCCESS;
 
-	return ice_sched_rm_rl_profile(pi, layer_num, profile_type, old_id);
+	return ice_sched_rm_rl_profile(hw, layer_num, profile_type, old_id);
 }
 
 /**
@@ -4265,7 +4263,7 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
 	struct ice_hw *hw = pi->hw;
 	u16 old_id, rl_prof_id;
 
-	rl_prof_info = ice_sched_add_rl_profile(pi, rl_type, bw, layer_num);
+	rl_prof_info = ice_sched_add_rl_profile(hw, rl_type, bw, layer_num);
 	if (!rl_prof_info)
 		return status;
 
@@ -4287,7 +4285,7 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
 	    old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id)
 		return ICE_SUCCESS;
 
-	return ice_sched_rm_rl_profile(pi, layer_num,
+	return ice_sched_rm_rl_profile(hw, layer_num,
 				       rl_prof_info->profile.flags &
 				       ICE_AQC_RL_PROFILE_TYPE_M, old_id);
 }
@@ -4316,7 +4314,7 @@ ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
 		return ICE_ERR_PARAM;
 	hw = pi->hw;
 	/* Remove unused RL profile IDs from HW and SW DB */
-	ice_sched_rm_unused_rl_prof(pi);
+	ice_sched_rm_unused_rl_prof(hw);
 	layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
 						node->tx_sched_layer);
 	if (layer_num >= hw->num_tx_sched_layers)
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index f80e19df9..9c2fb560e 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -782,8 +782,6 @@ struct ice_port_info {
 	struct ice_lock sched_lock;	/* protect access to TXSched tree */
 	struct ice_sched_node *
 		sib_head[ICE_MAX_TRAFFIC_CLASS][ICE_AQC_TOPO_MAX_LEVEL_NUM];
-	/* List contain profile ID(s) and other params per layer */
-	struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];
 	struct ice_bw_type_info root_node_bw_t_info;
 	struct ice_bw_type_info tc_node_bw_t_info[ICE_MAX_TRAFFIC_CLASS];
 	struct ice_qos_cfg qos_cfg;
@@ -834,6 +832,8 @@ struct ice_hw {
 	u8 sw_entry_point_layer;
 	u16 max_children[ICE_AQC_TOPO_MAX_LEVEL_NUM];
 	struct LIST_HEAD_TYPE agg_list;	/* lists all aggregator */
+	/* List contain profile ID(s) and other params per layer */
+	struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];
 	struct ice_vsi_ctx *vsi_ctx[ICE_MAX_VSI];
 	u8 evb_veb;		/* true for VEB, false for VEPA */
 	u8 reset_ongoing;	/* true if HW is in reset, false otherwise */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 32/40] net/ice/base: enable QinQ filter for switch advanced rule
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (30 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 31/40] net/ice/base: adjust rate limit profile ids runtime database Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 33/40] net/ice/base: create flash info structure and separate NVM version Qi Zhang
                   ` (9 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Wei Zhao

Enable QinQ type filter for switch advanced rule, it support tunnel
and non-tunnel packet use external and inner vlan id as input set
for rules, it also support session id as input set for PPPoE rule
with QinQ flag in packet.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_protocol_type.h |   8 ++
 drivers/net/ice/base/ice_switch.c        | 236 +++++++++++++++++++++++++++++--
 2 files changed, 230 insertions(+), 14 deletions(-)

diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index 4d3136fb2..e8caefd8f 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -52,6 +52,7 @@ enum ice_protocol_type {
 	ICE_AH,
 	ICE_NAT_T,
 	ICE_GTP_NO_PAY,
+	ICE_VLAN_EX,
 	ICE_PROTOCOL_LAST
 };
 
@@ -102,6 +103,12 @@ enum ice_sw_tunnel_type {
 	ICE_SW_TUN_PROFID_IPV4_PFCP_SESSION,
 	ICE_SW_TUN_PROFID_IPV6_PFCP_NODE,
 	ICE_SW_TUN_PROFID_IPV6_PFCP_SESSION,
+	ICE_SW_TUN_AND_NON_TUN_QINQ,
+	ICE_NON_TUN_QINQ,
+	ICE_SW_TUN_PPPOE_QINQ,
+	ICE_SW_TUN_PPPOE_PAY_QINQ,
+	ICE_SW_TUN_PPPOE_IPV4_QINQ,
+	ICE_SW_TUN_PPPOE_IPV6_QINQ,
 	ICE_ALL_TUNNELS /* All tunnel types including NVGRE */
 };
 
@@ -160,6 +167,7 @@ enum ice_prot_id {
 #define ICE_MAC_OFOS_HW		1
 #define ICE_MAC_IL_HW		4
 #define ICE_ETYPE_OL_HW		9
+#define ICE_VLAN_OF_HW		16
 #define ICE_VLAN_OL_HW		17
 #define ICE_IPV4_OFOS_HW	32
 #define ICE_IPV4_IL_HW		33
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 1c07c60a1..01d59edf4 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1202,6 +1202,153 @@ static const u8 dummy_ipv6_l2tpv3_pkt[] = {
 	0x00, 0x00,		/* 2 bytes for 4 bytes alignment */
 };
 
+static const struct ice_dummy_pkt_offsets dummy_qinq_ipv4_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_VLAN_EX,		14 },
+	{ ICE_VLAN_OFOS,	18 },
+	{ ICE_IPV4_OFOS,	22 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_qinq_ipv4_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x91, 0x00,
+
+	0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */
+	0x00, 0x00, 0x08, 0x00, /* ICE_VLAN_OFOS 18 */
+
+	0x45, 0x00, 0x00, 0x1c, /* ICE_IPV4_OFOS 22 */
+	0x00, 0x01, 0x00, 0x00,
+	0x00, 0x11, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00, 0x00, 0x00, /* ICE_UDP_ILOS 42 */
+	0x00, 0x08, 0x00, 0x00,
+
+	0x00, 0x00,	/* 2 bytes for 4 byte alignment */
+};
+
+static const struct ice_dummy_pkt_offsets dummy_qinq_ipv6_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_VLAN_EX,		14 },
+	{ ICE_VLAN_OFOS,	18 },
+	{ ICE_IPV6_OFOS,	22 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_qinq_ipv6_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x91, 0x00,
+
+	0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */
+	0x00, 0x00, 0x86, 0xDD, /* ICE_VLAN_OFOS 18 */
+
+	0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 22 */
+	0x00, 0x10, 0x11, 0x00, /* Next header UDP */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00, 0x00, 0x00, /* ICE_UDP_ILOS 62 */
+	0x00, 0x10, 0x00, 0x00,
+
+	0x00, 0x00, 0x00, 0x00, /* needed for ESP packets */
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00,	/* 2 bytes for 4 byte alignment */
+};
+
+static const struct ice_dummy_pkt_offsets dummy_qinq_pppoe_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_VLAN_EX,		14 },
+	{ ICE_VLAN_OFOS,	18 },
+	{ ICE_PPPOE,		22 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const
+struct ice_dummy_pkt_offsets dummy_qinq_pppoe_ipv4_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_VLAN_EX,		14 },
+	{ ICE_VLAN_OFOS,	18 },
+	{ ICE_PPPOE,		22 },
+	{ ICE_IPV4_OFOS,	30 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_qinq_pppoe_ipv4_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x91, 0x00,
+
+	0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */
+	0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 18 */
+
+	0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 22 */
+	0x00, 0x16,
+
+	0x00, 0x21,		/* PPP Link Layer 28 */
+
+	0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 30 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00,	/* 2 bytes for 4 byte alignment */
+};
+
+static const
+struct ice_dummy_pkt_offsets dummy_qinq_pppoe_packet_ipv6_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_ETYPE_OL,		12 },
+	{ ICE_VLAN_EX,		14},
+	{ ICE_VLAN_OFOS,	18 },
+	{ ICE_PPPOE,		22 },
+	{ ICE_IPV6_OFOS,	30 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_qinq_pppoe_ipv6_packet[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x91, 0x00,		/* ICE_ETYPE_OL 12 */
+
+	0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */
+	0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 18 */
+
+	0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 22 */
+	0x00, 0x2a,
+
+	0x00, 0x57,		/* PPP Link Layer 28*/
+
+	0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 30 */
+	0x00, 0x00, 0x3b, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00,		/* 2 bytes for 4 bytes alignment */
+};
+
 /* this is a recipe to profile association bitmap */
 static ice_declare_bitmap(recipe_to_profile[ICE_MAX_NUM_RECIPES],
 			  ICE_MAX_NUM_PROFILES);
@@ -1229,13 +1376,13 @@ static void ice_collect_result_idx(struct ice_aqc_recipe_data_elem *buf,
  * ice_get_tun_type_for_recipe - get tunnel type for the recipe
  * @rid: recipe ID that we are populating
  */
-static enum ice_sw_tunnel_type ice_get_tun_type_for_recipe(u8 rid)
+static enum ice_sw_tunnel_type ice_get_tun_type_for_recipe(u8 rid, bool vlan)
 {
 	u8 vxlan_profile[12] = {10, 11, 12, 16, 17, 18, 22, 23, 24, 25, 26, 27};
 	u8 gre_profile[12] = {13, 14, 15, 19, 20, 21, 28, 29, 30, 31, 32, 33};
 	u8 pppoe_profile[7] = {34, 35, 36, 37, 38, 39, 40};
 	u8 non_tun_profile[6] = {4, 5, 6, 7, 8, 9};
-	enum ice_sw_tunnel_type tun_type = ICE_NON_TUN;
+	enum ice_sw_tunnel_type tun_type;
 	u16 i, j, profile_num = 0;
 	bool non_tun_valid = false;
 	bool pppoe_valid = false;
@@ -1416,6 +1563,19 @@ static enum ice_sw_tunnel_type ice_get_tun_type_for_recipe(u8 rid)
 		}
 	}
 
+	if (vlan && tun_type == ICE_SW_TUN_PPPOE)
+		tun_type = ICE_SW_TUN_PPPOE_QINQ;
+	else if (vlan && tun_type == ICE_SW_TUN_PPPOE_IPV6)
+		tun_type = ICE_SW_TUN_PPPOE_IPV6_QINQ;
+	else if (vlan && tun_type == ICE_SW_TUN_PPPOE_IPV4)
+		tun_type = ICE_SW_TUN_PPPOE_IPV4_QINQ;
+	else if (vlan && tun_type == ICE_SW_TUN_PPPOE_PAY)
+		tun_type = ICE_SW_TUN_PPPOE_PAY_QINQ;
+	else if (vlan && tun_type == ICE_SW_TUN_AND_NON_TUN)
+		tun_type = ICE_SW_TUN_AND_NON_TUN_QINQ;
+	else if (vlan && tun_type == ICE_NON_TUN)
+		tun_type = ICE_NON_TUN_QINQ;
+
 	return tun_type;
 }
 
@@ -1440,6 +1600,7 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,
 	struct ice_prot_lkup_ext *lkup_exts;
 	enum ice_status status;
 	u8 fv_word_idx = 0;
+	bool vlan = false;
 	u16 sub_recps;
 
 	ice_zero_bitmap(result_bm, ICE_MAX_FV_WORDS);
@@ -1528,6 +1689,9 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,
 			lkup_exts->fv_words[fv_word_idx].off = off;
 			lkup_exts->field_mask[fv_word_idx] =
 				rg_entry->fv_mask[i];
+			if (prot == ICE_META_DATA_ID_HW &&
+			    off == ICE_TUN_FLAG_MDID_OFF)
+				vlan = true;
 			fv_word_idx++;
 		}
 		/* populate rg_list with the data from the child entry of this
@@ -1562,7 +1726,7 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,
 	lkup_exts->n_val_words = fv_word_idx;
 	recps[rid].big_recp = (num_recps > 1);
 	recps[rid].n_grp_count = (u8)num_recps;
-	recps[rid].tun_type = ice_get_tun_type_for_recipe(rid);
+	recps[rid].tun_type = ice_get_tun_type_for_recipe(rid, vlan);
 	recps[rid].root_buf = (struct ice_aqc_recipe_data_elem *)
 		ice_memdup(hw, tmp, recps[rid].n_grp_count *
 			   sizeof(*recps[rid].root_buf), ICE_NONDMA_TO_NONDMA);
@@ -2726,7 +2890,7 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)
 	} while (req_desc && !status);
 
 out:
-	ice_free(hw, (void *)rbuf);
+	ice_free(hw, rbuf);
 	return status;
 }
 
@@ -2982,8 +3146,7 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
 		m_ent->fltr_info.fwd_id.hw_vsi_id;
 
 	act = ICE_LG_ACT_VSI_FORWARDING | ICE_LG_ACT_VALID_BIT;
-	act |= (id << ICE_LG_ACT_VSI_LIST_ID_S) &
-		ICE_LG_ACT_VSI_LIST_ID_M;
+	act |= (id << ICE_LG_ACT_VSI_LIST_ID_S) & ICE_LG_ACT_VSI_LIST_ID_M;
 	if (m_ent->vsi_count > 1)
 		act |= ICE_LG_ACT_VSI_LIST;
 	lg_act->pdata.lg_act.act[0] = CPU_TO_LE32(act);
@@ -3064,13 +3227,11 @@ ice_add_counter_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
 	 */
 	lg_act_size = (u16)ICE_SW_RULE_LG_ACT_SIZE(num_acts);
 	rules_size = lg_act_size + ICE_SW_RULE_RX_TX_ETH_HDR_SIZE;
-	lg_act = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw,
-								 rules_size);
+	lg_act = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw, rules_size);
 	if (!lg_act)
 		return ICE_ERR_NO_MEMORY;
 
-	rx_tx = (struct ice_aqc_sw_rules_elem *)
-		((u8 *)lg_act + lg_act_size);
+	rx_tx = (struct ice_aqc_sw_rules_elem *)((u8 *)lg_act + lg_act_size);
 
 	/* Fill in the first switch rule i.e. large action */
 	lg_act->type = CPU_TO_LE16(ICE_AQC_SW_RULES_T_LG_ACT);
@@ -4525,7 +4686,8 @@ ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set,
 	hw_vsi_id = ice_get_hw_vsi_num(hw, vsi_handle);
 
 	s_rule_size = set ? ICE_SW_RULE_RX_TX_ETH_HDR_SIZE :
-			    ICE_SW_RULE_RX_TX_NO_HDR_SIZE;
+		ICE_SW_RULE_RX_TX_NO_HDR_SIZE;
+
 	s_rule = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw, s_rule_size);
 	if (!s_rule)
 		return ICE_ERR_NO_MEMORY;
@@ -5825,6 +5987,7 @@ static const struct ice_prot_ext_tbl_entry ice_prot_ext[ICE_PROTOCOL_LAST] = {
 	{ ICE_AH,		{ 0, 2, 4, 6, 8, 10 } },
 	{ ICE_NAT_T,		{ 8, 10, 12, 14 } },
 	{ ICE_GTP_NO_PAY,	{ 8, 10, 12, 14 } },
+	{ ICE_VLAN_EX,		{ 0, 2 } },
 };
 
 /* The following table describes preferred grouping of recipes.
@@ -5858,6 +6021,7 @@ static const struct ice_protocol_entry ice_prot_id_tbl[ICE_PROTOCOL_LAST] = {
 	{ ICE_AH,		ICE_AH_HW },
 	{ ICE_NAT_T,		ICE_UDP_ILOS_HW },
 	{ ICE_GTP_NO_PAY,	ICE_UDP_ILOS_HW },
+	{ ICE_VLAN_EX,		ICE_VLAN_OF_HW },
 };
 
 /**
@@ -6569,6 +6733,12 @@ static bool ice_tun_type_match_word(enum ice_sw_tunnel_type tun_type, u16 *mask)
 	case ICE_SW_TUN_NVGRE:
 	case ICE_SW_TUN_UDP:
 	case ICE_ALL_TUNNELS:
+	case ICE_SW_TUN_AND_NON_TUN_QINQ:
+	case ICE_NON_TUN_QINQ:
+	case ICE_SW_TUN_PPPOE_QINQ:
+	case ICE_SW_TUN_PPPOE_PAY_QINQ:
+	case ICE_SW_TUN_PPPOE_IPV4_QINQ:
+	case ICE_SW_TUN_PPPOE_IPV6_QINQ:
 		*mask = ICE_TUN_FLAG_MASK;
 		return true;
 
@@ -6627,6 +6797,7 @@ ice_get_compat_fv_bitmap(struct ice_hw *hw, struct ice_adv_rule_info *rinfo,
 
 	switch (rinfo->tun_type) {
 	case ICE_NON_TUN:
+	case ICE_NON_TUN_QINQ:
 		prof_type = ICE_PROF_NON_TUN;
 		break;
 	case ICE_ALL_TUNNELS:
@@ -6645,12 +6816,15 @@ ice_get_compat_fv_bitmap(struct ice_hw *hw, struct ice_adv_rule_info *rinfo,
 		prof_type = ICE_PROF_TUN_GRE;
 		break;
 	case ICE_SW_TUN_PPPOE:
+	case ICE_SW_TUN_PPPOE_QINQ:
 		prof_type = ICE_PROF_TUN_PPPOE;
 		break;
 	case ICE_SW_TUN_PPPOE_PAY:
+	case ICE_SW_TUN_PPPOE_PAY_QINQ:
 		ice_set_bit(ICE_PROFID_PPPOE_PAY, bm);
 		return;
 	case ICE_SW_TUN_PPPOE_IPV4:
+	case ICE_SW_TUN_PPPOE_IPV4_QINQ:
 		ice_set_bit(ICE_PROFID_PPPOE_IPV4_OTHER, bm);
 		ice_set_bit(ICE_PROFID_PPPOE_IPV4_UDP, bm);
 		ice_set_bit(ICE_PROFID_PPPOE_IPV4_TCP, bm);
@@ -6662,6 +6836,7 @@ ice_get_compat_fv_bitmap(struct ice_hw *hw, struct ice_adv_rule_info *rinfo,
 		ice_set_bit(ICE_PROFID_PPPOE_IPV4_UDP, bm);
 		return;
 	case ICE_SW_TUN_PPPOE_IPV6:
+	case ICE_SW_TUN_PPPOE_IPV6_QINQ:
 		ice_set_bit(ICE_PROFID_PPPOE_IPV6_OTHER, bm);
 		ice_set_bit(ICE_PROFID_PPPOE_IPV6_UDP, bm);
 		ice_set_bit(ICE_PROFID_PPPOE_IPV6_TCP, bm);
@@ -6757,6 +6932,7 @@ ice_get_compat_fv_bitmap(struct ice_hw *hw, struct ice_adv_rule_info *rinfo,
 		ice_set_bit(ICE_PROFID_IPV6_GTPU_IPV6_TCP, bm);
 		return;
 	case ICE_SW_TUN_AND_NON_TUN:
+	case ICE_SW_TUN_AND_NON_TUN_QINQ:
 	default:
 		prof_type = ICE_PROF_ALL;
 		break;
@@ -7046,6 +7222,38 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
 			tcp = true;
 	}
 
+	if ((tun_type == ICE_SW_TUN_AND_NON_TUN_QINQ ||
+	     tun_type == ICE_NON_TUN_QINQ) && ipv6) {
+		*pkt = dummy_qinq_ipv6_pkt;
+		*pkt_len = sizeof(dummy_qinq_ipv6_pkt);
+		*offsets = dummy_qinq_ipv6_packet_offsets;
+		return;
+	} else if (tun_type == ICE_SW_TUN_AND_NON_TUN_QINQ ||
+			   tun_type == ICE_NON_TUN_QINQ) {
+		*pkt = dummy_qinq_ipv4_pkt;
+		*pkt_len = sizeof(dummy_qinq_ipv4_pkt);
+		*offsets = dummy_qinq_ipv4_packet_offsets;
+		return;
+	}
+
+	if (tun_type == ICE_SW_TUN_PPPOE_IPV6_QINQ) {
+		*pkt = dummy_qinq_pppoe_ipv6_packet;
+		*pkt_len = sizeof(dummy_qinq_pppoe_ipv6_packet);
+		*offsets = dummy_qinq_pppoe_packet_ipv6_offsets;
+		return;
+	} else if (tun_type == ICE_SW_TUN_PPPOE_IPV4_QINQ) {
+		*pkt = dummy_qinq_pppoe_ipv4_pkt;
+		*pkt_len = sizeof(dummy_qinq_pppoe_ipv4_pkt);
+		*offsets = dummy_qinq_pppoe_ipv4_packet_offsets;
+		return;
+	} else if (tun_type == ICE_SW_TUN_PPPOE_QINQ ||
+			tun_type == ICE_SW_TUN_PPPOE_PAY_QINQ) {
+		*pkt = dummy_qinq_pppoe_ipv4_pkt;
+		*pkt_len = sizeof(dummy_qinq_pppoe_ipv4_pkt);
+		*offsets = dummy_qinq_pppoe_packet_offsets;
+		return;
+	}
+
 	if (tun_type == ICE_SW_TUN_IPV4_GTPU_NO_PAY) {
 		*pkt = dummy_ipv4_gtpu_ipv4_packet;
 		*pkt_len = sizeof(dummy_ipv4_gtpu_ipv4_packet);
@@ -7364,6 +7572,7 @@ ice_fill_adv_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
 			len = sizeof(struct ice_ethtype_hdr);
 			break;
 		case ICE_VLAN_OFOS:
+		case ICE_VLAN_EX:
 			len = sizeof(struct ice_vlan_hdr);
 			break;
 		case ICE_IPV4_OFOS:
@@ -8038,9 +8247,8 @@ ice_rem_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
 		u16 rule_buf_sz;
 
 		rule_buf_sz = ICE_SW_RULE_RX_TX_NO_HDR_SIZE;
-		s_rule =
-			(struct ice_aqc_sw_rules_elem *)ice_malloc(hw,
-								   rule_buf_sz);
+		s_rule = (struct ice_aqc_sw_rules_elem *)
+			ice_malloc(hw, rule_buf_sz);
 		if (!s_rule)
 			return ICE_ERR_NO_MEMORY;
 		s_rule->pdata.lkup_tx_rx.act = 0;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 33/40] net/ice/base: create flash info structure and separate NVM version
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (31 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 32/40] net/ice/base: enable QinQ filter for switch advanced rule Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 34/40] net/ice/base: remove unused parameter Qi Zhang
                   ` (8 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Jacob Keller

The ice_nvm_info structure has become somewhat of a dumping ground for
all of the fields related to flash version. It holds the NVM version and
EETRACK id, the OptionROM info structure, the flash size, the ShadowRAM
size, and more.

A future change is going to add the ability to read the NVM version and
EETRACK ID from the inactive NVM bank. To make this simpler, it is
useful to have these NVM version info fields extracted to their own
structure.

Rename ice_nvm_info into ice_flash_info, and create a separate
ice_nvm_info structure that will contain the eetrack and NVM map
version. Move the netlist_ver structure into ice_flash_info and rename it
ice_netlist_info for consistency.

Modify the static ice_get_orom_ver_info to take the option rom structure
as a pointer. This makes it more obvious what portion of the hw struct
is being modified. Do the same for ice_get_netlist_ver_info.

Introduce a new ice_get_nvm_ver_info function, which will be similar to
ice_get_orom_ver_info and ice_get_netlist_ver_info, used to keep the NVM
version extraction code co-located.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c |   7 +--
 drivers/net/ice/base/ice_nvm.c    | 108 +++++++++++++++++++-------------------
 drivers/net/ice/base/ice_type.h   |  15 ++++--
 drivers/net/ice/ice_ethdev.c      |  14 ++---
 4 files changed, 75 insertions(+), 69 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index d917f8be7..1b98802d9 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -675,13 +675,14 @@ static void ice_get_itr_intrl_gran(struct ice_hw *hw)
 void ice_print_rollback_msg(struct ice_hw *hw)
 {
 	char nvm_str[ICE_NVM_VER_LEN] = { 0 };
-	struct ice_nvm_info *nvm = &hw->nvm;
 	struct ice_orom_info *orom;
+	struct ice_nvm_info *nvm;
 
-	orom = &nvm->orom;
+	orom = &hw->flash.orom;
+	nvm = &hw->flash.nvm;
 
 	SNPRINTF(nvm_str, sizeof(nvm_str), "%x.%02x 0x%x %d.%d.%d",
-		 nvm->major_ver, nvm->minor_ver, nvm->eetrack, orom->major,
+		 nvm->major, nvm->minor, nvm->eetrack, orom->major,
 		 orom->build, orom->patch);
 	ice_warn(hw,
 		 "Firmware rollback mode detected. Current version is NVM: %s, FW: %d.%d. Device may exhibit limited functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware rollback mode\n",
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 5df07133b..56a2346a3 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -77,7 +77,7 @@ ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,
 	*length = 0;
 
 	/* Verify the length of the read if this is for the Shadow RAM */
-	if (read_shadow_ram && ((offset + inlen) > (hw->nvm.sr_words * 2u))) {
+	if (read_shadow_ram && ((offset + inlen) > (hw->flash.sr_words * 2u))) {
 		ice_debug(hw, ICE_DBG_NVM, "NVM error: requested data is beyond Shadow RAM limit\n");
 		return ICE_ERR_PARAM;
 	}
@@ -190,7 +190,7 @@ ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access)
 {
 	ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
 
-	if (hw->nvm.blank_nvm_mode)
+	if (hw->flash.blank_nvm_mode)
 		return ICE_SUCCESS;
 
 	return ice_acquire_res(hw, ICE_NVM_RES_ID, access, ICE_NVM_TIMEOUT);
@@ -206,7 +206,7 @@ void ice_release_nvm(struct ice_hw *hw)
 {
 	ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
 
-	if (hw->nvm.blank_nvm_mode)
+	if (hw->flash.blank_nvm_mode)
 		return;
 
 	ice_release_res(hw, ICE_NVM_RES_ID);
@@ -359,16 +359,55 @@ ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size)
 }
 
 /**
+ * ice_get_nvm_ver_info - Read NVM version information
+ * @hw: pointer to the HW struct
+ * @nvm: pointer to NVM info structure
+ *
+ * Read the NVM EETRACK ID and map version of the main NVM image bank, filling
+ * in the nvm info structure.
+ */
+static enum ice_status
+ice_get_nvm_ver_info(struct ice_hw *hw, struct ice_nvm_info *nvm)
+{
+	u16 eetrack_lo, eetrack_hi, ver;
+	enum ice_status status;
+
+	status = ice_read_sr_word(hw, ICE_SR_NVM_DEV_STARTER_VER, &ver);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to read DEV starter version.\n");
+		return status;
+	}
+	nvm->major = (ver & ICE_NVM_VER_HI_MASK) >> ICE_NVM_VER_HI_SHIFT;
+	nvm->minor = (ver & ICE_NVM_VER_LO_MASK) >> ICE_NVM_VER_LO_SHIFT;
+
+	status = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_LO, &eetrack_lo);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to read EETRACK lo.\n");
+		return status;
+	}
+	status = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_HI, &eetrack_hi);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to read EETRACK hi.\n");
+		return status;
+	}
+
+	nvm->eetrack = (eetrack_hi << 16) | eetrack_lo;
+
+	return ICE_SUCCESS;
+}
+
+/**
  * ice_get_orom_ver_info - Read Option ROM version information
  * @hw: pointer to the HW struct
+ * @orom: pointer to Option ROM info structure
  *
  * Read the Combo Image version data from the Boot Configuration TLV and fill
  * in the option ROM version data.
  */
-static enum ice_status ice_get_orom_ver_info(struct ice_hw *hw)
+static enum ice_status
+ice_get_orom_ver_info(struct ice_hw *hw, struct ice_orom_info *orom)
 {
 	u16 combo_hi, combo_lo, boot_cfg_tlv, boot_cfg_tlv_len;
-	struct ice_orom_info *orom = &hw->nvm.orom;
 	enum ice_status status;
 	u32 combo_ver;
 
@@ -455,7 +494,7 @@ static enum ice_status ice_discover_flash_size(struct ice_hw *hw)
 
 	ice_debug(hw, ICE_DBG_NVM, "Predicted flash size is %u bytes\n", max_size);
 
-	hw->nvm.flash_size = max_size;
+	hw->flash.flash_size = max_size;
 
 err_read_flat_nvm:
 	ice_release_nvm(hw);
@@ -472,8 +511,7 @@ static enum ice_status ice_discover_flash_size(struct ice_hw *hw)
  */
 enum ice_status ice_init_nvm(struct ice_hw *hw)
 {
-	struct ice_nvm_info *nvm = &hw->nvm;
-	u16 eetrack_lo, eetrack_hi, ver;
+	struct ice_flash_info *flash = &hw->flash;
 	enum ice_status status;
 	u32 fla, gens_stat;
 	u8 sr_size;
@@ -487,70 +525,32 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)
 	sr_size = (gens_stat & GLNVM_GENS_SR_SIZE_M) >> GLNVM_GENS_SR_SIZE_S;
 
 	/* Switching to words (sr_size contains power of 2) */
-	nvm->sr_words = BIT(sr_size) * ICE_SR_WORDS_IN_1KB;
+	flash->sr_words = BIT(sr_size) * ICE_SR_WORDS_IN_1KB;
 
 	/* Check if we are in the normal or blank NVM programming mode */
 	fla = rd32(hw, GLNVM_FLA);
 	if (fla & GLNVM_FLA_LOCKED_M) { /* Normal programming mode */
-		nvm->blank_nvm_mode = false;
+		flash->blank_nvm_mode = false;
 	} else {
 		/* Blank programming mode */
-		nvm->blank_nvm_mode = true;
+		flash->blank_nvm_mode = true;
 		ice_debug(hw, ICE_DBG_NVM, "NVM init error: unsupported blank mode.\n");
 		return ICE_ERR_NVM_BLANK_MODE;
 	}
 
-	status = ice_read_sr_word(hw, ICE_SR_NVM_DEV_STARTER_VER, &ver);
-	if (status) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Failed to read DEV starter version.\n");
-		return status;
-	}
-	nvm->major_ver = (ver & ICE_NVM_VER_HI_MASK) >> ICE_NVM_VER_HI_SHIFT;
-	nvm->minor_ver = (ver & ICE_NVM_VER_LO_MASK) >> ICE_NVM_VER_LO_SHIFT;
-
-	status = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_LO, &eetrack_lo);
-	if (status) {
-		ice_debug(hw, ICE_DBG_INIT, "Failed to read EETRACK lo.\n");
-		return status;
-	}
-	status = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_HI, &eetrack_hi);
-	if (status) {
-		ice_debug(hw, ICE_DBG_INIT, "Failed to read EETRACK hi.\n");
-		return status;
-	}
-
-	nvm->eetrack = (eetrack_hi << 16) | eetrack_lo;
-
 	status = ice_discover_flash_size(hw);
 	if (status) {
-		ice_debug(hw, ICE_DBG_NVM,
-			  "NVM init error: failed to discover flash size.\n");
+		ice_debug(hw, ICE_DBG_NVM, "NVM init error: failed to discover flash size.\n");
 		return status;
 	}
 
-	switch (hw->device_id) {
-	/* the following devices do not have boot_cfg_tlv yet */
-	case ICE_DEV_ID_E822C_BACKPLANE:
-	case ICE_DEV_ID_E822C_QSFP:
-	case ICE_DEV_ID_E822C_10G_BASE_T:
-	case ICE_DEV_ID_E822C_SGMII:
-	case ICE_DEV_ID_E822C_SFP:
-	case ICE_DEV_ID_E822L_BACKPLANE:
-	case ICE_DEV_ID_E822L_SFP:
-	case ICE_DEV_ID_E822L_10G_BASE_T:
-	case ICE_DEV_ID_E822L_SGMII:
-	case ICE_DEV_ID_E823L_BACKPLANE:
-	case ICE_DEV_ID_E823L_SFP:
-	case ICE_DEV_ID_E823L_10G_BASE_T:
-	case ICE_DEV_ID_E823L_1GBE:
-	case ICE_DEV_ID_E823L_QSFP:
+	status = ice_get_nvm_ver_info(hw, &flash->nvm);
+	if (status) {
+		ice_debug(hw, ICE_DBG_INIT, "Failed to read NVM info.\n");
 		return status;
-	default:
-		break;
 	}
 
-	status = ice_get_orom_ver_info(hw);
+	status = ice_get_orom_ver_info(hw, &flash->orom);
 	if (status) {
 		ice_debug(hw, ICE_DBG_INIT, "Failed to read Option ROM info.\n");
 		return status;
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 9c2fb560e..9e9a2198d 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -511,14 +511,19 @@ struct ice_orom_info {
 	u16 build;			/* Build version of OROM */
 };
 
-/* NVM Information */
+/* NVM version information */
 struct ice_nvm_info {
+	u32 eetrack;
+	u8 major;
+	u8 minor;
+};
+
+/* Flash Chip Information */
+struct ice_flash_info {
 	struct ice_orom_info orom;	/* Option ROM version info */
-	u32 eetrack;			/* NVM data version */
+	struct ice_nvm_info nvm;	/* NVM version information */
 	u16 sr_words;			/* Shadow RAM size in words */
 	u32 flash_size;			/* Size of available flash in bytes */
-	u8 major_ver;			/* major version of dev starter */
-	u8 minor_ver;			/* minor version of dev starter */
 	u8 blank_nvm_mode;		/* is NVM empty (no FW present) */
 };
 
@@ -838,7 +843,7 @@ struct ice_hw {
 	u8 evb_veb;		/* true for VEB, false for VEPA */
 	u8 reset_ongoing;	/* true if HW is in reset, false otherwise */
 	struct ice_bus_info bus;
-	struct ice_nvm_info nvm;
+	struct ice_flash_info flash;
 	struct ice_hw_dev_caps dev_caps;	/* device capabilities */
 	struct ice_hw_func_caps func_caps;	/* function capabilities */
 
diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index b0a7a6707..982b24458 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -4407,15 +4407,15 @@ ice_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
 	u16 build;
 	int ret;
 
-	ver = hw->nvm.orom.major;
-	patch = hw->nvm.orom.patch;
-	build = hw->nvm.orom.build;
+	ver = hw->flash.orom.major;
+	patch = hw->flash.orom.patch;
+	build = hw->flash.orom.build;
 
 	ret = snprintf(fw_version, fw_size,
 			"%d.%d 0x%08x %d.%d.%d",
-			hw->nvm.major_ver,
-			hw->nvm.minor_ver,
-			hw->nvm.eetrack,
+			hw->flash.nvm.major,
+			hw->flash.nvm.minor,
+			hw->flash.nvm.eetrack,
 			ver, build, patch);
 
 	/* add the size of '\0' */
@@ -4513,7 +4513,7 @@ ice_get_eeprom_length(struct rte_eth_dev *dev)
 {
 	struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 
-	return hw->nvm.flash_size;
+	return hw->flash.flash_size;
 }
 
 static int
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 34/40] net/ice/base: remove unused parameter
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (32 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 33/40] net/ice/base: create flash info structure and separate NVM version Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 35/40] net/ice/base: minor code clean Qi Zhang
                   ` (7 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang

remove unused parameter of ice_parse_fdir_func_caps

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 1b98802d9..879a7d16a 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1942,13 +1942,11 @@ ice_parse_vsi_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,
  * ice_parse_fdir_func_caps - Parse ICE_AQC_CAPS_FD function caps
  * @hw: pointer to the HW struct
  * @func_p: pointer to function capabilities structure
- * @cap: pointer to the capability element to parse
  *
  * Extract function capabilities for ICE_AQC_CAPS_FD.
  */
 static void
-ice_parse_fdir_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,
-			 struct ice_aqc_list_caps_elem *cap)
+ice_parse_fdir_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p)
 {
 	u32 reg_val, val;
 
@@ -2006,7 +2004,7 @@ ice_parse_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,
 			ice_parse_vsi_func_caps(hw, func_p, &cap_resp[i]);
 			break;
 		case ICE_AQC_CAPS_FD:
-			ice_parse_fdir_func_caps(hw, func_p, &cap_resp[i]);
+			ice_parse_fdir_func_caps(hw, func_p);
 			break;
 		default:
 			/* Don't list common capabilities as unknown */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 35/40] net/ice/base: minor code clean
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (33 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 34/40] net/ice/base: remove unused parameter Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 36/40] net/ice/base: cache NVM module bank information Qi Zhang
                   ` (6 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang

Remove unnecessary mac_type check, fix couple comment, and remove
unnecessary empty line.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 7 +------
 drivers/net/ice/base/ice_flow.c   | 9 ++++-----
 2 files changed, 5 insertions(+), 11 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 879a7d16a..9d8f78fdc 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -782,8 +782,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
 				     ICE_AQC_REPORT_TOPO_CAP, pcaps, NULL);
 	ice_free(hw, pcaps);
 	if (status)
-		ice_debug(hw, ICE_DBG_PHY, "%s: Get PHY capabilities failed, continuing anyway\n",
-			  __func__);
+		ice_debug(hw, ICE_DBG_PHY, "Get PHY capabilities failed, continuing anyway\n");
 
 	/* Initialize port_info struct with link information */
 	status = ice_aq_get_link_info(hw->port_info, false, NULL, NULL);
@@ -4632,10 +4631,6 @@ enum ice_fw_modes ice_get_fw_mode(struct ice_hw *hw)
  */
 bool ice_fw_supports_link_override(struct ice_hw *hw)
 {
-	/* Currently, only supported for E810 devices */
-	if (hw->mac_type != ICE_MAC_E810)
-		return false;
-
 	if (hw->api_maj_ver == ICE_FW_API_LINK_OVERRIDE_MAJ) {
 		if (hw->api_min_ver > ICE_FW_API_LINK_OVERRIDE_MIN)
 			return true;
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index b093955d3..c73eced80 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -2818,7 +2818,7 @@ ice_flow_acl_add_scen_entry_sync(struct ice_hw *hw, struct ice_flow_prof *prof,
 	if (!entry || !(*entry) || !prof)
 		return ICE_ERR_BAD_PTR;
 
-	e = *(entry);
+	e = *entry;
 
 	do_chg_rng_chk = false;
 	if (e->range_buf) {
@@ -3236,8 +3236,7 @@ ice_flow_add_fld_raw(struct ice_flow_seg_info *seg, u16 off, u8 len,
 	(ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6)
 
 #define ICE_FLOW_RSS_SEG_HDR_L4_MASKS \
-	(ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | \
-	 ICE_FLOW_SEG_HDR_SCTP)
+	(ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_SCTP)
 
 #define ICE_FLOW_RSS_SEG_HDR_VAL_MASKS \
 	(ICE_FLOW_RSS_SEG_HDR_L2_MASKS | \
@@ -3573,7 +3572,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
 	if (status)
 		goto exit;
 
-	/* don't do RSS for GTPU outer */
+	/* Don't do RSS for GTPU Outer */
 	if (segs_cnt == ICE_RSS_OUTER_HEADERS &&
 	    segs[segs_cnt - 1].hdrs & ICE_FLOW_SEG_HDR_GTPU) {
 		status = ICE_SUCCESS;
@@ -3696,7 +3695,6 @@ ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
 	ice_acquire_lock(&hw->rss_locks);
 	status = ice_add_rss_cfg_sync(hw, vsi_handle, hashed_flds, addl_hdrs,
 				      ICE_RSS_OUTER_HEADERS, symm);
-
 	if (!status)
 		status = ice_add_rss_cfg_sync(hw, vsi_handle, hashed_flds,
 					      addl_hdrs, ICE_RSS_INNER_HEADERS,
@@ -3736,6 +3734,7 @@ ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
 	if (status)
 		goto out;
 
+	/* Don't do RSS for GTPU Outer */
 	if (segs_cnt == ICE_RSS_OUTER_HEADERS &&
 	    segs[segs_cnt - 1].hdrs & ICE_FLOW_SEG_HDR_GTPU) {
 		status = ICE_SUCCESS;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 36/40] net/ice/base: cache NVM module bank information
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (34 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 35/40] net/ice/base: minor code clean Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 37/40] net/ice/base: rename function Qi Zhang
                   ` (5 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Jacob Keller

The ice flash contains two copies of each of the NVM, Option ROM, and
Netlist modules. Each bank has a pointer word and a size word. In order
to correctly read from the active flash bank, the driver must calculate
the offset manually.

During NVM initialization, read the Shadow RAM control word and
determine which bank is active for each NVM module. Additionally, cache
the size and pointer values for use in calculating the correct offset.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_nvm.c  | 151 ++++++++++++++++++++++++++++++++++++++++
 drivers/net/ice/base/ice_type.h |  29 ++++++++
 2 files changed, 180 insertions(+)

diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 56a2346a3..61af767ed 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -503,6 +503,151 @@ static enum ice_status ice_discover_flash_size(struct ice_hw *hw)
 }
 
 /**
+ * ice_read_sr_pointer - Read the value of a Shadow RAM pointer word
+ * @hw: pointer to the HW structure
+ * @offset: the word offset of the Shadow RAM word to read
+ * @pointer: pointer value read from Shadow RAM
+ *
+ * Read the given Shadow RAM word, and convert it to a pointer value specified
+ * in bytes. This function assumes the specified offset is a valid pointer
+ * word.
+ *
+ * Each pointer word specifies whether it is stored in word size or 4KB
+ * sector size by using the highest bit. The reported pointer value will be in
+ * bytes, intended for flat NVM reads.
+ */
+static enum ice_status
+ice_read_sr_pointer(struct ice_hw *hw, u16 offset, u32 *pointer)
+{
+	enum ice_status status;
+	u16 value;
+
+	status = ice_read_sr_word(hw, offset, &value);
+	if (status)
+		return status;
+
+	/* Determine if the pointer is in 4KB or word units */
+	if (value & ICE_SR_NVM_PTR_4KB_UNITS)
+		*pointer = (value & ~ICE_SR_NVM_PTR_4KB_UNITS) * 4 * 1024;
+	else
+		*pointer = value * 2;
+
+	return ICE_SUCCESS;
+}
+
+/**
+ * ice_read_sr_area_size - Read an area size from a Shadow RAM word
+ * @hw: pointer to the HW structure
+ * @offset: the word offset of the Shadow RAM to read
+ * @size: size value read from the Shadow RAM
+ *
+ * Read the given Shadow RAM word, and convert it to an area size value
+ * specified in bytes. This function assumes the specified offset is a valid
+ * area size word.
+ *
+ * Each area size word is specified in 4KB sector units. This function reports
+ * the size in bytes, intended for flat NVM reads.
+ */
+static enum ice_status
+ice_read_sr_area_size(struct ice_hw *hw, u16 offset, u32 *size)
+{
+	enum ice_status status;
+	u16 value;
+
+	status = ice_read_sr_word(hw, offset, &value);
+	if (status)
+		return status;
+
+	/* Area sizes are always specified in 4KB units */
+	*size = value * 4 * 1024;
+
+	return ICE_SUCCESS;
+}
+
+/**
+ * ice_determine_active_flash_banks - Discover active bank for each module
+ * @hw: pointer to the HW struct
+ *
+ * Read the Shadow RAM control word and determine which banks are active for
+ * the NVM, OROM, and Netlist modules. Also read and calculate the associated
+ * pointer and size. These values are then cached into the ice_flash_info
+ * structure for later use in order to calculate the correct offset to read
+ * from the active module.
+ */
+static enum ice_status
+ice_determine_active_flash_banks(struct ice_hw *hw)
+{
+	struct ice_bank_info *banks = &hw->flash.banks;
+	enum ice_status status;
+	u16 ctrl_word;
+
+	status = ice_read_sr_word(hw, ICE_SR_NVM_CTRL_WORD, &ctrl_word);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to read the Shadow RAM control word\n");
+		return status;
+	}
+
+	/* Check that the control word indicates validity */
+	if ((ctrl_word & ICE_SR_CTRL_WORD_1_M) >> ICE_SR_CTRL_WORD_1_S != ICE_SR_CTRL_WORD_VALID) {
+		ice_debug(hw, ICE_DBG_NVM, "Shadow RAM control word is invalid\n");
+		return ICE_ERR_CFG;
+	}
+
+	if (!(ctrl_word & ICE_SR_CTRL_WORD_NVM_BANK))
+		banks->nvm_bank = ICE_1ST_FLASH_BANK;
+	else
+		banks->nvm_bank = ICE_2ND_FLASH_BANK;
+
+	if (!(ctrl_word & ICE_SR_CTRL_WORD_OROM_BANK))
+		banks->orom_bank = ICE_1ST_FLASH_BANK;
+	else
+		banks->orom_bank = ICE_2ND_FLASH_BANK;
+
+	if (!(ctrl_word & ICE_SR_CTRL_WORD_NETLIST_BANK))
+		banks->netlist_bank = ICE_1ST_FLASH_BANK;
+	else
+		banks->netlist_bank = ICE_2ND_FLASH_BANK;
+
+	status = ice_read_sr_pointer(hw, ICE_SR_1ST_NVM_BANK_PTR, &banks->nvm_ptr);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to read NVM bank pointer\n");
+		return status;
+	}
+
+	status = ice_read_sr_area_size(hw, ICE_SR_NVM_BANK_SIZE, &banks->nvm_size);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to read NVM bank area size\n");
+		return status;
+	}
+
+	status = ice_read_sr_pointer(hw, ICE_SR_1ST_OROM_BANK_PTR, &banks->orom_ptr);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to read OROM bank pointer\n");
+		return status;
+	}
+
+	status = ice_read_sr_area_size(hw, ICE_SR_OROM_BANK_SIZE, &banks->orom_size);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to read OROM bank area size\n");
+		return status;
+	}
+
+	status = ice_read_sr_pointer(hw, ICE_SR_NETLIST_BANK_PTR, &banks->netlist_ptr);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to read Netlist bank pointer\n");
+		return status;
+	}
+
+	status = ice_read_sr_area_size(hw, ICE_SR_NETLIST_BANK_SIZE, &banks->netlist_size);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to read Netlist bank area size\n");
+		return status;
+	}
+
+	return ICE_SUCCESS;
+}
+
+/**
  * ice_init_nvm - initializes NVM setting
  * @hw: pointer to the HW struct
  *
@@ -544,6 +689,12 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)
 		return status;
 	}
 
+	status = ice_determine_active_flash_banks(hw);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to determine active flash banks.\n");
+		return status;
+	}
+
 	status = ice_get_nvm_ver_info(hw, &flash->nvm);
 	if (status) {
 		ice_debug(hw, ICE_DBG_INIT, "Failed to read NVM info.\n");
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 9e9a2198d..1e1c672cb 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -518,10 +518,33 @@ struct ice_nvm_info {
 	u8 minor;
 };
 
+/* Enumeration of possible flash banks for the NVM, OROM, and Netlist modules
+ * of the flash image.
+ */
+enum ice_flash_bank {
+	ICE_INVALID_FLASH_BANK,
+	ICE_1ST_FLASH_BANK,
+	ICE_2ND_FLASH_BANK,
+};
+
+/* information for accessing NVM, OROM, and Netlist flash banks */
+struct ice_bank_info {
+	u32 nvm_ptr;				/* Pointer to 1st NVM bank */
+	u32 nvm_size;				/* Size of NVM bank */
+	u32 orom_ptr;				/* Pointer to 1st OROM bank */
+	u32 orom_size;				/* Size of OROM bank */
+	u32 netlist_ptr;			/* Pointer to 1st Netlist bank */
+	u32 netlist_size;			/* Size of Netlist bank */
+	enum ice_flash_bank nvm_bank;		/* Active NVM bank */
+	enum ice_flash_bank orom_bank;		/* Active OROM bank */
+	enum ice_flash_bank netlist_bank;	/* Active Netlist bank */
+};
+
 /* Flash Chip Information */
 struct ice_flash_info {
 	struct ice_orom_info orom;	/* Option ROM version info */
 	struct ice_nvm_info nvm;	/* NVM version information */
+	struct ice_bank_info banks;	/* Flash Bank information */
 	u16 sr_words;			/* Shadow RAM size in words */
 	u32 flash_size;			/* Size of available flash in bytes */
 	u8 blank_nvm_mode;		/* is NVM empty (no FW present) */
@@ -1099,6 +1122,12 @@ enum ice_sw_fwd_act_type {
 #define ICE_SR_PCIE_ALT_SIZE_WORDS	512
 #define ICE_SR_CTRL_WORD_1_S		0x06
 #define ICE_SR_CTRL_WORD_1_M		(0x03 << ICE_SR_CTRL_WORD_1_S)
+#define ICE_SR_CTRL_WORD_VALID		0x1
+#define ICE_SR_CTRL_WORD_OROM_BANK	BIT(3)
+#define ICE_SR_CTRL_WORD_NETLIST_BANK	BIT(4)
+#define ICE_SR_CTRL_WORD_NVM_BANK	BIT(5)
+
+#define ICE_SR_NVM_PTR_4KB_UNITS	BIT(15)
 
 /* Shadow RAM related */
 #define ICE_SR_SECTOR_SIZE_IN_WORDS	0x800
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 37/40] net/ice/base: rename function
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (35 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 36/40] net/ice/base: cache NVM module bank information Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 38/40] net/ice/base: remove unnecessary conditional Qi Zhang
                   ` (4 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Tony Nguyen

'xtrct' or 'xtract' is currently used in the code to shorten 'extract'.
Rename ice_prgm_acl_prof_extrt() to ice_prgm_acl_prof_xtrct() so we don't
have another variation of a 'extract'.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_acl.c  | 4 ++--
 drivers/net/ice/base/ice_acl.h  | 2 +-
 drivers/net/ice/base/ice_flow.c | 5 ++---
 3 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/net/ice/base/ice_acl.c b/drivers/net/ice/base/ice_acl.c
index 435a0cb51..763cd2af9 100644
--- a/drivers/net/ice/base/ice_acl.c
+++ b/drivers/net/ice/base/ice_acl.c
@@ -288,7 +288,7 @@ ice_acl_prof_aq_send(struct ice_hw *hw, u16 opc, u8 prof_id,
 }
 
 /**
- * ice_prgm_acl_prof_extrt - program ACL profile extraction sequence
+ * ice_prgm_acl_prof_xtrct - program ACL profile extraction sequence
  * @hw: pointer to the HW struct
  * @prof_id: profile ID
  * @buf: ptr to buffer
@@ -297,7 +297,7 @@ ice_acl_prof_aq_send(struct ice_hw *hw, u16 opc, u8 prof_id,
  * Program ACL profile extraction (indirect 0x0C1D)
  */
 enum ice_status
-ice_prgm_acl_prof_extrt(struct ice_hw *hw, u8 prof_id,
+ice_prgm_acl_prof_xtrct(struct ice_hw *hw, u8 prof_id,
 			struct ice_aqc_acl_prof_generic_frmt *buf,
 			struct ice_sq_cd *cd)
 {
diff --git a/drivers/net/ice/base/ice_acl.h b/drivers/net/ice/base/ice_acl.h
index be27a545b..f87a0aa79 100644
--- a/drivers/net/ice/base/ice_acl.h
+++ b/drivers/net/ice/base/ice_acl.h
@@ -158,7 +158,7 @@ ice_aq_query_actpair(struct ice_hw *hw, u8 act_mem_idx, u16 act_entry_idx,
 		     struct ice_aqc_actpair *buf, struct ice_sq_cd *cd);
 enum ice_status ice_aq_dealloc_acl_res(struct ice_hw *hw, struct ice_sq_cd *cd);
 enum ice_status
-ice_prgm_acl_prof_extrt(struct ice_hw *hw, u8 prof_id,
+ice_prgm_acl_prof_xtrct(struct ice_hw *hw, u8 prof_id,
 			struct ice_aqc_acl_prof_generic_frmt *buf,
 			struct ice_sq_cd *cd);
 enum ice_status
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index c73eced80..b7705687c 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1780,7 +1780,7 @@ ice_flow_acl_disassoc_scen(struct ice_hw *hw, struct ice_flow_prof *prof)
 
 	/* Clear scenario for this PF */
 	buf.pf_scenario_num[hw->pf_id] = ICE_ACL_INVALID_SCEN;
-	status = ice_prgm_acl_prof_extrt(hw, prof_id, &buf, NULL);
+	status = ice_prgm_acl_prof_xtrct(hw, prof_id, &buf, NULL);
 
 	return status;
 }
@@ -2082,7 +2082,7 @@ ice_flow_acl_set_xtrct_seq(struct ice_hw *hw, struct ice_flow_prof *prof)
 
 	/* Update the current PF */
 	buf.pf_scenario_num[hw->pf_id] = (u8)prof->cfg.scen->id;
-	status = ice_prgm_acl_prof_extrt(hw, prof_id, &buf, NULL);
+	status = ice_prgm_acl_prof_xtrct(hw, prof_id, &buf, NULL);
 
 	return status;
 }
@@ -2510,7 +2510,6 @@ ice_flow_acl_frmt_entry(struct ice_hw *hw, struct ice_flow_prof *prof,
 	e->acts = (struct ice_flow_action *)
 		ice_memdup(hw, acts, acts_cnt * sizeof(*acts),
 			   ICE_NONDMA_TO_NONDMA);
-
 	if (!e->acts)
 		goto out;
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 38/40] net/ice/base: remove unnecessary conditional
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (36 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 37/40] net/ice/base: rename function Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 39/40] net/ice/base: rename ACL priority values Qi Zhang
                   ` (3 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Bruce Allan

These two conditional statements are unnecessary because the condition
is always true based on existing code flow.  Remove them to resolve
potential errors from some static analysis tools.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_flow.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index b7705687c..e0920c73f 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1089,7 +1089,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
 		 */
 		if (fld == ICE_FLOW_FIELD_IDX_IPV4_TTL)
 			sib = ICE_FLOW_FIELD_IDX_IPV4_PROT;
-		else if (fld == ICE_FLOW_FIELD_IDX_IPV4_PROT)
+		else
 			sib = ICE_FLOW_FIELD_IDX_IPV4_TTL;
 
 		/* If the sibling field is also included, that field's
@@ -1108,7 +1108,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
 		 */
 		if (fld == ICE_FLOW_FIELD_IDX_IPV6_TTL)
 			sib = ICE_FLOW_FIELD_IDX_IPV6_PROT;
-		else if (fld == ICE_FLOW_FIELD_IDX_IPV6_PROT)
+		else
 			sib = ICE_FLOW_FIELD_IDX_IPV6_TTL;
 
 		/* If the sibling field is also included, that field's
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 39/40] net/ice/base: rename ACL priority values
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (37 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 38/40] net/ice/base: remove unnecessary conditional Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 40/40] net/ice/base: preserve default aggr vsi information Qi Zhang
                   ` (2 subsequent siblings)
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Tony Nguyen

The naming convention used to shorten 'priority' is 'prio'.
Convert the ACL related entries that use 'prior' to 'prio'.

Also, as ICE_LOW, ICE_NORMAL,... are not very descriptive of what
they represent. Add 'ACL_PRIO' to help convey their use.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_acl.h      | 16 ++++++++--------
 drivers/net/ice/base/ice_acl_ctrl.c | 32 +++++++++++++++++---------------
 drivers/net/ice/base/ice_flow.c     | 25 ++++++++++++-------------
 3 files changed, 37 insertions(+), 36 deletions(-)

diff --git a/drivers/net/ice/base/ice_acl.h b/drivers/net/ice/base/ice_acl.h
index f87a0aa79..21aa5088f 100644
--- a/drivers/net/ice/base/ice_acl.h
+++ b/drivers/net/ice/base/ice_acl.h
@@ -47,11 +47,11 @@ struct ice_acl_tbl {
 };
 
 #define ICE_MAX_ACL_TCAM_ENTRY (ICE_AQC_ACL_TCAM_DEPTH * ICE_AQC_ACL_SLICES)
-enum ice_acl_entry_prior {
-	ICE_LOW = 0,
-	ICE_NORMAL,
-	ICE_HIGH,
-	ICE_MAX_PRIOR
+enum ice_acl_entry_prio {
+	ICE_ACL_PRIO_LOW = 0,
+	ICE_ACL_PRIO_NORMAL,
+	ICE_ACL_PRIO_HIGH,
+	ICE_ACL_MAX_PRIO
 };
 
 /* Scenario structure
@@ -74,8 +74,8 @@ struct ice_acl_scen {
 	 * be available in this scenario
 	 */
 	ice_declare_bitmap(entry_bitmap, ICE_MAX_ACL_TCAM_ENTRY);
-	u16 first_idx[ICE_MAX_PRIOR];
-	u16 last_idx[ICE_MAX_PRIOR];
+	u16 first_idx[ICE_ACL_MAX_PRIO];
+	u16 last_idx[ICE_ACL_MAX_PRIO];
 
 	u16 id;
 	u16 start;	/* Number of entry from the start of the parent table */
@@ -192,7 +192,7 @@ ice_aq_query_acl_scen(struct ice_hw *hw, u16 scen_id,
 		      struct ice_aqc_acl_scen *buf, struct ice_sq_cd *cd);
 enum ice_status
 ice_acl_add_entry(struct ice_hw *hw, struct ice_acl_scen *scen,
-		  enum ice_acl_entry_prior prior, u8 *keys, u8 *inverts,
+		  enum ice_acl_entry_prio prio, u8 *keys, u8 *inverts,
 		  struct ice_acl_act_entry *acts, u8 acts_cnt, u16 *entry_idx);
 enum ice_status
 ice_acl_prog_act(struct ice_hw *hw, struct ice_acl_scen *scen,
diff --git a/drivers/net/ice/base/ice_acl_ctrl.c b/drivers/net/ice/base/ice_acl_ctrl.c
index bd09e9d77..3c4d45cc0 100644
--- a/drivers/net/ice/base/ice_acl_ctrl.c
+++ b/drivers/net/ice/base/ice_acl_ctrl.c
@@ -25,19 +25,21 @@ static void ice_acl_init_entry(struct ice_acl_scen *scen)
 	 * normal priority: start from the highest index, 50% of total entries
 	 * high priority: start from the lowest index, 25% of total entries
 	 */
-	scen->first_idx[ICE_LOW] = scen->num_entry - 1;
-	scen->first_idx[ICE_NORMAL] = scen->num_entry - scen->num_entry / 4 - 1;
-	scen->first_idx[ICE_HIGH] = 0;
-
-	scen->last_idx[ICE_LOW] = scen->num_entry - scen->num_entry / 4;
-	scen->last_idx[ICE_NORMAL] = scen->num_entry / 4;
-	scen->last_idx[ICE_HIGH] = scen->num_entry / 4 - 1;
+	scen->first_idx[ICE_ACL_PRIO_LOW] = scen->num_entry - 1;
+	scen->first_idx[ICE_ACL_PRIO_NORMAL] = scen->num_entry -
+		scen->num_entry / 4 - 1;
+	scen->first_idx[ICE_ACL_PRIO_HIGH] = 0;
+
+	scen->last_idx[ICE_ACL_PRIO_LOW] = scen->num_entry -
+		scen->num_entry / 4;
+	scen->last_idx[ICE_ACL_PRIO_NORMAL] = scen->num_entry / 4;
+	scen->last_idx[ICE_ACL_PRIO_HIGH] = scen->num_entry / 4 - 1;
 }
 
 /**
  * ice_acl_scen_assign_entry_idx
  * @scen: pointer to the scenario struct
- * @prior: the priority of the flow entry being allocated
+ * @prio: the priority of the flow entry being allocated
  *
  * To find the index of an available entry in scenario
  *
@@ -46,16 +48,16 @@ static void ice_acl_init_entry(struct ice_acl_scen *scen)
  */
 static u16
 ice_acl_scen_assign_entry_idx(struct ice_acl_scen *scen,
-			      enum ice_acl_entry_prior prior)
+			      enum ice_acl_entry_prio prio)
 {
 	u16 first_idx, last_idx, i;
 	s8 step;
 
-	if (prior >= ICE_MAX_PRIOR)
+	if (prio >= ICE_ACL_MAX_PRIO)
 		return ICE_ACL_SCEN_ENTRY_INVAL;
 
-	first_idx = scen->first_idx[prior];
-	last_idx = scen->last_idx[prior];
+	first_idx = scen->first_idx[prio];
+	last_idx = scen->last_idx[prio];
 	step = first_idx <= last_idx ? 1 : -1;
 
 	for (i = first_idx; i != last_idx + step; i += step)
@@ -953,7 +955,7 @@ enum ice_status ice_acl_destroy_tbl(struct ice_hw *hw)
  * ice_acl_add_entry - Add a flow entry to an ACL scenario
  * @hw: pointer to the HW struct
  * @scen: scenario to add the entry to
- * @prior: priority level of the entry being added
+ * @prio: priority level of the entry being added
  * @keys: buffer of the value of the key to be programmed to the ACL entry
  * @inverts: buffer of the value of the key inverts to be programmed
  * @acts: pointer to a buffer containing formatted actions
@@ -967,7 +969,7 @@ enum ice_status ice_acl_destroy_tbl(struct ice_hw *hw)
  */
 enum ice_status
 ice_acl_add_entry(struct ice_hw *hw, struct ice_acl_scen *scen,
-		  enum ice_acl_entry_prior prior, u8 *keys, u8 *inverts,
+		  enum ice_acl_entry_prio prio, u8 *keys, u8 *inverts,
 		  struct ice_acl_act_entry *acts, u8 acts_cnt, u16 *entry_idx)
 {
 	u8 i, entry_tcam, num_cscd, offset;
@@ -978,7 +980,7 @@ ice_acl_add_entry(struct ice_hw *hw, struct ice_acl_scen *scen,
 	if (!scen)
 		return ICE_ERR_DOES_NOT_EXIST;
 
-	*entry_idx = ice_acl_scen_assign_entry_idx(scen, prior);
+	*entry_idx = ice_acl_scen_assign_entry_idx(scen, prio);
 	if (*entry_idx >= scen->num_entry) {
 		*entry_idx = 0;
 		return ICE_ERR_MAX_LIMIT;
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index e0920c73f..322cea762 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -2715,30 +2715,30 @@ ice_flow_acl_find_scen_entry_cond(struct ice_flow_prof *prof,
 }
 
 /**
- * ice_flow_acl_convert_to_acl_prior - Convert to ACL priority
+ * ice_flow_acl_convert_to_acl_prio - Convert to ACL priority
  * @p: flow priority
  */
-static enum ice_acl_entry_prior
-ice_flow_acl_convert_to_acl_prior(enum ice_flow_priority p)
+static enum ice_acl_entry_prio
+ice_flow_acl_convert_to_acl_prio(enum ice_flow_priority p)
 {
-	enum ice_acl_entry_prior acl_prior;
+	enum ice_acl_entry_prio acl_prio;
 
 	switch (p) {
 	case ICE_FLOW_PRIO_LOW:
-		acl_prior = ICE_LOW;
+		acl_prio = ICE_ACL_PRIO_LOW;
 		break;
 	case ICE_FLOW_PRIO_NORMAL:
-		acl_prior = ICE_NORMAL;
+		acl_prio = ICE_ACL_PRIO_NORMAL;
 		break;
 	case ICE_FLOW_PRIO_HIGH:
-		acl_prior = ICE_HIGH;
+		acl_prio = ICE_ACL_PRIO_HIGH;
 		break;
 	default:
-		acl_prior = ICE_NORMAL;
+		acl_prio = ICE_ACL_PRIO_NORMAL;
 		break;
 	}
 
-	return acl_prior;
+	return acl_prio;
 }
 
 /**
@@ -2878,15 +2878,15 @@ ice_flow_acl_add_scen_entry_sync(struct ice_hw *hw, struct ice_flow_prof *prof,
 			   ICE_NONDMA_TO_NONDMA);
 
 	if (do_add_entry) {
-		enum ice_acl_entry_prior prior;
+		enum ice_acl_entry_prio prio;
 		u8 *keys, *inverts;
 		u16 entry_idx;
 
 		keys = (u8 *)e->entry;
 		inverts = keys + (e->entry_sz / 2);
-		prior = ice_flow_acl_convert_to_acl_prior(e->priority);
+		prio = ice_flow_acl_convert_to_acl_prio(e->priority);
 
-		status = ice_acl_add_entry(hw, prof->cfg.scen, prior, keys,
+		status = ice_acl_add_entry(hw, prof->cfg.scen, prio, keys,
 					   inverts, acts, e->acts_cnt,
 					   &entry_idx);
 		if (status)
@@ -2904,7 +2904,6 @@ ice_flow_acl_add_scen_entry_sync(struct ice_hw *hw, struct ice_flow_prof *prof,
 			exist->acts = (struct ice_flow_action *)
 				ice_calloc(hw, exist->acts_cnt,
 					   sizeof(struct ice_flow_action));
-
 			if (!exist->acts) {
 				status = ICE_ERR_NO_MEMORY;
 				goto out;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH 40/40] net/ice/base: preserve default aggr vsi information
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (38 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 39/40] net/ice/base: rename ACL priority values Qi Zhang
@ 2020-09-07 11:28 ` Qi Zhang
  2020-09-09  7:16 ` [dpdk-dev] [PATCH 00/40] ice base code update Yang, Qiming
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
  41 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-07 11:28 UTC (permalink / raw)
  To: qiming.yang; +Cc: dev, Qi Zhang, Tarun Singh

Added the change to keep the default aggregator VSI information.

Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
 drivers/net/ice/base/ice_sched.c | 11 +----------
 1 file changed, 1 insertion(+), 10 deletions(-)

diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 4be449f61..16314ef18 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -2852,16 +2852,7 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
 		if (status)
 			break;
 
-		if (agg_id != ICE_DFLT_AGG_ID)
-			ice_set_bit(tc, agg_vsi_info->tc_bitmap);
-		else
-			ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
-	}
-	/* If VSI moved back to default aggregator, delete agg_vsi_info. */
-	if (!ice_is_any_bit_set(agg_vsi_info->tc_bitmap,
-				ICE_MAX_TRAFFIC_CLASS)) {
-		LIST_DEL(&agg_vsi_info->list_entry);
-		ice_free(hw, agg_vsi_info);
+		ice_set_bit(tc, agg_vsi_info->tc_bitmap);
 	}
 	return status;
 }
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* Re: [dpdk-dev] [PATCH 00/40] ice base code update
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (39 preceding siblings ...)
  2020-09-07 11:28 ` [dpdk-dev] [PATCH 40/40] net/ice/base: preserve default aggr vsi information Qi Zhang
@ 2020-09-09  7:16 ` Yang, Qiming
  2020-09-10  3:26   ` Zhang, Qi Z
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
  41 siblings, 1 reply; 87+ messages in thread
From: Yang, Qiming @ 2020-09-09  7:16 UTC (permalink / raw)
  To: Zhang, Qi Z; +Cc: dev



> -----Original Message-----
> From: Zhang, Qi Z <qi.z.zhang@intel.com>
> Sent: Monday, September 7, 2020 19:28
> To: Yang, Qiming <qiming.yang@intel.com>
> Cc: dev@dpdk.org; Zhang, Qi Z <qi.z.zhang@intel.com>
> Subject: [PATCH 00/40] ice base code update
> 
> main changes:
> 1. Added support for outer IP filter for GTPC.
> 2. Added support for outer IP filter for GPTU control packet (no inner IP) 3.
> Added support for QinQ switch filter 4. code refactor and bug fixes
> 
> Qi Zhang (40):
>   net/ice/base: handle error gracefully in HW table calloc
>   net/ice/base: split caps discover into two functions
>   net/ice/base: avoid unnecessary single-member variable-length structs
>   net/ice/base: fix issues around move nodes
>   net/ice/base: cleanup stack hog
>   net/ice/base: clean the code wrapping
>   net/ice/base: cleanup misleading comment
>   net/ice/base: silence static analysis warning
>   net/ice/base: replace single-element array used for C struct hack
>   net/ice/base: introduce and use bitmap set API
>   net/ice/base: introduce and use bitmap hamming weight API
>   net/ice/base: add function header
>   net/ice/base: introduce and use for each bit iterator
>   net/ice/base: correct abbreviations
>   net/ice/base: add AQ cmd 0X0A0A LLDP fltr control
>   net/ice/base: add support for GTP-U type switch rule
>   net/ice/base: join format strings to same line
>   net/ice/base: introduce Tx rate limiting on port level
>   net/ice/base: reduce profile to recip info get from firmware
>   net/ice/base: refactor DCB related variables
>   net/ice/base: support outer IP filter for GTPC
>   net/ice/base: support outer IP filter for GTPU without inner IP
>   net/ice/base: move a function
>   net/ice/base: clear advanced rules in reset preparation
>   net/ice/base: move a function
>   net/ice/base: add check for failed acts allocation
>   net/ice/base: remove repeated words
>   net/ice/base: remove function ACL count query
>   net/ice/base: preserve NVM capabilities in safe mode
>   net/ice/base: misc minor ACL changes
>   net/ice/base: adjust rate limit profile ids runtime database
>   net/ice/base: enable QinQ filter for switch advanced rule
>   net/ice/base: create flash info structure and separate NVM version
>   net/ice/base: remove unused parameter
>   net/ice/base: minor code clean
>   net/ice/base: cache NVM module bank information
>   net/ice/base: rename function
>   net/ice/base: remove unnecessary conditional
>   net/ice/base: rename ACL priority values
>   net/ice/base: preserve default aggr vsi information
> 
>  drivers/net/ice/base/ice_acl.c           |  40 +-
>  drivers/net/ice/base/ice_acl.h           |  22 +-
>  drivers/net/ice/base/ice_acl_ctrl.c      | 200 ++++----
>  drivers/net/ice/base/ice_adminq_cmd.h    |  83 +---
>  drivers/net/ice/base/ice_bitops.h        |  47 ++
>  drivers/net/ice/base/ice_common.c        | 434 +++++++++---------
>  drivers/net/ice/base/ice_common.h        |   6 +-
>  drivers/net/ice/base/ice_controlq.c      |  42 +-
>  drivers/net/ice/base/ice_dcb.c           |  44 +-
>  drivers/net/ice/base/ice_dcb.h           |  10 +-
>  drivers/net/ice/base/ice_flex_pipe.c     | 266 ++++++-----
>  drivers/net/ice/base/ice_flex_type.h     |  49 +-
>  drivers/net/ice/base/ice_flow.c          | 280 ++++++------
>  drivers/net/ice/base/ice_flow.h          |   1 +
>  drivers/net/ice/base/ice_nvm.c           | 293 ++++++++----
>  drivers/net/ice/base/ice_protocol_type.h |  15 +
>  drivers/net/ice/base/ice_sched.c         | 213 +++++----
>  drivers/net/ice/base/ice_sched.h         |  10 +-
>  drivers/net/ice/base/ice_switch.c        | 755
> +++++++++++++++++++++++++------
>  drivers/net/ice/base/ice_switch.h        |  60 ++-
>  drivers/net/ice/base/ice_type.h          |  77 +++-
>  drivers/net/ice/ice_ethdev.c             |  20 +-
>  22 files changed, 1803 insertions(+), 1164 deletions(-)
> 
> --
> 2.13.6

Acked-by: Qiming Yang <qiming.yang@intel.com>


^ permalink raw reply	[flat|nested] 87+ messages in thread

* Re: [dpdk-dev] [PATCH 00/40] ice base code update
  2020-09-09  7:16 ` [dpdk-dev] [PATCH 00/40] ice base code update Yang, Qiming
@ 2020-09-10  3:26   ` Zhang, Qi Z
  2020-09-11 11:07     ` Ferruh Yigit
  0 siblings, 1 reply; 87+ messages in thread
From: Zhang, Qi Z @ 2020-09-10  3:26 UTC (permalink / raw)
  To: Yang, Qiming; +Cc: dev



> -----Original Message-----
> From: Yang, Qiming <qiming.yang@intel.com>
> Sent: Wednesday, September 9, 2020 3:17 PM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>
> Cc: dev@dpdk.org
> Subject: RE: [PATCH 00/40] ice base code update
> 
> 
> 
> > -----Original Message-----
> > From: Zhang, Qi Z <qi.z.zhang@intel.com>
> > Sent: Monday, September 7, 2020 19:28
> > To: Yang, Qiming <qiming.yang@intel.com>
> > Cc: dev@dpdk.org; Zhang, Qi Z <qi.z.zhang@intel.com>
> > Subject: [PATCH 00/40] ice base code update
> >
> > main changes:
> > 1. Added support for outer IP filter for GTPC.
> > 2. Added support for outer IP filter for GPTU control packet (no inner IP) 3.
> > Added support for QinQ switch filter 4. code refactor and bug fixes
> >
> > Qi Zhang (40):
> >   net/ice/base: handle error gracefully in HW table calloc
> >   net/ice/base: split caps discover into two functions
> >   net/ice/base: avoid unnecessary single-member variable-length structs
> >   net/ice/base: fix issues around move nodes
> >   net/ice/base: cleanup stack hog
> >   net/ice/base: clean the code wrapping
> >   net/ice/base: cleanup misleading comment
> >   net/ice/base: silence static analysis warning
> >   net/ice/base: replace single-element array used for C struct hack
> >   net/ice/base: introduce and use bitmap set API
> >   net/ice/base: introduce and use bitmap hamming weight API
> >   net/ice/base: add function header
> >   net/ice/base: introduce and use for each bit iterator
> >   net/ice/base: correct abbreviations
> >   net/ice/base: add AQ cmd 0X0A0A LLDP fltr control
> >   net/ice/base: add support for GTP-U type switch rule
> >   net/ice/base: join format strings to same line
> >   net/ice/base: introduce Tx rate limiting on port level
> >   net/ice/base: reduce profile to recip info get from firmware
> >   net/ice/base: refactor DCB related variables
> >   net/ice/base: support outer IP filter for GTPC
> >   net/ice/base: support outer IP filter for GTPU without inner IP
> >   net/ice/base: move a function
> >   net/ice/base: clear advanced rules in reset preparation
> >   net/ice/base: move a function
> >   net/ice/base: add check for failed acts allocation
> >   net/ice/base: remove repeated words
> >   net/ice/base: remove function ACL count query
> >   net/ice/base: preserve NVM capabilities in safe mode
> >   net/ice/base: misc minor ACL changes
> >   net/ice/base: adjust rate limit profile ids runtime database
> >   net/ice/base: enable QinQ filter for switch advanced rule
> >   net/ice/base: create flash info structure and separate NVM version
> >   net/ice/base: remove unused parameter
> >   net/ice/base: minor code clean
> >   net/ice/base: cache NVM module bank information
> >   net/ice/base: rename function
> >   net/ice/base: remove unnecessary conditional
> >   net/ice/base: rename ACL priority values
> >   net/ice/base: preserve default aggr vsi information
> >
> >  drivers/net/ice/base/ice_acl.c           |  40 +-
> >  drivers/net/ice/base/ice_acl.h           |  22 +-
> >  drivers/net/ice/base/ice_acl_ctrl.c      | 200 ++++----
> >  drivers/net/ice/base/ice_adminq_cmd.h    |  83 +---
> >  drivers/net/ice/base/ice_bitops.h        |  47 ++
> >  drivers/net/ice/base/ice_common.c        | 434 +++++++++---------
> >  drivers/net/ice/base/ice_common.h        |   6 +-
> >  drivers/net/ice/base/ice_controlq.c      |  42 +-
> >  drivers/net/ice/base/ice_dcb.c           |  44 +-
> >  drivers/net/ice/base/ice_dcb.h           |  10 +-
> >  drivers/net/ice/base/ice_flex_pipe.c     | 266 ++++++-----
> >  drivers/net/ice/base/ice_flex_type.h     |  49 +-
> >  drivers/net/ice/base/ice_flow.c          | 280 ++++++------
> >  drivers/net/ice/base/ice_flow.h          |   1 +
> >  drivers/net/ice/base/ice_nvm.c           | 293 ++++++++----
> >  drivers/net/ice/base/ice_protocol_type.h |  15 +
> >  drivers/net/ice/base/ice_sched.c         | 213 +++++----
> >  drivers/net/ice/base/ice_sched.h         |  10 +-
> >  drivers/net/ice/base/ice_switch.c        | 755
> > +++++++++++++++++++++++++------
> >  drivers/net/ice/base/ice_switch.h        |  60 ++-
> >  drivers/net/ice/base/ice_type.h          |  77 +++-
> >  drivers/net/ice/ice_ethdev.c             |  20 +-
> >  22 files changed, 1803 insertions(+), 1164 deletions(-)
> >
> > --
> > 2.13.6
> 
> Acked-by: Qiming Yang <qiming.yang@intel.com>
> 
Applied to dpdk-next-net-intel.

Thanks
Qi


^ permalink raw reply	[flat|nested] 87+ messages in thread

* Re: [dpdk-dev] [PATCH 00/40] ice base code update
  2020-09-10  3:26   ` Zhang, Qi Z
@ 2020-09-11 11:07     ` Ferruh Yigit
  2020-09-11 11:52       ` Zhang, Qi Z
  0 siblings, 1 reply; 87+ messages in thread
From: Ferruh Yigit @ 2020-09-11 11:07 UTC (permalink / raw)
  To: Zhang, Qi Z, Yang, Qiming; +Cc: dev

On 9/10/2020 4:26 AM, Zhang, Qi Z wrote:
> 
> 
>> -----Original Message-----
>> From: Yang, Qiming <qiming.yang@intel.com>
>> Sent: Wednesday, September 9, 2020 3:17 PM
>> To: Zhang, Qi Z <qi.z.zhang@intel.com>
>> Cc: dev@dpdk.org
>> Subject: RE: [PATCH 00/40] ice base code update
>>
>>
>>
>>> -----Original Message-----
>>> From: Zhang, Qi Z <qi.z.zhang@intel.com>
>>> Sent: Monday, September 7, 2020 19:28
>>> To: Yang, Qiming <qiming.yang@intel.com>
>>> Cc: dev@dpdk.org; Zhang, Qi Z <qi.z.zhang@intel.com>
>>> Subject: [PATCH 00/40] ice base code update
>>>
>>> main changes:
>>> 1. Added support for outer IP filter for GTPC.
>>> 2. Added support for outer IP filter for GPTU control packet (no inner IP) 3.
>>> Added support for QinQ switch filter 4. code refactor and bug fixes
>>>
>>> Qi Zhang (40):
>>>   net/ice/base: handle error gracefully in HW table calloc
>>>   net/ice/base: split caps discover into two functions
>>>   net/ice/base: avoid unnecessary single-member variable-length structs
>>>   net/ice/base: fix issues around move nodes
>>>   net/ice/base: cleanup stack hog
>>>   net/ice/base: clean the code wrapping
>>>   net/ice/base: cleanup misleading comment
>>>   net/ice/base: silence static analysis warning
>>>   net/ice/base: replace single-element array used for C struct hack
>>>   net/ice/base: introduce and use bitmap set API
>>>   net/ice/base: introduce and use bitmap hamming weight API
>>>   net/ice/base: add function header
>>>   net/ice/base: introduce and use for each bit iterator
>>>   net/ice/base: correct abbreviations
>>>   net/ice/base: add AQ cmd 0X0A0A LLDP fltr control
>>>   net/ice/base: add support for GTP-U type switch rule
>>>   net/ice/base: join format strings to same line
>>>   net/ice/base: introduce Tx rate limiting on port level
>>>   net/ice/base: reduce profile to recip info get from firmware
>>>   net/ice/base: refactor DCB related variables
>>>   net/ice/base: support outer IP filter for GTPC
>>>   net/ice/base: support outer IP filter for GTPU without inner IP
>>>   net/ice/base: move a function
>>>   net/ice/base: clear advanced rules in reset preparation
>>>   net/ice/base: move a function
>>>   net/ice/base: add check for failed acts allocation
>>>   net/ice/base: remove repeated words
>>>   net/ice/base: remove function ACL count query
>>>   net/ice/base: preserve NVM capabilities in safe mode
>>>   net/ice/base: misc minor ACL changes
>>>   net/ice/base: adjust rate limit profile ids runtime database
>>>   net/ice/base: enable QinQ filter for switch advanced rule
>>>   net/ice/base: create flash info structure and separate NVM version
>>>   net/ice/base: remove unused parameter
>>>   net/ice/base: minor code clean
>>>   net/ice/base: cache NVM module bank information
>>>   net/ice/base: rename function
>>>   net/ice/base: remove unnecessary conditional
>>>   net/ice/base: rename ACL priority values
>>>   net/ice/base: preserve default aggr vsi information
>>>


Hi Qi,

I am getting build error [1], can you please check.


[1]
../drivers/net/ice/ice_rxtx.c: In function ‘ice_tx_queue_start’:
../drivers/net/ice/ice_rxtx.c:486:15: error: array subscript 0 is outside array
bounds of ‘struct ice_aqc_add_txqs_perq[]’ [-Werror=array-bounds]
  486 |  txq_elem.txqs[0].txq_id = rte_cpu_to_le_16(txq->reg_idx);
      |  ~~~~~~~~~~~~~^~~
In file included from ../drivers/net/ice/base/ice_controlq.h:8,
                 from ../drivers/net/ice/base/ice_type.h:52,
                 from ../drivers/net/ice/base/ice_common.h:8,
                 from ../drivers/net/ice/ice_ethdev.h:12,
                 from ../drivers/net/ice/ice_rxtx.h:8,
                 from ../drivers/net/ice/ice_rxtx.c:9:
../drivers/net/ice/base/ice_adminq_cmd.h:2429:31: note: while referencing ‘txqs’
 2429 |  struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
      |                               ^~~~
../drivers/net/ice/ice_rxtx.c:462:29: note: defined here ‘txq_elem’
  462 |  struct ice_aqc_add_tx_qgrp txq_elem;
      |                             ^~~~~~~~
../drivers/net/ice/ice_rxtx.c:498:54: error: array subscript 0 is outside array
bounds of ‘struct ice_aqc_add_txqs_perq[]’ [-Werror=array-bounds]
  498 |  ice_set_ctx(hw, (uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,
      |                                      ~~~~~~~~~~~~~~~~^~~~~~~~
In file included from ../drivers/net/ice/base/ice_controlq.h:8,
                 from ../drivers/net/ice/base/ice_type.h:52,
                 from ../drivers/net/ice/base/ice_common.h:8,
                 from ../drivers/net/ice/ice_ethdev.h:12,
                 from ../drivers/net/ice/ice_rxtx.h:8,
                 from ../drivers/net/ice/ice_rxtx.c:9:
../drivers/net/ice/base/ice_adminq_cmd.h:2429:31: note: while referencing ‘txqs’
 2429 |  struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
      |                               ^~~~
../drivers/net/ice/ice_rxtx.c:462:29: note: defined here ‘txq_elem’
  462 |  struct ice_aqc_add_tx_qgrp txq_elem;
      |                             ^~~~~~~~
../drivers/net/ice/ice_rxtx.c:514:29: error: array subscript 0 is outside array
bounds of ‘struct ice_aqc_add_txqs_perq[]’ [-Werror=array-bounds]
  514 |  txq->q_teid = txq_elem.txqs[0].q_teid;
      |                ~~~~~~~~~~~~~^~~
In file included from ../drivers/net/ice/base/ice_controlq.h:8,
                 from ../drivers/net/ice/base/ice_type.h:52,
                 from ../drivers/net/ice/base/ice_common.h:8,
                 from ../drivers/net/ice/ice_ethdev.h:12,
                 from ../drivers/net/ice/ice_rxtx.h:8,
                 from ../drivers/net/ice/ice_rxtx.c:9:
../drivers/net/ice/base/ice_adminq_cmd.h:2429:31: note: while referencing ‘txqs’
 2429 |  struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
      |                               ^~~~
../drivers/net/ice/ice_rxtx.c:462:29: note: defined here ‘txq_elem’
  462 |  struct ice_aqc_add_tx_qgrp txq_elem;
      |                             ^~~~~~~~
../drivers/net/ice/ice_rxtx.c: In function ‘ice_fdir_tx_queue_start’:
../drivers/net/ice/ice_rxtx.c:658:15: error: array subscript 0 is outside array
bounds of ‘struct ice_aqc_add_txqs_perq[]’ [-Werror=array-bounds]
  658 |  txq_elem.txqs[0].txq_id = rte_cpu_to_le_16(txq->reg_idx);
      |  ~~~~~~~~~~~~~^~~
In file included from ../drivers/net/ice/base/ice_controlq.h:8,
                 from ../drivers/net/ice/base/ice_type.h:52,
                 from ../drivers/net/ice/base/ice_common.h:8,
                 from ../drivers/net/ice/ice_ethdev.h:12,
                 from ../drivers/net/ice/ice_rxtx.h:8,
                 from ../drivers/net/ice/ice_rxtx.c:9:
../drivers/net/ice/base/ice_adminq_cmd.h:2429:31: note: while referencing ‘txqs’
 2429 |  struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
      |                               ^~~~
../drivers/net/ice/ice_rxtx.c:640:29: note: defined here ‘txq_elem’
  640 |  struct ice_aqc_add_tx_qgrp txq_elem;
      |                             ^~~~~~~~
../drivers/net/ice/ice_rxtx.c:670:54: error: array subscript 0 is outside array
bounds of ‘struct ice_aqc_add_txqs_perq[]’ [-Werror=array-bounds]
  670 |  ice_set_ctx(hw, (uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,
      |                                      ~~~~~~~~~~~~~~~~^~~~~~~~
In file included from ../drivers/net/ice/base/ice_controlq.h:8,
                 from ../drivers/net/ice/base/ice_type.h:52,
                 from ../drivers/net/ice/base/ice_common.h:8,
                 from ../drivers/net/ice/ice_ethdev.h:12,
                 from ../drivers/net/ice/ice_rxtx.h:8,
                 from ../drivers/net/ice/ice_rxtx.c:9:
../drivers/net/ice/base/ice_adminq_cmd.h:2429:31: note: while referencing ‘txqs’
 2429 |  struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
      |                               ^~~~
../drivers/net/ice/ice_rxtx.c:640:29: note: defined here ‘txq_elem’
  640 |  struct ice_aqc_add_tx_qgrp txq_elem;
      |                             ^~~~~~~~
../drivers/net/ice/ice_rxtx.c:686:29: error: array subscript 0 is outside array
bounds of ‘struct ice_aqc_add_txqs_perq[]’ [-Werror=array-bounds]
  686 |  txq->q_teid = txq_elem.txqs[0].q_teid;
      |                ~~~~~~~~~~~~~^~~
In file included from ../drivers/net/ice/base/ice_controlq.h:8,
                 from ../drivers/net/ice/base/ice_type.h:52,
                 from ../drivers/net/ice/base/ice_common.h:8,
                 from ../drivers/net/ice/ice_ethdev.h:12,
                 from ../drivers/net/ice/ice_rxtx.h:8,
                 from ../drivers/net/ice/ice_rxtx.c:9:
../drivers/net/ice/base/ice_adminq_cmd.h:2429:31: note: while referencing ‘txqs’
 2429 |  struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
      |                               ^~~~
../drivers/net/ice/ice_rxtx.c:640:29: note: defined here ‘txq_elem’
  640 |  struct ice_aqc_add_tx_qgrp txq_elem;
      |                             ^~~~~~~~
cc1: all warnings being treated as errors


^ permalink raw reply	[flat|nested] 87+ messages in thread

* Re: [dpdk-dev] [PATCH 00/40] ice base code update
  2020-09-11 11:07     ` Ferruh Yigit
@ 2020-09-11 11:52       ` Zhang, Qi Z
  2020-09-11 12:23         ` Ferruh Yigit
  0 siblings, 1 reply; 87+ messages in thread
From: Zhang, Qi Z @ 2020-09-11 11:52 UTC (permalink / raw)
  To: Yigit, Ferruh, Yang, Qiming; +Cc: dev



> -----Original Message-----
> From: Ferruh Yigit <ferruh.yigit@intel.com>
> Sent: Friday, September 11, 2020 7:08 PM
> To: Zhang, Qi Z <qi.z.zhang@intel.com>; Yang, Qiming
> <qiming.yang@intel.com>
> Cc: dev@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH 00/40] ice base code update
> 
> On 9/10/2020 4:26 AM, Zhang, Qi Z wrote:
> >
> >
> >> -----Original Message-----
> >> From: Yang, Qiming <qiming.yang@intel.com>
> >> Sent: Wednesday, September 9, 2020 3:17 PM
> >> To: Zhang, Qi Z <qi.z.zhang@intel.com>
> >> Cc: dev@dpdk.org
> >> Subject: RE: [PATCH 00/40] ice base code update
> >>
> >>
> >>
> >>> -----Original Message-----
> >>> From: Zhang, Qi Z <qi.z.zhang@intel.com>
> >>> Sent: Monday, September 7, 2020 19:28
> >>> To: Yang, Qiming <qiming.yang@intel.com>
> >>> Cc: dev@dpdk.org; Zhang, Qi Z <qi.z.zhang@intel.com>
> >>> Subject: [PATCH 00/40] ice base code update
> >>>
> >>> main changes:
> >>> 1. Added support for outer IP filter for GTPC.
> >>> 2. Added support for outer IP filter for GPTU control packet (no inner IP) 3.
> >>> Added support for QinQ switch filter 4. code refactor and bug fixes
> >>>
> >>> Qi Zhang (40):
> >>>   net/ice/base: handle error gracefully in HW table calloc
> >>>   net/ice/base: split caps discover into two functions
> >>>   net/ice/base: avoid unnecessary single-member variable-length structs
> >>>   net/ice/base: fix issues around move nodes
> >>>   net/ice/base: cleanup stack hog
> >>>   net/ice/base: clean the code wrapping
> >>>   net/ice/base: cleanup misleading comment
> >>>   net/ice/base: silence static analysis warning
> >>>   net/ice/base: replace single-element array used for C struct hack
> >>>   net/ice/base: introduce and use bitmap set API
> >>>   net/ice/base: introduce and use bitmap hamming weight API
> >>>   net/ice/base: add function header
> >>>   net/ice/base: introduce and use for each bit iterator
> >>>   net/ice/base: correct abbreviations
> >>>   net/ice/base: add AQ cmd 0X0A0A LLDP fltr control
> >>>   net/ice/base: add support for GTP-U type switch rule
> >>>   net/ice/base: join format strings to same line
> >>>   net/ice/base: introduce Tx rate limiting on port level
> >>>   net/ice/base: reduce profile to recip info get from firmware
> >>>   net/ice/base: refactor DCB related variables
> >>>   net/ice/base: support outer IP filter for GTPC
> >>>   net/ice/base: support outer IP filter for GTPU without inner IP
> >>>   net/ice/base: move a function
> >>>   net/ice/base: clear advanced rules in reset preparation
> >>>   net/ice/base: move a function
> >>>   net/ice/base: add check for failed acts allocation
> >>>   net/ice/base: remove repeated words
> >>>   net/ice/base: remove function ACL count query
> >>>   net/ice/base: preserve NVM capabilities in safe mode
> >>>   net/ice/base: misc minor ACL changes
> >>>   net/ice/base: adjust rate limit profile ids runtime database
> >>>   net/ice/base: enable QinQ filter for switch advanced rule
> >>>   net/ice/base: create flash info structure and separate NVM version
> >>>   net/ice/base: remove unused parameter
> >>>   net/ice/base: minor code clean
> >>>   net/ice/base: cache NVM module bank information
> >>>   net/ice/base: rename function
> >>>   net/ice/base: remove unnecessary conditional
> >>>   net/ice/base: rename ACL priority values
> >>>   net/ice/base: preserve default aggr vsi information
> >>>
> 
> 
> Hi Qi,
> 
> I am getting build error [1], can you please check.
> 
> 
> [1]
> ../drivers/net/ice/ice_rxtx.c: In function ‘ice_tx_queue_start’:
> ../drivers/net/ice/ice_rxtx.c:486:15: error: array subscript 0 is outside array
> bounds of ‘struct ice_aqc_add_txqs_perq[]’ [-Werror=array-bounds]
>   486 |  txq_elem.txqs[0].txq_id = rte_cpu_to_le_16(txq->reg_idx);
>       |  ~~~~~~~~~~~~~^~~
> In file included from ../drivers/net/ice/base/ice_controlq.h:8,
>                  from ../drivers/net/ice/base/ice_type.h:52,
>                  from ../drivers/net/ice/base/ice_common.h:8,
>                  from ../drivers/net/ice/ice_ethdev.h:12,
>                  from ../drivers/net/ice/ice_rxtx.h:8,
>                  from ../drivers/net/ice/ice_rxtx.c:9:
> ../drivers/net/ice/base/ice_adminq_cmd.h:2429:31: note: while referencing
> ‘txqs’
>  2429 |  struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
>       |                               ^~~~
> ../drivers/net/ice/ice_rxtx.c:462:29: note: defined here ‘txq_elem’
>   462 |  struct ice_aqc_add_tx_qgrp txq_elem;
>       |                             ^~~~~~~~
> ../drivers/net/ice/ice_rxtx.c:498:54: error: array subscript 0 is outside array
> bounds of ‘struct ice_aqc_add_txqs_perq[]’ [-Werror=array-bounds]
>   498 |  ice_set_ctx(hw, (uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,
>       |
> ~~~~~~~~~~~~~~~~^~~~~~~~
> In file included from ../drivers/net/ice/base/ice_controlq.h:8,
>                  from ../drivers/net/ice/base/ice_type.h:52,
>                  from ../drivers/net/ice/base/ice_common.h:8,
>                  from ../drivers/net/ice/ice_ethdev.h:12,
>                  from ../drivers/net/ice/ice_rxtx.h:8,
>                  from ../drivers/net/ice/ice_rxtx.c:9:
> ../drivers/net/ice/base/ice_adminq_cmd.h:2429:31: note: while referencing
> ‘txqs’
>  2429 |  struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
>       |                               ^~~~
> ../drivers/net/ice/ice_rxtx.c:462:29: note: defined here ‘txq_elem’
>   462 |  struct ice_aqc_add_tx_qgrp txq_elem;
>       |                             ^~~~~~~~
> ../drivers/net/ice/ice_rxtx.c:514:29: error: array subscript 0 is outside array
> bounds of ‘struct ice_aqc_add_txqs_perq[]’ [-Werror=array-bounds]
>   514 |  txq->q_teid = txq_elem.txqs[0].q_teid;
>       |                ~~~~~~~~~~~~~^~~
> In file included from ../drivers/net/ice/base/ice_controlq.h:8,
>                  from ../drivers/net/ice/base/ice_type.h:52,
>                  from ../drivers/net/ice/base/ice_common.h:8,
>                  from ../drivers/net/ice/ice_ethdev.h:12,
>                  from ../drivers/net/ice/ice_rxtx.h:8,
>                  from ../drivers/net/ice/ice_rxtx.c:9:
> ../drivers/net/ice/base/ice_adminq_cmd.h:2429:31: note: while referencing
> ‘txqs’
>  2429 |  struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
>       |                               ^~~~
> ../drivers/net/ice/ice_rxtx.c:462:29: note: defined here ‘txq_elem’
>   462 |  struct ice_aqc_add_tx_qgrp txq_elem;
>       |                             ^~~~~~~~
> ../drivers/net/ice/ice_rxtx.c: In function ‘ice_fdir_tx_queue_start’:
> ../drivers/net/ice/ice_rxtx.c:658:15: error: array subscript 0 is outside array
> bounds of ‘struct ice_aqc_add_txqs_perq[]’ [-Werror=array-bounds]
>   658 |  txq_elem.txqs[0].txq_id = rte_cpu_to_le_16(txq->reg_idx);
>       |  ~~~~~~~~~~~~~^~~
> In file included from ../drivers/net/ice/base/ice_controlq.h:8,
>                  from ../drivers/net/ice/base/ice_type.h:52,
>                  from ../drivers/net/ice/base/ice_common.h:8,
>                  from ../drivers/net/ice/ice_ethdev.h:12,
>                  from ../drivers/net/ice/ice_rxtx.h:8,
>                  from ../drivers/net/ice/ice_rxtx.c:9:
> ../drivers/net/ice/base/ice_adminq_cmd.h:2429:31: note: while referencing
> ‘txqs’
>  2429 |  struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
>       |                               ^~~~
> ../drivers/net/ice/ice_rxtx.c:640:29: note: defined here ‘txq_elem’
>   640 |  struct ice_aqc_add_tx_qgrp txq_elem;
>       |                             ^~~~~~~~
> ../drivers/net/ice/ice_rxtx.c:670:54: error: array subscript 0 is outside array
> bounds of ‘struct ice_aqc_add_txqs_perq[]’ [-Werror=array-bounds]
>   670 |  ice_set_ctx(hw, (uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,
>       |
> ~~~~~~~~~~~~~~~~^~~~~~~~
> In file included from ../drivers/net/ice/base/ice_controlq.h:8,
>                  from ../drivers/net/ice/base/ice_type.h:52,
>                  from ../drivers/net/ice/base/ice_common.h:8,
>                  from ../drivers/net/ice/ice_ethdev.h:12,
>                  from ../drivers/net/ice/ice_rxtx.h:8,
>                  from ../drivers/net/ice/ice_rxtx.c:9:
> ../drivers/net/ice/base/ice_adminq_cmd.h:2429:31: note: while referencing
> ‘txqs’
>  2429 |  struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
>       |                               ^~~~
> ../drivers/net/ice/ice_rxtx.c:640:29: note: defined here ‘txq_elem’
>   640 |  struct ice_aqc_add_tx_qgrp txq_elem;
>       |                             ^~~~~~~~
> ../drivers/net/ice/ice_rxtx.c:686:29: error: array subscript 0 is outside array
> bounds of ‘struct ice_aqc_add_txqs_perq[]’ [-Werror=array-bounds]
>   686 |  txq->q_teid = txq_elem.txqs[0].q_teid;
>       |                ~~~~~~~~~~~~~^~~
> In file included from ../drivers/net/ice/base/ice_controlq.h:8,
>                  from ../drivers/net/ice/base/ice_type.h:52,
>                  from ../drivers/net/ice/base/ice_common.h:8,
>                  from ../drivers/net/ice/ice_ethdev.h:12,
>                  from ../drivers/net/ice/ice_rxtx.h:8,
>                  from ../drivers/net/ice/ice_rxtx.c:9:
> ../drivers/net/ice/base/ice_adminq_cmd.h:2429:31: note: while referencing
> ‘txqs’
>  2429 |  struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
>       |                               ^~~~
> ../drivers/net/ice/ice_rxtx.c:640:29: note: defined here ‘txq_elem’
>   640 |  struct ice_aqc_add_tx_qgrp txq_elem;
>       |                             ^~~~~~~~
> cc1: all warnings being treated as errors

Seems this issue is only reported by a new version GCC, and it does help to detect a invalid memory access issue.
The bug has been fixed in dpdk-next-net-intel on below commit

commit 978dddfae32764dd6ba81d615399fbc0452ecfb3
Author: Qi Zhang <qi.z.zhang@intel.com>
Date:   Wed Aug 26 14:57:07 2020 +0800

    net/ice/base: replace single-element array used for C struct hack

    Convert the pre-C90-extension "C struct hack" method (using a single-
    element array at the end of a structure for implementing variable-length
    types) to the preferred use of C99 flexible array member.

Thanks
Qi

^ permalink raw reply	[flat|nested] 87+ messages in thread

* Re: [dpdk-dev] [PATCH 00/40] ice base code update
  2020-09-11 11:52       ` Zhang, Qi Z
@ 2020-09-11 12:23         ` Ferruh Yigit
  0 siblings, 0 replies; 87+ messages in thread
From: Ferruh Yigit @ 2020-09-11 12:23 UTC (permalink / raw)
  To: Zhang, Qi Z, Yang, Qiming; +Cc: dev

On 9/11/2020 12:52 PM, Zhang, Qi Z wrote:
> 
> 
>> -----Original Message-----
>> From: Ferruh Yigit <ferruh.yigit@intel.com>
>> Sent: Friday, September 11, 2020 7:08 PM
>> To: Zhang, Qi Z <qi.z.zhang@intel.com>; Yang, Qiming
>> <qiming.yang@intel.com>
>> Cc: dev@dpdk.org
>> Subject: Re: [dpdk-dev] [PATCH 00/40] ice base code update
>>
>> On 9/10/2020 4:26 AM, Zhang, Qi Z wrote:
>>>
>>>
>>>> -----Original Message-----
>>>> From: Yang, Qiming <qiming.yang@intel.com>
>>>> Sent: Wednesday, September 9, 2020 3:17 PM
>>>> To: Zhang, Qi Z <qi.z.zhang@intel.com>
>>>> Cc: dev@dpdk.org
>>>> Subject: RE: [PATCH 00/40] ice base code update
>>>>
>>>>
>>>>
>>>>> -----Original Message-----
>>>>> From: Zhang, Qi Z <qi.z.zhang@intel.com>
>>>>> Sent: Monday, September 7, 2020 19:28
>>>>> To: Yang, Qiming <qiming.yang@intel.com>
>>>>> Cc: dev@dpdk.org; Zhang, Qi Z <qi.z.zhang@intel.com>
>>>>> Subject: [PATCH 00/40] ice base code update
>>>>>
>>>>> main changes:
>>>>> 1. Added support for outer IP filter for GTPC.
>>>>> 2. Added support for outer IP filter for GPTU control packet (no inner IP) 3.
>>>>> Added support for QinQ switch filter 4. code refactor and bug fixes
>>>>>
>>>>> Qi Zhang (40):
>>>>>   net/ice/base: handle error gracefully in HW table calloc
>>>>>   net/ice/base: split caps discover into two functions
>>>>>   net/ice/base: avoid unnecessary single-member variable-length structs
>>>>>   net/ice/base: fix issues around move nodes
>>>>>   net/ice/base: cleanup stack hog
>>>>>   net/ice/base: clean the code wrapping
>>>>>   net/ice/base: cleanup misleading comment
>>>>>   net/ice/base: silence static analysis warning
>>>>>   net/ice/base: replace single-element array used for C struct hack
>>>>>   net/ice/base: introduce and use bitmap set API
>>>>>   net/ice/base: introduce and use bitmap hamming weight API
>>>>>   net/ice/base: add function header
>>>>>   net/ice/base: introduce and use for each bit iterator
>>>>>   net/ice/base: correct abbreviations
>>>>>   net/ice/base: add AQ cmd 0X0A0A LLDP fltr control
>>>>>   net/ice/base: add support for GTP-U type switch rule
>>>>>   net/ice/base: join format strings to same line
>>>>>   net/ice/base: introduce Tx rate limiting on port level
>>>>>   net/ice/base: reduce profile to recip info get from firmware
>>>>>   net/ice/base: refactor DCB related variables
>>>>>   net/ice/base: support outer IP filter for GTPC
>>>>>   net/ice/base: support outer IP filter for GTPU without inner IP
>>>>>   net/ice/base: move a function
>>>>>   net/ice/base: clear advanced rules in reset preparation
>>>>>   net/ice/base: move a function
>>>>>   net/ice/base: add check for failed acts allocation
>>>>>   net/ice/base: remove repeated words
>>>>>   net/ice/base: remove function ACL count query
>>>>>   net/ice/base: preserve NVM capabilities in safe mode
>>>>>   net/ice/base: misc minor ACL changes
>>>>>   net/ice/base: adjust rate limit profile ids runtime database
>>>>>   net/ice/base: enable QinQ filter for switch advanced rule
>>>>>   net/ice/base: create flash info structure and separate NVM version
>>>>>   net/ice/base: remove unused parameter
>>>>>   net/ice/base: minor code clean
>>>>>   net/ice/base: cache NVM module bank information
>>>>>   net/ice/base: rename function
>>>>>   net/ice/base: remove unnecessary conditional
>>>>>   net/ice/base: rename ACL priority values
>>>>>   net/ice/base: preserve default aggr vsi information
>>>>>
>>
>>
>> Hi Qi,
>>
>> I am getting build error [1], can you please check.
>>
>>
>> [1]
>> ../drivers/net/ice/ice_rxtx.c: In function ‘ice_tx_queue_start’:
>> ../drivers/net/ice/ice_rxtx.c:486:15: error: array subscript 0 is outside array
>> bounds of ‘struct ice_aqc_add_txqs_perq[]’ [-Werror=array-bounds]
>>   486 |  txq_elem.txqs[0].txq_id = rte_cpu_to_le_16(txq->reg_idx);
>>       |  ~~~~~~~~~~~~~^~~
>> In file included from ../drivers/net/ice/base/ice_controlq.h:8,
>>                  from ../drivers/net/ice/base/ice_type.h:52,
>>                  from ../drivers/net/ice/base/ice_common.h:8,
>>                  from ../drivers/net/ice/ice_ethdev.h:12,
>>                  from ../drivers/net/ice/ice_rxtx.h:8,
>>                  from ../drivers/net/ice/ice_rxtx.c:9:
>> ../drivers/net/ice/base/ice_adminq_cmd.h:2429:31: note: while referencing
>> ‘txqs’
>>  2429 |  struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
>>       |                               ^~~~
>> ../drivers/net/ice/ice_rxtx.c:462:29: note: defined here ‘txq_elem’
>>   462 |  struct ice_aqc_add_tx_qgrp txq_elem;
>>       |                             ^~~~~~~~
>> ../drivers/net/ice/ice_rxtx.c:498:54: error: array subscript 0 is outside array
>> bounds of ‘struct ice_aqc_add_txqs_perq[]’ [-Werror=array-bounds]
>>   498 |  ice_set_ctx(hw, (uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,
>>       |
>> ~~~~~~~~~~~~~~~~^~~~~~~~
>> In file included from ../drivers/net/ice/base/ice_controlq.h:8,
>>                  from ../drivers/net/ice/base/ice_type.h:52,
>>                  from ../drivers/net/ice/base/ice_common.h:8,
>>                  from ../drivers/net/ice/ice_ethdev.h:12,
>>                  from ../drivers/net/ice/ice_rxtx.h:8,
>>                  from ../drivers/net/ice/ice_rxtx.c:9:
>> ../drivers/net/ice/base/ice_adminq_cmd.h:2429:31: note: while referencing
>> ‘txqs’
>>  2429 |  struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
>>       |                               ^~~~
>> ../drivers/net/ice/ice_rxtx.c:462:29: note: defined here ‘txq_elem’
>>   462 |  struct ice_aqc_add_tx_qgrp txq_elem;
>>       |                             ^~~~~~~~
>> ../drivers/net/ice/ice_rxtx.c:514:29: error: array subscript 0 is outside array
>> bounds of ‘struct ice_aqc_add_txqs_perq[]’ [-Werror=array-bounds]
>>   514 |  txq->q_teid = txq_elem.txqs[0].q_teid;
>>       |                ~~~~~~~~~~~~~^~~
>> In file included from ../drivers/net/ice/base/ice_controlq.h:8,
>>                  from ../drivers/net/ice/base/ice_type.h:52,
>>                  from ../drivers/net/ice/base/ice_common.h:8,
>>                  from ../drivers/net/ice/ice_ethdev.h:12,
>>                  from ../drivers/net/ice/ice_rxtx.h:8,
>>                  from ../drivers/net/ice/ice_rxtx.c:9:
>> ../drivers/net/ice/base/ice_adminq_cmd.h:2429:31: note: while referencing
>> ‘txqs’
>>  2429 |  struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
>>       |                               ^~~~
>> ../drivers/net/ice/ice_rxtx.c:462:29: note: defined here ‘txq_elem’
>>   462 |  struct ice_aqc_add_tx_qgrp txq_elem;
>>       |                             ^~~~~~~~
>> ../drivers/net/ice/ice_rxtx.c: In function ‘ice_fdir_tx_queue_start’:
>> ../drivers/net/ice/ice_rxtx.c:658:15: error: array subscript 0 is outside array
>> bounds of ‘struct ice_aqc_add_txqs_perq[]’ [-Werror=array-bounds]
>>   658 |  txq_elem.txqs[0].txq_id = rte_cpu_to_le_16(txq->reg_idx);
>>       |  ~~~~~~~~~~~~~^~~
>> In file included from ../drivers/net/ice/base/ice_controlq.h:8,
>>                  from ../drivers/net/ice/base/ice_type.h:52,
>>                  from ../drivers/net/ice/base/ice_common.h:8,
>>                  from ../drivers/net/ice/ice_ethdev.h:12,
>>                  from ../drivers/net/ice/ice_rxtx.h:8,
>>                  from ../drivers/net/ice/ice_rxtx.c:9:
>> ../drivers/net/ice/base/ice_adminq_cmd.h:2429:31: note: while referencing
>> ‘txqs’
>>  2429 |  struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
>>       |                               ^~~~
>> ../drivers/net/ice/ice_rxtx.c:640:29: note: defined here ‘txq_elem’
>>   640 |  struct ice_aqc_add_tx_qgrp txq_elem;
>>       |                             ^~~~~~~~
>> ../drivers/net/ice/ice_rxtx.c:670:54: error: array subscript 0 is outside array
>> bounds of ‘struct ice_aqc_add_txqs_perq[]’ [-Werror=array-bounds]
>>   670 |  ice_set_ctx(hw, (uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,
>>       |
>> ~~~~~~~~~~~~~~~~^~~~~~~~
>> In file included from ../drivers/net/ice/base/ice_controlq.h:8,
>>                  from ../drivers/net/ice/base/ice_type.h:52,
>>                  from ../drivers/net/ice/base/ice_common.h:8,
>>                  from ../drivers/net/ice/ice_ethdev.h:12,
>>                  from ../drivers/net/ice/ice_rxtx.h:8,
>>                  from ../drivers/net/ice/ice_rxtx.c:9:
>> ../drivers/net/ice/base/ice_adminq_cmd.h:2429:31: note: while referencing
>> ‘txqs’
>>  2429 |  struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
>>       |                               ^~~~
>> ../drivers/net/ice/ice_rxtx.c:640:29: note: defined here ‘txq_elem’
>>   640 |  struct ice_aqc_add_tx_qgrp txq_elem;
>>       |                             ^~~~~~~~
>> ../drivers/net/ice/ice_rxtx.c:686:29: error: array subscript 0 is outside array
>> bounds of ‘struct ice_aqc_add_txqs_perq[]’ [-Werror=array-bounds]
>>   686 |  txq->q_teid = txq_elem.txqs[0].q_teid;
>>       |                ~~~~~~~~~~~~~^~~
>> In file included from ../drivers/net/ice/base/ice_controlq.h:8,
>>                  from ../drivers/net/ice/base/ice_type.h:52,
>>                  from ../drivers/net/ice/base/ice_common.h:8,
>>                  from ../drivers/net/ice/ice_ethdev.h:12,
>>                  from ../drivers/net/ice/ice_rxtx.h:8,
>>                  from ../drivers/net/ice/ice_rxtx.c:9:
>> ../drivers/net/ice/base/ice_adminq_cmd.h:2429:31: note: while referencing
>> ‘txqs’
>>  2429 |  struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
>>       |                               ^~~~
>> ../drivers/net/ice/ice_rxtx.c:640:29: note: defined here ‘txq_elem’
>>   640 |  struct ice_aqc_add_tx_qgrp txq_elem;
>>       |                             ^~~~~~~~
>> cc1: all warnings being treated as errors
> 
> Seems this issue is only reported by a new version GCC, and it does help to detect a invalid memory access issue.
> The bug has been fixed in dpdk-next-net-intel on below commit
> 
> commit 978dddfae32764dd6ba81d615399fbc0452ecfb3
> Author: Qi Zhang <qi.z.zhang@intel.com>
> Date:   Wed Aug 26 14:57:07 2020 +0800
> 
>     net/ice/base: replace single-element array used for C struct hack
> 
>     Convert the pre-C90-extension "C struct hack" method (using a single-
>     element array at the end of a structure for implementing variable-length
>     types) to the preferred use of C99 flexible array member.
> 

Hi Qi,

Can you please send the fixed patchset as a new version to mail list first?

Also there are build errors on the patch by patch build, can you address them
too in next version?

Thanks,
ferruh





^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 00/40] ice base code update
  2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
                   ` (40 preceding siblings ...)
  2020-09-09  7:16 ` [dpdk-dev] [PATCH 00/40] ice base code update Yang, Qiming
@ 2020-09-11 13:19 ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 01/40] net/ice/base: handle error gracefully in HW table calloc Qi Zhang
                     ` (39 more replies)
  41 siblings, 40 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang

main changes:
1. Added support for outer IP filter for GTPC.
2. Added support for outer IP filter for GPTU control packet (no inner IP)
3. Added support for QinQ switch filter
4. code refactor and bug fixes

v2:
- fix a gcc10 build error.
- fix a patch by patch build error.

Qi Zhang (40):
  net/ice/base: handle error gracefully in HW table calloc
  net/ice/base: split caps discover into two functions
  net/ice/base: avoid unnecessary single-member variable-length structs
  net/ice/base: fix issues around move nodes
  net/ice/base: cleanup stack hog
  net/ice/base: clean the code wrapping
  net/ice/base: cleanup misleading comment
  net/ice/base: silence static analysis warning
  net/ice/base: replace single-element array used for C struct hack
  net/ice/base: introduce and use bitmap set API
  net/ice/base: introduce and use bitmap hamming weight API
  net/ice/base: add function header
  net/ice/base: introduce and use for each bit iterator
  net/ice/base: correct abbreviations
  net/ice/base: add AQ cmd 0X0A0A LLDP fltr control
  net/ice/base: add support for GTP-U type switch rule
  net/ice/base: join format strings to same line
  net/ice/base: introduce Tx rate limiting on port level
  net/ice/base: reduce profile to recip info get from firmware
  net/ice/base: refactor DCB related variables
  net/ice/base: support outer IP filter for GTPC
  net/ice/base: support outer IP filter for GTPU without inner IP
  net/ice/base: move a function
  net/ice/base: clear advanced rules in reset preparation
  net/ice/base: move a function
  net/ice/base: add check for failed acts allocation
  net/ice/base: remove repeated words
  net/ice/base: remove function ACL count query
  net/ice/base: preserve NVM capabilities in safe mode
  net/ice/base: misc minor ACL changes
  net/ice/base: adjust rate limit profile ids runtime database
  net/ice/base: enable QinQ filter for switch advanced rule
  net/ice/base: create flash info structure and separate NVM version
  net/ice/base: remove unused parameter
  net/ice/base: minor code clean
  net/ice/base: cache NVM module bank information
  net/ice/base: rename function
  net/ice/base: remove unnecessary conditional
  net/ice/base: rename ACL priority values
  net/ice/base: preserve default aggr vsi information

 drivers/net/ice/base/ice_acl.c           |  40 +-
 drivers/net/ice/base/ice_acl.h           |  22 +-
 drivers/net/ice/base/ice_acl_ctrl.c      | 200 ++++----
 drivers/net/ice/base/ice_adminq_cmd.h    |  83 +---
 drivers/net/ice/base/ice_bitops.h        |  47 ++
 drivers/net/ice/base/ice_common.c        | 434 +++++++++---------
 drivers/net/ice/base/ice_common.h        |   6 +-
 drivers/net/ice/base/ice_controlq.c      |  42 +-
 drivers/net/ice/base/ice_dcb.c           |  44 +-
 drivers/net/ice/base/ice_dcb.h           |  10 +-
 drivers/net/ice/base/ice_flex_pipe.c     | 266 ++++++-----
 drivers/net/ice/base/ice_flex_type.h     |  49 +-
 drivers/net/ice/base/ice_flow.c          | 280 ++++++------
 drivers/net/ice/base/ice_flow.h          |   1 +
 drivers/net/ice/base/ice_nvm.c           | 293 ++++++++----
 drivers/net/ice/base/ice_protocol_type.h |  15 +
 drivers/net/ice/base/ice_sched.c         | 213 +++++----
 drivers/net/ice/base/ice_sched.h         |  10 +-
 drivers/net/ice/base/ice_switch.c        | 755 +++++++++++++++++++++++++------
 drivers/net/ice/base/ice_switch.h        |  60 ++-
 drivers/net/ice/base/ice_type.h          |  77 +++-
 drivers/net/ice/ice_ethdev.c             |  20 +-
 drivers/net/ice/ice_rxtx.c               |  43 +-
 23 files changed, 1832 insertions(+), 1178 deletions(-)

-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 01/40] net/ice/base: handle error gracefully in HW table calloc
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 02/40] net/ice/base: split caps discover into two functions Qi Zhang
                     ` (38 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Surabhi Boob

In the ice_init_hw_tbls API, if the ice_calloc for es->written
fails, catch that error and bail out gracefully, instead of
continuing with a NULL pointer.

Signed-off-by: Surabhi Boob <surabhi.boob@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_flex_pipe.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 999ad6be3..bf8530e89 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -3908,11 +3908,19 @@ enum ice_status ice_init_hw_tbls(struct ice_hw *hw)
 		es->ref_count = (u16 *)
 			ice_calloc(hw, es->count, sizeof(*es->ref_count));
 
+		if (!es->ref_count)
+			goto err;
+
 		es->written = (u8 *)
 			ice_calloc(hw, es->count, sizeof(*es->written));
+
+		if (!es->written)
+			goto err;
+
 		es->mask_ena = (u32 *)
 			ice_calloc(hw, es->count, sizeof(*es->mask_ena));
-		if (!es->ref_count)
+
+		if (!es->mask_ena)
 			goto err;
 	}
 	return ICE_SUCCESS;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 02/40] net/ice/base: split caps discover into two functions
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 01/40] net/ice/base: handle error gracefully in HW table calloc Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 03/40] net/ice/base: avoid unnecessary single-member variable-length structs Qi Zhang
                     ` (37 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Jacob Keller

Using the new ice_aq_list_caps and ice_parse_(dev|func)_caps functions,
replace ice_discover_caps with two functions that each take a pointer to
the dev_caps and func_caps structures respectively.

This makes the side effect of updating the hw->dev_caps and
hw->func_caps obvious from reading the implementation of the function.
Additionally, it opens the way for enabling reading of device
capabilities outside of the initialization flow. By passing in
a pointer, another caller will be able to read the capabilities without
modifying the hw capabilities structures.

As there are no other callers, it is safe to now remove
ice_aq_discover_caps and ice_parse_caps.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 94 ++++++++++++++++-----------------------
 1 file changed, 39 insertions(+), 55 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 6168fb4f0..ec8d46017 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -87,7 +87,8 @@ enum ice_status ice_clear_pf_cfg(struct ice_hw *hw)
  * is returned in user specified buffer. Please interpret user specified
  * buffer as "manage_mac_read" response.
  * Response such as various MAC addresses are stored in HW struct (port.mac)
- * ice_aq_discover_caps is expected to be called before this function is called.
+ * ice_discover_dev_caps is expected to be called before this function is
+ * called.
  */
 static enum ice_status
 ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size,
@@ -2156,30 +2157,6 @@ ice_parse_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
 }
 
 /**
- * ice_parse_caps - parse function/device capabilities
- * @hw: pointer to the HW struct
- * @buf: pointer to a buffer containing function/device capability records
- * @cap_count: number of capability records in the list
- * @opc: type of capabilities list to parse
- *
- * Helper function to parse function(0x000a)/device(0x000b) capabilities list.
- */
-static void
-ice_parse_caps(struct ice_hw *hw, void *buf, u32 cap_count,
-	       enum ice_adminq_opc opc)
-{
-	if (!buf)
-		return;
-
-	if (opc == ice_aqc_opc_list_dev_caps)
-		ice_parse_dev_caps(hw, &hw->dev_caps, buf, cap_count);
-	else if (opc == ice_aqc_opc_list_func_caps)
-		ice_parse_func_caps(hw, &hw->func_caps, buf, cap_count);
-	else
-		ice_debug(hw, ICE_DBG_INIT, "wrong opcode\n");
-}
-
-/**
  * ice_aq_list_caps - query function/device capabilities
  * @hw: pointer to the HW struct
  * @buf: a buffer to hold the capabilities
@@ -2222,47 +2199,52 @@ ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count,
 }
 
 /**
- * ice_aq_discover_caps - query function/device capabilities
- * @hw: pointer to the HW struct
- * @buf: a virtual buffer to hold the capabilities
- * @buf_size: Size of the virtual buffer
- * @cap_count: cap count needed if AQ err==ENOMEM
- * @opc: capabilities type to discover - pass in the command opcode
- * @cd: pointer to command details structure or NULL
- *
- * Get the function(0x000a)/device(0x000b) capabilities description from
- * the firmware.
+ * ice_discover_dev_caps - Read and extract device capabilities
+ * @hw: pointer to the hardware structure
+ * @dev_caps: pointer to device capabilities structure
  *
- * NOTE: this function has the side effect of updating the hw->dev_caps or
- * hw->func_caps by way of calling ice_parse_caps.
+ * Read the device capabilities and extract them into the dev_caps structure
+ * for later use.
  */
 static enum ice_status
-ice_aq_discover_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count,
-		     enum ice_adminq_opc opc, struct ice_sq_cd *cd)
+ice_discover_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_caps)
 {
-	u32 local_cap_count = 0;
 	enum ice_status status;
+	u32 cap_count = 0;
+	void *cbuf;
 
-	status = ice_aq_list_caps(hw, buf, buf_size, &local_cap_count,
-				  opc, cd);
+	cbuf = ice_malloc(hw, ICE_AQ_MAX_BUF_LEN);
+	if (!cbuf)
+		return ICE_ERR_NO_MEMORY;
+
+	/* Although the driver doesn't know the number of capabilities the
+	 * device will return, we can simply send a 4KB buffer, the maximum
+	 * possible size that firmware can return.
+	 */
+	cap_count = ICE_AQ_MAX_BUF_LEN / sizeof(struct ice_aqc_list_caps_elem);
+
+	status = ice_aq_list_caps(hw, cbuf, ICE_AQ_MAX_BUF_LEN, &cap_count,
+				  ice_aqc_opc_list_dev_caps, NULL);
 	if (!status)
-		ice_parse_caps(hw, buf, local_cap_count, opc);
-	else if (hw->adminq.sq_last_status == ICE_AQ_RC_ENOMEM)
-		*cap_count = local_cap_count;
+		ice_parse_dev_caps(hw, dev_caps, cbuf, cap_count);
+	ice_free(hw, cbuf);
 
 	return status;
 }
 
 /**
- * ice_discover_caps - get info about the HW
+ * ice_discover_func_caps - Read and extract function capabilities
  * @hw: pointer to the hardware structure
- * @opc: capabilities type to discover - pass in the command opcode
+ * @func_caps: pointer to function capabilities structure
+ *
+ * Read the function capabilities and extract them into the func_caps structure
+ * for later use.
  */
 static enum ice_status
-ice_discover_caps(struct ice_hw *hw, enum ice_adminq_opc opc)
+ice_discover_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_caps)
 {
 	enum ice_status status;
-	u32 cap_count;
+	u32 cap_count = 0;
 	void *cbuf;
 
 	cbuf = ice_malloc(hw, ICE_AQ_MAX_BUF_LEN);
@@ -2275,8 +2257,10 @@ ice_discover_caps(struct ice_hw *hw, enum ice_adminq_opc opc)
 	 */
 	cap_count = ICE_AQ_MAX_BUF_LEN / sizeof(struct ice_aqc_list_caps_elem);
 
-	status = ice_aq_discover_caps(hw, cbuf, ICE_AQ_MAX_BUF_LEN, &cap_count,
-				      opc, NULL);
+	status = ice_aq_list_caps(hw, cbuf, ICE_AQ_MAX_BUF_LEN, &cap_count,
+				  ice_aqc_opc_list_func_caps, NULL);
+	if (!status)
+		ice_parse_func_caps(hw, func_caps, cbuf, cap_count);
 	ice_free(hw, cbuf);
 
 	return status;
@@ -2354,11 +2338,11 @@ enum ice_status ice_get_caps(struct ice_hw *hw)
 {
 	enum ice_status status;
 
-	status = ice_discover_caps(hw, ice_aqc_opc_list_dev_caps);
-	if (!status)
-		status = ice_discover_caps(hw, ice_aqc_opc_list_func_caps);
+	status = ice_discover_dev_caps(hw, &hw->dev_caps);
+	if (status)
+		return status;
 
-	return status;
+	return ice_discover_func_caps(hw, &hw->func_caps);
 }
 
 /**
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 03/40] net/ice/base: avoid unnecessary single-member variable-length structs
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 01/40] net/ice/base: handle error gracefully in HW table calloc Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 02/40] net/ice/base: split caps discover into two functions Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 04/40] net/ice/base: fix issues around move nodes Qi Zhang
                     ` (36 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Bruce Allan

There are a number of structures that consist of a one-element array as the
only struct member.  Some of those are unused (ice_aqc_add_get_recipe_data,
ice_aqc_get_port_options_data, ice_aqc_dis_txq, etc.) so remove them.
Others are used to index into a buffer/array consisting of a variable
number of a different data or structure type.  Those are unnecessary since
we can use simple pointer arithmetic or index directly into the buffer to
access individual elements of the buffer/array.

Additional code cleanups were done near areas affected by this change.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_adminq_cmd.h | 63 ++---------------------------
 drivers/net/ice/base/ice_common.c     |  4 +-
 drivers/net/ice/base/ice_common.h     |  2 +-
 drivers/net/ice/base/ice_dcb.c        |  4 +-
 drivers/net/ice/base/ice_sched.c      | 76 ++++++++++++++++-------------------
 drivers/net/ice/base/ice_sched.h      | 10 ++---
 drivers/net/ice/base/ice_switch.c     | 38 +++++++++---------
 drivers/net/ice/base/ice_switch.h     | 10 ++---
 drivers/net/ice/ice_ethdev.c          |  6 +--
 9 files changed, 75 insertions(+), 138 deletions(-)

diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index e17369f5e..df41cce06 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -224,13 +224,6 @@ struct ice_aqc_get_sw_cfg_resp_elem {
 #define ICE_AQC_GET_SW_CONF_RESP_IS_VF		BIT(15)
 };
 
-/* The response buffer is as follows. Note that the length of the
- * elements array varies with the length of the command response.
- */
-struct ice_aqc_get_sw_cfg_resp {
-	struct ice_aqc_get_sw_cfg_resp_elem elements[1];
-};
-
 /* These resource type defines are used for all switch resource
  * commands where a resource type is required, such as:
  * Get Resource Allocation command (indirect 0x0204)
@@ -294,15 +287,6 @@ struct ice_aqc_get_res_resp_elem {
 	__le16 total_free; /* Resources un-allocated/not reserved by any PF */
 };
 
-/* Buffer for Get Resource command */
-struct ice_aqc_get_res_resp {
-	/* Number of resource entries to be calculated using
-	 * datalen/sizeof(struct ice_aqc_cmd_resp)).
-	 * Value of 'datalen' gets updated as part of response.
-	 */
-	struct ice_aqc_get_res_resp_elem elem[1];
-};
-
 /* Allocate Resources command (indirect 0x0208)
  * Free Resources command (indirect 0x0209)
  */
@@ -350,10 +334,6 @@ struct ice_aqc_get_allocd_res_desc {
 	__le32 addr_low;
 };
 
-struct ice_aqc_get_allocd_res_desc_resp {
-	struct ice_aqc_res_elem elem[1];
-};
-
 /* Add VSI (indirect 0x0210)
  * Update VSI (indirect 0x0211)
  * Get VSI (indirect 0x0212)
@@ -729,13 +709,6 @@ struct ice_aqc_recipe_data_elem {
 	u8 rsvd2[20];
 };
 
-/* This struct contains a number of entries as per the
- * num_sub_recipes in the command
- */
-struct ice_aqc_add_get_recipe_data {
-	struct ice_aqc_recipe_data_elem recipe[1];
-};
-
 /* Set/Get Recipes to Profile Association (direct 0x0291/0x0293) */
 struct ice_aqc_recipe_to_profile {
 	__le16 profile_id;
@@ -757,7 +730,6 @@ struct ice_aqc_sw_rules {
 	__le32 addr_low;
 };
 
-#pragma pack(1)
 /* Add/Update/Get/Remove lookup Rx/Tx command/response entry
  * This structures describes the lookup rules and associated actions. "index"
  * is returned as part of a response to a successful Add command, and can be
@@ -842,7 +814,6 @@ struct ice_sw_rule_lkup_rx_tx {
 	__le16 hdr_len;
 	u8 hdr[1];
 };
-#pragma pack()
 
 /* Add/Update/Remove large action command/response entry
  * "index" is returned as part of a response to a successful Add command, and
@@ -851,7 +822,6 @@ struct ice_sw_rule_lkup_rx_tx {
 struct ice_sw_rule_lg_act {
 	__le16 index; /* Index in large action table */
 	__le16 size;
-	__le32 act[1]; /* array of size for actions */
 	/* Max number of large actions */
 #define ICE_MAX_LG_ACT	4
 	/* Bit 0:1 - Action type */
@@ -902,6 +872,7 @@ struct ice_sw_rule_lg_act {
 #define ICE_LG_ACT_STAT_COUNT		0x7
 #define ICE_LG_ACT_STAT_COUNT_S		3
 #define ICE_LG_ACT_STAT_COUNT_M		(0x7F << ICE_LG_ACT_STAT_COUNT_S)
+	__le32 act[1]; /* array of size for actions */
 };
 
 /* Add/Update/Remove VSI list command/response entry
@@ -1009,14 +980,6 @@ struct ice_aqc_sched_elem_cmd {
 	__le32 addr_low;
 };
 
-/* This is the buffer for:
- * Suspend Nodes (indirect 0x0409)
- * Resume Nodes (indirect 0x040A)
- */
-struct ice_aqc_suspend_resume_elem {
-	__le32 teid[1];
-};
-
 struct ice_aqc_txsched_move_grp_info_hdr {
 	__le32 src_parent_teid;
 	__le32 dest_parent_teid;
@@ -1082,14 +1045,6 @@ struct ice_aqc_add_elem {
 	struct ice_aqc_txsched_elem_data generic[1];
 };
 
-struct ice_aqc_conf_elem {
-	struct ice_aqc_txsched_elem_data generic[1];
-};
-
-struct ice_aqc_get_elem {
-	struct ice_aqc_txsched_elem_data generic[1];
-};
-
 struct ice_aqc_get_topo_elem {
 	struct ice_aqc_txsched_topo_grp_info_hdr hdr;
 	struct ice_aqc_txsched_elem_data
@@ -1161,10 +1116,6 @@ struct ice_aqc_rl_profile_elem {
 	__le16 rl_encode;
 };
 
-struct ice_aqc_rl_profile_generic_elem {
-	struct ice_aqc_rl_profile_elem generic[1];
-};
-
 /* Configure L2 Node CGD (indirect 0x0414)
  * This indirect command allows configuring a congestion domain for given L2
  * node TEIDs in the scheduler topology.
@@ -1182,10 +1133,6 @@ struct ice_aqc_cfg_l2_node_cgd_elem {
 	u8 reserved[3];
 };
 
-struct ice_aqc_cfg_l2_node_cgd_data {
-	struct ice_aqc_cfg_l2_node_cgd_elem elem[1];
-};
-
 /* Query Scheduler Resource Allocation (indirect 0x0412)
  * This indirect command retrieves the scheduler resources allocated by
  * EMP Firmware to the given PF.
@@ -2512,23 +2459,21 @@ struct ice_aqc_dis_txqs {
  * added before the start of the next group, to allow correct
  * alignment of the parent_teid field.
  */
+#pragma pack(1)
 struct ice_aqc_dis_txq_item {
 	__le32 parent_teid;
 	u8 num_qs;
 	u8 rsvd;
 	/* The length of the q_id array varies according to num_qs */
-	__le16 q_id[1];
-	/* This only applies from F8 onward */
 #define ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S		15
 #define ICE_AQC_Q_DIS_BUF_ELEM_TYPE_LAN_Q	\
 			(0 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S)
 #define ICE_AQC_Q_DIS_BUF_ELEM_TYPE_RDMA_QSET	\
 			(1 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S)
+	__le16 q_id[1];
 };
 
-struct ice_aqc_dis_txq {
-	struct ice_aqc_dis_txq_item qgrps[1];
-};
+#pragma pack()
 
 /* Tx LAN Queues Cleanup Event (0x0C31) */
 struct ice_aqc_txqs_cleanup {
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index ec8d46017..4be363047 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -4596,14 +4596,14 @@ ice_stat_update_repc(struct ice_hw *hw, u16 vsi_handle, bool prev_stat_loaded,
  */
 enum ice_status
 ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
-		     struct ice_aqc_get_elem *buf)
+		     struct ice_aqc_txsched_elem_data *buf)
 {
 	u16 buf_size, num_elem_ret = 0;
 	enum ice_status status;
 
 	buf_size = sizeof(*buf);
 	ice_memset(buf, 0, buf_size, ICE_NONDMA_MEM);
-	buf->generic[0].node_teid = CPU_TO_LE32(node_teid);
+	buf->node_teid = CPU_TO_LE32(node_teid);
 	status = ice_aq_query_sched_elems(hw, 1, buf, buf_size, &num_elem_ret,
 					  NULL);
 	if (status != ICE_SUCCESS || num_elem_ret != 1)
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 329d0b50f..1aea915ad 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -219,7 +219,7 @@ enum ice_fw_modes ice_get_fw_mode(struct ice_hw *hw);
 void ice_print_rollback_msg(struct ice_hw *hw);
 enum ice_status
 ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
-		     struct ice_aqc_get_elem *buf);
+		     struct ice_aqc_txsched_elem_data *buf);
 enum ice_status
 ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
 		    struct ice_sq_cd *cd);
diff --git a/drivers/net/ice/base/ice_dcb.c b/drivers/net/ice/base/ice_dcb.c
index b9643b5ce..01cee227e 100644
--- a/drivers/net/ice/base/ice_dcb.c
+++ b/drivers/net/ice/base/ice_dcb.c
@@ -1328,7 +1328,7 @@ ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
 			    struct ice_aqc_port_ets_elem *buf)
 {
 	struct ice_sched_node *node, *tc_node;
-	struct ice_aqc_get_elem elem;
+	struct ice_aqc_txsched_elem_data elem;
 	enum ice_status status = ICE_SUCCESS;
 	u32 teid1, teid2;
 	u8 i, j;
@@ -1370,7 +1370,7 @@ ice_update_port_tc_tree_cfg(struct ice_port_info *pi,
 		/* new TC */
 		status = ice_sched_query_elem(pi->hw, teid2, &elem);
 		if (!status)
-			status = ice_sched_add_node(pi, 1, &elem.generic[0]);
+			status = ice_sched_add_node(pi, 1, &elem);
 		if (status)
 			break;
 		/* update the TC number */
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 8ee4b708e..cf9a6a777 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -130,7 +130,7 @@ ice_aqc_send_sched_elem_cmd(struct ice_hw *hw, enum ice_adminq_opc cmd_opc,
  */
 enum ice_status
 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
-			 struct ice_aqc_get_elem *buf, u16 buf_size,
+			 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
 			 u16 *elems_ret, struct ice_sq_cd *cd)
 {
 	return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_get_sched_elems,
@@ -150,8 +150,8 @@ enum ice_status
 ice_sched_add_node(struct ice_port_info *pi, u8 layer,
 		   struct ice_aqc_txsched_elem_data *info)
 {
+	struct ice_aqc_txsched_elem_data elem;
 	struct ice_sched_node *parent;
-	struct ice_aqc_get_elem elem;
 	struct ice_sched_node *node;
 	enum ice_status status;
 	struct ice_hw *hw;
@@ -194,7 +194,7 @@ ice_sched_add_node(struct ice_port_info *pi, u8 layer,
 	node->parent = parent;
 	node->tx_sched_layer = layer;
 	parent->children[parent->num_children++] = node;
-	node->info = elem.generic[0];
+	node->info = elem;
 	return ICE_SUCCESS;
 }
 
@@ -422,7 +422,7 @@ ice_aq_add_sched_elems(struct ice_hw *hw, u16 grps_req,
  */
 static enum ice_status
 ice_aq_cfg_sched_elems(struct ice_hw *hw, u16 elems_req,
-		       struct ice_aqc_conf_elem *buf, u16 buf_size,
+		       struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
 		       u16 *elems_cfgd, struct ice_sq_cd *cd)
 {
 	return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_cfg_sched_elems,
@@ -463,8 +463,7 @@ ice_aq_move_sched_elems(struct ice_hw *hw, u16 grps_req,
  * Suspend scheduling elements (0x0409)
  */
 static enum ice_status
-ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req,
-			   struct ice_aqc_suspend_resume_elem *buf,
+ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
 			   u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
 {
 	return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_suspend_sched_elems,
@@ -484,8 +483,7 @@ ice_aq_suspend_sched_elems(struct ice_hw *hw, u16 elems_req,
  * resume scheduling elements (0x040A)
  */
 static enum ice_status
-ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req,
-			  struct ice_aqc_suspend_resume_elem *buf,
+ice_aq_resume_sched_elems(struct ice_hw *hw, u16 elems_req, __le32 *buf,
 			  u16 buf_size, u16 *elems_ret, struct ice_sq_cd *cd)
 {
 	return ice_aqc_send_sched_elem_cmd(hw, ice_aqc_opc_resume_sched_elems,
@@ -526,18 +524,17 @@ static enum ice_status
 ice_sched_suspend_resume_elems(struct ice_hw *hw, u8 num_nodes, u32 *node_teids,
 			       bool suspend)
 {
-	struct ice_aqc_suspend_resume_elem *buf;
 	u16 i, buf_size, num_elem_ret = 0;
 	enum ice_status status;
+	__le32 *buf;
 
 	buf_size = sizeof(*buf) * num_nodes;
-	buf = (struct ice_aqc_suspend_resume_elem *)
-		ice_malloc(hw, buf_size);
+	buf = (__le32 *)ice_malloc(hw, buf_size);
 	if (!buf)
 		return ICE_ERR_NO_MEMORY;
 
 	for (i = 0; i < num_nodes; i++)
-		buf->teid[i] = CPU_TO_LE32(node_teids[i]);
+		buf[i] = CPU_TO_LE32(node_teids[i]);
 
 	if (suspend)
 		status = ice_aq_suspend_sched_elems(hw, num_nodes, buf,
@@ -610,7 +607,7 @@ ice_alloc_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 new_numqs)
  */
 static enum ice_status
 ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
-		  u16 num_profiles, struct ice_aqc_rl_profile_generic_elem *buf,
+		  u16 num_profiles, struct ice_aqc_rl_profile_elem *buf,
 		  u16 buf_size, u16 *num_processed, struct ice_sq_cd *cd)
 {
 	struct ice_aqc_rl_profile *cmd;
@@ -641,13 +638,11 @@ ice_aq_rl_profile(struct ice_hw *hw, enum ice_adminq_opc opcode,
  */
 static enum ice_status
 ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
-		      struct ice_aqc_rl_profile_generic_elem *buf,
-		      u16 buf_size, u16 *num_profiles_added,
-		      struct ice_sq_cd *cd)
+		      struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
+		      u16 *num_profiles_added, struct ice_sq_cd *cd)
 {
-	return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles,
-				 num_profiles, buf,
-				 buf_size, num_profiles_added, cd);
+	return ice_aq_rl_profile(hw, ice_aqc_opc_add_rl_profiles, num_profiles,
+				 buf, buf_size, num_profiles_added, cd);
 }
 
 /**
@@ -662,8 +657,8 @@ ice_aq_add_rl_profile(struct ice_hw *hw, u16 num_profiles,
  */
 enum ice_status
 ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
-			struct ice_aqc_rl_profile_generic_elem *buf,
-			u16 buf_size, struct ice_sq_cd *cd)
+			struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
+			struct ice_sq_cd *cd)
 {
 	return ice_aq_rl_profile(hw, ice_aqc_opc_query_rl_profiles,
 				 num_profiles, buf, buf_size, NULL, cd);
@@ -682,13 +677,12 @@ ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
  */
 static enum ice_status
 ice_aq_remove_rl_profile(struct ice_hw *hw, u16 num_profiles,
-			 struct ice_aqc_rl_profile_generic_elem *buf,
-			 u16 buf_size, u16 *num_profiles_removed,
-			 struct ice_sq_cd *cd)
+			 struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
+			 u16 *num_profiles_removed, struct ice_sq_cd *cd)
 {
 	return ice_aq_rl_profile(hw, ice_aqc_opc_remove_rl_profiles,
-				 num_profiles, buf,
-				 buf_size, num_profiles_removed, cd);
+				 num_profiles, buf, buf_size,
+				 num_profiles_removed, cd);
 }
 
 /**
@@ -704,7 +698,7 @@ static enum ice_status
 ice_sched_del_rl_profile(struct ice_hw *hw,
 			 struct ice_aqc_rl_profile_info *rl_info)
 {
-	struct ice_aqc_rl_profile_generic_elem *buf;
+	struct ice_aqc_rl_profile_elem *buf;
 	u16 num_profiles_removed;
 	enum ice_status status;
 	u16 num_profiles = 1;
@@ -713,8 +707,7 @@ ice_sched_del_rl_profile(struct ice_hw *hw,
 		return ICE_ERR_IN_USE;
 
 	/* Safe to remove profile ID */
-	buf = (struct ice_aqc_rl_profile_generic_elem *)
-		&rl_info->profile;
+	buf = &rl_info->profile;
 	status = ice_aq_remove_rl_profile(hw, num_profiles, buf, sizeof(*buf),
 					  &num_profiles_removed, NULL);
 	if (status || num_profiles_removed != num_profiles)
@@ -860,7 +853,7 @@ void ice_sched_cleanup_all(struct ice_hw *hw)
  */
 enum ice_status
 ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes,
-		       struct ice_aqc_cfg_l2_node_cgd_data *buf,
+		       struct ice_aqc_cfg_l2_node_cgd_elem *buf,
 		       u16 buf_size, struct ice_sq_cd *cd)
 {
 	struct ice_aqc_cfg_l2_node_cgd *cmd;
@@ -1602,7 +1595,7 @@ ice_sched_get_agg_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
  */
 static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)
 {
-	struct ice_aqc_get_elem buf;
+	struct ice_aqc_txsched_elem_data buf;
 	enum ice_status status;
 	u32 node_teid;
 
@@ -1611,7 +1604,7 @@ static bool ice_sched_check_node(struct ice_hw *hw, struct ice_sched_node *node)
 	if (status != ICE_SUCCESS)
 		return false;
 
-	if (memcmp(buf.generic, &node->info, sizeof(*buf.generic))) {
+	if (memcmp(&buf, &node->info, sizeof(buf))) {
 		ice_debug(hw, ICE_DBG_SCHED, "Node mismatch for teid=0x%x\n",
 			  node_teid);
 		return false;
@@ -2140,7 +2133,7 @@ bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node)
  */
 enum ice_status
 ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
-			  struct ice_aqc_get_elem *buf, u16 buf_size,
+			  struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
 			  struct ice_sq_cd *cd)
 {
 	struct ice_aqc_query_node_to_root *cmd;
@@ -2904,7 +2897,7 @@ static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
  * @node: pointer to node
  * @info: node info to update
  *
- * It updates the HW DB, and local SW DB of node. It updates the scheduling
+ * Update the HW DB, and local SW DB of node. Update the scheduling
  * parameters of node from argument info data buffer (Info->data buf) and
  * returns success or error on config sched element failure. The caller
  * needs to hold scheduler lock.
@@ -2913,18 +2906,18 @@ static enum ice_status
 ice_sched_update_elem(struct ice_hw *hw, struct ice_sched_node *node,
 		      struct ice_aqc_txsched_elem_data *info)
 {
-	struct ice_aqc_conf_elem buf;
+	struct ice_aqc_txsched_elem_data buf;
 	enum ice_status status;
 	u16 elem_cfgd = 0;
 	u16 num_elems = 1;
 
-	buf.generic[0] = *info;
+	buf = *info;
 	/* Parent TEID is reserved field in this aq call */
-	buf.generic[0].parent_teid = 0;
+	buf.parent_teid = 0;
 	/* Element type is reserved field in this aq call */
-	buf.generic[0].data.elem_type = 0;
+	buf.data.elem_type = 0;
 	/* Flags is reserved field in this aq call */
-	buf.generic[0].data.flags = 0;
+	buf.data.flags = 0;
 
 	/* Update HW DB */
 	/* Configure element node */
@@ -3875,9 +3868,9 @@ static struct ice_aqc_rl_profile_info *
 ice_sched_add_rl_profile(struct ice_port_info *pi,
 			 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
 {
-	struct ice_aqc_rl_profile_generic_elem *buf;
 	struct ice_aqc_rl_profile_info *rl_prof_elem;
 	u16 profiles_added = 0, num_profiles = 1;
+	struct ice_aqc_rl_profile_elem *buf;
 	enum ice_status status;
 	struct ice_hw *hw;
 	u8 profile_type;
@@ -3926,8 +3919,7 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
 	rl_prof_elem->profile.max_burst_size = CPU_TO_LE16(hw->max_burst_size);
 
 	/* Create new entry in HW DB */
-	buf = (struct ice_aqc_rl_profile_generic_elem *)
-		&rl_prof_elem->profile;
+	buf = &rl_prof_elem->profile;
 	status = ice_aq_add_rl_profile(hw, num_profiles, buf, sizeof(*buf),
 				       &profiles_added, NULL);
 	if (status || profiles_added != num_profiles)
diff --git a/drivers/net/ice/base/ice_sched.h b/drivers/net/ice/base/ice_sched.h
index 57bf4b59d..da2604c75 100644
--- a/drivers/net/ice/base/ice_sched.h
+++ b/drivers/net/ice/base/ice_sched.h
@@ -75,15 +75,15 @@ struct ice_sched_agg_info {
 /* FW AQ command calls */
 enum ice_status
 ice_aq_query_rl_profile(struct ice_hw *hw, u16 num_profiles,
-			struct ice_aqc_rl_profile_generic_elem *buf,
-			u16 buf_size, struct ice_sq_cd *cd);
+			struct ice_aqc_rl_profile_elem *buf, u16 buf_size,
+			struct ice_sq_cd *cd);
 enum ice_status
 ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_nodes,
-		       struct ice_aqc_cfg_l2_node_cgd_data *buf, u16 buf_size,
+		       struct ice_aqc_cfg_l2_node_cgd_elem *buf, u16 buf_size,
 		       struct ice_sq_cd *cd);
 enum ice_status
 ice_aq_query_sched_elems(struct ice_hw *hw, u16 elems_req,
-			 struct ice_aqc_get_elem *buf, u16 buf_size,
+			 struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
 			 u16 *elems_ret, struct ice_sq_cd *cd);
 enum ice_status ice_sched_init_port(struct ice_port_info *pi);
 enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw);
@@ -117,7 +117,7 @@ ice_sched_get_vsi_node(struct ice_port_info *pi, struct ice_sched_node *tc_node,
 bool ice_sched_is_tree_balanced(struct ice_hw *hw, struct ice_sched_node *node);
 enum ice_status
 ice_aq_query_node_to_root(struct ice_hw *hw, u32 node_teid,
-			  struct ice_aqc_get_elem *buf, u16 buf_size,
+			  struct ice_aqc_txsched_elem_data *buf, u16 buf_size,
 			  struct ice_sq_cd *cd);
 
 /* Tx scheduler rate limiter functions */
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index ebf405f7a..e0eebe3d5 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1421,7 +1421,7 @@ ice_init_def_sw_recp(struct ice_hw *hw, struct ice_sw_recipe **recp_list)
  * @num_elems: pointer to number of elements
  * @cd: pointer to command details structure or NULL
  *
- * Get switch configuration (0x0200) to be placed in 'buff'.
+ * Get switch configuration (0x0200) to be placed in buf.
  * This admin command returns information such as initial VSI/port number
  * and switch ID it belongs to.
  *
@@ -1438,13 +1438,13 @@ ice_init_def_sw_recp(struct ice_hw *hw, struct ice_sw_recipe **recp_list)
  * parsing the response buffer.
  */
 static enum ice_status
-ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp *buf,
+ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp_elem *buf,
 		  u16 buf_size, u16 *req_desc, u16 *num_elems,
 		  struct ice_sq_cd *cd)
 {
 	struct ice_aqc_get_sw_cfg *cmd;
-	enum ice_status status;
 	struct ice_aq_desc desc;
+	enum ice_status status;
 
 	ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_sw_cfg);
 	cmd = &desc.params.get_sw_conf;
@@ -2438,7 +2438,7 @@ ice_init_port_info(struct ice_port_info *pi, u16 vsi_port_num, u8 type,
  */
 enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)
 {
-	struct ice_aqc_get_sw_cfg_resp *rbuf;
+	struct ice_aqc_get_sw_cfg_resp_elem *rbuf;
 	enum ice_status status;
 	u8 num_total_ports;
 	u16 req_desc = 0;
@@ -2448,7 +2448,7 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)
 
 	num_total_ports = 1;
 
-	rbuf = (struct ice_aqc_get_sw_cfg_resp *)
+	rbuf = (struct ice_aqc_get_sw_cfg_resp_elem *)
 		ice_malloc(hw, ICE_SW_CFG_MAX_BUF_LEN);
 
 	if (!rbuf)
@@ -2460,19 +2460,19 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)
 	 * writing a non-zero value in req_desc
 	 */
 	do {
+		struct ice_aqc_get_sw_cfg_resp_elem *ele;
+
 		status = ice_aq_get_sw_cfg(hw, rbuf, ICE_SW_CFG_MAX_BUF_LEN,
 					   &req_desc, &num_elems, NULL);
 
 		if (status)
 			break;
 
-		for (i = 0; i < num_elems; i++) {
-			struct ice_aqc_get_sw_cfg_resp_elem *ele;
+		for (i = 0, ele = rbuf; i < num_elems; i++, ele++) {
 			u16 pf_vf_num, swid, vsi_port_num;
 			bool is_vf = false;
 			u8 res_type;
 
-			ele = rbuf[i].elements;
 			vsi_port_num = LE16_TO_CPU(ele->vsi_port_num) &
 				ICE_AQC_GET_SW_CONF_RESP_VSI_PORT_NUM_M;
 
@@ -3613,17 +3613,18 @@ ice_remove_rule_internal(struct ice_hw *hw, struct ice_sw_recipe *recp_list,
  * ice_aq_get_res_alloc - get allocated resources
  * @hw: pointer to the HW struct
  * @num_entries: pointer to u16 to store the number of resource entries returned
- * @buf: pointer to user-supplied buffer
- * @buf_size: size of buff
+ * @buf: pointer to buffer
+ * @buf_size: size of buf
  * @cd: pointer to command details structure or NULL
  *
- * The user-supplied buffer must be large enough to store the resource
+ * The caller-supplied buffer must be large enough to store the resource
  * information for all resource types. Each resource type is an
- * ice_aqc_get_res_resp_data_elem structure.
+ * ice_aqc_get_res_resp_elem structure.
  */
 enum ice_status
-ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,
-		     u16 buf_size, struct ice_sq_cd *cd)
+ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries,
+		     struct ice_aqc_get_res_resp_elem *buf, u16 buf_size,
+		     struct ice_sq_cd *cd)
 {
 	struct ice_aqc_get_res_alloc *resp;
 	enum ice_status status;
@@ -3650,8 +3651,8 @@ ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,
  * ice_aq_get_res_descs - get allocated resource descriptors
  * @hw: pointer to the hardware structure
  * @num_entries: number of resource entries in buffer
- * @buf: Indirect buffer to hold data parameters and response
- * @buf_size: size of buffer for indirect commands
+ * @buf: structure to hold response data buffer
+ * @buf_size: size of buffer
  * @res_type: resource type
  * @res_shared: is resource shared
  * @desc_id: input - first desc ID to start; output - next desc ID
@@ -3659,9 +3660,8 @@ ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,
  */
 enum ice_status
 ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
-		     struct ice_aqc_get_allocd_res_desc_resp *buf,
-		     u16 buf_size, u16 res_type, bool res_shared, u16 *desc_id,
-		     struct ice_sq_cd *cd)
+		     struct ice_aqc_res_elem *buf, u16 buf_size, u16 res_type,
+		     bool res_shared, u16 *desc_id, struct ice_sq_cd *cd)
 {
 	struct ice_aqc_get_allocd_res_desc *cmd;
 	struct ice_aq_desc desc;
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index 77c70d3b2..fe7b86f12 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -408,13 +408,13 @@ ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
 enum ice_status
 ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id);
 enum ice_status
-ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries, void *buf,
-		     u16 buf_size, struct ice_sq_cd *cd);
+ice_aq_get_res_alloc(struct ice_hw *hw, u16 *num_entries,
+		     struct ice_aqc_get_res_resp_elem *buf, u16 buf_size,
+		     struct ice_sq_cd *cd);
 enum ice_status
 ice_aq_get_res_descs(struct ice_hw *hw, u16 num_entries,
-		     struct ice_aqc_get_allocd_res_desc_resp *buf,
-		     u16 buf_size, u16 res_type, bool res_shared, u16 *desc_id,
-		     struct ice_sq_cd *cd);
+		     struct ice_aqc_res_elem *buf, u16 buf_size, u16 res_type,
+		     bool res_shared, u16 *desc_id, struct ice_sq_cd *cd);
 enum ice_status
 ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);
 enum ice_status
diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index c5dac2e32..d06b05da0 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -2056,7 +2056,7 @@ ice_get_hw_res(struct ice_hw *hw, uint16_t res_type,
 		uint16_t num, uint16_t desc_id,
 		uint16_t *prof_buf, uint16_t *num_prof)
 {
-	struct ice_aqc_get_allocd_res_desc_resp *resp_buf;
+	struct ice_aqc_res_elem *resp_buf;
 	int ret;
 	uint16_t buf_len;
 	bool res_shared = 1;
@@ -2065,7 +2065,7 @@ ice_get_hw_res(struct ice_hw *hw, uint16_t res_type,
 	struct ice_aqc_get_allocd_res_desc *cmd =
 			&aq_desc.params.get_res_desc;
 
-	buf_len = sizeof(resp_buf->elem) * num;
+	buf_len = sizeof(*resp_buf) * num;
 	resp_buf = ice_malloc(hw, buf_len);
 	if (!resp_buf)
 		return -ENOMEM;
@@ -2084,7 +2084,7 @@ ice_get_hw_res(struct ice_hw *hw, uint16_t res_type,
 	else
 		goto exit;
 
-	ice_memcpy(prof_buf, resp_buf->elem, sizeof(resp_buf->elem) *
+	ice_memcpy(prof_buf, resp_buf, sizeof(*resp_buf) *
 			(*num_prof), ICE_NONDMA_TO_NONDMA);
 
 exit:
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 04/40] net/ice/base: fix issues around move nodes
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (2 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 03/40] net/ice/base: avoid unnecessary single-member variable-length structs Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 05/40] net/ice/base: cleanup stack hog Qi Zhang
                     ` (35 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, stable, Victor Raj

1. Fixed the max children check when moving the last(8th) children. This
allows the parent node to hold 8 children instead of 7.
2. Check whether the VSI is already part of the given aggregator subtree
before moving it.

Fixes: 29a0c11489ef ("net/ice/base: clean code")
Cc: stable@dpdk.org

Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_sched.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index cf9a6a777..edd90aecb 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -2267,7 +2267,7 @@ ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
 		return ICE_ERR_PARAM;
 
 	/* Does parent have enough space */
-	if (parent->num_children + num_items >=
+	if (parent->num_children + num_items >
 	    hw->max_children[parent->tx_sched_layer])
 		return ICE_ERR_AQ_FULL;
 
@@ -2335,6 +2335,10 @@ ice_sched_move_vsi_to_agg(struct ice_port_info *pi, u16 vsi_handle, u32 agg_id,
 	if (!vsi_node)
 		return ICE_ERR_DOES_NOT_EXIST;
 
+	/* Is this VSI already part of given aggregator? */
+	if (ice_sched_find_node_in_subtree(pi->hw, agg_node, vsi_node))
+		return ICE_SUCCESS;
+
 	aggl = ice_sched_get_agg_layer(pi->hw);
 	vsil = ice_sched_get_vsi_layer(pi->hw);
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 05/40] net/ice/base: cleanup stack hog
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (3 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 04/40] net/ice/base: fix issues around move nodes Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 06/40] net/ice/base: clean the code wrapping Qi Zhang
                     ` (34 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Bruce Allan

In ice_flow_add_prof_sync(), struct ice_flow_prof_params has recently
grown in size hogging stack space when allocated there.  Hogging stack
space should be avoided.  Change allocation to be on the heap when needed.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_flow.c | 55 +++++++++++++++++++++++------------------
 1 file changed, 31 insertions(+), 24 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 552e58f9b..0169da995 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1815,52 +1815,57 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,
 		       struct ice_flow_action *acts, u8 acts_cnt,
 		       struct ice_flow_prof **prof)
 {
-	struct ice_flow_prof_params params;
+	struct ice_flow_prof_params *params;
 	enum ice_status status;
 	u8 i;
 
 	if (!prof || (acts_cnt && !acts))
 		return ICE_ERR_BAD_PTR;
 
-	ice_memset(&params, 0, sizeof(params), ICE_NONDMA_MEM);
-	params.prof = (struct ice_flow_prof *)
-		ice_malloc(hw, sizeof(*params.prof));
-	if (!params.prof)
+	params = (struct ice_flow_prof_params *)ice_malloc(hw, sizeof(*params));
+	if (!params)
 		return ICE_ERR_NO_MEMORY;
 
+	params->prof = (struct ice_flow_prof *)
+		ice_malloc(hw, sizeof(*params->prof));
+	if (!params->prof) {
+		status = ICE_ERR_NO_MEMORY;
+		goto free_params;
+	}
+
 	/* initialize extraction sequence to all invalid (0xff) */
 	for (i = 0; i < ICE_MAX_FV_WORDS; i++) {
-		params.es[i].prot_id = ICE_PROT_INVALID;
-		params.es[i].off = ICE_FV_OFFSET_INVAL;
+		params->es[i].prot_id = ICE_PROT_INVALID;
+		params->es[i].off = ICE_FV_OFFSET_INVAL;
 	}
 
-	params.blk = blk;
-	params.prof->id = prof_id;
-	params.prof->dir = dir;
-	params.prof->segs_cnt = segs_cnt;
+	params->blk = blk;
+	params->prof->id = prof_id;
+	params->prof->dir = dir;
+	params->prof->segs_cnt = segs_cnt;
 
 	/* Make a copy of the segments that need to be persistent in the flow
 	 * profile instance
 	 */
 	for (i = 0; i < segs_cnt; i++)
-		ice_memcpy(&params.prof->segs[i], &segs[i], sizeof(*segs),
+		ice_memcpy(&params->prof->segs[i], &segs[i], sizeof(*segs),
 			   ICE_NONDMA_TO_NONDMA);
 
 	/* Make a copy of the actions that need to be persistent in the flow
 	 * profile instance.
 	 */
 	if (acts_cnt) {
-		params.prof->acts = (struct ice_flow_action *)
+		params->prof->acts = (struct ice_flow_action *)
 			ice_memdup(hw, acts, acts_cnt * sizeof(*acts),
 				   ICE_NONDMA_TO_NONDMA);
 
-		if (!params.prof->acts) {
+		if (!params->prof->acts) {
 			status = ICE_ERR_NO_MEMORY;
 			goto out;
 		}
 	}
 
-	status = ice_flow_proc_segs(hw, &params);
+	status = ice_flow_proc_segs(hw, params);
 	if (status) {
 		ice_debug(hw, ICE_DBG_FLOW,
 			  "Error processing a flow's packet segments\n");
@@ -1868,24 +1873,26 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,
 	}
 
 	/* Add a HW profile for this flow profile */
-	status = ice_add_prof(hw, blk, prof_id, (u8 *)params.ptypes,
-			      params.attr, params.attr_cnt, params.es,
-			      params.mask);
+	status = ice_add_prof(hw, blk, prof_id, (u8 *)params->ptypes,
+			      params->attr, params->attr_cnt, params->es,
+			      params->mask);
 	if (status) {
 		ice_debug(hw, ICE_DBG_FLOW, "Error adding a HW flow profile\n");
 		goto out;
 	}
 
-	INIT_LIST_HEAD(&params.prof->entries);
-	ice_init_lock(&params.prof->entries_lock);
-	*prof = params.prof;
+	INIT_LIST_HEAD(&params->prof->entries);
+	ice_init_lock(&params->prof->entries_lock);
+	*prof = params->prof;
 
 out:
 	if (status) {
-		if (params.prof->acts)
-			ice_free(hw, params.prof->acts);
-		ice_free(hw, params.prof);
+		if (params->prof->acts)
+			ice_free(hw, params->prof->acts);
+		ice_free(hw, params->prof);
 	}
+free_params:
+	ice_free(hw, params);
 
 	return status;
 }
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 06/40] net/ice/base: clean the code wrapping
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (4 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 05/40] net/ice/base: cleanup stack hog Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 07/40] net/ice/base: cleanup misleading comment Qi Zhang
                     ` (33 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Tony Nguyen

To make the wrapping a little cleaner, move the variables only applicable
to ICE_FC_AUTO into that case. Also move caching of the value to only occur
on success.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 37 +++++++++++++++++++++----------------
 1 file changed, 21 insertions(+), 16 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 4be363047..92b2df741 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2754,36 +2754,39 @@ static enum ice_status
 ice_cfg_phy_fc(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
 	       enum ice_fc_mode req_mode)
 {
-	struct ice_aqc_get_phy_caps_data *pcaps = NULL;
 	struct ice_phy_cache_mode_data cache_data;
-	enum ice_status status = ICE_SUCCESS;
 	u8 pause_mask = 0x0;
 
 	if (!pi || !cfg)
 		return ICE_ERR_BAD_PTR;
 
-	pcaps = (struct ice_aqc_get_phy_caps_data *)
-		ice_malloc(pi->hw, sizeof(*pcaps));
-	if (!pcaps)
-		return ICE_ERR_NO_MEMORY;
-
-	/* Cache user FC request */
-	cache_data.data.curr_user_fc_req = req_mode;
-	ice_cache_phy_user_req(pi, cache_data, ICE_FC_MODE);
-
 	switch (req_mode) {
 	case ICE_FC_AUTO:
+	{
+		struct ice_aqc_get_phy_caps_data *pcaps;
+		enum ice_status status;
+
+		pcaps = (struct ice_aqc_get_phy_caps_data *)
+			ice_malloc(pi->hw, sizeof(*pcaps));
+		if (!pcaps)
+			return ICE_ERR_NO_MEMORY;
+
 		/* Query the value of FC that both the NIC and attached media
 		 * can do.
 		 */
 		status = ice_aq_get_phy_caps(pi, false, ICE_AQC_REPORT_TOPO_CAP,
 					     pcaps, NULL);
-		if (status)
-			goto out;
+		if (status) {
+			ice_free(pi->hw, pcaps);
+			return status;
+		}
 
 		pause_mask |= pcaps->caps & ICE_AQC_PHY_EN_TX_LINK_PAUSE;
 		pause_mask |= pcaps->caps & ICE_AQC_PHY_EN_RX_LINK_PAUSE;
+
+		ice_free(pi->hw, pcaps);
 		break;
+	}
 	case ICE_FC_FULL:
 		pause_mask |= ICE_AQC_PHY_EN_TX_LINK_PAUSE;
 		pause_mask |= ICE_AQC_PHY_EN_RX_LINK_PAUSE;
@@ -2805,9 +2808,11 @@ ice_cfg_phy_fc(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
 	/* set the new capabilities */
 	cfg->caps |= pause_mask;
 
-out:
-	ice_free(pi->hw, pcaps);
-	return status;
+	/* Cache user FC request */
+	cache_data.data.curr_user_fc_req = req_mode;
+	ice_cache_phy_user_req(pi, cache_data, ICE_FC_MODE);
+
+	return ICE_SUCCESS;
 }
 
 /**
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 07/40] net/ice/base: cleanup misleading comment
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (5 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 06/40] net/ice/base: clean the code wrapping Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 08/40] net/ice/base: silence static analysis warning Qi Zhang
                     ` (32 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Bruce Allan

The maximum Admin Queue buffer size and NVM shadow RAM sector size are both
4 Kilobytes. Some comments refer to those as 4Kb which can be confused with
4 Kilobits. Update the comments to use the commonly used KB symbol instead.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_nvm.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index bfeade6f9..2befe68d7 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -58,7 +58,7 @@ ice_aq_read_nvm(struct ice_hw *hw, u16 module_typeid, u32 offset, u16 length,
  *
  * Reads a portion of the NVM, as a flat memory space. This function correctly
  * breaks read requests across Shadow RAM sectors and ensures that no single
- * read request exceeds the maximum 4Kb read for a single AdminQ command.
+ * read request exceeds the maximum 4KB read for a single AdminQ command.
  *
  * Returns a status code on failure. Note that the data pointer may be
  * partially updated if some reads succeed before a failure.
@@ -86,10 +86,10 @@ ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,
 	do {
 		u32 read_size, sector_offset;
 
-		/* ice_aq_read_nvm cannot read more than 4Kb at a time.
+		/* ice_aq_read_nvm cannot read more than 4KB at a time.
 		 * Additionally, a read from the Shadow RAM may not cross over
 		 * a sector boundary. Conveniently, the sector size is also
-		 * 4Kb.
+		 * 4KB.
 		 */
 		sector_offset = offset % ICE_AQ_MAX_BUF_LEN;
 		read_size = MIN_T(u32, ICE_AQ_MAX_BUF_LEN - sector_offset,
@@ -164,7 +164,7 @@ ice_read_sr_buf_aq(struct ice_hw *hw, u16 offset, u16 *words, u16 *data)
 
 	ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
 
-	/* ice_read_flat_nvm takes into account the 4Kb AdminQ and Shadow RAM
+	/* ice_read_flat_nvm takes into account the 4KB AdminQ and Shadow RAM
 	 * sector restrictions necessary when reading from the NVM.
 	 */
 	status = ice_read_flat_nvm(hw, offset * 2, &bytes, (u8 *)data, true);
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 08/40] net/ice/base: silence static analysis warning
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (6 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 07/40] net/ice/base: cleanup misleading comment Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 09/40] net/ice/base: replace single-element array used for C struct hack Qi Zhang
                     ` (31 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Bruce Allan

Sparse warns about these casts to/from restricted types which are not
actual problems; silence the warnings.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_nvm.c    | 2 +-
 drivers/net/ice/base/ice_switch.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 2befe68d7..22d7d9439 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -138,7 +138,7 @@ ice_read_sr_word_aq(struct ice_hw *hw, u16 offset, u16 *data)
 	 * boundary
 	 */
 	status = ice_read_flat_nvm(hw, offset * sizeof(u16), &bytes,
-				   (u8 *)&data_local, true);
+				   (_FORCE_ u8 *)&data_local, true);
 	if (status)
 		return status;
 
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index e0eebe3d5..875922459 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -5774,7 +5774,7 @@ ice_fill_valid_words(struct ice_adv_lkup_elem *rule,
 			lkup_exts->fv_words[word].prot_id =
 				ice_prot_id_tbl[rule->type].protocol_id;
 			lkup_exts->field_mask[word] =
-				BE16_TO_CPU(((__be16 *)&rule->m_u)[j]);
+				BE16_TO_CPU(((_FORCE_ __be16 *)&rule->m_u)[j]);
 			word++;
 		}
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 09/40] net/ice/base: replace single-element array used for C struct hack
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (7 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 08/40] net/ice/base: silence static analysis warning Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 10/40] net/ice/base: introduce and use bitmap set API Qi Zhang
                     ` (30 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Bruce Allan

Convert the pre-C90-extension "C struct hack" method (using a single-
element array at the end of a structure for implementing variable-length
types) to the preferred use of C99 flexible array member.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_adminq_cmd.h | 22 +++++-----
 drivers/net/ice/base/ice_common.c     | 77 ++++++++++++++++++-----------------
 drivers/net/ice/base/ice_dcb.h        | 10 +----
 drivers/net/ice/base/ice_flex_pipe.c  | 33 ++++++++++-----
 drivers/net/ice/base/ice_flex_type.h  | 49 +++++++++-------------
 drivers/net/ice/base/ice_sched.c      | 10 +++--
 drivers/net/ice/base/ice_switch.c     | 32 ++++++---------
 drivers/net/ice/base/ice_switch.h     | 24 ++++-------
 drivers/net/ice/base/ice_type.h       |  7 ++++
 drivers/net/ice/ice_rxtx.c            | 43 ++++++++++++-------
 10 files changed, 158 insertions(+), 149 deletions(-)

diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index df41cce06..d7a57fe6b 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -312,7 +312,7 @@ struct ice_aqc_alloc_free_res_elem {
 #define ICE_AQC_RES_TYPE_VSI_PRUNE_LIST_M	\
 				(0xF << ICE_AQC_RES_TYPE_VSI_PRUNE_LIST_S)
 	__le16 num_elems;
-	struct ice_aqc_res_elem elem[1];
+	struct ice_aqc_res_elem elem[STRUCT_HACK_VAR_LEN];
 };
 
 /* Get Allocated Resource Descriptors Command (indirect 0x020A) */
@@ -812,7 +812,7 @@ struct ice_sw_rule_lkup_rx_tx {
 	 * lookup-type
 	 */
 	__le16 hdr_len;
-	u8 hdr[1];
+	u8 hdr[STRUCT_HACK_VAR_LEN];
 };
 
 /* Add/Update/Remove large action command/response entry
@@ -872,7 +872,7 @@ struct ice_sw_rule_lg_act {
 #define ICE_LG_ACT_STAT_COUNT		0x7
 #define ICE_LG_ACT_STAT_COUNT_S		3
 #define ICE_LG_ACT_STAT_COUNT_M		(0x7F << ICE_LG_ACT_STAT_COUNT_S)
-	__le32 act[1]; /* array of size for actions */
+	__le32 act[STRUCT_HACK_VAR_LEN]; /* array of size for actions */
 };
 
 /* Add/Update/Remove VSI list command/response entry
@@ -882,7 +882,7 @@ struct ice_sw_rule_lg_act {
 struct ice_sw_rule_vsi_list {
 	__le16 index; /* Index of VSI/Prune list */
 	__le16 number_vsi;
-	__le16 vsi[1]; /* Array of number_vsi VSI numbers */
+	__le16 vsi[STRUCT_HACK_VAR_LEN]; /* Array of number_vsi VSI numbers */
 };
 
 #pragma pack(1)
@@ -989,7 +989,7 @@ struct ice_aqc_txsched_move_grp_info_hdr {
 
 struct ice_aqc_move_elem {
 	struct ice_aqc_txsched_move_grp_info_hdr hdr;
-	__le32 teid[1];
+	__le32 teid[STRUCT_HACK_VAR_LEN];
 };
 
 struct ice_aqc_elem_info_bw {
@@ -1042,7 +1042,7 @@ struct ice_aqc_txsched_topo_grp_info_hdr {
 
 struct ice_aqc_add_elem {
 	struct ice_aqc_txsched_topo_grp_info_hdr hdr;
-	struct ice_aqc_txsched_elem_data generic[1];
+	struct ice_aqc_txsched_elem_data generic[STRUCT_HACK_VAR_LEN];
 };
 
 struct ice_aqc_get_topo_elem {
@@ -1053,7 +1053,7 @@ struct ice_aqc_get_topo_elem {
 
 struct ice_aqc_delete_elem {
 	struct ice_aqc_txsched_topo_grp_info_hdr hdr;
-	__le32 teid[1];
+	__le32 teid[STRUCT_HACK_VAR_LEN];
 };
 
 /* Query Port ETS (indirect 0x040E)
@@ -2426,7 +2426,7 @@ struct ice_aqc_add_tx_qgrp {
 	__le32 parent_teid;
 	u8 num_txqs;
 	u8 rsvd[3];
-	struct ice_aqc_add_txqs_perq txqs[1];
+	struct ice_aqc_add_txqs_perq txqs[STRUCT_HACK_VAR_LEN];
 };
 
 /* Disable Tx LAN Queues (indirect 0x0C31) */
@@ -2470,7 +2470,7 @@ struct ice_aqc_dis_txq_item {
 			(0 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S)
 #define ICE_AQC_Q_DIS_BUF_ELEM_TYPE_RDMA_QSET	\
 			(1 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S)
-	__le16 q_id[1];
+	__le16 q_id[STRUCT_HACK_VAR_LEN];
 };
 
 #pragma pack()
@@ -2514,7 +2514,7 @@ struct ice_aqc_move_txqs_elem {
 struct ice_aqc_move_txqs_data {
 	__le32 src_teid;
 	__le32 dest_teid;
-	struct ice_aqc_move_txqs_elem txqs[1];
+	struct ice_aqc_move_txqs_elem txqs[STRUCT_HACK_VAR_LEN];
 };
 
 /* Download Package (indirect 0x0C40) */
@@ -2567,7 +2567,7 @@ struct ice_aqc_get_pkg_info {
 /* Get Package Info List response buffer format (0x0C43) */
 struct ice_aqc_get_pkg_info_resp {
 	__le32 count;
-	struct ice_aqc_get_pkg_info pkg_info[1];
+	struct ice_aqc_get_pkg_info pkg_info[STRUCT_HACK_VAR_LEN];
 };
 
 /* Driver Shared Parameters (direct, 0x0C90) */
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 92b2df741..d9ad3217a 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1739,9 +1739,8 @@ ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res)
 	enum ice_status status;
 	u16 buf_len;
 
-	buf_len = ice_struct_size(buf, elem, num - 1);
-	buf = (struct ice_aqc_alloc_free_res_elem *)
-		ice_malloc(hw, buf_len);
+	buf_len = ice_struct_size(buf, elem, num);
+	buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
 	if (!buf)
 		return ICE_ERR_NO_MEMORY;
 
@@ -1757,7 +1756,7 @@ ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res)
 	if (status)
 		goto ice_alloc_res_exit;
 
-	ice_memcpy(res, buf->elem, sizeof(buf->elem) * num,
+	ice_memcpy(res, buf->elem, sizeof(*buf->elem) * num,
 		   ICE_NONDMA_TO_NONDMA);
 
 ice_alloc_res_exit:
@@ -1778,7 +1777,7 @@ enum ice_status ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)
 	enum ice_status status;
 	u16 buf_len;
 
-	buf_len = ice_struct_size(buf, elem, num - 1);
+	buf_len = ice_struct_size(buf, elem, num);
 	buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
 	if (!buf)
 		return ICE_ERR_NO_MEMORY;
@@ -1786,7 +1785,7 @@ enum ice_status ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res)
 	/* Prepare buffer to free resource. */
 	buf->num_elems = CPU_TO_LE16(num);
 	buf->res_type = CPU_TO_LE16(type);
-	ice_memcpy(buf->elem, res, sizeof(buf->elem) * num,
+	ice_memcpy(buf->elem, res, sizeof(*buf->elem) * num,
 		   ICE_NONDMA_TO_NONDMA);
 
 	status = ice_aq_alloc_free_res(hw, num, buf, buf_len,
@@ -3474,10 +3473,10 @@ ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,
 		   struct ice_aqc_add_tx_qgrp *qg_list, u16 buf_size,
 		   struct ice_sq_cd *cd)
 {
-	u16 i, sum_header_size, sum_q_size = 0;
 	struct ice_aqc_add_tx_qgrp *list;
 	struct ice_aqc_add_txqs *cmd;
 	struct ice_aq_desc desc;
+	u16 i, sum_size = 0;
 
 	ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
 
@@ -3491,18 +3490,13 @@ ice_aq_add_lan_txq(struct ice_hw *hw, u8 num_qgrps,
 	if (num_qgrps > ICE_LAN_TXQ_MAX_QGRPS)
 		return ICE_ERR_PARAM;
 
-	sum_header_size = num_qgrps *
-		(sizeof(*qg_list) - sizeof(*qg_list->txqs));
-
-	list = qg_list;
-	for (i = 0; i < num_qgrps; i++) {
-		struct ice_aqc_add_txqs_perq *q = list->txqs;
-
-		sum_q_size += list->num_txqs * sizeof(*q);
-		list = (struct ice_aqc_add_tx_qgrp *)(q + list->num_txqs);
+	for (i = 0, list = qg_list; i < num_qgrps; i++) {
+		sum_size += ice_struct_size(list, txqs, list->num_txqs);
+		list = (struct ice_aqc_add_tx_qgrp *)(list->txqs +
+						      list->num_txqs);
 	}
 
-	if (buf_size != (sum_header_size + sum_q_size))
+	if (buf_size != sum_size)
 		return ICE_ERR_PARAM;
 
 	desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
@@ -3530,6 +3524,7 @@ ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps,
 		   enum ice_disq_rst_src rst_src, u16 vmvf_num,
 		   struct ice_sq_cd *cd)
 {
+	struct ice_aqc_dis_txq_item *item;
 	struct ice_aqc_dis_txqs *cmd;
 	struct ice_aq_desc desc;
 	enum ice_status status;
@@ -3573,16 +3568,16 @@ ice_aq_dis_lan_txq(struct ice_hw *hw, u8 num_qgrps,
 	 */
 	desc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);
 
-	for (i = 0; i < num_qgrps; ++i) {
-		/* Calculate the size taken up by the queue IDs in this group */
-		sz += qg_list[i].num_qs * sizeof(qg_list[i].q_id);
-
-		/* Add the size of the group header */
-		sz += sizeof(qg_list[i]) - sizeof(qg_list[i].q_id);
+	for (i = 0, item = qg_list; i < num_qgrps; i++) {
+		u16 item_size = ice_struct_size(item, q_id, item->num_qs);
 
 		/* If the num of queues is even, add 2 bytes of padding */
-		if ((qg_list[i].num_qs % 2) == 0)
-			sz += 2;
+		if ((item->num_qs % 2) == 0)
+			item_size += 2;
+
+		sz += item_size;
+
+		item = (struct ice_aqc_dis_txq_item *)((u8 *)item + item_size);
 	}
 
 	if (buf_size != sz)
@@ -4268,24 +4263,32 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
 		struct ice_sq_cd *cd)
 {
 	enum ice_status status = ICE_ERR_DOES_NOT_EXIST;
-	struct ice_aqc_dis_txq_item qg_list;
+	struct ice_aqc_dis_txq_item *qg_list;
 	struct ice_q_ctx *q_ctx;
-	u16 i;
+	struct ice_hw *hw;
+	u16 i, buf_size;
 
 	if (!pi || pi->port_state != ICE_SCHED_PORT_STATE_READY)
 		return ICE_ERR_CFG;
 
+	hw = pi->hw;
+
 	if (!num_queues) {
 		/* if queue is disabled already yet the disable queue command
 		 * has to be sent to complete the VF reset, then call
 		 * ice_aq_dis_lan_txq without any queue information
 		 */
 		if (rst_src)
-			return ice_aq_dis_lan_txq(pi->hw, 0, NULL, 0, rst_src,
+			return ice_aq_dis_lan_txq(hw, 0, NULL, 0, rst_src,
 						  vmvf_num, NULL);
 		return ICE_ERR_CFG;
 	}
 
+	buf_size = ice_struct_size(qg_list, q_id, 1);
+	qg_list = (struct ice_aqc_dis_txq_item *)ice_malloc(hw, buf_size);
+	if (!qg_list)
+		return ICE_ERR_NO_MEMORY;
+
 	ice_acquire_lock(&pi->sched_lock);
 
 	for (i = 0; i < num_queues; i++) {
@@ -4294,23 +4297,22 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
 		node = ice_sched_find_node_by_teid(pi->root, q_teids[i]);
 		if (!node)
 			continue;
-		q_ctx = ice_get_lan_q_ctx(pi->hw, vsi_handle, tc, q_handles[i]);
+		q_ctx = ice_get_lan_q_ctx(hw, vsi_handle, tc, q_handles[i]);
 		if (!q_ctx) {
-			ice_debug(pi->hw, ICE_DBG_SCHED, "invalid queue handle%d\n",
+			ice_debug(hw, ICE_DBG_SCHED, "invalid queue handle%d\n",
 				  q_handles[i]);
 			continue;
 		}
 		if (q_ctx->q_handle != q_handles[i]) {
-			ice_debug(pi->hw, ICE_DBG_SCHED, "Err:handles %d %d\n",
+			ice_debug(hw, ICE_DBG_SCHED, "Err:handles %d %d\n",
 				  q_ctx->q_handle, q_handles[i]);
 			continue;
 		}
-		qg_list.parent_teid = node->info.parent_teid;
-		qg_list.num_qs = 1;
-		qg_list.q_id[0] = CPU_TO_LE16(q_ids[i]);
-		status = ice_aq_dis_lan_txq(pi->hw, 1, &qg_list,
-					    sizeof(qg_list), rst_src, vmvf_num,
-					    cd);
+		qg_list->parent_teid = node->info.parent_teid;
+		qg_list->num_qs = 1;
+		qg_list->q_id[0] = CPU_TO_LE16(q_ids[i]);
+		status = ice_aq_dis_lan_txq(hw, 1, qg_list, buf_size, rst_src,
+					    vmvf_num, cd);
 
 		if (status != ICE_SUCCESS)
 			break;
@@ -4318,6 +4320,7 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
 		q_ctx->q_handle = ICE_INVAL_Q_HANDLE;
 	}
 	ice_release_lock(&pi->sched_lock);
+	ice_free(hw, qg_list);
 	return status;
 }
 
diff --git a/drivers/net/ice/base/ice_dcb.h b/drivers/net/ice/base/ice_dcb.h
index 83b6e4d8f..8f0e09d50 100644
--- a/drivers/net/ice/base/ice_dcb.h
+++ b/drivers/net/ice/base/ice_dcb.h
@@ -103,17 +103,11 @@
 #define ICE_IEEE_APP_TLV_LEN		11
 
 #pragma pack(1)
-/* IEEE 802.1AB LLDP TLV structure */
-struct ice_lldp_generic_tlv {
-	__be16 typelen;
-	u8 tlvinfo[1];
-};
-
 /* IEEE 802.1AB LLDP Organization specific TLV */
 struct ice_lldp_org_tlv {
 	__be16 typelen;
 	__be32 ouisubtype;
-	u8 tlvinfo[1];
+	u8 tlvinfo[STRUCT_HACK_VAR_LEN];
 };
 #pragma pack()
 
@@ -136,7 +130,7 @@ struct ice_cee_feat_tlv {
 #define ICE_CEE_FEAT_TLV_WILLING_M	0x40
 #define ICE_CEE_FEAT_TLV_ERR_M		0x20
 	u8 subtype;
-	u8 tlvinfo[1];
+	u8 tlvinfo[STRUCT_HACK_VAR_LEN];
 };
 
 #pragma pack(1)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index bf8530e89..25d79b5c4 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1138,7 +1138,7 @@ static enum ice_status ice_get_pkg_info(struct ice_hw *hw)
 
 	ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
 
-	size = ice_struct_size(pkg_info, pkg_info, ICE_PKG_CNT - 1);
+	size = ice_struct_size(pkg_info, pkg_info, ICE_PKG_CNT);
 	pkg_info = (struct ice_aqc_get_pkg_info_resp *)ice_malloc(hw, size);
 	if (!pkg_info)
 		return ICE_ERR_NO_MEMORY;
@@ -1197,7 +1197,7 @@ static enum ice_status ice_verify_pkg(struct ice_pkg_hdr *pkg, u32 len)
 	u32 seg_count;
 	u32 i;
 
-	if (len < sizeof(*pkg))
+	if (len < ice_struct_size(pkg, seg_offset, 1))
 		return ICE_ERR_BUF_TOO_SHORT;
 
 	if (pkg->pkg_format_ver.major != ICE_PKG_FMT_VER_MAJ ||
@@ -1212,7 +1212,7 @@ static enum ice_status ice_verify_pkg(struct ice_pkg_hdr *pkg, u32 len)
 		return ICE_ERR_CFG;
 
 	/* make sure segment array fits in package length */
-	if (len < ice_struct_size(pkg, seg_offset, seg_count - 1))
+	if (len < ice_struct_size(pkg, seg_offset, seg_count))
 		return ICE_ERR_BUF_TOO_SHORT;
 
 	/* all segments must fit within length */
@@ -1321,7 +1321,7 @@ ice_chk_pkg_compat(struct ice_hw *hw, struct ice_pkg_hdr *ospkg,
 	}
 
 	/* Check if FW is compatible with the OS package */
-	size = ice_struct_size(pkg, pkg_info, ICE_PKG_CNT - 1);
+	size = ice_struct_size(pkg, pkg_info, ICE_PKG_CNT);
 	pkg = (struct ice_aqc_get_pkg_info_resp *)ice_malloc(hw, size);
 	if (!pkg)
 		return ICE_ERR_NO_MEMORY;
@@ -2049,14 +2049,14 @@ ice_create_tunnel(struct ice_hw *hw, enum ice_tunnel_type type, u16 port)
 
 	sect_rx = (struct ice_boost_tcam_section *)
 		ice_pkg_buf_alloc_section(bld, ICE_SID_RXPARSER_BOOST_TCAM,
-					  sizeof(*sect_rx));
+					  ice_struct_size(sect_rx, tcam, 1));
 	if (!sect_rx)
 		goto ice_create_tunnel_err;
 	sect_rx->count = CPU_TO_LE16(1);
 
 	sect_tx = (struct ice_boost_tcam_section *)
 		ice_pkg_buf_alloc_section(bld, ICE_SID_TXPARSER_BOOST_TCAM,
-					  sizeof(*sect_tx));
+					  ice_struct_size(sect_tx, tcam, 1));
 	if (!sect_tx)
 		goto ice_create_tunnel_err;
 	sect_tx->count = CPU_TO_LE16(1);
@@ -2134,7 +2134,7 @@ enum ice_status ice_destroy_tunnel(struct ice_hw *hw, u16 port, bool all)
 	}
 
 	/* size of section - there is at least one entry */
-	size = ice_struct_size(sect_rx, tcam, count - 1);
+	size = ice_struct_size(sect_rx, tcam, count);
 
 	bld = ice_pkg_buf_alloc(hw);
 	if (!bld) {
@@ -4092,7 +4092,9 @@ ice_prof_bld_es(struct ice_hw *hw, enum ice_block blk,
 
 			id = ice_sect_id(blk, ICE_VEC_TBL);
 			p = (struct ice_pkg_es *)
-				ice_pkg_buf_alloc_section(bld, id, sizeof(*p) +
+				ice_pkg_buf_alloc_section(bld, id,
+							  ice_struct_size(p, es,
+									  1) +
 							  vec_size -
 							  sizeof(p->es[0]));
 
@@ -4129,7 +4131,10 @@ ice_prof_bld_tcam(struct ice_hw *hw, enum ice_block blk,
 
 			id = ice_sect_id(blk, ICE_PROF_TCAM);
 			p = (struct ice_prof_id_section *)
-				ice_pkg_buf_alloc_section(bld, id, sizeof(*p));
+				ice_pkg_buf_alloc_section(bld, id,
+							  ice_struct_size(p,
+									  entry,
+									  1));
 
 			if (!p)
 				return ICE_ERR_MAX_LIMIT;
@@ -4166,7 +4171,10 @@ ice_prof_bld_xlt1(enum ice_block blk, struct ice_buf_build *bld,
 
 			id = ice_sect_id(blk, ICE_XLT1);
 			p = (struct ice_xlt1_section *)
-				ice_pkg_buf_alloc_section(bld, id, sizeof(*p));
+				ice_pkg_buf_alloc_section(bld, id,
+							  ice_struct_size(p,
+									  value,
+									  1));
 
 			if (!p)
 				return ICE_ERR_MAX_LIMIT;
@@ -4201,7 +4209,10 @@ ice_prof_bld_xlt2(enum ice_block blk, struct ice_buf_build *bld,
 		case ICE_VSIG_REM:
 			id = ice_sect_id(blk, ICE_XLT2);
 			p = (struct ice_xlt2_section *)
-				ice_pkg_buf_alloc_section(bld, id, sizeof(*p));
+				ice_pkg_buf_alloc_section(bld, id,
+							  ice_struct_size(p,
+									  value,
+									  1));
 
 			if (!p)
 				return ICE_ERR_MAX_LIMIT;
diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h
index b58007fb3..8f33efdd6 100644
--- a/drivers/net/ice/base/ice_flex_type.h
+++ b/drivers/net/ice/base/ice_flex_type.h
@@ -27,7 +27,7 @@ struct ice_fv {
 struct ice_pkg_hdr {
 	struct ice_pkg_ver pkg_format_ver;
 	__le32 seg_count;
-	__le32 seg_offset[1];
+	__le32 seg_offset[STRUCT_HACK_VAR_LEN];
 };
 
 /* generic segment */
@@ -58,12 +58,12 @@ struct ice_device_id_entry {
 struct ice_seg {
 	struct ice_generic_seg_hdr hdr;
 	__le32 device_table_count;
-	struct ice_device_id_entry device_table[1];
+	struct ice_device_id_entry device_table[STRUCT_HACK_VAR_LEN];
 };
 
 struct ice_nvm_table {
 	__le32 table_count;
-	__le32 vers[1];
+	__le32 vers[STRUCT_HACK_VAR_LEN];
 };
 
 struct ice_buf {
@@ -73,7 +73,7 @@ struct ice_buf {
 
 struct ice_buf_table {
 	__le32 buf_count;
-	struct ice_buf buf_array[1];
+	struct ice_buf buf_array[STRUCT_HACK_VAR_LEN];
 };
 
 /* global metadata specific segment */
@@ -106,11 +106,12 @@ struct ice_section_entry {
 struct ice_buf_hdr {
 	__le16 section_count;
 	__le16 data_end;
-	struct ice_section_entry section_entry[1];
+	struct ice_section_entry section_entry[STRUCT_HACK_VAR_LEN];
 };
 
 #define ICE_MAX_ENTRIES_IN_BUF(hd_sz, ent_sz) ((ICE_PKG_BUF_SIZE - \
-	sizeof(struct ice_buf_hdr) - (hd_sz)) / (ent_sz))
+	ice_struct_size((struct ice_buf_hdr *)0, section_entry, 1) - (hd_sz)) /\
+	(ent_sz))
 
 /* ice package section IDs */
 #define ICE_SID_XLT0_SW			10
@@ -400,17 +401,17 @@ struct ice_label {
 
 struct ice_label_section {
 	__le16 count;
-	struct ice_label label[1];
+	struct ice_label label[STRUCT_HACK_VAR_LEN];
 };
 
 #define ICE_MAX_LABELS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \
-	sizeof(struct ice_label_section) - sizeof(struct ice_label), \
-	sizeof(struct ice_label))
+	ice_struct_size((struct ice_label_section *)0, label, 1) - \
+	sizeof(struct ice_label), sizeof(struct ice_label))
 
 struct ice_sw_fv_section {
 	__le16 count;
 	__le16 base_offset;
-	struct ice_fv fv[1];
+	struct ice_fv fv[STRUCT_HACK_VAR_LEN];
 };
 
 struct ice_sw_fv_list_entry {
@@ -455,43 +456,32 @@ struct ice_boost_tcam_entry {
 struct ice_boost_tcam_section {
 	__le16 count;
 	__le16 reserved;
-	struct ice_boost_tcam_entry tcam[1];
+	struct ice_boost_tcam_entry tcam[STRUCT_HACK_VAR_LEN];
 };
 
 #define ICE_MAX_BST_TCAMS_IN_BUF ICE_MAX_ENTRIES_IN_BUF( \
-	sizeof(struct ice_boost_tcam_section) - \
+	ice_struct_size((struct ice_boost_tcam_section *)0, tcam, 1) - \
 	sizeof(struct ice_boost_tcam_entry), \
 	sizeof(struct ice_boost_tcam_entry))
 
-#pragma pack(1)
 struct ice_xlt1_section {
 	__le16 count;
 	__le16 offset;
-	u8 value[1];
+	u8 value[STRUCT_HACK_VAR_LEN];
 };
-#pragma pack()
-
-#define ICE_XLT1_SIZE(n)	(sizeof(struct ice_xlt1_section) + \
-				 (sizeof(u8) * ((n) - 1)))
 
 struct ice_xlt2_section {
 	__le16 count;
 	__le16 offset;
-	__le16 value[1];
+	__le16 value[STRUCT_HACK_VAR_LEN];
 };
 
-#define ICE_XLT2_SIZE(n)	(sizeof(struct ice_xlt2_section) + \
-				 (sizeof(u16) * ((n) - 1)))
-
 struct ice_prof_redir_section {
 	__le16 count;
 	__le16 offset;
-	u8 redir_value[1];
+	u8 redir_value[STRUCT_HACK_VAR_LEN];
 };
 
-#define ICE_PROF_REDIR_SIZE(n)	(sizeof(struct ice_prof_redir_section) + \
-				 (sizeof(u8) * ((n) - 1)))
-
 /* package buffer building */
 
 struct ice_buf_build {
@@ -548,7 +538,7 @@ struct ice_tunnel_table {
 struct ice_pkg_es {
 	__le16 count;
 	__le16 offset;
-	struct ice_fv_word es[1];
+	struct ice_fv_word es[STRUCT_HACK_VAR_LEN];
 };
 
 struct ice_es {
@@ -703,11 +693,12 @@ struct ice_prof_tcam_entry {
 	u8 prof_id;
 };
 
+#pragma pack()
+
 struct ice_prof_id_section {
 	__le16 count;
-	struct ice_prof_tcam_entry entry[1];
+	struct ice_prof_tcam_entry entry[STRUCT_HACK_VAR_LEN];
 };
-#pragma pack()
 
 struct ice_prof_tcam {
 	u32 sid;
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index edd90aecb..e189e95f7 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -237,7 +237,7 @@ ice_sched_remove_elems(struct ice_hw *hw, struct ice_sched_node *parent,
 	enum ice_status status;
 	u16 buf_size;
 
-	buf_size = sizeof(*buf) + sizeof(u32) * (num_nodes - 1);
+	buf_size = ice_struct_size(buf, teid, num_nodes);
 	buf = (struct ice_aqc_delete_elem *)ice_malloc(hw, buf_size);
 	if (!buf)
 		return ICE_ERR_NO_MEMORY;
@@ -892,7 +892,7 @@ ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
 	u16 buf_size;
 	u32 teid;
 
-	buf_size = ice_struct_size(buf, generic, num_nodes - 1);
+	buf_size = ice_struct_size(buf, generic, num_nodes);
 	buf = (struct ice_aqc_add_elem *)ice_malloc(hw, buf_size);
 	if (!buf)
 		return ICE_ERR_NO_MEMORY;
@@ -2260,6 +2260,7 @@ ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
 	struct ice_sched_node *node;
 	u16 i, grps_movd = 0;
 	struct ice_hw *hw;
+	u16 buf_len;
 
 	hw = pi->hw;
 
@@ -2271,7 +2272,8 @@ ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
 	    hw->max_children[parent->tx_sched_layer])
 		return ICE_ERR_AQ_FULL;
 
-	buf = (struct ice_aqc_move_elem *)ice_malloc(hw, sizeof(*buf));
+	buf_len = ice_struct_size(buf, teid, 1);
+	buf = (struct ice_aqc_move_elem *)ice_malloc(hw, buf_len);
 	if (!buf)
 		return ICE_ERR_NO_MEMORY;
 
@@ -2286,7 +2288,7 @@ ice_sched_move_nodes(struct ice_port_info *pi, struct ice_sched_node *parent,
 		buf->hdr.dest_parent_teid = parent->info.node_teid;
 		buf->teid[0] = node->info.node_teid;
 		buf->hdr.num_elems = CPU_TO_LE16(1);
-		status = ice_aq_move_sched_elems(hw, 1, buf, sizeof(*buf),
+		status = ice_aq_move_sched_elems(hw, 1, buf, buf_len,
 						 &grps_movd, NULL);
 		if (status && grps_movd != 1) {
 			status = ICE_ERR_CFG;
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 875922459..858a73222 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1478,9 +1478,8 @@ ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,
 	enum ice_status status;
 	u16 buf_len;
 
-	buf_len = sizeof(*sw_buf);
-	sw_buf = (struct ice_aqc_alloc_free_res_elem *)
-		   ice_malloc(hw, buf_len);
+	buf_len = ice_struct_size(sw_buf, elem, 1);
+	sw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
 	if (!sw_buf)
 		return ICE_ERR_NO_MEMORY;
 
@@ -1560,9 +1559,8 @@ enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
 	enum ice_status status, ret_status;
 	u16 buf_len;
 
-	buf_len = sizeof(*sw_buf);
-	sw_buf = (struct ice_aqc_alloc_free_res_elem *)
-		   ice_malloc(hw, buf_len);
+	buf_len = ice_struct_size(sw_buf, elem, 1);
+	sw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
 	if (!sw_buf)
 		return ICE_ERR_NO_MEMORY;
 
@@ -2103,9 +2101,8 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
 	enum ice_status status;
 	u16 buf_len;
 
-	buf_len = sizeof(*sw_buf);
-	sw_buf = (struct ice_aqc_alloc_free_res_elem *)
-		ice_malloc(hw, buf_len);
+	buf_len = ice_struct_size(sw_buf, elem, 1);
+	sw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
 	if (!sw_buf)
 		return ICE_ERR_NO_MEMORY;
 	sw_buf->num_elems = CPU_TO_LE16(1);
@@ -2387,7 +2384,7 @@ enum ice_status ice_alloc_recipe(struct ice_hw *hw, u16 *rid)
 	enum ice_status status;
 	u16 buf_len;
 
-	buf_len = sizeof(*sw_buf);
+	buf_len = ice_struct_size(sw_buf, elem, 1);
 	sw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
 	if (!sw_buf)
 		return ICE_ERR_NO_MEMORY;
@@ -5253,9 +5250,8 @@ ice_alloc_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
 	u16 buf_len;
 
 	/* Allocate resource */
-	buf_len = sizeof(*buf);
-	buf = (struct ice_aqc_alloc_free_res_elem *)
-		ice_malloc(hw, buf_len);
+	buf_len = ice_struct_size(buf, elem, 1);
+	buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
 	if (!buf)
 		return ICE_ERR_NO_MEMORY;
 
@@ -5292,9 +5288,8 @@ ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
 	u16 buf_len;
 
 	/* Free resource */
-	buf_len = sizeof(*buf);
-	buf = (struct ice_aqc_alloc_free_res_elem *)
-		ice_malloc(hw, buf_len);
+	buf_len = ice_struct_size(buf, elem, 1);
+	buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
 	if (!buf)
 		return ICE_ERR_NO_MEMORY;
 
@@ -5354,9 +5349,8 @@ ice_alloc_res_lg_act(struct ice_hw *hw, u16 *l_id, u16 num_acts)
 		return ICE_ERR_PARAM;
 
 	/* Allocate resource for large action */
-	buf_len = sizeof(*sw_buf);
-	sw_buf = (struct ice_aqc_alloc_free_res_elem *)
-		ice_malloc(hw, buf_len);
+	buf_len = ice_struct_size(sw_buf, elem, 1);
+	sw_buf = (struct ice_aqc_alloc_free_res_elem *)ice_malloc(hw, buf_len);
 	if (!sw_buf)
 		return ICE_ERR_NO_MEMORY;
 
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index fe7b86f12..aa446774c 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -45,25 +45,17 @@
 
 #define DUMMY_ETH_HDR_LEN		16
 #define ICE_SW_RULE_RX_TX_ETH_HDR_SIZE \
-	(sizeof(struct ice_aqc_sw_rules_elem) - \
-	 FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \
-	 sizeof(struct ice_sw_rule_lkup_rx_tx) + DUMMY_ETH_HDR_LEN - 1)
+	(offsetof(struct ice_aqc_sw_rules_elem, pdata.lkup_tx_rx.hdr) + \
+	 (DUMMY_ETH_HDR_LEN * \
+	  sizeof(((struct ice_sw_rule_lkup_rx_tx *)0)->hdr[0])))
 #define ICE_SW_RULE_RX_TX_NO_HDR_SIZE \
-	(sizeof(struct ice_aqc_sw_rules_elem) - \
-	 FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \
-	 sizeof(struct ice_sw_rule_lkup_rx_tx) - 1)
+	(offsetof(struct ice_aqc_sw_rules_elem, pdata.lkup_tx_rx.hdr))
 #define ICE_SW_RULE_LG_ACT_SIZE(n) \
-	(sizeof(struct ice_aqc_sw_rules_elem) - \
-	 FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \
-	 sizeof(struct ice_sw_rule_lg_act) - \
-	 FIELD_SIZEOF(struct ice_sw_rule_lg_act, act) + \
-	 ((n) * FIELD_SIZEOF(struct ice_sw_rule_lg_act, act)))
+	(offsetof(struct ice_aqc_sw_rules_elem, pdata.lg_act.act) + \
+	 ((n) * sizeof(((struct ice_sw_rule_lg_act *)0)->act[0])))
 #define ICE_SW_RULE_VSI_LIST_SIZE(n) \
-	(sizeof(struct ice_aqc_sw_rules_elem) - \
-	 FIELD_SIZEOF(struct ice_aqc_sw_rules_elem, pdata) + \
-	 sizeof(struct ice_sw_rule_vsi_list) - \
-	 FIELD_SIZEOF(struct ice_sw_rule_vsi_list, vsi) + \
-	 ((n) * FIELD_SIZEOF(struct ice_sw_rule_vsi_list, vsi)))
+	(offsetof(struct ice_aqc_sw_rules_elem, pdata.vsi_list.vsi) + \
+	 ((n) * sizeof(((struct ice_sw_rule_vsi_list *)0)->vsi[0])))
 
 /* Worst case buffer length for ice_aqc_opc_get_res_alloc */
 #define ICE_MAX_RES_TYPES 0x80
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 3775689a9..be6bdf9e7 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -34,6 +34,13 @@
 
 #define IS_ASCII(_ch)	((_ch) < 0x80)
 
+#define STRUCT_HACK_VAR_LEN
+/**
+ * ice_struct_size - size of struct with C99 flexible array member
+ * @ptr: pointer to structure
+ * @field: flexible array member (last member of the structure)
+ * @num: number of elements of that flexible array member
+ */
 #define ice_struct_size(ptr, field, num) \
 	(sizeof(*(ptr)) + sizeof(*(ptr)->field) * (num))
 
diff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c
index ad5844231..fecb13459 100644
--- a/drivers/net/ice/ice_rxtx.c
+++ b/drivers/net/ice/ice_rxtx.c
@@ -459,8 +459,9 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
 	int err;
 	struct ice_vsi *vsi;
 	struct ice_hw *hw;
-	struct ice_aqc_add_tx_qgrp txq_elem;
+	struct ice_aqc_add_tx_qgrp *txq_elem;
 	struct ice_tlan_ctx tx_ctx;
+	int buf_len;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -477,13 +478,17 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
 		return -EINVAL;
 	}
 
+	buf_len = ice_struct_size(txq_elem, txqs, 1);
+	txq_elem = ice_malloc(hw, buf_len);
+	if (!txq_elem)
+		return -ENOMEM;
+
 	vsi = txq->vsi;
 	hw = ICE_VSI_TO_HW(vsi);
 
-	memset(&txq_elem, 0, sizeof(txq_elem));
 	memset(&tx_ctx, 0, sizeof(tx_ctx));
-	txq_elem.num_txqs = 1;
-	txq_elem.txqs[0].txq_id = rte_cpu_to_le_16(txq->reg_idx);
+	txq_elem->num_txqs = 1;
+	txq_elem->txqs[0].txq_id = rte_cpu_to_le_16(txq->reg_idx);
 
 	tx_ctx.base = txq->tx_ring_dma / ICE_QUEUE_BASE_ADDR_UNIT;
 	tx_ctx.qlen = txq->nb_tx_desc;
@@ -495,7 +500,7 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
 	tx_ctx.tso_qnum = txq->reg_idx; /* index for tso state structure */
 	tx_ctx.legacy_int = 1; /* Legacy or Advanced Host Interface */
 
-	ice_set_ctx(hw, (uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,
+	ice_set_ctx(hw, (uint8_t *)&tx_ctx, txq_elem->txqs[0].txq_ctx,
 		    ice_tlan_ctx_info);
 
 	txq->qtx_tail = hw->hw_addr + QTX_COMM_DBELL(txq->reg_idx);
@@ -505,15 +510,18 @@ ice_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
 
 	/* Fix me, we assume TC always 0 here */
 	err = ice_ena_vsi_txq(hw->port_info, vsi->idx, 0, tx_queue_id, 1,
-			&txq_elem, sizeof(txq_elem), NULL);
+			txq_elem, buf_len, NULL);
 	if (err) {
 		PMD_DRV_LOG(ERR, "Failed to add lan txq");
+		rte_free(txq_elem);
 		return -EIO;
 	}
 	/* store the schedule node id */
-	txq->q_teid = txq_elem.txqs[0].q_teid;
+	txq->q_teid = txq_elem->txqs[0].q_teid;
 
 	dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
+
+	rte_free(txq_elem);
 	return 0;
 }
 
@@ -637,8 +645,9 @@ ice_fdir_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
 	int err;
 	struct ice_vsi *vsi;
 	struct ice_hw *hw;
-	struct ice_aqc_add_tx_qgrp txq_elem;
+	struct ice_aqc_add_tx_qgrp *txq_elem;
 	struct ice_tlan_ctx tx_ctx;
+	int buf_len;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -649,13 +658,17 @@ ice_fdir_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
 		return -EINVAL;
 	}
 
+	buf_len = ice_struct_size(txq_elem, txqs, 1);
+	txq_elem = ice_malloc(hw, buf_len);
+	if (!txq_elem)
+		return -ENOMEM;
+
 	vsi = txq->vsi;
 	hw = ICE_VSI_TO_HW(vsi);
 
-	memset(&txq_elem, 0, sizeof(txq_elem));
 	memset(&tx_ctx, 0, sizeof(tx_ctx));
-	txq_elem.num_txqs = 1;
-	txq_elem.txqs[0].txq_id = rte_cpu_to_le_16(txq->reg_idx);
+	txq_elem->num_txqs = 1;
+	txq_elem->txqs[0].txq_id = rte_cpu_to_le_16(txq->reg_idx);
 
 	tx_ctx.base = txq->tx_ring_dma / ICE_QUEUE_BASE_ADDR_UNIT;
 	tx_ctx.qlen = txq->nb_tx_desc;
@@ -667,7 +680,7 @@ ice_fdir_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
 	tx_ctx.tso_qnum = txq->reg_idx; /* index for tso state structure */
 	tx_ctx.legacy_int = 1; /* Legacy or Advanced Host Interface */
 
-	ice_set_ctx(hw, (uint8_t *)&tx_ctx, txq_elem.txqs[0].txq_ctx,
+	ice_set_ctx(hw, (uint8_t *)&tx_ctx, txq_elem->txqs[0].txq_ctx,
 		    ice_tlan_ctx_info);
 
 	txq->qtx_tail = hw->hw_addr + QTX_COMM_DBELL(txq->reg_idx);
@@ -677,14 +690,16 @@ ice_fdir_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
 
 	/* Fix me, we assume TC always 0 here */
 	err = ice_ena_vsi_txq(hw->port_info, vsi->idx, 0, tx_queue_id, 1,
-			      &txq_elem, sizeof(txq_elem), NULL);
+			      txq_elem, buf_len, NULL);
 	if (err) {
 		PMD_DRV_LOG(ERR, "Failed to add FDIR txq");
+		rte_free(txq_elem);
 		return -EIO;
 	}
 	/* store the schedule node id */
-	txq->q_teid = txq_elem.txqs[0].q_teid;
+	txq->q_teid = txq_elem->txqs[0].q_teid;
 
+	rte_free(txq_elem);
 	return 0;
 }
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 10/40] net/ice/base: introduce and use bitmap set API
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (8 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 09/40] net/ice/base: replace single-element array used for C struct hack Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 11/40] net/ice/base: introduce and use bitmap hamming weight API Qi Zhang
                     ` (29 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Bruce Allan

Introduce ice_bitmap_set() and use it instead of open-coding that
functionality.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_acl_ctrl.c  |  4 +---
 drivers/net/ice/base/ice_bitops.h    | 19 +++++++++++++++++++
 drivers/net/ice/base/ice_flex_pipe.c |  9 ++-------
 drivers/net/ice/base/ice_switch.c    |  3 +--
 4 files changed, 23 insertions(+), 12 deletions(-)

diff --git a/drivers/net/ice/base/ice_acl_ctrl.c b/drivers/net/ice/base/ice_acl_ctrl.c
index 5310b9d9f..a732397ce 100644
--- a/drivers/net/ice/base/ice_acl_ctrl.c
+++ b/drivers/net/ice/base/ice_acl_ctrl.c
@@ -354,7 +354,6 @@ ice_acl_create_tbl(struct ice_hw *hw, struct ice_acl_tbl_params *params)
 
 	/* call the AQ command to create the ACL table with these values */
 	status = ice_aq_alloc_acl_tbl(hw, &tbl_alloc, NULL);
-
 	if (status) {
 		if (LE16_TO_CPU(tbl_alloc.buf.resp_buf.alloc_id) <
 		    ICE_AQC_ALLOC_ID_LESS_THAN_4K)
@@ -415,8 +414,7 @@ ice_acl_create_tbl(struct ice_hw *hw, struct ice_acl_tbl_params *params)
 		(tbl->last_entry / ICE_ACL_ENTRY_ALLOC_UNIT);
 
 	/* Indicate available entries in the table */
-	for (i = first_e; i <= last_e; i++)
-		ice_set_bit(i, tbl->avail);
+	ice_bitmap_set(tbl->avail, first_e, last_e - first_e + 1);
 
 	INIT_LIST_HEAD(&tbl->scens);
 out:
diff --git a/drivers/net/ice/base/ice_bitops.h b/drivers/net/ice/base/ice_bitops.h
index 3022116a4..8352b5dd7 100644
--- a/drivers/net/ice/base/ice_bitops.h
+++ b/drivers/net/ice/base/ice_bitops.h
@@ -376,6 +376,25 @@ static inline void ice_cp_bitmap(ice_bitmap_t *dst, ice_bitmap_t *src, u16 size)
 }
 
 /**
+ * ice_bitmap_set - set a number of bits in bitmap from a starting position
+ * @dst: bitmap destination
+ * @pos: first bit position to set
+ * @num_bits: number of bits to set
+ *
+ * This function sets bits in a bitmap from pos to (pos + num_bits) - 1.
+ * Note that this function assumes it is operating on a bitmap declared using
+ * ice_declare_bitmap.
+ */
+static inline void
+ice_bitmap_set(ice_bitmap_t *dst, u16 pos, u16 num_bits)
+{
+	u16 i;
+
+	for (i = pos; i < num_bits; i++)
+		ice_set_bit(i, dst);
+}
+
+/**
  * ice_cmp_bitmaps - compares two bitmaps.
  * @bmp1: the bitmap to compare
  * @bmp2: the bitmap to compare with bmp1
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 25d79b5c4..a08390992 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1580,18 +1580,13 @@ ice_get_sw_fv_bitmap(struct ice_hw *hw, enum ice_prof_type req_profs,
 	struct ice_seg *ice_seg;
 	struct ice_fv *fv;
 
-	ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM);
-
 	if (req_profs == ICE_PROF_ALL) {
-		u16 i;
-
-		for (i = 0; i < ICE_MAX_NUM_PROFILES; i++)
-			ice_set_bit(i, bm);
+		ice_bitmap_set(bm, 0, ICE_MAX_NUM_PROFILES);
 		return;
 	}
 
+	ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM);
 	ice_zero_bitmap(bm, ICE_MAX_NUM_PROFILES);
-
 	ice_seg = hw->seg;
 	do {
 		enum ice_prof_type prof_type;
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 858a73222..41ebfedc6 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -5940,8 +5940,7 @@ ice_find_free_recp_res_idx(struct ice_hw *hw, const ice_bitmap_t *profiles,
 	ice_zero_bitmap(used_idx, ICE_MAX_FV_WORDS);
 	ice_zero_bitmap(free_idx, ICE_MAX_FV_WORDS);
 
-	for (count = 0; count < ICE_MAX_FV_WORDS; count++)
-		ice_set_bit(count, possible_idx);
+	ice_bitmap_set(possible_idx, 0, ICE_MAX_FV_WORDS);
 
 	/* For each profile we are going to associate the recipe with, add the
 	 * recipes that are associated with that profile. This will give us
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 11/40] net/ice/base: introduce and use bitmap hamming weight API
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (9 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 10/40] net/ice/base: introduce and use bitmap set API Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 12/40] net/ice/base: add function header Qi Zhang
                     ` (28 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Bruce Allan

Introduce ice_bitmap_hweight() and use it instead of open-coding that
functionality.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_bitops.h | 23 +++++++++++++++++++++++
 drivers/net/ice/base/ice_switch.c | 11 +----------
 2 files changed, 24 insertions(+), 10 deletions(-)

diff --git a/drivers/net/ice/base/ice_bitops.h b/drivers/net/ice/base/ice_bitops.h
index 8352b5dd7..a56d55455 100644
--- a/drivers/net/ice/base/ice_bitops.h
+++ b/drivers/net/ice/base/ice_bitops.h
@@ -395,6 +395,29 @@ ice_bitmap_set(ice_bitmap_t *dst, u16 pos, u16 num_bits)
 }
 
 /**
+ * ice_bitmap_hweight - hamming weight of bitmap
+ * @bm: bitmap pointer
+ * @size: size of bitmap (in bits)
+ *
+ * This function determines the number of set bits in a bitmap.
+ * Note that this function assumes it is operating on a bitmap declared using
+ * ice_declare_bitmap.
+ */
+static inline int
+ice_bitmap_hweight(ice_bitmap_t *bm, u16 size)
+{
+	int count = 0;
+	u16 bit = 0;
+
+	while (size > (bit = ice_find_next_bit(bm, size, bit))) {
+		count++;
+		bit++;
+	}
+
+	return count;
+}
+
+/**
  * ice_cmp_bitmaps - compares two bitmaps.
  * @bmp1: the bitmap to compare
  * @bmp2: the bitmap to compare with bmp1
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 41ebfedc6..ecb411714 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -5932,7 +5932,6 @@ ice_find_free_recp_res_idx(struct ice_hw *hw, const ice_bitmap_t *profiles,
 	ice_declare_bitmap(possible_idx, ICE_MAX_FV_WORDS);
 	ice_declare_bitmap(recipes, ICE_MAX_NUM_RECIPES);
 	ice_declare_bitmap(used_idx, ICE_MAX_FV_WORDS);
-	u16 count = 0;
 	u16 bit;
 
 	ice_zero_bitmap(possible_idx, ICE_MAX_FV_WORDS);
@@ -5971,15 +5970,7 @@ ice_find_free_recp_res_idx(struct ice_hw *hw, const ice_bitmap_t *profiles,
 	ice_xor_bitmap(free_idx, used_idx, possible_idx, ICE_MAX_FV_WORDS);
 
 	/* return number of free indexes */
-	count = 0;
-	bit = 0;
-	while (ICE_MAX_FV_WORDS >
-	       (bit = ice_find_next_bit(free_idx, ICE_MAX_FV_WORDS, bit))) {
-		count++;
-		bit++;
-	}
-
-	return count;
+	return (u16)ice_bitmap_hweight(free_idx, ICE_MAX_FV_WORDS);
 }
 
 /**
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 12/40] net/ice/base: add function header
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (10 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 11/40] net/ice/base: introduce and use bitmap hamming weight API Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 13/40] net/ice/base: introduce and use for each bit iterator Qi Zhang
                     ` (27 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Tony Nguyen

Add a function header for ice_cfg_phy_fc()

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index d9ad3217a..fdde85774 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2749,6 +2749,12 @@ enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options)
 	return ICE_FEC_NONE;
 }
 
+/**
+ * ice_cfg_phy_fc - Configure PHY FC data based on FC mode
+ * @pi: port information structure
+ * @cfg: PHY configuration data to set FC mode
+ * @req_mode: FC mode to configure
+ */
 static enum ice_status
 ice_cfg_phy_fc(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
 	       enum ice_fc_mode req_mode)
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 13/40] net/ice/base: introduce and use for each bit iterator
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (11 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 12/40] net/ice/base: add function header Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 14/40] net/ice/base: correct abbreviations Qi Zhang
                     ` (26 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Bruce Allan

A number of code flows iterate over a block of memory to do something for
every bit set in that memory. Use existing bit operations in a new iterator
macro to make those code flows cleaner.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_acl_ctrl.c  | 17 +++-----
 drivers/net/ice/base/ice_bitops.h    |  5 +++
 drivers/net/ice/base/ice_flex_pipe.c | 66 ++++++++++++++-----------------
 drivers/net/ice/base/ice_flow.c      | 75 +++++++++++-------------------------
 drivers/net/ice/base/ice_switch.c    | 59 ++++++++++++----------------
 5 files changed, 85 insertions(+), 137 deletions(-)

diff --git a/drivers/net/ice/base/ice_acl_ctrl.c b/drivers/net/ice/base/ice_acl_ctrl.c
index a732397ce..49c4f3675 100644
--- a/drivers/net/ice/base/ice_acl_ctrl.c
+++ b/drivers/net/ice/base/ice_acl_ctrl.c
@@ -1028,9 +1028,8 @@ ice_acl_prog_act(struct ice_hw *hw, struct ice_acl_scen *scen,
 	entry_tcam = ICE_ACL_TBL_TCAM_IDX(scen->start);
 	idx = ICE_ACL_TBL_TCAM_ENTRY_IDX(scen->start + entry_idx);
 
-	i = ice_find_first_bit(scen->act_mem_bitmap,
-			       ICE_AQC_MAX_ACTION_MEMORIES);
-	while (i < ICE_AQC_MAX_ACTION_MEMORIES) {
+	ice_for_each_set_bit(i, scen->act_mem_bitmap,
+			     ICE_AQC_MAX_ACTION_MEMORIES) {
 		struct ice_acl_act_mem *mem = &hw->acl_tbl->act_mems[i];
 
 		if (actx_idx >= acts_cnt)
@@ -1057,9 +1056,6 @@ ice_acl_prog_act(struct ice_hw *hw, struct ice_acl_scen *scen,
 			}
 			actx_idx++;
 		}
-
-		i = ice_find_next_bit(scen->act_mem_bitmap,
-				      ICE_AQC_MAX_ACTION_MEMORIES, i + 1);
 	}
 
 	if (!status && actx_idx < acts_cnt)
@@ -1111,9 +1107,9 @@ ice_acl_rem_entry(struct ice_hw *hw, struct ice_acl_scen *scen, u16 entry_idx)
 	}
 
 	ice_memset(&act_buf, 0, sizeof(act_buf), ICE_NONDMA_MEM);
-	i = ice_find_first_bit(scen->act_mem_bitmap,
-			       ICE_AQC_MAX_ACTION_MEMORIES);
-	while (i < ICE_AQC_MAX_ACTION_MEMORIES) {
+
+	ice_for_each_set_bit(i, scen->act_mem_bitmap,
+			     ICE_AQC_MAX_ACTION_MEMORIES) {
 		struct ice_acl_act_mem *mem = &hw->acl_tbl->act_mems[i];
 
 		if (mem->member_of_tcam >= entry_tcam &&
@@ -1126,9 +1122,6 @@ ice_acl_rem_entry(struct ice_hw *hw, struct ice_acl_scen *scen, u16 entry_idx)
 					  "program actpair failed.status: %d\n",
 					  status);
 		}
-
-		i = ice_find_next_bit(scen->act_mem_bitmap,
-				      ICE_AQC_MAX_ACTION_MEMORIES, i + 1);
 	}
 
 	ice_acl_scen_free_entry_idx(scen, entry_idx);
diff --git a/drivers/net/ice/base/ice_bitops.h b/drivers/net/ice/base/ice_bitops.h
index a56d55455..f954a7436 100644
--- a/drivers/net/ice/base/ice_bitops.h
+++ b/drivers/net/ice/base/ice_bitops.h
@@ -346,6 +346,11 @@ static inline u16 ice_find_first_bit(const ice_bitmap_t *bitmap, u16 size)
 	return ice_find_next_bit(bitmap, size, 0);
 }
 
+#define ice_for_each_set_bit(_bitpos, _addr, _maxlen)	\
+	for ((_bitpos) = ice_find_first_bit((_addr), (_maxlen)); \
+	     (_bitpos) < (_maxlen); \
+	     (_bitpos) = ice_find_next_bit((_addr), (_maxlen), (_bitpos) + 1))
+
 /**
  * ice_is_any_bit_set - Return true of any bit in the bitmap is set
  * @bitmap: the bitmap to check
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index a08390992..3df7b8596 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -4665,50 +4665,42 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
 			byte++;
 			continue;
 		}
+
 		/* Examine 8 bits per byte */
-		for (bit = 0; bit < 8; bit++) {
-			if (ptypes[byte] & BIT(bit)) {
-				u16 ptype;
-				u8 ptg;
-				u8 m;
+		ice_for_each_set_bit(bit, (ice_bitmap_t *)&ptypes[byte],
+				     BITS_PER_BYTE) {
+			u16 ptype;
+			u8 ptg;
 
-				ptype = byte * BITS_PER_BYTE + bit;
+			ptype = byte * BITS_PER_BYTE + bit;
 
-				/* The package should place all ptypes in a
-				 * non-zero PTG, so the following call should
-				 * never fail.
-				 */
-				if (ice_ptg_find_ptype(hw, blk, ptype, &ptg))
-					continue;
+			/* The package should place all ptypes in a non-zero
+			 * PTG, so the following call should never fail.
+			 */
+			if (ice_ptg_find_ptype(hw, blk, ptype, &ptg))
+				continue;
 
-				/* If PTG is already added, skip and continue */
-				if (ice_is_bit_set(ptgs_used, ptg))
-					continue;
+			/* If PTG is already added, skip and continue */
+			if (ice_is_bit_set(ptgs_used, ptg))
+				continue;
 
-				ice_set_bit(ptg, ptgs_used);
-				/* Check to see there are any attributes for
-				 * this ptype, and add them if found.
+			ice_set_bit(ptg, ptgs_used);
+			/* Check to see there are any attributes for this
+			 * ptype, and add them if found.
+			 */
+			status = ice_add_prof_attrib(prof, ptg, ptype, attr,
+						     attr_cnt);
+			if (status == ICE_ERR_MAX_LIMIT)
+				break;
+			if (status) {
+				/* This is simple a ptype/PTG with no
+				 * attribute
 				 */
-				status = ice_add_prof_attrib(prof, ptg, ptype,
-							     attr, attr_cnt);
-				if (status == ICE_ERR_MAX_LIMIT)
-					break;
-				if (status) {
-					/* This is simple a ptype/PTG with no
-					 * attribute
-					 */
-					prof->ptg[prof->ptg_cnt] = ptg;
-					prof->attr[prof->ptg_cnt].flags = 0;
-					prof->attr[prof->ptg_cnt].mask = 0;
-
-					if (++prof->ptg_cnt >=
-					    ICE_MAX_PTG_PER_PROFILE)
-						break;
-				}
+				prof->ptg[prof->ptg_cnt] = ptg;
+				prof->attr[prof->ptg_cnt].flags = 0;
+				prof->attr[prof->ptg_cnt].mask = 0;
 
-				/* nothing left in byte, then exit */
-				m = ~(u8)((1 << (bit + 1)) - 1);
-				if (!(ptypes[byte] & m))
+				if (++prof->ptg_cnt >= ICE_MAX_PTG_PER_PROFILE)
 					break;
 			}
 		}
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 0169da995..98c07778b 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1340,16 +1340,12 @@ ice_flow_create_xtrct_seq(struct ice_hw *hw,
 		u64 match = params->prof->segs[i].match;
 		enum ice_flow_field j;
 
-		for (j = 0; j < ICE_FLOW_FIELD_IDX_MAX && match; j++) {
-			const u64 bit = BIT_ULL(j);
-
-			if (match & bit) {
-				status = ice_flow_xtract_fld(hw, params, i, j,
-							     match);
-				if (status)
-					return status;
-				match &= ~bit;
-			}
+		ice_for_each_set_bit(j, (ice_bitmap_t *)&match,
+				     ICE_FLOW_FIELD_IDX_MAX) {
+			status = ice_flow_xtract_fld(hw, params, i, j, match);
+			if (status)
+				return status;
+			ice_clear_bit(j, (ice_bitmap_t *)&match);
 		}
 
 		/* Process raw matching bytes */
@@ -1406,17 +1402,12 @@ ice_flow_acl_def_entry_frmt(struct ice_flow_prof_params *params)
 
 	for (i = 0; i < params->prof->segs_cnt; i++) {
 		struct ice_flow_seg_info *seg = &params->prof->segs[i];
-		u64 match = seg->match;
 		u8 j;
 
-		for (j = 0; j < ICE_FLOW_FIELD_IDX_MAX && match; j++) {
-			struct ice_flow_fld_info *fld;
-			const u64 bit = BIT_ULL(j);
+		ice_for_each_set_bit(j, (ice_bitmap_t *)&seg->match,
+				     ICE_FLOW_FIELD_IDX_MAX) {
+			struct ice_flow_fld_info *fld = &seg->fields[j];
 
-			if (!(match & bit))
-				continue;
-
-			fld = &seg->fields[j];
 			fld->entry.mask = ICE_FLOW_FLD_OFF_INVAL;
 
 			if (fld->type == ICE_FLOW_FLD_TYPE_RANGE) {
@@ -1448,8 +1439,6 @@ ice_flow_acl_def_entry_frmt(struct ice_flow_prof_params *params)
 				fld->entry.val = index;
 				index += fld->entry.last;
 			}
-
-			match &= ~bit;
 		}
 
 		for (j = 0; j < seg->raws_cnt; j++) {
@@ -2028,25 +2017,18 @@ ice_flow_acl_set_xtrct_seq(struct ice_hw *hw, struct ice_flow_prof *prof)
 
 		for (i = 0; i < prof->segs_cnt; i++) {
 			struct ice_flow_seg_info *seg = &prof->segs[i];
-			u64 match = seg->match;
 			u16 j;
 
-			for (j = 0; j < ICE_FLOW_FIELD_IDX_MAX && match; j++) {
-				const u64 bit = BIT_ULL(j);
-
-				if (!(match & bit))
-					continue;
-
+			ice_for_each_set_bit(j, (ice_bitmap_t *)&seg->match,
+					     ICE_FLOW_FIELD_IDX_MAX) {
 				info = &seg->fields[j];
 
 				if (info->type == ICE_FLOW_FLD_TYPE_RANGE)
 					buf.word_selection[info->entry.val] =
-								info->xtrct.idx;
+						info->xtrct.idx;
 				else
 					ice_flow_acl_set_xtrct_seq_fld(&buf,
 								       info);
-
-				match &= ~bit;
 			}
 
 			for (j = 0; j < seg->raws_cnt; j++) {
@@ -2549,17 +2531,11 @@ ice_flow_acl_frmt_entry(struct ice_hw *hw, struct ice_flow_prof *prof,
 
 	for (i = 0; i < prof->segs_cnt; i++) {
 		struct ice_flow_seg_info *seg = &prof->segs[i];
-		u64 match = seg->match;
-		u16 j;
-
-		for (j = 0; j < ICE_FLOW_FIELD_IDX_MAX && match; j++) {
-			struct ice_flow_fld_info *info;
-			const u64 bit = BIT_ULL(j);
-
-			if (!(match & bit))
-				continue;
+		u8 j;
 
-			info = &seg->fields[j];
+		ice_for_each_set_bit(j, (ice_bitmap_t *)&seg->match,
+				     ICE_FLOW_FIELD_IDX_MAX) {
+			struct ice_flow_fld_info *info = &seg->fields[j];
 
 			if (info->type == ICE_FLOW_FLD_TYPE_RANGE)
 				ice_flow_acl_frmt_entry_range(j, info,
@@ -2568,8 +2544,6 @@ ice_flow_acl_frmt_entry(struct ice_hw *hw, struct ice_flow_prof *prof,
 			else
 				ice_flow_acl_frmt_entry_fld(j, info, buf,
 							    dontcare, data);
-
-			match &= ~bit;
 		}
 
 		for (j = 0; j < seg->raws_cnt; j++) {
@@ -3271,20 +3245,15 @@ static enum ice_status
 ice_flow_set_rss_seg_info(struct ice_flow_seg_info *segs, u64 hash_fields,
 			  u32 flow_hdr)
 {
-	u64 val = hash_fields;
+	u64 val;
 	u8 i;
 
-	for (i = 0; val && i < ICE_FLOW_FIELD_IDX_MAX; i++) {
-		u64 bit = BIT_ULL(i);
+	ice_for_each_set_bit(i, (ice_bitmap_t *)&hash_fields,
+			     ICE_FLOW_FIELD_IDX_MAX)
+		ice_flow_set_fld(segs, (enum ice_flow_field)i,
+				 ICE_FLOW_FLD_OFF_INVAL, ICE_FLOW_FLD_OFF_INVAL,
+				 ICE_FLOW_FLD_OFF_INVAL, false);
 
-		if (val & bit) {
-			ice_flow_set_fld(segs, (enum ice_flow_field)i,
-					 ICE_FLOW_FLD_OFF_INVAL,
-					 ICE_FLOW_FLD_OFF_INVAL,
-					 ICE_FLOW_FLD_OFF_INVAL, false);
-			val &= ~bit;
-		}
-	}
 	ICE_FLOW_SET_HDRS(segs, flow_hdr);
 
 	if (segs->hdrs & ~ICE_FLOW_RSS_SEG_HDR_VAL_MASKS &
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index ecb411714..f2d8514be 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1374,9 +1374,8 @@ static void ice_get_recp_to_prof_map(struct ice_hw *hw)
 			continue;
 		ice_cp_bitmap(profile_to_recipe[i], r_bitmap,
 			      ICE_MAX_NUM_RECIPES);
-		for (j = 0; j < ICE_MAX_NUM_RECIPES; j++)
-			if (ice_is_bit_set(r_bitmap, j))
-				ice_set_bit(i, recipe_to_profile[j]);
+		ice_for_each_set_bit(j, r_bitmap, ICE_MAX_NUM_RECIPES)
+			ice_set_bit(i, recipe_to_profile[j]);
 	}
 }
 
@@ -5946,26 +5945,21 @@ ice_find_free_recp_res_idx(struct ice_hw *hw, const ice_bitmap_t *profiles,
 	 * the set of recipes that our recipe may collide with. Also, determine
 	 * what possible result indexes are usable given this set of profiles.
 	 */
-	bit = 0;
-	while (ICE_MAX_NUM_PROFILES >
-	       (bit = ice_find_next_bit(profiles, ICE_MAX_NUM_PROFILES, bit))) {
+	ice_for_each_set_bit(bit, profiles, ICE_MAX_NUM_PROFILES) {
 		ice_or_bitmap(recipes, recipes, profile_to_recipe[bit],
 			      ICE_MAX_NUM_RECIPES);
 		ice_and_bitmap(possible_idx, possible_idx,
 			       hw->switch_info->prof_res_bm[bit],
 			       ICE_MAX_FV_WORDS);
-		bit++;
 	}
 
 	/* For each recipe that our new recipe may collide with, determine
 	 * which indexes have been used.
 	 */
-	for (bit = 0; bit < ICE_MAX_NUM_RECIPES; bit++)
-		if (ice_is_bit_set(recipes, bit)) {
-			ice_or_bitmap(used_idx, used_idx,
-				      hw->switch_info->recp_list[bit].res_idxs,
-				      ICE_MAX_FV_WORDS);
-		}
+	ice_for_each_set_bit(bit, recipes, ICE_MAX_NUM_RECIPES)
+		ice_or_bitmap(used_idx, used_idx,
+			      hw->switch_info->recp_list[bit].res_idxs,
+			      ICE_MAX_FV_WORDS);
 
 	ice_xor_bitmap(free_idx, used_idx, possible_idx, ICE_MAX_FV_WORDS);
 
@@ -6650,18 +6644,17 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
 	if (LIST_EMPTY(&rm->fv_list)) {
 		u16 j;
 
-		for (j = 0; j < ICE_MAX_NUM_PROFILES; j++)
-			if (ice_is_bit_set(fv_bitmap, j)) {
-				struct ice_sw_fv_list_entry *fvl;
-
-				fvl = (struct ice_sw_fv_list_entry *)
-					ice_malloc(hw, sizeof(*fvl));
-				if (!fvl)
-					goto err_unroll;
-				fvl->fv_ptr = NULL;
-				fvl->profile_id = j;
-				LIST_ADD(&fvl->list_entry, &rm->fv_list);
-			}
+		ice_for_each_set_bit(j, fv_bitmap, ICE_MAX_NUM_PROFILES) {
+			struct ice_sw_fv_list_entry *fvl;
+
+			fvl = (struct ice_sw_fv_list_entry *)
+				ice_malloc(hw, sizeof(*fvl));
+			if (!fvl)
+				goto err_unroll;
+			fvl->fv_ptr = NULL;
+			fvl->profile_id = j;
+			LIST_ADD(&fvl->list_entry, &rm->fv_list);
+		}
 	}
 
 	/* get bitmap of all profiles the recipe will be associated with */
@@ -6716,10 +6709,9 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
 			      ICE_MAX_NUM_RECIPES);
 
 		/* Update recipe to profile bitmap array */
-		for (j = 0; j < ICE_MAX_NUM_RECIPES; j++)
-			if (ice_is_bit_set(r_bitmap, j))
-				ice_set_bit((u16)fvit->profile_id,
-					    recipe_to_profile[j]);
+		ice_for_each_set_bit(j, rm->r_bitmap, ICE_MAX_NUM_RECIPES)
+			ice_set_bit((u16)fvit->profile_id,
+				    recipe_to_profile[j]);
 	}
 
 	*rid = rm->root_rid;
@@ -7909,6 +7901,7 @@ ice_replay_fltr(struct ice_hw *hw, u8 recp_id, struct LIST_HEAD_TYPE *list_head)
 	LIST_FOR_EACH_ENTRY(itr, &l_head, ice_fltr_mgmt_list_entry,
 			    list_entry) {
 		struct ice_fltr_list_entry f_entry;
+		u16 vsi_handle;
 
 		f_entry.fltr_info = itr->fltr_info;
 		if (itr->vsi_count < 2 && recp_id != ICE_SW_LKUP_VLAN) {
@@ -7920,12 +7913,8 @@ ice_replay_fltr(struct ice_hw *hw, u8 recp_id, struct LIST_HEAD_TYPE *list_head)
 		}
 
 		/* Add a filter per VSI separately */
-		while (1) {
-			u16 vsi_handle;
-
-			vsi_handle =
-				ice_find_first_bit(itr->vsi_list_info->vsi_map,
-						   ICE_MAX_VSI);
+		ice_for_each_set_bit(vsi_handle, itr->vsi_list_info->vsi_map,
+				     ICE_MAX_VSI) {
 			if (!ice_is_vsi_valid(hw, vsi_handle))
 				break;
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 14/40] net/ice/base: correct abbreviations
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (12 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 13/40] net/ice/base: introduce and use for each bit iterator Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 15/40] net/ice/base: add AQ cmd 0X0A0A LLDP fltr control Qi Zhang
                     ` (25 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Tony Nguyen

Correct abbreviations as identified by abbrevcheck

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_flex_pipe.c |  6 +++---
 drivers/net/ice/base/ice_sched.c     | 16 ++++++++--------
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 3df7b8596..d4b2e4f29 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -5228,7 +5228,7 @@ ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,
 
 	/* for re-enabling, reallocate a TCAM */
 	/* for entries with empty attribute masks, allocate entry from
-	 * the bottom of the tcam table; otherwise, allocate from the
+	 * the bottom of the TCAM table; otherwise, allocate from the
 	 * top of the table in order to give it higher priority
 	 */
 	status = ice_alloc_tcam_ent(hw, blk, tcam->attr.mask == 0,
@@ -5439,7 +5439,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
 
 		/* allocate the TCAM entry index */
 		/* for entries with empty attribute masks, allocate entry from
-		 * the bottom of the tcam table; otherwise, allocate from the
+		 * the bottom of the TCAM table; otherwise, allocate from the
 		 * top of the table in order to give it higher priority
 		 */
 		status = ice_alloc_tcam_ent(hw, blk, map->attr[i].mask == 0,
@@ -5872,7 +5872,7 @@ ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl)
 
 			if (last_profile) {
 				/* If there are no profiles left for this VSIG,
-				 * then simply remove the the VSIG.
+				 * then simply remove the VSIG.
 				 */
 				status = ice_rem_vsig(hw, blk, vsig, &chg);
 				if (status)
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index e189e95f7..f5f3b85d6 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -1435,14 +1435,14 @@ ice_sched_find_node_in_subtree(struct ice_hw *hw, struct ice_sched_node *base,
 }
 
 /**
- * ice_sched_get_free_qgrp - Scan all Q group siblings and find a free node
+ * ice_sched_get_free_qgrp - Scan all queue group siblings and find a free node
  * @pi: port information structure
  * @vsi_node: software VSI handle
- * @qgrp_node: first Q group node identified for scanning
+ * @qgrp_node: first queue group node identified for scanning
  * @owner: LAN or RDMA
  *
- * This function retrieves a free LAN or RDMA Q group node by scanning
- * qgrp_node and its siblings for the Q group with the fewest number
+ * This function retrieves a free LAN or RDMA queue group node by scanning
+ * qgrp_node and its siblings for the queue group with the fewest number
  * of queues currently assigned.
  */
 static struct ice_sched_node *
@@ -1459,17 +1459,17 @@ ice_sched_get_free_qgrp(struct ice_port_info *pi,
 	if (!min_children)
 		return qgrp_node;
 	min_qgrp = qgrp_node;
-	/* scan all Q groups until find a node which has less than the
-	 * minimum number of children. This way all Q group nodes get
+	/* scan all queue groups until find a node which has less than the
+	 * minimum number of children. This way all queue group nodes get
 	 * equal number of shares and active. The bandwidth will be equally
-	 * distributed across all Qs.
+	 * distributed across all queues.
 	 */
 	while (qgrp_node) {
 		/* make sure the qgroup node is part of the VSI subtree */
 		if (ice_sched_find_node_in_subtree(pi->hw, vsi_node, qgrp_node))
 			if (qgrp_node->num_children < min_children &&
 			    qgrp_node->owner == owner) {
-				/* replace the new min Q group node */
+				/* replace the new min queue group node */
 				min_qgrp = qgrp_node;
 				min_children = min_qgrp->num_children;
 				/* break if it has no children, */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 15/40] net/ice/base: add AQ cmd 0X0A0A LLDP fltr control
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (13 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 14/40] net/ice/base: correct abbreviations Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 16/40] net/ice/base: add support for GTP-U type switch rule Qi Zhang
                     ` (24 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Dave Ertman

As of NVM ver 1.7.1 there is a new AQ command to add and remove
LLDP filters for Rx flow.  This patch implements the support
structure to implement this functionality.

Signed-off-by: Dave Ertman <david.m.ertman@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 47 +++++++++++++++++++++++++++++++++++++++
 drivers/net/ice/base/ice_common.h |  3 +++
 drivers/net/ice/base/ice_type.h   |  4 ++++
 3 files changed, 54 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index fdde85774..87dc9db43 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -4799,3 +4799,50 @@ ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
 
 	return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);
 }
+
+/**
+ * ice_fw_supports_lldp_fltr - check NVM version supports lldp_fltr_ctrl
+ * @hw: pointer to HW struct
+ */
+bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw)
+{
+	if (hw->mac_type != ICE_MAC_E810)
+		return false;
+
+	if (hw->api_maj_ver == ICE_FW_API_LLDP_FLTR_MAJ) {
+		if (hw->api_min_ver > ICE_FW_API_LLDP_FLTR_MIN)
+			return true;
+		if (hw->api_min_ver == ICE_FW_API_LLDP_FLTR_MIN &&
+		    hw->api_patch >= ICE_FW_API_LLDP_FLTR_PATCH)
+			return true;
+	} else if (hw->api_maj_ver > ICE_FW_API_LLDP_FLTR_MAJ) {
+		return true;
+	}
+	return false;
+}
+
+/**
+ * ice_lldp_fltr_add_remove - add or remove a LLDP Rx switch filter
+ * @hw: pointer to HW struct
+ * @vsi_num: absolute HW index for VSI
+ * @add: boolean for if adding or removing a filter
+ */
+enum ice_status
+ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add)
+{
+	struct ice_aqc_lldp_filter_ctrl *cmd;
+	struct ice_aq_desc desc;
+
+	cmd = &desc.params.lldp_filter_ctrl;
+
+	ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_filter_ctrl);
+
+	if (add)
+		cmd->cmd_flags = ICE_AQC_LLDP_FILTER_ACTION_ADD;
+	else
+		cmd->cmd_flags = ICE_AQC_LLDP_FILTER_ACTION_DELETE;
+
+	cmd->vsi_num = CPU_TO_LE16(vsi_num);
+
+	return ice_aq_send_cmd(hw, &desc, NULL, 0, NULL);
+}
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index 1aea915ad..d176f7495 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -223,4 +223,7 @@ ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
 enum ice_status
 ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
 		    struct ice_sq_cd *cd);
+bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw);
+enum ice_status
+ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add);
 #endif /* _ICE_COMMON_H_ */
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index be6bdf9e7..c558a1cb0 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -1122,4 +1122,8 @@ enum ice_sw_fwd_act_type {
 #define GLPCI_LBARCTRL_VF_PE_DB_SIZE_8KB 0x1
 #define GLPCI_LBARCTRL_VF_PE_DB_SIZE_64KB 0x2
 
+/* AQ API version for LLDP_FILTER_CONTROL */
+#define ICE_FW_API_LLDP_FLTR_MAJ	1
+#define ICE_FW_API_LLDP_FLTR_MIN	7
+#define ICE_FW_API_LLDP_FLTR_PATCH	1
 #endif /* _ICE_TYPE_H_ */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 16/40] net/ice/base: add support for GTP-U type switch rule
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (14 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 15/40] net/ice/base: add AQ cmd 0X0A0A LLDP fltr control Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 17/40] net/ice/base: join format strings to same line Qi Zhang
                     ` (23 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Wei Zhao

This patch add support for GTP-U type of switch rule.
It enable all GTP-U related ptype.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_protocol_type.h |   7 +
 drivers/net/ice/base/ice_switch.c        | 299 ++++++++++++++++++++++++++++++-
 drivers/net/ice/base/ice_switch.h        |  26 ++-
 3 files changed, 328 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index 7cc44c172..4d3136fb2 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -51,6 +51,7 @@ enum ice_protocol_type {
 	ICE_ESP,
 	ICE_AH,
 	ICE_NAT_T,
+	ICE_GTP_NO_PAY,
 	ICE_PROTOCOL_LAST
 };
 
@@ -71,6 +72,12 @@ enum ice_sw_tunnel_type {
 	ICE_SW_IPV6_TCP,
 	ICE_SW_IPV6_UDP,
 	ICE_SW_TUN_GTP,
+	ICE_SW_TUN_IPV4_GTPU_NO_PAY,
+	ICE_SW_TUN_IPV6_GTPU_NO_PAY,
+	ICE_SW_TUN_IPV4_GTPU_IPV4,
+	ICE_SW_TUN_IPV4_GTPU_IPV6,
+	ICE_SW_TUN_IPV6_GTPU_IPV4,
+	ICE_SW_TUN_IPV6_GTPU_IPV6,
 	ICE_SW_TUN_PPPOE,
 	ICE_SW_TUN_PPPOE_PAY,
 	ICE_SW_TUN_PPPOE_IPV4,
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index f2d8514be..69fa64ac9 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -535,6 +535,207 @@ static const u8 dummy_udp_gtp_packet[] = {
 	0x00, 0x00, 0x00, 0x00,
 };
 
+static const
+struct ice_dummy_pkt_offsets dummy_ipv4_gtpu_ipv4_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_IPV4_OFOS,	14 },
+	{ ICE_UDP_OF,		34 },
+	{ ICE_GTP,		42 },
+	{ ICE_IPV4_IL,		62 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_ipv4_gtpu_ipv4_packet[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x08, 0x00,
+
+	0x45, 0x00, 0x00, 0x44, /* ICE_IPV4_OFOS 14 */
+	0x00, 0x00, 0x40, 0x00,
+	0x40, 0x11, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x08, 0x68, 0x08, 0x68, /* ICE_UDP_OF 34 */
+	0x00, 0x00, 0x00, 0x00,
+
+	0x34, 0xff, 0x00, 0x28,  /* ICE_GTP 42 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x85,
+
+	0x02, 0x00, 0x00, 0x00, /* PDU Session extension header */
+	0x00, 0x00, 0x00, 0x00,
+
+	0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 62 */
+	0x00, 0x00, 0x40, 0x00,
+	0x40, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00,
+};
+
+static const
+struct ice_dummy_pkt_offsets dummy_ipv4_gtpu_ipv6_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_IPV4_OFOS,	14 },
+	{ ICE_UDP_OF,		34 },
+	{ ICE_GTP,		42 },
+	{ ICE_IPV6_IL,		62 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_ipv4_gtpu_ipv6_packet[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x08, 0x00,
+
+	0x45, 0x00, 0x00, 0x58, /* ICE_IPV4_OFOS 14 */
+	0x00, 0x00, 0x40, 0x00,
+	0x40, 0x11, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x08, 0x68, 0x08, 0x68, /* ICE_UDP_OF 34 */
+	0x00, 0x00, 0x00, 0x00,
+
+	0x34, 0xff, 0x00, 0x28,  /* ICE_GTP 42 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x85,
+
+	0x02, 0x00, 0x00, 0x00, /* PDU Session extension header */
+	0x00, 0x00, 0x00, 0x00,
+
+	0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_IL 62 */
+	0x00, 0x00, 0x3b, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00,
+};
+
+static const
+struct ice_dummy_pkt_offsets dummy_ipv6_gtpu_ipv4_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_IPV6_OFOS,	14 },
+	{ ICE_UDP_OF,		54 },
+	{ ICE_GTP,		62 },
+	{ ICE_IPV4_IL,		82 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_ipv6_gtpu_ipv4_packet[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x86, 0xdd,
+
+	0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 14 */
+	0x00, 0x58, 0x11, 0x00, /* Next header UDP*/
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x08, 0x68, 0x08, 0x68, /* ICE_UDP_OF 54 */
+	0x00, 0x00, 0x00, 0x00,
+
+	0x34, 0xff, 0x00, 0x28,  /* ICE_GTP 62 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x85,
+
+	0x02, 0x00, 0x00, 0x00, /* PDU Session extension header */
+	0x00, 0x00, 0x00, 0x00,
+
+	0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 82 */
+	0x00, 0x00, 0x40, 0x00,
+	0x40, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00,
+};
+
+static const
+struct ice_dummy_pkt_offsets dummy_ipv6_gtpu_ipv6_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_IPV6_OFOS,	14 },
+	{ ICE_UDP_OF,		54 },
+	{ ICE_GTP,		62 },
+	{ ICE_IPV6_IL,		82 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_ipv6_gtpu_ipv6_packet[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x86, 0xdd,
+
+	0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 14 */
+	0x00, 0x6c, 0x11, 0x00, /* Next header UDP*/
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x08, 0x68, 0x08, 0x68, /* ICE_UDP_OF 54 */
+	0x00, 0x00, 0x00, 0x00,
+
+	0x34, 0xff, 0x00, 0x28,  /* ICE_GTP 62 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x85,
+
+	0x02, 0x00, 0x00, 0x00, /* PDU Session extension header */
+	0x00, 0x00, 0x00, 0x00,
+
+	0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFIL 82 */
+	0x00, 0x00, 0x3b, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00,
+};
+
+static const
+struct ice_dummy_pkt_offsets dummy_ipv4_gtp_no_pay_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_IPV4_OFOS,	14 },
+	{ ICE_UDP_OF,		34 },
+	{ ICE_GTP_NO_PAY,	42 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const
+struct ice_dummy_pkt_offsets dummy_ipv6_gtp_no_pay_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_IPV6_OFOS,	14 },
+	{ ICE_UDP_OF,		54 },
+	{ ICE_GTP_NO_PAY,	62 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
 static const struct ice_dummy_pkt_offsets dummy_pppoe_packet_offsets[] = {
 	{ ICE_MAC_OFOS,		0 },
 	{ ICE_ETYPE_OL,		12 },
@@ -1070,11 +1271,13 @@ static enum ice_sw_tunnel_type ice_get_tun_type_for_recipe(u8 rid)
 		}
 
 		if (j >= ICE_PROFID_IPV4_GTPU_EH_IPV4_OTHER &&
-		    j <= ICE_PROFID_IPV6_GTPU_IPV6_OTHER)
+		    j <= ICE_PROFID_IPV6_GTPU_IPV6_TCP)
 			gtp_valid = true;
 
-		if (j >= ICE_PROFID_IPV4_ESP &&
-		    j <= ICE_PROFID_IPV6_PFCP_SESSION)
+		if ((j >= ICE_PROFID_IPV4_ESP &&
+		     j <= ICE_PROFID_IPV6_PFCP_SESSION) ||
+		    (j >= ICE_PROFID_IPV4_GTPC_TEID &&
+		     j <= ICE_PROFID_IPV6_GTPU_TEID))
 			flag_valid = true;
 	}
 
@@ -1092,6 +1295,8 @@ static enum ice_sw_tunnel_type ice_get_tun_type_for_recipe(u8 rid)
 	else if (non_tun_valid && !vxlan_valid && !gre_valid && !gtp_valid &&
 		 !pppoe_valid)
 		tun_type = ICE_NON_TUN;
+	else
+		tun_type = ICE_NON_TUN;
 
 	if (profile_num > 1 && tun_type == ICE_SW_TUN_PPPOE) {
 		i = ice_is_bit_set(recipe_to_profile[rid],
@@ -1104,6 +1309,21 @@ static enum ice_sw_tunnel_type ice_get_tun_type_for_recipe(u8 rid)
 			tun_type = ICE_SW_TUN_PPPOE_IPV6;
 	}
 
+	if (tun_type == ICE_SW_TUN_GTP) {
+		if (ice_is_bit_set(recipe_to_profile[rid],
+				   ICE_PROFID_IPV4_GTPU_IPV4_OTHER))
+			tun_type = ICE_SW_TUN_IPV4_GTPU_IPV4;
+		else if (ice_is_bit_set(recipe_to_profile[rid],
+					ICE_PROFID_IPV4_GTPU_IPV6_OTHER))
+			tun_type = ICE_SW_TUN_IPV4_GTPU_IPV6;
+		else if (ice_is_bit_set(recipe_to_profile[rid],
+					ICE_PROFID_IPV6_GTPU_IPV4_OTHER))
+			tun_type = ICE_SW_TUN_IPV6_GTPU_IPV4;
+		else if (ice_is_bit_set(recipe_to_profile[rid],
+					ICE_PROFID_IPV6_GTPU_IPV6_OTHER))
+			tun_type = ICE_SW_TUN_IPV6_GTPU_IPV6;
+	}
+
 	if (profile_num == 1 && (flag_valid || non_tun_valid || pppoe_valid)) {
 		for (j = 0; j < ICE_MAX_NUM_PROFILES; j++) {
 			if (ice_is_bit_set(recipe_to_profile[rid], j)) {
@@ -1181,6 +1401,12 @@ static enum ice_sw_tunnel_type ice_get_tun_type_for_recipe(u8 rid)
 				case ICE_PROFID_MAC_IPV6_L2TPV3:
 					tun_type = ICE_SW_TUN_IPV6_L2TPV3;
 					break;
+				case ICE_PROFID_IPV4_GTPU_TEID:
+					tun_type = ICE_SW_TUN_IPV4_GTPU_NO_PAY;
+					break;
+				case ICE_PROFID_IPV6_GTPU_TEID:
+					tun_type = ICE_SW_TUN_IPV6_GTPU_NO_PAY;
+					break;
 				default:
 					break;
 				}
@@ -5608,6 +5834,7 @@ static const struct ice_prot_ext_tbl_entry ice_prot_ext[ICE_PROTOCOL_LAST] = {
 	{ ICE_ESP,		{ 0, 2, 4, 6 } },
 	{ ICE_AH,		{ 0, 2, 4, 6, 8, 10 } },
 	{ ICE_NAT_T,		{ 8, 10, 12, 14 } },
+	{ ICE_GTP_NO_PAY,	{ 8, 10, 12, 14 } },
 };
 
 /* The following table describes preferred grouping of recipes.
@@ -5640,6 +5867,7 @@ static const struct ice_protocol_entry ice_prot_id_tbl[ICE_PROTOCOL_LAST] = {
 	{ ICE_ESP,		ICE_ESP_HW },
 	{ ICE_AH,		ICE_AH_HW },
 	{ ICE_NAT_T,		ICE_UDP_ILOS_HW },
+	{ ICE_GTP_NO_PAY,	ICE_UDP_ILOS_HW },
 };
 
 /**
@@ -6507,6 +6735,38 @@ ice_get_compat_fv_bitmap(struct ice_hw *hw, struct ice_adv_rule_info *rinfo,
 	case ICE_SW_IPV6_UDP:
 		ice_set_bit(ICE_PROFID_IPV6_UDP, bm);
 		return;
+	case ICE_SW_TUN_IPV4_GTPU_IPV4:
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_EH_IPV4_OTHER, bm);
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_IPV4_OTHER, bm);
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_EH_IPV4_UDP, bm);
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_IPV4_UDP, bm);
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_EH_IPV4_TCP, bm);
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_IPV4_TCP, bm);
+		return;
+	case ICE_SW_TUN_IPV6_GTPU_IPV4:
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_EH_IPV4_OTHER, bm);
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_IPV4_OTHER, bm);
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_EH_IPV4_UDP, bm);
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_IPV4_UDP, bm);
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_EH_IPV4_TCP, bm);
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_IPV4_TCP, bm);
+		return;
+	case ICE_SW_TUN_IPV4_GTPU_IPV6:
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_EH_IPV6_OTHER, bm);
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_IPV6_OTHER, bm);
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_EH_IPV6_UDP, bm);
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_IPV6_UDP, bm);
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_EH_IPV6_TCP, bm);
+		ice_set_bit(ICE_PROFID_IPV4_GTPU_IPV6_TCP, bm);
+		return;
+	case ICE_SW_TUN_IPV6_GTPU_IPV6:
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_EH_IPV6_OTHER, bm);
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_IPV6_OTHER, bm);
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_EH_IPV6_UDP, bm);
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_IPV6_UDP, bm);
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_EH_IPV6_TCP, bm);
+		ice_set_bit(ICE_PROFID_IPV6_GTPU_IPV6_TCP, bm);
+		return;
 	case ICE_SW_TUN_AND_NON_TUN:
 	default:
 		prof_type = ICE_PROF_ALL;
@@ -6797,6 +7057,38 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
 			tcp = true;
 	}
 
+	if (tun_type == ICE_SW_TUN_IPV4_GTPU_NO_PAY) {
+		*pkt = dummy_ipv4_gtpu_ipv4_packet;
+		*pkt_len = sizeof(dummy_ipv4_gtpu_ipv4_packet);
+		*offsets = dummy_ipv4_gtp_no_pay_packet_offsets;
+		return;
+	} else if (tun_type == ICE_SW_TUN_IPV6_GTPU_NO_PAY) {
+		*pkt = dummy_ipv6_gtpu_ipv6_packet;
+		*pkt_len = sizeof(dummy_ipv6_gtpu_ipv6_packet);
+		*offsets = dummy_ipv6_gtp_no_pay_packet_offsets;
+		return;
+	} else if (tun_type == ICE_SW_TUN_IPV4_GTPU_IPV4) {
+		*pkt = dummy_ipv4_gtpu_ipv4_packet;
+		*pkt_len = sizeof(dummy_ipv4_gtpu_ipv4_packet);
+		*offsets = dummy_ipv4_gtpu_ipv4_packet_offsets;
+		return;
+	} else if (tun_type == ICE_SW_TUN_IPV4_GTPU_IPV6) {
+		*pkt = dummy_ipv4_gtpu_ipv6_packet;
+		*pkt_len = sizeof(dummy_ipv4_gtpu_ipv6_packet);
+		*offsets = dummy_ipv4_gtpu_ipv6_packet_offsets;
+		return;
+	} else if (tun_type == ICE_SW_TUN_IPV6_GTPU_IPV4) {
+		*pkt = dummy_ipv6_gtpu_ipv4_packet;
+		*pkt_len = sizeof(dummy_ipv6_gtpu_ipv4_packet);
+		*offsets = dummy_ipv6_gtpu_ipv4_packet_offsets;
+		return;
+	} else if (tun_type == ICE_SW_TUN_IPV6_GTPU_IPV6) {
+		*pkt = dummy_ipv6_gtpu_ipv6_packet;
+		*pkt_len = sizeof(dummy_ipv6_gtpu_ipv6_packet);
+		*offsets = dummy_ipv6_gtpu_ipv6_packet_offsets;
+		return;
+	}
+
 	if (tun_type == ICE_SW_TUN_IPV4_ESP) {
 		*pkt = dummy_ipv4_esp_pkt;
 		*pkt_len = sizeof(dummy_ipv4_esp_pkt);
@@ -7111,6 +7403,7 @@ ice_fill_adv_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
 			break;
 
 		case ICE_GTP:
+		case ICE_GTP_NO_PAY:
 			len = sizeof(struct ice_udp_gtp_hdr);
 			break;
 		case ICE_PPPOE:
diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h
index aa446774c..a7e94344c 100644
--- a/drivers/net/ice/base/ice_switch.h
+++ b/drivers/net/ice/base/ice_switch.h
@@ -28,8 +28,32 @@
 #define ICE_PROFID_PPPOE_IPV6_UDP	39
 #define ICE_PROFID_PPPOE_IPV6_OTHER	40
 #define ICE_PROFID_IPV4_GTPC_TEID	41
+#define ICE_PROFID_IPV4_GTPU_TEID		43
+#define ICE_PROFID_IPV6_GTPU_TEID		46
 #define ICE_PROFID_IPV4_GTPU_EH_IPV4_OTHER	47
-#define ICE_PROFID_IPV6_GTPU_IPV6_OTHER	70
+#define ICE_PROFID_IPV4_GTPU_IPV4_OTHER		48
+#define ICE_PROFID_IPV4_GTPU_EH_IPV4_UDP	49
+#define ICE_PROFID_IPV4_GTPU_IPV4_UDP		50
+#define ICE_PROFID_IPV4_GTPU_EH_IPV4_TCP	51
+#define ICE_PROFID_IPV4_GTPU_IPV4_TCP		52
+#define ICE_PROFID_IPV6_GTPU_EH_IPV4_OTHER	53
+#define ICE_PROFID_IPV6_GTPU_IPV4_OTHER		54
+#define ICE_PROFID_IPV6_GTPU_EH_IPV4_UDP	55
+#define ICE_PROFID_IPV6_GTPU_IPV4_UDP		56
+#define ICE_PROFID_IPV6_GTPU_EH_IPV4_TCP	57
+#define ICE_PROFID_IPV6_GTPU_IPV4_TCP		58
+#define ICE_PROFID_IPV4_GTPU_EH_IPV6_OTHER	59
+#define ICE_PROFID_IPV4_GTPU_IPV6_OTHER		60
+#define ICE_PROFID_IPV4_GTPU_EH_IPV6_UDP	61
+#define ICE_PROFID_IPV4_GTPU_IPV6_UDP		62
+#define ICE_PROFID_IPV4_GTPU_EH_IPV6_TCP	63
+#define ICE_PROFID_IPV4_GTPU_IPV6_TCP		64
+#define ICE_PROFID_IPV6_GTPU_EH_IPV6_OTHER	65
+#define ICE_PROFID_IPV6_GTPU_IPV6_OTHER		66
+#define ICE_PROFID_IPV6_GTPU_EH_IPV6_UDP	67
+#define ICE_PROFID_IPV6_GTPU_IPV6_UDP		68
+#define ICE_PROFID_IPV6_GTPU_EH_IPV6_TCP	69
+#define ICE_PROFID_IPV6_GTPU_IPV6_TCP		70
 #define ICE_PROFID_IPV4_ESP		71
 #define ICE_PROFID_IPV6_ESP		72
 #define ICE_PROFID_IPV4_AH		73
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 17/40] net/ice/base: join format strings to same line
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (15 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 16/40] net/ice/base: add support for GTP-U type switch rule Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 18/40] net/ice/base: introduce Tx rate limiting on port level Qi Zhang
                     ` (22 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Jacob Keller

When printing messages with ice_debug, align the printed string to the
origin line of the message in order to ease debugging and tracking
messages back to their source.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_acl_ctrl.c  |  30 ++++------
 drivers/net/ice/base/ice_common.c    | 103 ++++++++++++-----------------------
 drivers/net/ice/base/ice_controlq.c  |  42 +++++---------
 drivers/net/ice/base/ice_flex_pipe.c |  27 +++------
 drivers/net/ice/base/ice_flow.c      |   9 +--
 drivers/net/ice/base/ice_nvm.c       |  30 ++++------
 drivers/net/ice/base/ice_sched.c     |  24 +++-----
 drivers/net/ice/base/ice_switch.c    |  39 +++++--------
 8 files changed, 102 insertions(+), 202 deletions(-)

diff --git a/drivers/net/ice/base/ice_acl_ctrl.c b/drivers/net/ice/base/ice_acl_ctrl.c
index 49c4f3675..0ecf38496 100644
--- a/drivers/net/ice/base/ice_acl_ctrl.c
+++ b/drivers/net/ice/base/ice_acl_ctrl.c
@@ -357,12 +357,10 @@ ice_acl_create_tbl(struct ice_hw *hw, struct ice_acl_tbl_params *params)
 	if (status) {
 		if (LE16_TO_CPU(tbl_alloc.buf.resp_buf.alloc_id) <
 		    ICE_AQC_ALLOC_ID_LESS_THAN_4K)
-			ice_debug(hw, ICE_DBG_ACL,
-				  "Alloc ACL table failed. Unavailable resource.\n");
+			ice_debug(hw, ICE_DBG_ACL, "Alloc ACL table failed. Unavailable resource.\n");
 		else
-			ice_debug(hw, ICE_DBG_ACL,
-				  "AQ allocation of ACL failed with error. status: %d\n",
-				   status);
+			ice_debug(hw, ICE_DBG_ACL, "AQ allocation of ACL failed with error. status: %d\n",
+				  status);
 		return status;
 	}
 
@@ -402,8 +400,7 @@ ice_acl_create_tbl(struct ice_hw *hw, struct ice_acl_tbl_params *params)
 	if (status) {
 		ice_free(hw, tbl);
 		hw->acl_tbl = NULL;
-		ice_debug(hw, ICE_DBG_ACL,
-			  "Initialization of TCAM entries failed. status: %d\n",
+		ice_debug(hw, ICE_DBG_ACL, "Initialization of TCAM entries failed. status: %d\n",
 			  status);
 		goto out;
 	}
@@ -830,8 +827,7 @@ ice_acl_create_scen(struct ice_hw *hw, u16 match_width, u16 num_entries,
 
 	status = ice_aq_alloc_acl_scen(hw, scen_id, &scen_buf, NULL);
 	if (status) {
-		ice_debug(hw, ICE_DBG_ACL,
-			  "AQ allocation of ACL scenario failed. status: %d\n",
+		ice_debug(hw, ICE_DBG_ACL, "AQ allocation of ACL scenario failed. status: %d\n",
 			  status);
 		ice_free(hw, scen);
 		return status;
@@ -898,10 +894,8 @@ enum ice_status ice_acl_destroy_tbl(struct ice_hw *hw)
 
 	/* call the AQ command to destroy the ACL table */
 	status = ice_aq_dealloc_acl_tbl(hw, hw->acl_tbl->id, &resp_buf, NULL);
-
 	if (status) {
-		ice_debug(hw, ICE_DBG_ACL,
-			  "AQ de-allocation of ACL failed. status: %d\n",
+		ice_debug(hw, ICE_DBG_ACL, "AQ de-allocation of ACL failed. status: %d\n",
 			  status);
 		return status;
 	}
@@ -977,8 +971,7 @@ ice_acl_add_entry(struct ice_hw *hw, struct ice_acl_scen *scen,
 		status = ice_aq_program_acl_entry(hw, entry_tcam + offset, idx,
 						  &buf, NULL);
 		if (status) {
-			ice_debug(hw, ICE_DBG_ACL,
-				  "aq program acl entry failed status: %d\n",
+			ice_debug(hw, ICE_DBG_ACL, "aq program acl entry failed status: %d\n",
 				  status);
 			goto out;
 		}
@@ -1049,8 +1042,7 @@ ice_acl_prog_act(struct ice_hw *hw, struct ice_acl_scen *scen,
 			status = ice_aq_program_actpair(hw, i, idx, &act_buf,
 							NULL);
 			if (status) {
-				ice_debug(hw, ICE_DBG_ACL,
-					  "program actpair failed status: %d\n",
+				ice_debug(hw, ICE_DBG_ACL, "program actpair failed status: %d\n",
 					  status);
 				break;
 			}
@@ -1101,8 +1093,7 @@ ice_acl_rem_entry(struct ice_hw *hw, struct ice_acl_scen *scen, u16 entry_idx)
 		status = ice_aq_program_acl_entry(hw, entry_tcam + i, idx, &buf,
 						  NULL);
 		if (status)
-			ice_debug(hw, ICE_DBG_ACL,
-				  "AQ program ACL entry failed status: %d\n",
+			ice_debug(hw, ICE_DBG_ACL, "AQ program ACL entry failed status: %d\n",
 				  status);
 	}
 
@@ -1118,8 +1109,7 @@ ice_acl_rem_entry(struct ice_hw *hw, struct ice_acl_scen *scen, u16 entry_idx)
 			status = ice_aq_program_actpair(hw, i, idx, &act_buf,
 							NULL);
 			if (status)
-				ice_debug(hw, ICE_DBG_ACL,
-					  "program actpair failed.status: %d\n",
+				ice_debug(hw, ICE_DBG_ACL, "program actpair failed status: %d\n",
 					  status);
 		}
 	}
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 87dc9db43..3d2489113 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -760,8 +760,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
 	/* Query the allocated resources for Tx scheduler */
 	status = ice_sched_query_res_alloc(hw);
 	if (status) {
-		ice_debug(hw, ICE_DBG_SCHED,
-			  "Failed to get scheduler allocated resources\n");
+		ice_debug(hw, ICE_DBG_SCHED, "Failed to get scheduler allocated resources\n");
 		goto err_unroll_alloc;
 	}
 	ice_sched_get_psm_clk_freq(hw);
@@ -770,7 +769,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
 	status = ice_sched_init_port(hw->port_info);
 	if (status)
 		goto err_unroll_sched;
-
 	pcaps = (struct ice_aqc_get_phy_caps_data *)
 		ice_malloc(hw, sizeof(*pcaps));
 	if (!pcaps) {
@@ -783,7 +781,8 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
 				     ICE_AQC_REPORT_TOPO_CAP, pcaps, NULL);
 	ice_free(hw, pcaps);
 	if (status)
-		goto err_unroll_sched;
+		ice_debug(hw, ICE_DBG_PHY, "%s: Get PHY capabilities failed, continuing anyway\n",
+			  __func__);
 
 	/* Initialize port_info struct with link information */
 	status = ice_aq_get_link_info(hw->port_info, false, NULL, NULL);
@@ -898,8 +897,7 @@ enum ice_status ice_check_reset(struct ice_hw *hw)
 	}
 
 	if (cnt == grst_timeout) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Global reset polling failed to complete.\n");
+		ice_debug(hw, ICE_DBG_INIT, "Global reset polling failed to complete.\n");
 		return ICE_ERR_RESET_FAILED;
 	}
 
@@ -917,16 +915,14 @@ enum ice_status ice_check_reset(struct ice_hw *hw)
 	for (cnt = 0; cnt < ICE_PF_RESET_WAIT_COUNT; cnt++) {
 		reg = rd32(hw, GLNVM_ULD) & uld_mask;
 		if (reg == uld_mask) {
-			ice_debug(hw, ICE_DBG_INIT,
-				  "Global reset processes done. %d\n", cnt);
+			ice_debug(hw, ICE_DBG_INIT, "Global reset processes done. %d\n", cnt);
 			break;
 		}
 		ice_msec_delay(10, true);
 	}
 
 	if (cnt == ICE_PF_RESET_WAIT_COUNT) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Wait for Reset Done timed out. GLNVM_ULD = 0x%x\n",
+		ice_debug(hw, ICE_DBG_INIT, "Wait for Reset Done timed out. GLNVM_ULD = 0x%x\n",
 			  reg);
 		return ICE_ERR_RESET_FAILED;
 	}
@@ -978,8 +974,7 @@ static enum ice_status ice_pf_reset(struct ice_hw *hw)
 	}
 
 	if (cnt == ICE_PF_RESET_WAIT_COUNT) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "PF reset polling failed to complete.\n");
+		ice_debug(hw, ICE_DBG_INIT, "PF reset polling failed to complete.\n");
 		return ICE_ERR_RESET_FAILED;
 	}
 
@@ -1626,8 +1621,7 @@ ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
 		goto ice_acquire_res_exit;
 
 	if (status)
-		ice_debug(hw, ICE_DBG_RES,
-			  "resource %d acquire type %d failed.\n", res, access);
+		ice_debug(hw, ICE_DBG_RES, "resource %d acquire type %d failed.\n", res, access);
 
 	/* If necessary, poll until the current lock owner timeouts */
 	timeout = time_left;
@@ -1650,11 +1644,9 @@ ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
 ice_acquire_res_exit:
 	if (status == ICE_ERR_AQ_NO_WORK) {
 		if (access == ICE_RES_WRITE)
-			ice_debug(hw, ICE_DBG_RES,
-				  "resource indicates no work to do.\n");
+			ice_debug(hw, ICE_DBG_RES, "resource indicates no work to do.\n");
 		else
-			ice_debug(hw, ICE_DBG_RES,
-				  "Warning: ICE_ERR_AQ_NO_WORK not expected\n");
+			ice_debug(hw, ICE_DBG_RES, "Warning: ICE_ERR_AQ_NO_WORK not expected\n");
 	}
 	return status;
 }
@@ -1846,60 +1838,48 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,
 	switch (cap) {
 	case ICE_AQC_CAPS_VALID_FUNCTIONS:
 		caps->valid_functions = number;
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: valid_functions (bitmap) = %d\n", prefix,
+		ice_debug(hw, ICE_DBG_INIT, "%s: valid_functions (bitmap) = %d\n", prefix,
 			  caps->valid_functions);
 		break;
 	case ICE_AQC_CAPS_DCB:
 		caps->dcb = (number == 1);
 		caps->active_tc_bitmap = logical_id;
 		caps->maxtc = phys_id;
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: dcb = %d\n", prefix, caps->dcb);
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: active_tc_bitmap = %d\n", prefix,
+		ice_debug(hw, ICE_DBG_INIT, "%s: dcb = %d\n", prefix, caps->dcb);
+		ice_debug(hw, ICE_DBG_INIT, "%s: active_tc_bitmap = %d\n", prefix,
 			  caps->active_tc_bitmap);
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: maxtc = %d\n", prefix, caps->maxtc);
+		ice_debug(hw, ICE_DBG_INIT, "%s: maxtc = %d\n", prefix, caps->maxtc);
 		break;
 	case ICE_AQC_CAPS_RSS:
 		caps->rss_table_size = number;
 		caps->rss_table_entry_width = logical_id;
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: rss_table_size = %d\n", prefix,
+		ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_size = %d\n", prefix,
 			  caps->rss_table_size);
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: rss_table_entry_width = %d\n", prefix,
+		ice_debug(hw, ICE_DBG_INIT, "%s: rss_table_entry_width = %d\n", prefix,
 			  caps->rss_table_entry_width);
 		break;
 	case ICE_AQC_CAPS_RXQS:
 		caps->num_rxq = number;
 		caps->rxq_first_id = phys_id;
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: num_rxq = %d\n", prefix,
+		ice_debug(hw, ICE_DBG_INIT, "%s: num_rxq = %d\n", prefix,
 			  caps->num_rxq);
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: rxq_first_id = %d\n", prefix,
+		ice_debug(hw, ICE_DBG_INIT, "%s: rxq_first_id = %d\n", prefix,
 			  caps->rxq_first_id);
 		break;
 	case ICE_AQC_CAPS_TXQS:
 		caps->num_txq = number;
 		caps->txq_first_id = phys_id;
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: num_txq = %d\n", prefix,
+		ice_debug(hw, ICE_DBG_INIT, "%s: num_txq = %d\n", prefix,
 			  caps->num_txq);
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: txq_first_id = %d\n", prefix,
+		ice_debug(hw, ICE_DBG_INIT, "%s: txq_first_id = %d\n", prefix,
 			  caps->txq_first_id);
 		break;
 	case ICE_AQC_CAPS_MSIX:
 		caps->num_msix_vectors = number;
 		caps->msix_vector_first_id = phys_id;
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: num_msix_vectors = %d\n", prefix,
+		ice_debug(hw, ICE_DBG_INIT, "%s: num_msix_vectors = %d\n", prefix,
 			  caps->num_msix_vectors);
-		ice_debug(hw, ICE_DBG_INIT,
-			  "%s: msix_vector_first_id = %d\n", prefix,
+		ice_debug(hw, ICE_DBG_INIT, "%s: msix_vector_first_id = %d\n", prefix,
 			  caps->msix_vector_first_id);
 		break;
 	case ICE_AQC_CAPS_MAX_MTU:
@@ -1933,8 +1913,7 @@ ice_recalc_port_limited_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps)
 	if (hw->dev_caps.num_funcs > 4) {
 		/* Max 4 TCs per port */
 		caps->maxtc = 4;
-		ice_debug(hw, ICE_DBG_INIT,
-			  "reducing maxtc to %d (based on #ports)\n",
+		ice_debug(hw, ICE_DBG_INIT, "reducing maxtc to %d (based on #ports)\n",
 			  caps->maxtc);
 	}
 }
@@ -1983,11 +1962,9 @@ ice_parse_fdir_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,
 		GLQF_FD_SIZE_FD_BSIZE_S;
 	func_p->fd_fltr_best_effort = val;
 
-	ice_debug(hw, ICE_DBG_INIT,
-		  "func caps: fd_fltr_guar = %d\n",
+	ice_debug(hw, ICE_DBG_INIT, "func caps: fd_fltr_guar = %d\n",
 		  func_p->fd_fltr_guar);
-	ice_debug(hw, ICE_DBG_INIT,
-		  "func caps: fd_fltr_best_effort = %d\n",
+	ice_debug(hw, ICE_DBG_INIT, "func caps: fd_fltr_best_effort = %d\n",
 		  func_p->fd_fltr_best_effort);
 }
 
@@ -2033,8 +2010,7 @@ ice_parse_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,
 		default:
 			/* Don't list common capabilities as unknown */
 			if (!found)
-				ice_debug(hw, ICE_DBG_INIT,
-					  "func caps: unknown capability[%d]: 0x%x\n",
+				ice_debug(hw, ICE_DBG_INIT, "func caps: unknown capability[%d]: 0x%x\n",
 					  i, cap);
 			break;
 		}
@@ -2145,8 +2121,7 @@ ice_parse_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
 		default:
 			/* Don't list common capabilities as unknown */
 			if (!found)
-				ice_debug(hw, ICE_DBG_INIT,
-					  "dev caps: unknown capability[%d]: 0x%x\n",
+				ice_debug(hw, ICE_DBG_INIT, "dev caps: unknown capability[%d]: 0x%x\n",
 					  i, cap);
 			break;
 		}
@@ -2598,8 +2573,7 @@ ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,
 
 	/* Ensure that only valid bits of cfg->caps can be turned on. */
 	if (cfg->caps & ~ICE_AQ_PHY_ENA_VALID_MASK) {
-		ice_debug(hw, ICE_DBG_PHY,
-			  "Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\n",
+		ice_debug(hw, ICE_DBG_PHY, "Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\n",
 			  cfg->caps);
 
 		cfg->caps &= ICE_AQ_PHY_ENA_VALID_MASK;
@@ -3083,8 +3057,7 @@ enum ice_status ice_get_link_status(struct ice_port_info *pi, bool *link_up)
 		status = ice_update_link_info(pi);
 
 		if (status)
-			ice_debug(pi->hw, ICE_DBG_LINK,
-				  "get link status error, status = %d\n",
+			ice_debug(pi->hw, ICE_DBG_LINK, "get link status error, status = %d\n",
 				  status);
 	}
 
@@ -3879,8 +3852,7 @@ ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,
 		 * of the endianness of the machine.
 		 */
 		if (ce_info[f].width > (ce_info[f].size_of * BITS_PER_BYTE)) {
-			ice_debug(hw, ICE_DBG_QCTX,
-				  "Field %d width of %d bits larger than size of %d byte(s) ... skipping write\n",
+			ice_debug(hw, ICE_DBG_QCTX, "Field %d width of %d bits larger than size of %d byte(s) ... skipping write\n",
 				  f, ce_info[f].width, ce_info[f].size_of);
 			continue;
 		}
@@ -4692,8 +4664,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
 	status = ice_get_pfa_module_tlv(hw, &tlv, &tlv_len,
 					ICE_SR_LINK_DEFAULT_OVERRIDE_PTR);
 	if (status) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Failed to read link override TLV.\n");
+		ice_debug(hw, ICE_DBG_INIT, "Failed to read link override TLV.\n");
 		return status;
 	}
 
@@ -4704,8 +4675,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
 	/* link options first */
 	status = ice_read_sr_word(hw, tlv_start, &buf);
 	if (status) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Failed to read override link options.\n");
+		ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n");
 		return status;
 	}
 	ldo->options = buf & ICE_LINK_OVERRIDE_OPT_M;
@@ -4716,8 +4686,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
 	offset = tlv_start + ICE_SR_PFA_LINK_OVERRIDE_FEC_OFFSET;
 	status = ice_read_sr_word(hw, offset, &buf);
 	if (status) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Failed to read override phy config.\n");
+		ice_debug(hw, ICE_DBG_INIT, "Failed to read override phy config.\n");
 		return status;
 	}
 	ldo->fec_options = buf & ICE_LINK_OVERRIDE_FEC_OPT_M;
@@ -4727,8 +4696,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
 	for (i = 0; i < ICE_SR_PFA_LINK_OVERRIDE_PHY_WORDS; i++) {
 		status = ice_read_sr_word(hw, (offset + i), &buf);
 		if (status) {
-			ice_debug(hw, ICE_DBG_INIT,
-				  "Failed to read override link options.\n");
+			ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n");
 			return status;
 		}
 		/* shift 16 bits at a time to fill 64 bits */
@@ -4741,8 +4709,7 @@ ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
 	for (i = 0; i < ICE_SR_PFA_LINK_OVERRIDE_PHY_WORDS; i++) {
 		status = ice_read_sr_word(hw, (offset + i), &buf);
 		if (status) {
-			ice_debug(hw, ICE_DBG_INIT,
-				  "Failed to read override link options.\n");
+			ice_debug(hw, ICE_DBG_INIT, "Failed to read override link options.\n");
 			return status;
 		}
 		/* shift 16 bits at a time to fill 64 bits */
diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c
index f278ef636..111288184 100644
--- a/drivers/net/ice/base/ice_controlq.c
+++ b/drivers/net/ice/base/ice_controlq.c
@@ -697,8 +697,7 @@ enum ice_status ice_init_all_ctrlq(struct ice_hw *hw)
 		if (status != ICE_ERR_AQ_FW_CRITICAL)
 			break;
 
-		ice_debug(hw, ICE_DBG_AQ_MSG,
-			  "Retry Admin Queue init due to FW critical error\n");
+		ice_debug(hw, ICE_DBG_AQ_MSG, "Retry Admin Queue init due to FW critical error\n");
 		ice_shutdown_ctrlq(hw, ICE_CTL_Q_ADMIN);
 		ice_msec_delay(ICE_CTL_Q_ADMIN_INIT_MSEC, true);
 	} while (retry++ < ICE_CTL_Q_ADMIN_INIT_TIMEOUT);
@@ -793,8 +792,7 @@ static u16 ice_clean_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq)
 	details = ICE_CTL_Q_DETAILS(*sq, ntc);
 
 	while (rd32(hw, cq->sq.head) != ntc) {
-		ice_debug(hw, ICE_DBG_AQ_MSG,
-			  "ntc %d head %d.\n", ntc, rd32(hw, cq->sq.head));
+		ice_debug(hw, ICE_DBG_AQ_MSG, "ntc %d head %d.\n", ntc, rd32(hw, cq->sq.head));
 		ice_memset(desc, 0, sizeof(*desc), ICE_DMA_MEM);
 		ice_memset(details, 0, sizeof(*details), ICE_NONDMA_MEM);
 		ntc++;
@@ -832,8 +830,7 @@ static void ice_debug_cq(struct ice_hw *hw, void *desc, void *buf, u16 buf_len)
 	datalen = LE16_TO_CPU(cq_desc->datalen);
 	flags = LE16_TO_CPU(cq_desc->flags);
 
-	ice_debug(hw, ICE_DBG_AQ_DESC,
-		  "CQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
+	ice_debug(hw, ICE_DBG_AQ_DESC, "CQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
 		  LE16_TO_CPU(cq_desc->opcode), flags, datalen,
 		  LE16_TO_CPU(cq_desc->retval));
 	ice_debug(hw, ICE_DBG_AQ_DESC, "\tcookie (h,l) 0x%08X 0x%08X\n",
@@ -906,8 +903,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 	cq->sq_last_status = ICE_AQ_RC_OK;
 
 	if (!cq->sq.count) {
-		ice_debug(hw, ICE_DBG_AQ_MSG,
-			  "Control Send queue not initialized.\n");
+		ice_debug(hw, ICE_DBG_AQ_MSG, "Control Send queue not initialized.\n");
 		status = ICE_ERR_AQ_EMPTY;
 		goto sq_send_command_error;
 	}
@@ -919,8 +915,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 
 	if (buf) {
 		if (buf_size > cq->sq_buf_size) {
-			ice_debug(hw, ICE_DBG_AQ_MSG,
-				  "Invalid buffer size for Control Send queue: %d.\n",
+			ice_debug(hw, ICE_DBG_AQ_MSG, "Invalid buffer size for Control Send queue: %d.\n",
 				  buf_size);
 			status = ICE_ERR_INVAL_SIZE;
 			goto sq_send_command_error;
@@ -933,8 +928,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 
 	val = rd32(hw, cq->sq.head);
 	if (val >= cq->num_sq_entries) {
-		ice_debug(hw, ICE_DBG_AQ_MSG,
-			  "head overrun at %d in the Control Send Queue ring\n",
+		ice_debug(hw, ICE_DBG_AQ_MSG, "head overrun at %d in the Control Send Queue ring\n",
 			  val);
 		status = ICE_ERR_AQ_EMPTY;
 		goto sq_send_command_error;
@@ -952,8 +946,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 	 * called in a separate thread in case of asynchronous completions.
 	 */
 	if (ice_clean_sq(hw, cq) == 0) {
-		ice_debug(hw, ICE_DBG_AQ_MSG,
-			  "Error: Control Send Queue is full.\n");
+		ice_debug(hw, ICE_DBG_AQ_MSG, "Error: Control Send Queue is full.\n");
 		status = ICE_ERR_AQ_FULL;
 		goto sq_send_command_error;
 	}
@@ -982,8 +975,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 	}
 
 	/* Debug desc and buffer */
-	ice_debug(hw, ICE_DBG_AQ_DESC,
-		  "ATQ: Control Send queue desc and buffer:\n");
+	ice_debug(hw, ICE_DBG_AQ_DESC, "ATQ: Control Send queue desc and buffer:\n");
 
 	ice_debug_cq(hw, (void *)desc_on_ring, buf, buf_size);
 
@@ -1009,8 +1001,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 			u16 copy_size = LE16_TO_CPU(desc->datalen);
 
 			if (copy_size > buf_size) {
-				ice_debug(hw, ICE_DBG_AQ_MSG,
-					  "Return len %d > than buf len %d\n",
+				ice_debug(hw, ICE_DBG_AQ_MSG, "Return len %d > than buf len %d\n",
 					  copy_size, buf_size);
 				status = ICE_ERR_AQ_ERROR;
 			} else {
@@ -1020,8 +1011,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 		}
 		retval = LE16_TO_CPU(desc->retval);
 		if (retval) {
-			ice_debug(hw, ICE_DBG_AQ_MSG,
-				  "Control Send Queue command 0x%04X completed with error 0x%X\n",
+			ice_debug(hw, ICE_DBG_AQ_MSG, "Control Send Queue command 0x%04X completed with error 0x%X\n",
 				  LE16_TO_CPU(desc->opcode),
 				  retval);
 
@@ -1034,8 +1024,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 		cq->sq_last_status = (enum ice_aq_err)retval;
 	}
 
-	ice_debug(hw, ICE_DBG_AQ_MSG,
-		  "ATQ: desc and buffer writeback:\n");
+	ice_debug(hw, ICE_DBG_AQ_MSG, "ATQ: desc and buffer writeback:\n");
 
 	ice_debug_cq(hw, (void *)desc, buf, buf_size);
 
@@ -1051,8 +1040,7 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 			ice_debug(hw, ICE_DBG_AQ_MSG, "Critical FW error.\n");
 			status = ICE_ERR_AQ_FW_CRITICAL;
 		} else {
-			ice_debug(hw, ICE_DBG_AQ_MSG,
-				  "Control Send Queue Writeback timeout.\n");
+			ice_debug(hw, ICE_DBG_AQ_MSG, "Control Send Queue Writeback timeout.\n");
 			status = ICE_ERR_AQ_TIMEOUT;
 		}
 	}
@@ -1137,8 +1125,7 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 	ice_acquire_lock(&cq->rq_lock);
 
 	if (!cq->rq.count) {
-		ice_debug(hw, ICE_DBG_AQ_MSG,
-			  "Control Receive queue not initialized.\n");
+		ice_debug(hw, ICE_DBG_AQ_MSG, "Control Receive queue not initialized.\n");
 		ret_code = ICE_ERR_AQ_EMPTY;
 		goto clean_rq_elem_err;
 	}
@@ -1160,8 +1147,7 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
 	flags = LE16_TO_CPU(desc->flags);
 	if (flags & ICE_AQ_FLAG_ERR) {
 		ret_code = ICE_ERR_AQ_ERROR;
-		ice_debug(hw, ICE_DBG_AQ_MSG,
-			  "Control Receive Queue Event 0x%04X received with error 0x%X\n",
+		ice_debug(hw, ICE_DBG_AQ_MSG, "Control Receive Queue Event 0x%04X received with error 0x%X\n",
 			  LE16_TO_CPU(desc->opcode),
 			  cq->rq_last_status);
 	}
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index d4b2e4f29..923d99448 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -712,8 +712,7 @@ ice_acquire_global_cfg_lock(struct ice_hw *hw,
 				 ICE_GLOBAL_CFG_LOCK_TIMEOUT);
 
 	if (status == ICE_ERR_AQ_NO_WORK)
-		ice_debug(hw, ICE_DBG_PKG,
-			  "Global config lock: No work to do\n");
+		ice_debug(hw, ICE_DBG_PKG, "Global config lock: No work to do\n");
 
 	return status;
 }
@@ -920,8 +919,7 @@ ice_update_pkg(struct ice_hw *hw, struct ice_buf *bufs, u32 count)
 					   last, &offset, &info, NULL);
 
 		if (status) {
-			ice_debug(hw, ICE_DBG_PKG,
-				  "Update pkg failed: err %d off %d inf %d\n",
+			ice_debug(hw, ICE_DBG_PKG, "Update pkg failed: err %d off %d inf %d\n",
 				  status, offset, info);
 			break;
 		}
@@ -999,8 +997,7 @@ ice_dwnld_cfg_bufs(struct ice_hw *hw, struct ice_buf *bufs, u32 count)
 		/* Save AQ status from download package */
 		hw->pkg_dwnld_status = hw->adminq.sq_last_status;
 		if (status) {
-			ice_debug(hw, ICE_DBG_PKG,
-				  "Pkg download failed: err %d off %d inf %d\n",
+			ice_debug(hw, ICE_DBG_PKG, "Pkg download failed: err %d off %d inf %d\n",
 				  status, offset, info);
 			break;
 		}
@@ -1097,8 +1094,7 @@ ice_init_pkg_info(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)
 			  meta_seg->pkg_ver.update, meta_seg->pkg_ver.draft,
 			  meta_seg->pkg_name);
 	} else {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Did not find metadata segment in driver package\n");
+		ice_debug(hw, ICE_DBG_INIT, "Did not find metadata segment in driver package\n");
 		return ICE_ERR_CFG;
 	}
 
@@ -1115,8 +1111,7 @@ ice_init_pkg_info(struct ice_hw *hw, struct ice_pkg_hdr *pkg_hdr)
 			  seg_hdr->seg_format_ver.draft,
 			  seg_hdr->seg_id);
 	} else {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Did not find ice segment in driver package\n");
+		ice_debug(hw, ICE_DBG_INIT, "Did not find ice segment in driver package\n");
 		return ICE_ERR_CFG;
 	}
 
@@ -1339,8 +1334,7 @@ ice_chk_pkg_compat(struct ice_hw *hw, struct ice_pkg_hdr *ospkg,
 		    (*seg)->hdr.seg_format_ver.minor >
 			pkg->pkg_info[i].ver.minor) {
 			status = ICE_ERR_FW_DDP_MISMATCH;
-			ice_debug(hw, ICE_DBG_INIT,
-				  "OS package is not compatible with NVM.\n");
+			ice_debug(hw, ICE_DBG_INIT, "OS package is not compatible with NVM.\n");
 		}
 		/* done processing NVM package so break */
 		break;
@@ -1408,8 +1402,7 @@ enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
 	ice_init_pkg_hints(hw, seg);
 	status = ice_download_pkg(hw, seg);
 	if (status == ICE_ERR_AQ_NO_WORK) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "package previously loaded - no work.\n");
+		ice_debug(hw, ICE_DBG_INIT, "package previously loaded - no work.\n");
 		status = ICE_SUCCESS;
 	}
 
@@ -4059,8 +4052,7 @@ ice_has_prof_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl)
 		if (ent->profile_cookie == hdl)
 			return true;
 
-	ice_debug(hw, ICE_DBG_INIT,
-		  "Characteristic list for VSI group %d not found.\n",
+	ice_debug(hw, ICE_DBG_INIT, "Characteristic list for VSI group %d not found.\n",
 		  vsig);
 	return false;
 }
@@ -5372,8 +5364,7 @@ ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,
 			if (attr_used_cnt < ICE_MAX_PTG_ATTRS)
 				attr_used[attr_used_cnt++] = &t->tcam[i];
 			else
-				ice_debug(hw, ICE_DBG_INIT,
-					  "Warn: ICE_MAX_PTG_ATTRS exceeded\n");
+				ice_debug(hw, ICE_DBG_INIT, "Warn: ICE_MAX_PTG_ATTRS exceeded\n");
 		}
 	}
 
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 98c07778b..3bc78f87b 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1856,8 +1856,7 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk,
 
 	status = ice_flow_proc_segs(hw, params);
 	if (status) {
-		ice_debug(hw, ICE_DBG_FLOW,
-			  "Error processing a flow's packet segments\n");
+		ice_debug(hw, ICE_DBG_FLOW, "Error processing a flow's packet segments\n");
 		goto out;
 	}
 
@@ -2106,8 +2105,7 @@ ice_flow_assoc_prof(struct ice_hw *hw, enum ice_block blk,
 		if (!status)
 			ice_set_bit(vsi_handle, prof->vsis);
 		else
-			ice_debug(hw, ICE_DBG_FLOW,
-				  "HW profile add failed, %d\n",
+			ice_debug(hw, ICE_DBG_FLOW, "HW profile add failed, %d\n",
 				  status);
 	}
 
@@ -2138,8 +2136,7 @@ ice_flow_disassoc_prof(struct ice_hw *hw, enum ice_block blk,
 		if (!status)
 			ice_clear_bit(vsi_handle, prof->vsis);
 		else
-			ice_debug(hw, ICE_DBG_FLOW,
-				  "HW profile remove failed, %d\n",
+			ice_debug(hw, ICE_DBG_FLOW, "HW profile remove failed, %d\n",
 				  status);
 	}
 
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 22d7d9439..b4fb28bfb 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -78,8 +78,7 @@ ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,
 
 	/* Verify the length of the read if this is for the Shadow RAM */
 	if (read_shadow_ram && ((offset + inlen) > (hw->nvm.sr_words * 2u))) {
-		ice_debug(hw, ICE_DBG_NVM,
-			  "NVM error: requested data is beyond Shadow RAM limit\n");
+		ice_debug(hw, ICE_DBG_NVM, "NVM error: requested data is beyond Shadow RAM limit\n");
 		return ICE_ERR_PARAM;
 	}
 
@@ -340,16 +339,14 @@ ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size)
 	 */
 	pba_size--;
 	if (pba_num_size < (((u32)pba_size * 2) + 1)) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Buffer too small for PBA data.\n");
+		ice_debug(hw, ICE_DBG_INIT, "Buffer too small for PBA data.\n");
 		return ICE_ERR_PARAM;
 	}
 
 	for (i = 0; i < pba_size; i++) {
 		status = ice_read_sr_word(hw, (pba_tlv + 2 + 1) + i, &pba_word);
 		if (status != ICE_SUCCESS) {
-			ice_debug(hw, ICE_DBG_INIT,
-				  "Failed to read PBA Block word %d.\n", i);
+			ice_debug(hw, ICE_DBG_INIT, "Failed to read PBA Block word %d.\n", i);
 			return status;
 		}
 
@@ -378,8 +375,7 @@ static enum ice_status ice_get_orom_ver_info(struct ice_hw *hw)
 	status = ice_get_pfa_module_tlv(hw, &boot_cfg_tlv, &boot_cfg_tlv_len,
 					ICE_SR_BOOT_CFG_PTR);
 	if (status) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Failed to read Boot Configuration Block TLV.\n");
+		ice_debug(hw, ICE_DBG_INIT, "Failed to read Boot Configuration Block TLV.\n");
 		return status;
 	}
 
@@ -387,8 +383,7 @@ static enum ice_status ice_get_orom_ver_info(struct ice_hw *hw)
 	 * (Combo Image Version High and Combo Image Version Low)
 	 */
 	if (boot_cfg_tlv_len < 2) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Invalid Boot Configuration Block TLV size.\n");
+		ice_debug(hw, ICE_DBG_INIT, "Invalid Boot Configuration Block TLV size.\n");
 		return ICE_ERR_INVAL_SIZE;
 	}
 
@@ -444,14 +439,12 @@ static enum ice_status ice_discover_flash_size(struct ice_hw *hw)
 		status = ice_read_flat_nvm(hw, offset, &len, &data, false);
 		if (status == ICE_ERR_AQ_ERROR &&
 		    hw->adminq.sq_last_status == ICE_AQ_RC_EINVAL) {
-			ice_debug(hw, ICE_DBG_NVM,
-				  "%s: New upper bound of %u bytes\n",
+			ice_debug(hw, ICE_DBG_NVM, "%s: New upper bound of %u bytes\n",
 				  __func__, offset);
 			status = ICE_SUCCESS;
 			max_size = offset;
 		} else if (!status) {
-			ice_debug(hw, ICE_DBG_NVM,
-				  "%s: New lower bound of %u bytes\n",
+			ice_debug(hw, ICE_DBG_NVM, "%s: New lower bound of %u bytes\n",
 				  __func__, offset);
 			min_size = offset;
 		} else {
@@ -460,8 +453,7 @@ static enum ice_status ice_discover_flash_size(struct ice_hw *hw)
 		}
 	}
 
-	ice_debug(hw, ICE_DBG_NVM,
-		  "Predicted flash size is %u bytes\n", max_size);
+	ice_debug(hw, ICE_DBG_NVM, "Predicted flash size is %u bytes\n", max_size);
 
 	hw->nvm.flash_size = max_size;
 
@@ -504,8 +496,7 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)
 	} else {
 		/* Blank programming mode */
 		nvm->blank_nvm_mode = true;
-		ice_debug(hw, ICE_DBG_NVM,
-			  "NVM init error: unsupported blank mode.\n");
+		ice_debug(hw, ICE_DBG_NVM, "NVM init error: unsupported blank mode.\n");
 		return ICE_ERR_NVM_BLANK_MODE;
 	}
 
@@ -805,8 +796,7 @@ ice_nvm_access_write(struct ice_hw *hw, struct ice_nvm_access_cmd *cmd,
 		break;
 	}
 
-	ice_debug(hw, ICE_DBG_NVM,
-		  "NVM access: writing register %08x with value %08x\n",
+	ice_debug(hw, ICE_DBG_NVM, "NVM access: writing register %08x with value %08x\n",
 		  cmd->offset, data->regval);
 
 	/* Write the data field to the specified register */
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index f5f3b85d6..d05fbfccd 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -165,8 +165,7 @@ ice_sched_add_node(struct ice_port_info *pi, u8 layer,
 	parent = ice_sched_find_node_by_teid(pi->root,
 					     LE32_TO_CPU(info->parent_teid));
 	if (!parent) {
-		ice_debug(hw, ICE_DBG_SCHED,
-			  "Parent Node not found for parent_teid=0x%x\n",
+		ice_debug(hw, ICE_DBG_SCHED, "Parent Node not found for parent_teid=0x%x\n",
 			  LE32_TO_CPU(info->parent_teid));
 		return ICE_ERR_PARAM;
 	}
@@ -742,8 +741,7 @@ static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
 			rl_prof_elem->prof_id_ref = 0;
 			status = ice_sched_del_rl_profile(hw, rl_prof_elem);
 			if (status) {
-				ice_debug(hw, ICE_DBG_SCHED,
-					  "Remove rl profile failed\n");
+				ice_debug(hw, ICE_DBG_SCHED, "Remove rl profile failed\n");
 				/* On error, free mem required */
 				LIST_DEL(&rl_prof_elem->list_entry);
 				ice_free(hw, rl_prof_elem);
@@ -930,8 +928,7 @@ ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
 	for (i = 0; i < num_nodes; i++) {
 		status = ice_sched_add_node(pi, layer, &buf->generic[i]);
 		if (status != ICE_SUCCESS) {
-			ice_debug(hw, ICE_DBG_SCHED,
-				  "add nodes in SW DB failed status =%d\n",
+			ice_debug(hw, ICE_DBG_SCHED, "add nodes in SW DB failed status =%d\n",
 				  status);
 			break;
 		}
@@ -939,8 +936,7 @@ ice_sched_add_elems(struct ice_port_info *pi, struct ice_sched_node *tc_node,
 		teid = LE32_TO_CPU(buf->generic[i].node_teid);
 		new_node = ice_sched_find_node_by_teid(parent, teid);
 		if (!new_node) {
-			ice_debug(hw, ICE_DBG_SCHED,
-				  "Node is missing for teid =%d\n", teid);
+			ice_debug(hw, ICE_DBG_SCHED, "Node is missing for teid =%d\n", teid);
 			break;
 		}
 
@@ -1297,8 +1293,7 @@ struct ice_sched_node *ice_sched_get_node(struct ice_port_info *pi, u32 teid)
 	ice_release_lock(&pi->sched_lock);
 
 	if (!node)
-		ice_debug(pi->hw, ICE_DBG_SCHED,
-			  "Node not found for teid=0x%x\n", teid);
+		ice_debug(pi->hw, ICE_DBG_SCHED, "Node not found for teid=0x%x\n", teid);
 
 	return node;
 }
@@ -2048,8 +2043,7 @@ ice_sched_rm_vsi_cfg(struct ice_port_info *pi, u16 vsi_handle, u8 owner)
 			continue;
 
 		if (ice_sched_is_leaf_node_present(vsi_node)) {
-			ice_debug(pi->hw, ICE_DBG_SCHED,
-				  "VSI has leaf nodes in TC %d\n", i);
+			ice_debug(pi->hw, ICE_DBG_SCHED, "VSI has leaf nodes in TC %d\n", i);
 			status = ICE_ERR_IN_USE;
 			goto exit_sched_rm_vsi_cfg;
 		}
@@ -2891,8 +2885,7 @@ static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
 					 &pi->rl_prof_list[ln],
 					 ice_aqc_rl_profile_info, list_entry) {
 			if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
-				ice_debug(pi->hw, ICE_DBG_SCHED,
-					  "Removed rl profile\n");
+				ice_debug(pi->hw, ICE_DBG_SCHED, "Removed rl profile\n");
 		}
 	}
 }
@@ -4143,8 +4136,7 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
 			/* Remove old profile ID from database */
 			status = ice_sched_del_rl_profile(pi->hw, rl_prof_elem);
 			if (status && status != ICE_ERR_IN_USE)
-				ice_debug(pi->hw, ICE_DBG_SCHED,
-					  "Remove rl profile failed\n");
+				ice_debug(pi->hw, ICE_DBG_SCHED, "Remove rl profile failed\n");
 			break;
 		}
 	if (status == ICE_ERR_IN_USE)
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 69fa64ac9..a82af6fa0 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1823,8 +1823,7 @@ enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)
 	status = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,
 				       ice_aqc_opc_free_res, NULL);
 	if (status) {
-		ice_debug(hw, ICE_DBG_SW,
-			  "VEB counter resource could not be freed\n");
+		ice_debug(hw, ICE_DBG_SW, "VEB counter resource could not be freed\n");
 		ret_status = status;
 	}
 
@@ -2218,8 +2217,7 @@ ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,
 			return ICE_ERR_PARAM;
 		break;
 	default:
-		ice_debug(hw, ICE_DBG_SW,
-			  "Error due to unsupported rule_type %u\n", rule_type);
+		ice_debug(hw, ICE_DBG_SW, "Error due to unsupported rule_type %u\n", rule_type);
 		return ICE_ERR_OUT_OF_RANGE;
 	}
 
@@ -2241,8 +2239,7 @@ ice_aq_add_update_mir_rule(struct ice_hw *hw, u16 rule_type, u16 dest_vsi,
 			 * than ICE_MAX_VSI, if not return with error.
 			 */
 			if (id >= ICE_MAX_VSI) {
-				ice_debug(hw, ICE_DBG_SW,
-					  "Error VSI index (%u) out-of-range\n",
+				ice_debug(hw, ICE_DBG_SW, "Error VSI index (%u) out-of-range\n",
 					  id);
 				ice_free(hw, mr_list);
 				return ICE_ERR_OUT_OF_RANGE;
@@ -2649,8 +2646,7 @@ ice_init_port_info(struct ice_port_info *pi, u16 vsi_port_num, u8 type,
 		pi->dflt_rx_vsi_num = ICE_DFLT_VSI_INVAL;
 		break;
 	default:
-		ice_debug(pi->hw, ICE_DBG_SW,
-			  "incorrect VSI/port type received\n");
+		ice_debug(pi->hw, ICE_DBG_SW, "incorrect VSI/port type received\n");
 		break;
 	}
 }
@@ -2714,8 +2710,7 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)
 			case ICE_AQC_GET_SW_CONF_RESP_PHYS_PORT:
 			case ICE_AQC_GET_SW_CONF_RESP_VIRT_PORT:
 				if (j == num_total_ports) {
-					ice_debug(hw, ICE_DBG_SW,
-						  "more ports than expected\n");
+					ice_debug(hw, ICE_DBG_SW, "more ports than expected\n");
 					status = ICE_ERR_CFG;
 					goto out;
 				}
@@ -3709,8 +3704,7 @@ ice_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
 		tmp_fltr_info.vsi_handle = rem_vsi_handle;
 		status = ice_update_pkt_fwd_rule(hw, &tmp_fltr_info);
 		if (status) {
-			ice_debug(hw, ICE_DBG_SW,
-				  "Failed to update pkt fwd rule to FWD_TO_VSI on HW VSI %d, error %d\n",
+			ice_debug(hw, ICE_DBG_SW, "Failed to update pkt fwd rule to FWD_TO_VSI on HW VSI %d, error %d\n",
 				  tmp_fltr_info.fwd_id.hw_vsi_id, status);
 			return status;
 		}
@@ -3726,8 +3720,7 @@ ice_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
 		/* Remove the VSI list since it is no longer used */
 		status = ice_remove_vsi_list_rule(hw, vsi_list_id, lkup_type);
 		if (status) {
-			ice_debug(hw, ICE_DBG_SW,
-				  "Failed to remove VSI list %d, error %d\n",
+			ice_debug(hw, ICE_DBG_SW, "Failed to remove VSI list %d, error %d\n",
 				  vsi_list_id, status);
 			return status;
 		}
@@ -4188,8 +4181,7 @@ ice_add_vlan_internal(struct ice_hw *hw, struct ice_sw_recipe *recp_list,
 		 */
 		if (v_list_itr->vsi_count > 1 &&
 		    v_list_itr->vsi_list_info->ref_cnt > 1) {
-			ice_debug(hw, ICE_DBG_SW,
-				  "Invalid configuration: Optimization to reuse VSI list with more than one VSI is not being done yet\n");
+			ice_debug(hw, ICE_DBG_SW, "Invalid configuration: Optimization to reuse VSI list with more than one VSI is not being done yet\n");
 			status = ICE_ERR_CFG;
 			goto exit;
 		}
@@ -5403,8 +5395,7 @@ ice_remove_vsi_lkup_fltr(struct ice_hw *hw, u16 vsi_handle,
 		ice_remove_eth_mac(hw, &remove_list_head);
 		break;
 	case ICE_SW_LKUP_DFLT:
-		ice_debug(hw, ICE_DBG_SW,
-			  "Remove filters for this lookup type hasn't been implemented yet\n");
+		ice_debug(hw, ICE_DBG_SW, "Remove filters for this lookup type hasn't been implemented yet\n");
 		break;
 	case ICE_SW_LKUP_LAST:
 		ice_debug(hw, ICE_DBG_SW, "Unsupported lookup type\n");
@@ -5526,8 +5517,7 @@ ice_free_res_cntr(struct ice_hw *hw, u8 type, u8 alloc_shared, u16 num_items,
 	status = ice_aq_alloc_free_res(hw, 1, buf, buf_len,
 				       ice_aqc_opc_free_res, NULL);
 	if (status)
-		ice_debug(hw, ICE_DBG_SW,
-			  "counter resource could not be freed\n");
+		ice_debug(hw, ICE_DBG_SW, "counter resource could not be freed\n");
 
 	ice_free(hw, buf);
 	return status;
@@ -6306,8 +6296,7 @@ ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm,
 			 * that can be used.
 			 */
 			if (chain_idx >= ICE_MAX_FV_WORDS) {
-				ice_debug(hw, ICE_DBG_SW,
-					  "No chain index available\n");
+				ice_debug(hw, ICE_DBG_SW, "No chain index available\n");
 				status = ICE_ERR_MAX_LIMIT;
 				goto err_unroll;
 			}
@@ -7948,8 +7937,7 @@ ice_adv_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
 		 */
 		status = ice_update_pkt_fwd_rule(hw, &tmp_fltr);
 		if (status) {
-			ice_debug(hw, ICE_DBG_SW,
-				  "Failed to update pkt fwd rule to FWD_TO_VSI on HW VSI %d, error %d\n",
+			ice_debug(hw, ICE_DBG_SW, "Failed to update pkt fwd rule to FWD_TO_VSI on HW VSI %d, error %d\n",
 				  tmp_fltr.fwd_id.hw_vsi_id, status);
 			return status;
 		}
@@ -7958,8 +7946,7 @@ ice_adv_rem_update_vsi_list(struct ice_hw *hw, u16 vsi_handle,
 		/* Remove the VSI list since it is no longer used */
 		status = ice_remove_vsi_list_rule(hw, vsi_list_id, lkup_type);
 		if (status) {
-			ice_debug(hw, ICE_DBG_SW,
-				  "Failed to remove VSI list %d, error %d\n",
+			ice_debug(hw, ICE_DBG_SW, "Failed to remove VSI list %d, error %d\n",
 				  vsi_list_id, status);
 			return status;
 		}
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 18/40] net/ice/base: introduce Tx rate limiting on port level
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (16 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 17/40] net/ice/base: join format strings to same line Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 19/40] net/ice/base: reduce profile to recip info get from firmware Qi Zhang
                     ` (21 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Shibin Koikkara Reeny

The PSM Configuration has a Rate Limiter for each associated
switch port based on its relative speed from the total BW of
switch ports connected to LAN controller. The rate limiters
will be dynamic get readjusted if switch port speeds are
changed at the root node layer of the scheduler tree. Adding
a function to directly modify the EIR of root node.

Signed-off-by: Shibin Koikkara Reeny <shibin.koikkara.reeny@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_common.c |  5 +++++
 drivers/net/ice/base/ice_common.h |  1 +
 drivers/net/ice/base/ice_sched.c  | 20 ++++++++++++++++++++
 drivers/net/ice/base/ice_type.h   |  1 +
 4 files changed, 27 insertions(+)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 3d2489113..46754a333 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -4382,6 +4382,7 @@ static bool ice_is_main_vsi(struct ice_hw *hw, u16 vsi_handle)
 static enum ice_status
 ice_replay_pre_init(struct ice_hw *hw, struct ice_switch_info *sw)
 {
+	enum ice_status status;
 	u8 i;
 
 	/* Delete old entries from replay filter list head if there is any */
@@ -4395,6 +4396,10 @@ ice_replay_pre_init(struct ice_hw *hw, struct ice_switch_info *sw)
 				  &sw->recp_list[i].filt_replay_rules);
 	ice_sched_replay_agg_vsi_preinit(hw);
 
+	status = ice_sched_replay_root_node_bw(hw->port_info);
+	if (status)
+		return status;
+
 	return ice_sched_replay_tc_node_bw(hw->port_info);
 }
 
diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h
index d176f7495..393e2d3f6 100644
--- a/drivers/net/ice/base/ice_common.h
+++ b/drivers/net/ice/base/ice_common.h
@@ -202,6 +202,7 @@ void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw);
 void ice_sched_replay_agg(struct ice_hw *hw);
 enum ice_status ice_sched_replay_tc_node_bw(struct ice_port_info *pi);
 enum ice_status ice_replay_vsi_agg(struct ice_hw *hw, u16 vsi_handle);
+enum ice_status ice_sched_replay_root_node_bw(struct ice_port_info *pi);
 enum ice_status
 ice_sched_replay_q_bw(struct ice_port_info *pi, struct ice_q_ctx *q_ctx);
 struct ice_q_ctx *
diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index d05fbfccd..1374b9a09 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -5382,6 +5382,26 @@ void ice_sched_replay_agg_vsi_preinit(struct ice_hw *hw)
 }
 
 /**
+ * ice_sched_replay_root_node_bw - replay root node BW
+ * @pi: port information structure
+ *
+ * Replay root node BW settings.
+ */
+enum ice_status ice_sched_replay_root_node_bw(struct ice_port_info *pi)
+{
+	enum ice_status status = ICE_SUCCESS;
+
+	if (!pi->hw)
+		return ICE_ERR_PARAM;
+	ice_acquire_lock(&pi->sched_lock);
+
+	status = ice_sched_replay_node_bw(pi->hw, pi->root,
+					  &pi->root_node_bw_t_info);
+	ice_release_lock(&pi->sched_lock);
+	return status;
+}
+
+/**
  * ice_sched_replay_tc_node_bw - replay TC node(s) BW
  * @pi: port information structure
  *
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index c558a1cb0..997f97e0d 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -776,6 +776,7 @@ struct ice_port_info {
 		sib_head[ICE_MAX_TRAFFIC_CLASS][ICE_AQC_TOPO_MAX_LEVEL_NUM];
 	/* List contain profile ID(s) and other params per layer */
 	struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];
+	struct ice_bw_type_info root_node_bw_t_info;
 	struct ice_bw_type_info tc_node_bw_t_info[ICE_MAX_TRAFFIC_CLASS];
 	struct ice_dcbx_cfg local_dcbx_cfg;	/* Oper/Local Cfg */
 	/* DCBX info */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 19/40] net/ice/base: reduce profile to recip info get from firmware
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (17 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 18/40] net/ice/base: introduce Tx rate limiting on port level Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 20/40] net/ice/base: refactor DCB related variables Qi Zhang
                     ` (20 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Wei Zhao

Only need to get profile_to_recip info from firmware for
profiles used by switch, no need for other free profile
in order that we can reduce the time consumed when
download a switch rule.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_flex_pipe.c | 115 +++++++++++++++++++++++++----------
 drivers/net/ice/base/ice_switch.c    |   2 +-
 drivers/net/ice/base/ice_type.h      |   1 +
 3 files changed, 85 insertions(+), 33 deletions(-)

diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 923d99448..8d918eff7 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1345,6 +1345,88 @@ ice_chk_pkg_compat(struct ice_hw *hw, struct ice_pkg_hdr *ospkg,
 }
 
 /**
+ * ice_sw_fv_handler
+ * @sect_type: section type
+ * @section: pointer to section
+ * @index: index of the field vector entry to be returned
+ * @offset: ptr to variable that receives the offset in the field vector table
+ *
+ * This is a callback function that can be passed to ice_pkg_enum_entry.
+ * This function treats the given section as of type ice_sw_fv_section and
+ * enumerates offset field. "offset" is an index into the field vector table.
+ */
+static void *
+ice_sw_fv_handler(u32 sect_type, void *section, u32 index, u32 *offset)
+{
+	struct ice_sw_fv_section *fv_section =
+		(struct ice_sw_fv_section *)section;
+
+	if (!section || sect_type != ICE_SID_FLD_VEC_SW)
+		return NULL;
+	if (index >= LE16_TO_CPU(fv_section->count))
+		return NULL;
+	if (offset)
+		/* "index" passed in to this function is relative to a given
+		 * 4k block. To get to the true index into the field vector
+		 * table need to add the relative index to the base_offset
+		 * field of this section
+		 */
+		*offset = LE16_TO_CPU(fv_section->base_offset) + index;
+	return fv_section->fv + index;
+}
+
+/**
+ * ice_get_prof_index_max - get the max profile index for used profile
+ * @hw: pointer to the HW struct
+ *
+ * Calling this function will get the max profile index for used profile
+ * and store the index number in struct ice_switch_info *switch_info
+ * in hw for following use.
+ */
+static int ice_get_prof_index_max(struct ice_hw *hw)
+{
+	u16 prof_index = 0, j, max_prof_index = 0;
+	struct ice_pkg_enum state;
+	struct ice_seg *ice_seg;
+	bool flag = false;
+	struct ice_fv *fv;
+	u32 offset;
+
+	ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM);
+
+	if (!hw->seg)
+		return ICE_ERR_PARAM;
+
+	ice_seg = hw->seg;
+
+	do {
+		fv = (struct ice_fv *)
+			ice_pkg_enum_entry(ice_seg, &state, ICE_SID_FLD_VEC_SW,
+					   &offset, ice_sw_fv_handler);
+		if (!fv)
+			break;
+		ice_seg = NULL;
+
+		/* in the profile that not be used, the prot_id is set to 0xff
+		 * and the off is set to 0x1ff for all the field vectors.
+		 */
+		for (j = 0; j < hw->blk[ICE_BLK_SW].es.fvw; j++)
+			if (fv->ew[j].prot_id != ICE_PROT_INVALID ||
+			    fv->ew[j].off != ICE_FV_OFFSET_INVAL)
+				flag = true;
+		if (flag && prof_index > max_prof_index)
+			max_prof_index = prof_index;
+
+		prof_index++;
+		flag = false;
+	} while (fv);
+
+	hw->switch_info->max_used_prof_index = max_prof_index;
+
+	return ICE_SUCCESS;
+}
+
+/**
  * ice_init_pkg - initialize/download package
  * @hw: pointer to the hardware structure
  * @buf: pointer to the package buffer
@@ -1423,6 +1505,7 @@ enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len)
 		 */
 		ice_init_pkg_regs(hw);
 		ice_fill_blk_tbls(hw);
+		ice_get_prof_index_max(hw);
 	} else {
 		ice_debug(hw, ICE_DBG_INIT, "package load failed, %d\n",
 			  status);
@@ -1500,38 +1583,6 @@ static struct ice_buf_build *ice_pkg_buf_alloc(struct ice_hw *hw)
 }
 
 /**
- * ice_sw_fv_handler
- * @sect_type: section type
- * @section: pointer to section
- * @index: index of the field vector entry to be returned
- * @offset: ptr to variable that receives the offset in the field vector table
- *
- * This is a callback function that can be passed to ice_pkg_enum_entry.
- * This function treats the given section as of type ice_sw_fv_section and
- * enumerates offset field. "offset" is an index into the field vector
- * vector table.
- */
-static void *
-ice_sw_fv_handler(u32 sect_type, void *section, u32 index, u32 *offset)
-{
-	struct ice_sw_fv_section *fv_section =
-		(struct ice_sw_fv_section *)section;
-
-	if (!section || sect_type != ICE_SID_FLD_VEC_SW)
-		return NULL;
-	if (index >= LE16_TO_CPU(fv_section->count))
-		return NULL;
-	if (offset)
-		/* "index" passed in to this function is relative to a given
-		 * 4k block. To get to the true index into the field vector
-		 * table need to add the relative index to the base_offset
-		 * field of this section
-		 */
-		*offset = LE16_TO_CPU(fv_section->base_offset) + index;
-	return fv_section->fv + index;
-}
-
-/**
  * ice_get_sw_prof_type - determine switch profile type
  * @hw: pointer to the HW structure
  * @fv: pointer to the switch field vector
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index a82af6fa0..4d193b30f 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1591,7 +1591,7 @@ static void ice_get_recp_to_prof_map(struct ice_hw *hw)
 	ice_declare_bitmap(r_bitmap, ICE_MAX_NUM_RECIPES);
 	u16 i;
 
-	for (i = 0; i < ICE_MAX_NUM_PROFILES; i++) {
+	for (i = 0; i < hw->switch_info->max_used_prof_index + 1; i++) {
 		u16 j;
 
 		ice_zero_bitmap(profile_to_recipe[i], ICE_MAX_NUM_RECIPES);
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 997f97e0d..266f5500a 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -792,6 +792,7 @@ struct ice_switch_info {
 	struct LIST_HEAD_TYPE vsi_list_map_head;
 	struct ice_sw_recipe *recp_list;
 	u16 prof_res_bm_init;
+	u16 max_used_prof_index;
 
 	ice_declare_bitmap(prof_res_bm[ICE_MAX_NUM_PROFILES], ICE_MAX_FV_WORDS);
 };
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 20/40] net/ice/base: refactor DCB related variables
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (18 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 19/40] net/ice/base: reduce profile to recip info get from firmware Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 21/40] net/ice/base: support outer IP filter for GTPC Qi Zhang
                     ` (19 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Chinh T Cao

In this patch, the DCB related variables will be refactored out of the
ice_port_info_struct. The goal is to make the ice_port_info struct
cleaner.

Signed-off-by: Chinh T Cao <chinh.t.cao@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_dcb.c  | 40 ++++++++++++++++++++--------------------
 drivers/net/ice/base/ice_type.h | 16 +++++++++-------
 2 files changed, 29 insertions(+), 27 deletions(-)

diff --git a/drivers/net/ice/base/ice_dcb.c b/drivers/net/ice/base/ice_dcb.c
index 01cee227e..f5f375a7a 100644
--- a/drivers/net/ice/base/ice_dcb.c
+++ b/drivers/net/ice/base/ice_dcb.c
@@ -850,9 +850,9 @@ ice_get_ieee_or_cee_dcb_cfg(struct ice_port_info *pi, u8 dcbx_mode)
 		return ICE_ERR_PARAM;
 
 	if (dcbx_mode == ICE_DCBX_MODE_IEEE)
-		dcbx_cfg = &pi->local_dcbx_cfg;
+		dcbx_cfg = &pi->qos_cfg.local_dcbx_cfg;
 	else if (dcbx_mode == ICE_DCBX_MODE_CEE)
-		dcbx_cfg = &pi->desired_dcbx_cfg;
+		dcbx_cfg = &pi->qos_cfg.desired_dcbx_cfg;
 
 	/* Get Local DCB Config in case of ICE_DCBX_MODE_IEEE
 	 * or get CEE DCB Desired Config in case of ICE_DCBX_MODE_CEE
@@ -863,7 +863,7 @@ ice_get_ieee_or_cee_dcb_cfg(struct ice_port_info *pi, u8 dcbx_mode)
 		goto out;
 
 	/* Get Remote DCB Config */
-	dcbx_cfg = &pi->remote_dcbx_cfg;
+	dcbx_cfg = &pi->qos_cfg.remote_dcbx_cfg;
 	ret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_REMOTE,
 				 ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID, dcbx_cfg);
 	/* Don't treat ENOENT as an error for Remote MIBs */
@@ -892,14 +892,14 @@ enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi)
 	ret = ice_aq_get_cee_dcb_cfg(pi->hw, &cee_cfg, NULL);
 	if (ret == ICE_SUCCESS) {
 		/* CEE mode */
-		dcbx_cfg = &pi->local_dcbx_cfg;
+		dcbx_cfg = &pi->qos_cfg.local_dcbx_cfg;
 		dcbx_cfg->dcbx_mode = ICE_DCBX_MODE_CEE;
 		dcbx_cfg->tlv_status = LE32_TO_CPU(cee_cfg.tlv_status);
 		ice_cee_to_dcb_cfg(&cee_cfg, dcbx_cfg);
 		ret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_CEE);
 	} else if (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT) {
 		/* CEE mode not enabled try querying IEEE data */
-		dcbx_cfg = &pi->local_dcbx_cfg;
+		dcbx_cfg = &pi->qos_cfg.local_dcbx_cfg;
 		dcbx_cfg->dcbx_mode = ICE_DCBX_MODE_IEEE;
 		ret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_IEEE);
 	}
@@ -916,26 +916,26 @@ enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi)
  */
 enum ice_status ice_init_dcb(struct ice_hw *hw, bool enable_mib_change)
 {
-	struct ice_port_info *pi = hw->port_info;
+	struct ice_qos_cfg *qos_cfg = &hw->port_info->qos_cfg;
 	enum ice_status ret = ICE_SUCCESS;
 
 	if (!hw->func_caps.common_cap.dcb)
 		return ICE_ERR_NOT_SUPPORTED;
 
-	pi->is_sw_lldp = true;
+	qos_cfg->is_sw_lldp = true;
 
 	/* Get DCBX status */
-	pi->dcbx_status = ice_get_dcbx_status(hw);
+	qos_cfg->dcbx_status = ice_get_dcbx_status(hw);
 
-	if (pi->dcbx_status == ICE_DCBX_STATUS_DONE ||
-	    pi->dcbx_status == ICE_DCBX_STATUS_IN_PROGRESS ||
-	    pi->dcbx_status == ICE_DCBX_STATUS_NOT_STARTED) {
+	if (qos_cfg->dcbx_status == ICE_DCBX_STATUS_DONE ||
+	    qos_cfg->dcbx_status == ICE_DCBX_STATUS_IN_PROGRESS ||
+	    qos_cfg->dcbx_status == ICE_DCBX_STATUS_NOT_STARTED) {
 		/* Get current DCBX configuration */
-		ret = ice_get_dcb_cfg(pi);
+		ret = ice_get_dcb_cfg(hw->port_info);
 		if (ret)
 			return ret;
-		pi->is_sw_lldp = false;
-	} else if (pi->dcbx_status == ICE_DCBX_STATUS_DIS) {
+		qos_cfg->is_sw_lldp = false;
+	} else if (qos_cfg->dcbx_status == ICE_DCBX_STATUS_DIS) {
 		return ICE_ERR_NOT_READY;
 	}
 
@@ -943,7 +943,7 @@ enum ice_status ice_init_dcb(struct ice_hw *hw, bool enable_mib_change)
 	if (enable_mib_change) {
 		ret = ice_aq_cfg_lldp_mib_change(hw, true, NULL);
 		if (ret)
-			pi->is_sw_lldp = true;
+			qos_cfg->is_sw_lldp = true;
 	}
 
 	return ret;
@@ -958,21 +958,21 @@ enum ice_status ice_init_dcb(struct ice_hw *hw, bool enable_mib_change)
  */
 enum ice_status ice_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_mib)
 {
-	struct ice_port_info *pi = hw->port_info;
+	struct ice_qos_cfg *qos_cfg = &hw->port_info->qos_cfg;
 	enum ice_status ret;
 
 	if (!hw->func_caps.common_cap.dcb)
 		return ICE_ERR_NOT_SUPPORTED;
 
 	/* Get DCBX status */
-	pi->dcbx_status = ice_get_dcbx_status(hw);
+	qos_cfg->dcbx_status = ice_get_dcbx_status(hw);
 
-	if (pi->dcbx_status == ICE_DCBX_STATUS_DIS)
+	if (qos_cfg->dcbx_status == ICE_DCBX_STATUS_DIS)
 		return ICE_ERR_NOT_READY;
 
 	ret = ice_aq_cfg_lldp_mib_change(hw, ena_mib, NULL);
 	if (!ret)
-		pi->is_sw_lldp = !ena_mib;
+		qos_cfg->is_sw_lldp = !ena_mib;
 
 	return ret;
 }
@@ -1269,7 +1269,7 @@ enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi)
 	hw = pi->hw;
 
 	/* update the HW local config */
-	dcbcfg = &pi->local_dcbx_cfg;
+	dcbcfg = &pi->qos_cfg.local_dcbx_cfg;
 	/* Allocate the LLDPDU */
 	lldpmib = (u8 *)ice_malloc(hw, ICE_LLDPDU_SIZE);
 	if (!lldpmib)
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 266f5500a..f80e19df9 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -753,6 +753,14 @@ struct ice_dcbx_cfg {
 #define ICE_DCBX_APPS_NON_WILLING	0x1
 };
 
+struct ice_qos_cfg {
+	struct ice_dcbx_cfg local_dcbx_cfg;	/* Oper/Local Cfg */
+	struct ice_dcbx_cfg desired_dcbx_cfg;	/* CEE Desired Cfg */
+	struct ice_dcbx_cfg remote_dcbx_cfg;	/* Peer Cfg */
+	u8 dcbx_status : 3;			/* see ICE_DCBX_STATUS_DIS */
+	u8 is_sw_lldp : 1;
+};
+
 struct ice_port_info {
 	struct ice_sched_node *root;	/* Root Node per Port */
 	struct ice_hw *hw;		/* back pointer to HW instance */
@@ -778,13 +786,7 @@ struct ice_port_info {
 	struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];
 	struct ice_bw_type_info root_node_bw_t_info;
 	struct ice_bw_type_info tc_node_bw_t_info[ICE_MAX_TRAFFIC_CLASS];
-	struct ice_dcbx_cfg local_dcbx_cfg;	/* Oper/Local Cfg */
-	/* DCBX info */
-	struct ice_dcbx_cfg remote_dcbx_cfg;	/* Peer Cfg */
-	struct ice_dcbx_cfg desired_dcbx_cfg;	/* CEE Desired Cfg */
-	/* LLDP/DCBX Status */
-	u8 dcbx_status:3;		/* see ICE_DCBX_STATUS_DIS */
-	u8 is_sw_lldp:1;
+	struct ice_qos_cfg qos_cfg;
 	u8 is_vf:1;
 };
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 21/40] net/ice/base: support outer IP filter for GTPC
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (19 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 20/40] net/ice/base: refactor DCB related variables Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 22/40] net/ice/base: support outer IP filter for GTPU without inner IP Qi Zhang
                     ` (18 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang

Add ptype MAC_IPV4_GTPC_TEID and MAC_IPV4_GTPC into
ice_ptypes_ipv4_ofos, ice_ptypes_ipv4_ofos_all and ice_ipv4_ofos_no_l4

Add ptype MAC_IPV6_GTPC_TEID and MAC_IPV6_GTPC into
ice_ptypes_ipv6_ofos, ice_ptypes_ipv6_ofos_all and ice_ipv6_ofos_no_l4

So outer IP can be configured as input set for GTPC packet.

Also add MAC_IPV4_GTPC_TEID and MAC_IPV6_GTPC_TEID into
ice_ptypes_gtpc, so when ICE_FLOW_SEG_HDR_GTPC is requested, it can
take effect on all GTPC packets (with or without TEID).

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_flow.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 3bc78f87b..58a91448c 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -224,7 +224,7 @@ static const u32 ice_ptypes_macvlan_il[] = {
 static const u32 ice_ptypes_ipv4_ofos[] = {
 	0x1DC00000, 0x04000800, 0x00000000, 0x00000000,
 	0x00000000, 0x00000155, 0x00000000, 0x00000000,
-	0x00000000, 0x000FC000, 0x00000000, 0x00000000,
+	0x00000000, 0x000FC000, 0x000000A0, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -238,7 +238,7 @@ static const u32 ice_ptypes_ipv4_ofos[] = {
 static const u32 ice_ptypes_ipv4_ofos_all[] = {
 	0x1DC00000, 0x04000800, 0x00000000, 0x00000000,
 	0x00000000, 0x00000155, 0x00000000, 0x00000000,
-	0x00000000, 0x000FC000, 0x83E0F800, 0x00000101,
+	0x00000000, 0x000FC000, 0x83E0F8A0, 0x00000101,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -264,7 +264,7 @@ static const u32 ice_ptypes_ipv4_il[] = {
 static const u32 ice_ptypes_ipv6_ofos[] = {
 	0x00000000, 0x00000000, 0x77000000, 0x10002000,
 	0x00000000, 0x000002AA, 0x00000000, 0x00000000,
-	0x00000000, 0x03F00000, 0x00000000, 0x00000000,
+	0x00000000, 0x03F00000, 0x00000140, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -278,7 +278,7 @@ static const u32 ice_ptypes_ipv6_ofos[] = {
 static const u32 ice_ptypes_ipv6_ofos_all[] = {
 	0x00000000, 0x00000000, 0x77000000, 0x10002000,
 	0x00000000, 0x000002AA, 0x00000000, 0x00000000,
-	0x00000000, 0x03F00000, 0x7C1F0000, 0x00000206,
+	0x00000000, 0x03F00000, 0x7C1F0140, 0x00000206,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -302,7 +302,7 @@ static const u32 ice_ptypes_ipv6_il[] = {
 static const u32 ice_ipv4_ofos_no_l4[] = {
 	0x10C00000, 0x04000800, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
-	0x00000000, 0x000cc000, 0x00000000, 0x00000000,
+	0x00000000, 0x000cc000, 0x000000A0, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -326,7 +326,7 @@ static const u32 ice_ipv4_il_no_l4[] = {
 static const u32 ice_ipv6_ofos_no_l4[] = {
 	0x00000000, 0x00000000, 0x43000000, 0x10002000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
-	0x00000000, 0x02300000, 0x00000000, 0x00000000,
+	0x00000000, 0x02300000, 0x00000140, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -448,7 +448,7 @@ static const u32 ice_ptypes_mac_il[] = {
 static const u32 ice_ptypes_gtpc[] = {
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
-	0x00000000, 0x00000000, 0x00000180, 0x00000000,
+	0x00000000, 0x00000000, 0x000001E0, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 22/40] net/ice/base: support outer IP filter for GTPU without inner IP
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (20 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 21/40] net/ice/base: support outer IP filter for GTPC Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 23/40] net/ice/base: move a function Qi Zhang
                     ` (17 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang

Add ptype MAC_IPV4_GTPU into
ice_ptypes_ipv4_ofos, ice_ptypes_ipv4_ofos_all and ice_ipv4_ofos_no_l4

Add ptype MAC_IPV6_GTPU into
ice_ptypes_ipv6_ofos, ice_ptypes_ipv6_ofos_all and ice_ipv6_ofos_no_l4

Add ptype MAC_IPV4_GTPU and MAC_IPV6_GTPU into
the new ice_ptypes_gtpu_no_ip

So outer IP can be configured as input set for GTPU packet that without
inner IP layer.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_flow.c | 29 ++++++++++++++++++++++-------
 drivers/net/ice/base/ice_flow.h |  1 +
 2 files changed, 23 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 58a91448c..a612c8dc6 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -224,7 +224,7 @@ static const u32 ice_ptypes_macvlan_il[] = {
 static const u32 ice_ptypes_ipv4_ofos[] = {
 	0x1DC00000, 0x04000800, 0x00000000, 0x00000000,
 	0x00000000, 0x00000155, 0x00000000, 0x00000000,
-	0x00000000, 0x000FC000, 0x000000A0, 0x00000000,
+	0x00000000, 0x000FC000, 0x000002A0, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -238,7 +238,7 @@ static const u32 ice_ptypes_ipv4_ofos[] = {
 static const u32 ice_ptypes_ipv4_ofos_all[] = {
 	0x1DC00000, 0x04000800, 0x00000000, 0x00000000,
 	0x00000000, 0x00000155, 0x00000000, 0x00000000,
-	0x00000000, 0x000FC000, 0x83E0F8A0, 0x00000101,
+	0x00000000, 0x000FC000, 0x83E0FAA0, 0x00000101,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -264,7 +264,7 @@ static const u32 ice_ptypes_ipv4_il[] = {
 static const u32 ice_ptypes_ipv6_ofos[] = {
 	0x00000000, 0x00000000, 0x77000000, 0x10002000,
 	0x00000000, 0x000002AA, 0x00000000, 0x00000000,
-	0x00000000, 0x03F00000, 0x00000140, 0x00000000,
+	0x00000000, 0x03F00000, 0x00000540, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -278,7 +278,7 @@ static const u32 ice_ptypes_ipv6_ofos[] = {
 static const u32 ice_ptypes_ipv6_ofos_all[] = {
 	0x00000000, 0x00000000, 0x77000000, 0x10002000,
 	0x00000000, 0x000002AA, 0x00000000, 0x00000000,
-	0x00000000, 0x03F00000, 0x7C1F0140, 0x00000206,
+	0x00000000, 0x03F00000, 0x7C1F0540, 0x00000206,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -302,7 +302,7 @@ static const u32 ice_ptypes_ipv6_il[] = {
 static const u32 ice_ipv4_ofos_no_l4[] = {
 	0x10C00000, 0x04000800, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
-	0x00000000, 0x000cc000, 0x000000A0, 0x00000000,
+	0x00000000, 0x000cc000, 0x000002A0, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -326,7 +326,7 @@ static const u32 ice_ipv4_il_no_l4[] = {
 static const u32 ice_ipv6_ofos_no_l4[] = {
 	0x00000000, 0x00000000, 0x43000000, 0x10002000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
-	0x00000000, 0x02300000, 0x00000140, 0x00000000,
+	0x00000000, 0x02300000, 0x00000540, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -667,6 +667,17 @@ static const u32 ice_ptypes_mac_non_ip_ofos[] = {
 	0x00000000, 0x00000000, 0x00000000, 0x00000000,
 };
 
+static const u32 ice_ptypes_gtpu_no_ip[] = {
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000600, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+	0x00000000, 0x00000000, 0x00000000, 0x00000000,
+};
+
 /* Manage parameters and info. used during the creation of a flow profile */
 struct ice_flow_prof_params {
 	enum ice_block blk;
@@ -691,7 +702,7 @@ struct ice_flow_prof_params {
 	ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_GTPU | \
 	ICE_FLOW_SEG_HDR_PFCP_SESSION | ICE_FLOW_SEG_HDR_L2TPV3 | \
 	ICE_FLOW_SEG_HDR_ESP | ICE_FLOW_SEG_HDR_AH | \
-	ICE_FLOW_SEG_HDR_NAT_T_ESP)
+	ICE_FLOW_SEG_HDR_NAT_T_ESP | ICE_FLOW_SEG_HDR_GTPU_NON_IP)
 
 #define ICE_FLOW_SEG_HDRS_L2_MASK	\
 	(ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN)
@@ -911,6 +922,10 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
 			src = (const ice_bitmap_t *)ice_ptypes_gtpc_tid;
 			ice_and_bitmap(params->ptypes, params->ptypes,
 				       src, ICE_FLOW_PTYPE_MAX);
+		} else if (hdrs & ICE_FLOW_SEG_HDR_GTPU_NON_IP) {
+			src = (const ice_bitmap_t *)ice_ptypes_gtpu_no_ip;
+			ice_and_bitmap(params->ptypes, params->ptypes,
+				       src, ICE_FLOW_PTYPE_MAX);
 		} else if (hdrs & ICE_FLOW_SEG_HDR_GTPU_DWN) {
 			src = (const ice_bitmap_t *)ice_ptypes_gtpu;
 			ice_and_bitmap(params->ptypes, params->ptypes,
diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h
index 92987664e..0a52409d5 100644
--- a/drivers/net/ice/base/ice_flow.h
+++ b/drivers/net/ice/base/ice_flow.h
@@ -178,6 +178,7 @@ enum ice_flow_seg_hdr {
 	ICE_FLOW_SEG_HDR_AH		= 0x00200000,
 	ICE_FLOW_SEG_HDR_NAT_T_ESP	= 0x00400000,
 	ICE_FLOW_SEG_HDR_ETH_NON_IP	= 0x00800000,
+	ICE_FLOW_SEG_HDR_GTPU_NON_IP	= 0x01000000,
 	/* The following is an additive bit for ICE_FLOW_SEG_HDR_IPV4 and
 	 * ICE_FLOW_SEG_HDR_IPV6 which include the IPV4 other PTYPEs
 	 */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 23/40] net/ice/base: move a function
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (21 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 22/40] net/ice/base: support outer IP filter for GTPU without inner IP Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 24/40] net/ice/base: clear advanced rules in reset preparation Qi Zhang
                     ` (16 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Tony Nguyen

The only caller of this function is within the file so mark it as static
and move it up in the file to avoid a forward declaration.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_acl.h      |  1 -
 drivers/net/ice/base/ice_acl_ctrl.c | 93 ++++++++++++++++++-------------------
 2 files changed, 45 insertions(+), 49 deletions(-)

diff --git a/drivers/net/ice/base/ice_acl.h b/drivers/net/ice/base/ice_acl.h
index 500db0c35..cd75e1c17 100644
--- a/drivers/net/ice/base/ice_acl.h
+++ b/drivers/net/ice/base/ice_acl.h
@@ -132,7 +132,6 @@ enum ice_status ice_acl_destroy_tbl(struct ice_hw *hw);
 enum ice_status
 ice_acl_create_scen(struct ice_hw *hw, u16 match_width, u16 num_entries,
 		    u16 *scen_id);
-enum ice_status ice_acl_destroy_scen(struct ice_hw *hw, u16 scen_id);
 enum ice_status
 ice_aq_alloc_acl_tbl(struct ice_hw *hw, struct ice_acl_alloc_tbl *tbl,
 		     struct ice_sq_cd *cd);
diff --git a/drivers/net/ice/base/ice_acl_ctrl.c b/drivers/net/ice/base/ice_acl_ctrl.c
index 0ecf38496..02a1dd34f 100644
--- a/drivers/net/ice/base/ice_acl_ctrl.c
+++ b/drivers/net/ice/base/ice_acl_ctrl.c
@@ -842,6 +842,51 @@ ice_acl_create_scen(struct ice_hw *hw, u16 match_width, u16 num_entries,
 }
 
 /**
+ * ice_acl_destroy_scen - Destroy an ACL scenario
+ * @hw: pointer to the HW struct
+ * @scen_id: ID of the remove scenario
+ */
+static enum ice_status ice_acl_destroy_scen(struct ice_hw *hw, u16 scen_id)
+{
+	struct ice_acl_scen *scen, *tmp_scen;
+	struct ice_flow_prof *p, *tmp;
+	enum ice_status status;
+
+	if (!hw->acl_tbl)
+		return ICE_ERR_DOES_NOT_EXIST;
+
+	/* Remove profiles that use "scen_id" scenario */
+	LIST_FOR_EACH_ENTRY_SAFE(p, tmp, &hw->fl_profs[ICE_BLK_ACL],
+				 ice_flow_prof, l_entry)
+		if (p->cfg.scen && p->cfg.scen->id == scen_id) {
+			status = ice_flow_rem_prof(hw, ICE_BLK_ACL, p->id);
+			if (status) {
+				ice_debug(hw, ICE_DBG_ACL, "ice_flow_rem_prof failed. status: %d\n",
+					  status);
+				return status;
+			}
+		}
+
+	/* Call the AQ command to destroy the targeted scenario */
+	status = ice_aq_dealloc_acl_scen(hw, scen_id, NULL);
+	if (status) {
+		ice_debug(hw, ICE_DBG_ACL, "AQ de-allocation of scenario failed. status: %d\n",
+			  status);
+		return status;
+	}
+
+	/* Remove scenario from hw->acl_tbl->scens */
+	LIST_FOR_EACH_ENTRY_SAFE(scen, tmp_scen, &hw->acl_tbl->scens,
+				 ice_acl_scen, list_entry)
+		if (scen->id == scen_id) {
+			LIST_DEL(&scen->list_entry);
+			ice_free(hw, scen);
+		}
+
+	return ICE_SUCCESS;
+}
+
+/**
  * ice_acl_destroy_tbl - Destroy a previously created LEM table for ACL
  * @hw: pointer to the HW struct
  */
@@ -1118,51 +1163,3 @@ ice_acl_rem_entry(struct ice_hw *hw, struct ice_acl_scen *scen, u16 entry_idx)
 
 	return status;
 }
-
-/**
- * ice_acl_destroy_scen - Destroy an ACL scenario
- * @hw: pointer to the HW struct
- * @scen_id: ID of the remove scenario
- */
-enum ice_status ice_acl_destroy_scen(struct ice_hw *hw, u16 scen_id)
-{
-	struct ice_acl_scen *scen, *tmp_scen;
-	struct ice_flow_prof *p, *tmp;
-	enum ice_status status;
-
-	if (!hw->acl_tbl)
-		return ICE_ERR_DOES_NOT_EXIST;
-
-	/* Remove profiles that use "scen_id" scenario */
-	LIST_FOR_EACH_ENTRY_SAFE(p, tmp, &hw->fl_profs[ICE_BLK_ACL],
-				 ice_flow_prof, l_entry)
-		if (p->cfg.scen && p->cfg.scen->id == scen_id) {
-			status = ice_flow_rem_prof(hw, ICE_BLK_ACL, p->id);
-			if (status) {
-				ice_debug(hw, ICE_DBG_ACL,
-					  "ice_flow_rem_prof failed. status: %d\n",
-					  status);
-				goto exit;
-			}
-		}
-
-	/* Call the AQ command to destroy the targeted scenario */
-	status = ice_aq_dealloc_acl_scen(hw, scen_id, NULL);
-
-	if (status) {
-		ice_debug(hw, ICE_DBG_ACL,
-			  "AQ de-allocation of scenario failed. status: %d\n",
-			  status);
-		goto exit;
-	}
-
-	/* Remove scenario from hw->acl_tbl->scens */
-	LIST_FOR_EACH_ENTRY_SAFE(scen, tmp_scen, &hw->acl_tbl->scens,
-				 ice_acl_scen, list_entry)
-		if (scen->id == scen_id) {
-			LIST_DEL(&scen->list_entry);
-			ice_free(hw, scen);
-		}
-exit:
-	return status;
-}
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 24/40] net/ice/base: clear advanced rules in reset preparation
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (22 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 23/40] net/ice/base: move a function Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 25/40] net/ice/base: move a function Qi Zhang
                     ` (15 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, NorbertX Ciosek

Clear advanced rules from SW and HW before reset.

Signed-off-by: NorbertX Ciosek <norbertx.ciosek@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_switch.c | 30 +++++++++++++++++++-----------
 1 file changed, 19 insertions(+), 11 deletions(-)

diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 4d193b30f..d1bc10539 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -8114,13 +8114,12 @@ ice_rem_adv_rule_by_id(struct ice_hw *hw,
  */
 enum ice_status ice_rem_adv_rule_for_vsi(struct ice_hw *hw, u16 vsi_handle)
 {
-	struct ice_adv_fltr_mgmt_list_entry *list_itr;
+	struct ice_adv_fltr_mgmt_list_entry *list_itr, *tmp_entry;
 	struct ice_vsi_list_map_info *map_info;
 	struct LIST_HEAD_TYPE *list_head;
 	struct ice_adv_rule_info rinfo;
 	struct ice_switch_info *sw;
 	enum ice_status status;
-	u16 vsi_list_id = 0;
 	u8 rid;
 
 	sw = hw->switch_info;
@@ -8129,22 +8128,31 @@ enum ice_status ice_rem_adv_rule_for_vsi(struct ice_hw *hw, u16 vsi_handle)
 			continue;
 		if (!sw->recp_list[rid].adv_rule)
 			continue;
+
 		list_head = &sw->recp_list[rid].filt_rules;
-		map_info = NULL;
-		LIST_FOR_EACH_ENTRY(list_itr, list_head,
-				    ice_adv_fltr_mgmt_list_entry, list_entry) {
-			map_info = ice_find_vsi_list_entry(&sw->recp_list[rid],
-							   vsi_handle,
-							   &vsi_list_id);
-			if (!map_info)
-				continue;
+		LIST_FOR_EACH_ENTRY_SAFE(list_itr, tmp_entry, list_head,
+					 ice_adv_fltr_mgmt_list_entry,
+					 list_entry) {
 			rinfo = list_itr->rule_info;
+
+			if (rinfo.sw_act.fltr_act == ICE_FWD_TO_VSI_LIST) {
+				map_info = list_itr->vsi_list_info;
+				if (!map_info)
+					continue;
+
+				if (!ice_is_bit_set(map_info->vsi_map,
+						    vsi_handle))
+					continue;
+			} else if (rinfo.sw_act.vsi_handle != vsi_handle) {
+				continue;
+			}
+
 			rinfo.sw_act.vsi_handle = vsi_handle;
 			status = ice_rem_adv_rule(hw, list_itr->lkups,
 						  list_itr->lkups_cnt, &rinfo);
+
 			if (status)
 				return status;
-			map_info = NULL;
 		}
 	}
 	return ICE_SUCCESS;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 25/40] net/ice/base: move a function
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (23 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 24/40] net/ice/base: clear advanced rules in reset preparation Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 26/40] net/ice/base: add check for failed acts allocation Qi Zhang
                     ` (14 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Tony Nguyen

Move ice_flow_get_hw_prof, this is not necessary for DPDK, just
sync the code with other compile option which ice_flow_get_hw_prof
is declared as a static function.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_flow.c | 48 ++++++++++++++++++++---------------------
 1 file changed, 24 insertions(+), 24 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index a612c8dc6..65ab2394f 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1642,6 +1642,30 @@ ice_dealloc_flow_entry(struct ice_hw *hw, struct ice_flow_entry *entry)
 	ice_free(hw, entry);
 }
 
+/**
+ * ice_flow_get_hw_prof - return the HW profile for a specific profile ID handle
+ * @hw: pointer to the HW struct
+ * @blk: classification stage
+ * @prof_id: the profile ID handle
+ * @hw_prof_id: pointer to variable to receive the HW profile ID
+ */
+enum ice_status
+ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
+		     u8 *hw_prof_id)
+{
+	enum ice_status status = ICE_ERR_DOES_NOT_EXIST;
+	struct ice_prof_map *map;
+
+	ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);
+	map = ice_search_prof_id(hw, blk, prof_id);
+	if (map) {
+		*hw_prof_id = map->prof_id;
+		status = ICE_SUCCESS;
+	}
+	ice_release_lock(&hw->blk[blk].es.prof_map_lock);
+	return status;
+}
+
 #define ICE_ACL_INVALID_SCEN	0x3f
 
 /**
@@ -2233,30 +2257,6 @@ ice_flow_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id)
 }
 
 /**
- * ice_flow_get_hw_prof - return the HW profile for a specific profile ID handle
- * @hw: pointer to the HW struct
- * @blk: classification stage
- * @prof_id: the profile ID handle
- * @hw_prof_id: pointer to variable to receive the HW profile ID
- */
-enum ice_status
-ice_flow_get_hw_prof(struct ice_hw *hw, enum ice_block blk, u64 prof_id,
-		     u8 *hw_prof_id)
-{
-	enum ice_status status = ICE_ERR_DOES_NOT_EXIST;
-	struct ice_prof_map *map;
-
-	ice_acquire_lock(&hw->blk[blk].es.prof_map_lock);
-	map = ice_search_prof_id(hw, blk, prof_id);
-	if (map) {
-		*hw_prof_id = map->prof_id;
-		status = ICE_SUCCESS;
-	}
-	ice_release_lock(&hw->blk[blk].es.prof_map_lock);
-	return status;
-}
-
-/**
  * ice_flow_find_entry - look for a flow entry using its unique ID
  * @hw: pointer to the HW struct
  * @blk: classification stage
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 26/40] net/ice/base: add check for failed acts allocation
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (24 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 25/40] net/ice/base: move a function Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 27/40] net/ice/base: remove repeated words Qi Zhang
                     ` (13 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Tony Nguyen

There is no check for failed allocation of 'acts'. Add a check and return
if memory was not successfully allocated. Also, as all 'goto out' occur
after this check there is no need to perform a check for 'acts' as we will
have returned if it is not set.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_flow.c | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 65ab2394f..d96bf169f 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1712,8 +1712,8 @@ ice_flow_acl_is_prof_in_use(struct ice_hw *hw, struct ice_flow_prof *prof,
 	    buf->pf_scenario_num[6] == ICE_ACL_INVALID_SCEN &&
 	    buf->pf_scenario_num[7] == ICE_ACL_INVALID_SCEN)
 		return ICE_SUCCESS;
-	else
-		return ICE_ERR_IN_USE;
+
+	return ICE_ERR_IN_USE;
 }
 
 /**
@@ -2861,7 +2861,6 @@ ice_flow_acl_add_scen_entry_sync(struct ice_hw *hw, struct ice_flow_prof *prof,
 	 */
 	exist = ice_flow_acl_find_scen_entry_cond(prof, e, &do_chg_action,
 						  &do_add_entry, &do_rem_entry);
-
 	if (do_rem_entry) {
 		status = ice_flow_rem_entry_sync(hw, ICE_BLK_ACL, exist);
 		if (status)
@@ -2869,8 +2868,11 @@ ice_flow_acl_add_scen_entry_sync(struct ice_hw *hw, struct ice_flow_prof *prof,
 	}
 
 	/* Prepare the result action buffer */
-	acts = (struct ice_acl_act_entry *)ice_calloc
-		(hw, e->entry_sz, sizeof(struct ice_acl_act_entry));
+	acts = (struct ice_acl_act_entry *)
+		ice_calloc(hw, e->entry_sz, sizeof(struct ice_acl_act_entry));
+	if (!acts)
+		return ICE_ERR_NO_MEMORY;
+
 	for (i = 0; i < e->acts_cnt; i++)
 		ice_memcpy(&acts[i], &e->acts[i].data.acl_act,
 			   sizeof(struct ice_acl_act_entry),
@@ -2937,8 +2939,7 @@ ice_flow_acl_add_scen_entry_sync(struct ice_hw *hw, struct ice_flow_prof *prof,
 		*(entry) = exist;
 	}
 out:
-	if (acts)
-		ice_free(hw, acts);
+	ice_free(hw, acts);
 
 	return status;
 }
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 27/40] net/ice/base: remove repeated words
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (25 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 26/40] net/ice/base: add check for failed acts allocation Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 28/40] net/ice/base: remove function ACL count query Qi Zhang
                     ` (12 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Bruce Allan

A new test in checkpatch detects repeated words; cleanup all pre-existing
occurrences of those now.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_adminq_cmd.h | 2 +-
 drivers/net/ice/base/ice_common.c     | 2 +-
 drivers/net/ice/base/ice_flow.c       | 4 ++--
 drivers/net/ice/base/ice_nvm.c        | 2 +-
 drivers/net/ice/base/ice_switch.c     | 4 ++--
 5 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h
index d7a57fe6b..bc71ec531 100644
--- a/drivers/net/ice/base/ice_adminq_cmd.h
+++ b/drivers/net/ice/base/ice_adminq_cmd.h
@@ -2130,7 +2130,7 @@ struct ice_aqc_acl_update_query_scen {
  */
 struct ice_aqc_acl_scen {
 	struct {
-		/* Byte [x] selection for the TCAM key. This value must be set
+		/* Byte [x] selection for the TCAM key. This value must be
 		 * set to 0x0 for unusued TCAM.
 		 * Only Bit 6..0 is used in each byte and MSB is reserved
 		 */
diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 46754a333..f5b1a0ce8 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2084,7 +2084,7 @@ ice_parse_fdir_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_p,
  * @cap_count: the number of capabilities
  *
  * Helper device to parse device (0x000B) capabilities list. For
- * capabilities shared between device and device, this relies on
+ * capabilities shared between device and function, this relies on
  * ice_parse_common_caps.
  *
  * Loop through the list of provided capabilities and extract the relevant
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index d96bf169f..9e9878ae4 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1254,7 +1254,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
  * ice_flow_xtract_raws - Create extract sequence entries for raw bytes
  * @hw: pointer to the HW struct
  * @params: information about the flow to be processed
- * @seg: index of packet segment whose raw fields are to be be extracted
+ * @seg: index of packet segment whose raw fields are to be extracted
  */
 static enum ice_status
 ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params,
@@ -3106,7 +3106,7 @@ enum ice_status ice_flow_rem_entry(struct ice_hw *hw, enum ice_block blk,
  *
  * This helper function stores information of a field being matched, including
  * the type of the field and the locations of the value to match, the mask, and
- * and the upper-bound value in the start of the input buffer for a flow entry.
+ * the upper-bound value in the start of the input buffer for a flow entry.
  * This function should only be used for fixed-size data structures.
  *
  * This function also opportunistically determines the protocol headers to be
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index b4fb28bfb..5df07133b 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -629,7 +629,7 @@ ice_nvm_access_get_features(struct ice_nvm_access_cmd *cmd,
 {
 	/* The provided data_size must be at least as large as our NVM
 	 * features structure. A larger size should not be treated as an
-	 * error, to allow future extensions to to the features structure to
+	 * error, to allow future extensions to the features structure to
 	 * work on older drivers.
 	 */
 	if (cmd->data_size < sizeof(struct ice_nvm_features))
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index d1bc10539..1c07c60a1 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -2367,7 +2367,7 @@ ice_aq_alloc_free_vsi_list(struct ice_hw *hw, u16 *vsi_list_id,
  * @hw: pointer to the HW struct
  * @bcast_thresh: represents the upper threshold for broadcast storm control
  * @mcast_thresh: represents the upper threshold for multicast storm control
- * @ctl_bitmask: storm control control knobs
+ * @ctl_bitmask: storm control knobs
  *
  * Sets the storm control configuration (0x0280)
  */
@@ -2394,7 +2394,7 @@ ice_aq_set_storm_ctrl(struct ice_hw *hw, u32 bcast_thresh, u32 mcast_thresh,
  * @hw: pointer to the HW struct
  * @bcast_thresh: represents the upper threshold for broadcast storm control
  * @mcast_thresh: represents the upper threshold for multicast storm control
- * @ctl_bitmask: storm control control knobs
+ * @ctl_bitmask: storm control knobs
  *
  * Gets the storm control configuration (0x0281)
  */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 28/40] net/ice/base: remove function ACL count query
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (26 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 27/40] net/ice/base: remove repeated words Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 29/40] net/ice/base: preserve NVM capabilities in safe mode Qi Zhang
                     ` (11 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang

Remove debug function ice_aq_query_acl_cntrs.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_acl.c | 36 ------------------------------------
 drivers/net/ice/base/ice_acl.h |  3 ---
 2 files changed, 39 deletions(-)

diff --git a/drivers/net/ice/base/ice_acl.c b/drivers/net/ice/base/ice_acl.c
index fd12507d7..435a0cb51 100644
--- a/drivers/net/ice/base/ice_acl.c
+++ b/drivers/net/ice/base/ice_acl.c
@@ -435,42 +435,6 @@ ice_aq_dealloc_acl_cntrs(struct ice_hw *hw, struct ice_acl_cntrs *cntrs,
 }
 
 /**
- * ice_aq_query_acl_cntrs - query ACL counter
- * @hw: pointer to the HW struct
- * @bank: queries counter bank
- * @index: queried counter index
- * @cntr_val: pointer to counter or packet counter value
- * @cd: pointer to command details structure or NULL
- *
- * Query ACL counter (direct 0x0C27)
- */
-enum ice_status
-ice_aq_query_acl_cntrs(struct ice_hw *hw, u8 bank, u16 index, u64 *cntr_val,
-		       struct ice_sq_cd *cd)
-{
-	struct ice_aqc_acl_query_counter *cmd;
-	struct ice_aq_desc desc;
-	enum ice_status status;
-
-	if (!cntr_val)
-		return ICE_ERR_PARAM;
-
-	ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_query_acl_counter);
-	cmd = &desc.params.query_counter;
-	cmd->counter_index = CPU_TO_LE16(index);
-	cmd->counter_bank = bank;
-	status = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);
-	if (!status) {
-		__le64 resp_val = 0;
-
-		ice_memcpy(&resp_val, cmd->ops.resp.val,
-			   sizeof(cmd->ops.resp.val), ICE_NONDMA_TO_NONDMA);
-		*cntr_val = LE64_TO_CPU(resp_val);
-	}
-	return status;
-}
-
-/**
  * ice_prog_acl_prof_ranges - program ACL profile ranges
  * @hw: pointer to the HW struct
  * @prof_id: programmed or updated profile ID
diff --git a/drivers/net/ice/base/ice_acl.h b/drivers/net/ice/base/ice_acl.h
index cd75e1c17..be27a545b 100644
--- a/drivers/net/ice/base/ice_acl.h
+++ b/drivers/net/ice/base/ice_acl.h
@@ -172,9 +172,6 @@ enum ice_status
 ice_aq_dealloc_acl_cntrs(struct ice_hw *hw, struct ice_acl_cntrs *cntrs,
 			 struct ice_sq_cd *cd);
 enum ice_status
-ice_aq_query_acl_cntrs(struct ice_hw *hw, u8 bank, u16 index, u64 *cntr_val,
-		       struct ice_sq_cd *cd);
-enum ice_status
 ice_prog_acl_prof_ranges(struct ice_hw *hw, u8 prof_id,
 			 struct ice_aqc_acl_profile_ranges *buf,
 			 struct ice_sq_cd *cd);
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 29/40] net/ice/base: preserve NVM capabilities in safe mode
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (27 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 28/40] net/ice/base: remove function ACL count query Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 30/40] net/ice/base: misc minor ACL changes Qi Zhang
                     ` (10 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Jacob Keller

If the driver initializes in safe mode, it will call
ice_set_safe_mode_caps. This results in clearing the capabilities
structures, in order to set them up for operating in safe mode, ensuring
many features are disabled.

This has a side effect of also clearing the capability bits that relate
to NVM update. The result is that the device driver will not indicate
support for unified update, even if the firmware is capable.

Fix this by adding the relevant capability fields to the list of values
we preserve. To simplify the code, use a common_cap structure instead of
a handful of local variables. To reduce some duplication of the
capability name, introduce a couple of macros used to restore the
capabilities values from the cached copy.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 43 +++++++++++++++++++--------------------
 1 file changed, 21 insertions(+), 22 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index f5b1a0ce8..d917f8be7 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -2248,26 +2248,25 @@ void ice_set_safe_mode_caps(struct ice_hw *hw)
 {
 	struct ice_hw_func_caps *func_caps = &hw->func_caps;
 	struct ice_hw_dev_caps *dev_caps = &hw->dev_caps;
-	u32 valid_func, rxq_first_id, txq_first_id;
-	u32 msix_vector_first_id, max_mtu;
+	struct ice_hw_common_caps cached_caps;
 	u32 num_funcs;
 
 	/* cache some func_caps values that should be restored after memset */
-	valid_func = func_caps->common_cap.valid_functions;
-	txq_first_id = func_caps->common_cap.txq_first_id;
-	rxq_first_id = func_caps->common_cap.rxq_first_id;
-	msix_vector_first_id = func_caps->common_cap.msix_vector_first_id;
-	max_mtu = func_caps->common_cap.max_mtu;
+	cached_caps = func_caps->common_cap;
 
 	/* unset func capabilities */
 	memset(func_caps, 0, sizeof(*func_caps));
 
+#define ICE_RESTORE_FUNC_CAP(name) \
+	func_caps->common_cap.name = cached_caps.name
+
 	/* restore cached values */
-	func_caps->common_cap.valid_functions = valid_func;
-	func_caps->common_cap.txq_first_id = txq_first_id;
-	func_caps->common_cap.rxq_first_id = rxq_first_id;
-	func_caps->common_cap.msix_vector_first_id = msix_vector_first_id;
-	func_caps->common_cap.max_mtu = max_mtu;
+	ICE_RESTORE_FUNC_CAP(valid_functions);
+	ICE_RESTORE_FUNC_CAP(txq_first_id);
+	ICE_RESTORE_FUNC_CAP(rxq_first_id);
+	ICE_RESTORE_FUNC_CAP(msix_vector_first_id);
+	ICE_RESTORE_FUNC_CAP(max_mtu);
+	ICE_RESTORE_FUNC_CAP(nvm_unified_update);
 
 	/* one Tx and one Rx queue in safe mode */
 	func_caps->common_cap.num_rxq = 1;
@@ -2278,22 +2277,22 @@ void ice_set_safe_mode_caps(struct ice_hw *hw)
 	func_caps->guar_num_vsi = 1;
 
 	/* cache some dev_caps values that should be restored after memset */
-	valid_func = dev_caps->common_cap.valid_functions;
-	txq_first_id = dev_caps->common_cap.txq_first_id;
-	rxq_first_id = dev_caps->common_cap.rxq_first_id;
-	msix_vector_first_id = dev_caps->common_cap.msix_vector_first_id;
-	max_mtu = dev_caps->common_cap.max_mtu;
+	cached_caps = dev_caps->common_cap;
 	num_funcs = dev_caps->num_funcs;
 
 	/* unset dev capabilities */
 	memset(dev_caps, 0, sizeof(*dev_caps));
 
+#define ICE_RESTORE_DEV_CAP(name) \
+	dev_caps->common_cap.name = cached_caps.name
+
 	/* restore cached values */
-	dev_caps->common_cap.valid_functions = valid_func;
-	dev_caps->common_cap.txq_first_id = txq_first_id;
-	dev_caps->common_cap.rxq_first_id = rxq_first_id;
-	dev_caps->common_cap.msix_vector_first_id = msix_vector_first_id;
-	dev_caps->common_cap.max_mtu = max_mtu;
+	ICE_RESTORE_DEV_CAP(valid_functions);
+	ICE_RESTORE_DEV_CAP(txq_first_id);
+	ICE_RESTORE_DEV_CAP(rxq_first_id);
+	ICE_RESTORE_DEV_CAP(msix_vector_first_id);
+	ICE_RESTORE_DEV_CAP(max_mtu);
+	ICE_RESTORE_DEV_CAP(nvm_unified_update);
 	dev_caps->num_funcs = num_funcs;
 
 	/* one Tx and one Rx queue per function in safe mode */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 30/40] net/ice/base: misc minor ACL changes
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (28 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 29/40] net/ice/base: preserve NVM capabilities in safe mode Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 31/40] net/ice/base: adjust rate limit profile ids runtime database Qi Zhang
                     ` (9 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Tony Nguyen

This is a collection of minor ACL style changes including:

- When there is nothing to unroll, return a value directly.
- Return ICE_SUCCESS(0) in cases where an error was previously checked
  so ICE_SUCCESS is the only possible return.
- Remove unnecessary parentheses and newlines
- Move unroll of allocation to end of function and use goto on errors to
  free.
- Fix function header comment style
- Remove 'else' from an 'if else' condition where both conditions return
  a value to reduce indentation.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_acl_ctrl.c | 24 +++++++++++-------------
 1 file changed, 11 insertions(+), 13 deletions(-)

diff --git a/drivers/net/ice/base/ice_acl_ctrl.c b/drivers/net/ice/base/ice_acl_ctrl.c
index 02a1dd34f..bd09e9d77 100644
--- a/drivers/net/ice/base/ice_acl_ctrl.c
+++ b/drivers/net/ice/base/ice_acl_ctrl.c
@@ -149,10 +149,8 @@ static enum ice_status ice_acl_init_tbl(struct ice_hw *hw)
 	u16 idx;
 
 	tbl = hw->acl_tbl;
-	if (!tbl) {
-		status = ICE_ERR_CFG;
-		return status;
-	}
+	if (!tbl)
+		return ICE_ERR_CFG;
 
 	ice_memset(&buf, 0, sizeof(buf), ICE_NONDMA_MEM);
 	ice_memset(&act_buf, 0, sizeof(act_buf), ICE_NONDMA_MEM);
@@ -526,7 +524,7 @@ ice_acl_alloc_partition(struct ice_hw *hw, struct ice_acl_scen *req)
 			break;
 		}
 
-		row = (dir > 0) ? (row + width) : (row - width);
+		row = dir > 0 ? row + width : row - width;
 		if (row > hw->acl_tbl->last_tcam ||
 		    row < hw->acl_tbl->first_tcam) {
 			/* All rows have been checked. Increment 'off' that
@@ -668,8 +666,7 @@ static void
 ice_acl_assign_act_mem_for_scen(struct ice_acl_tbl *tbl,
 				struct ice_acl_scen *scen,
 				struct ice_aqc_acl_scen *scen_buf,
-				u8 current_tcam_idx,
-				u8 target_tcam_idx)
+				u8 current_tcam_idx, u8 target_tcam_idx)
 {
 	u8 i;
 
@@ -761,10 +758,8 @@ ice_acl_create_scen(struct ice_hw *hw, u16 match_width, u16 num_entries,
 	scen->num_entry = num_entries;
 
 	status = ice_acl_alloc_partition(hw, scen);
-	if (status) {
-		ice_free(hw, scen);
-		return status;
-	}
+	if (status)
+		goto out;
 
 	ice_memset(&scen_buf, 0, sizeof(scen_buf), ICE_NONDMA_MEM);
 
@@ -829,8 +824,7 @@ ice_acl_create_scen(struct ice_hw *hw, u16 match_width, u16 num_entries,
 	if (status) {
 		ice_debug(hw, ICE_DBG_ACL, "AQ allocation of ACL scenario failed. status: %d\n",
 			  status);
-		ice_free(hw, scen);
-		return status;
+		goto out;
 	}
 
 	scen->id = *scen_id;
@@ -838,6 +832,10 @@ ice_acl_create_scen(struct ice_hw *hw, u16 match_width, u16 num_entries,
 	ice_acl_init_entry(scen);
 	LIST_ADD(&scen->list_entry, &hw->acl_tbl->scens);
 
+out:
+	if (status)
+		ice_free(hw, scen);
+
 	return status;
 }
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 31/40] net/ice/base: adjust rate limit profile ids runtime database
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (29 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 30/40] net/ice/base: misc minor ACL changes Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 32/40] net/ice/base: enable QinQ filter for switch advanced rule Qi Zhang
                     ` (8 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Shibin Koikkara Reeny

Moving the runtime profile ids database/storage to the hw structure.

Signed-off-by: Shibin Koikkara Reeny <shibin.koikkara.reeny@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_sched.c | 54 +++++++++++++++++++---------------------
 drivers/net/ice/base/ice_type.h  |  4 +--
 2 files changed, 28 insertions(+), 30 deletions(-)

diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 1374b9a09..4be449f61 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -727,15 +727,15 @@ ice_sched_del_rl_profile(struct ice_hw *hw,
 static void ice_sched_clear_rl_prof(struct ice_port_info *pi)
 {
 	u16 ln;
+	struct ice_hw *hw = pi->hw;
 
-	for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
+	for (ln = 0; ln < hw->num_tx_sched_layers; ln++) {
 		struct ice_aqc_rl_profile_info *rl_prof_elem;
 		struct ice_aqc_rl_profile_info *rl_prof_tmp;
 
 		LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
-					 &pi->rl_prof_list[ln],
+					 &hw->rl_prof_list[ln],
 					 ice_aqc_rl_profile_info, list_entry) {
-			struct ice_hw *hw = pi->hw;
 			enum ice_status status;
 
 			rl_prof_elem->prof_id_ref = 0;
@@ -1260,7 +1260,7 @@ enum ice_status ice_sched_init_port(struct ice_port_info *pi)
 	pi->port_state = ICE_SCHED_PORT_STATE_READY;
 	ice_init_lock(&pi->sched_lock);
 	for (i = 0; i < ICE_AQC_TOPO_MAX_LEVEL_NUM; i++)
-		INIT_LIST_HEAD(&pi->rl_prof_list[i]);
+		INIT_LIST_HEAD(&hw->rl_prof_list[i]);
 
 err_init_port:
 	if (status && pi->root) {
@@ -2868,24 +2868,24 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
 
 /**
  * ice_sched_rm_unused_rl_prof - remove unused RL profile
- * @pi: port information structure
+ * @hw: pointer to the hardware structure
  *
  * This function removes unused rate limit profiles from the HW and
  * SW DB. The caller needs to hold scheduler lock.
  */
-static void ice_sched_rm_unused_rl_prof(struct ice_port_info *pi)
+static void ice_sched_rm_unused_rl_prof(struct ice_hw *hw)
 {
 	u16 ln;
 
-	for (ln = 0; ln < pi->hw->num_tx_sched_layers; ln++) {
+	for (ln = 0; ln < hw->num_tx_sched_layers; ln++) {
 		struct ice_aqc_rl_profile_info *rl_prof_elem;
 		struct ice_aqc_rl_profile_info *rl_prof_tmp;
 
 		LIST_FOR_EACH_ENTRY_SAFE(rl_prof_elem, rl_prof_tmp,
-					 &pi->rl_prof_list[ln],
+					 &hw->rl_prof_list[ln],
 					 ice_aqc_rl_profile_info, list_entry) {
-			if (!ice_sched_del_rl_profile(pi->hw, rl_prof_elem))
-				ice_debug(pi->hw, ICE_DBG_SCHED, "Removed rl profile\n");
+			if (!ice_sched_del_rl_profile(hw, rl_prof_elem))
+				ice_debug(hw, ICE_DBG_SCHED, "Removed rl profile\n");
 		}
 	}
 }
@@ -3031,7 +3031,7 @@ enum ice_status ice_rm_agg_cfg(struct ice_port_info *pi, u32 agg_id)
 	ice_free(pi->hw, agg_info);
 
 	/* Remove unused RL profile IDs from HW and SW DB */
-	ice_sched_rm_unused_rl_prof(pi);
+	ice_sched_rm_unused_rl_prof(pi->hw);
 
 exit_ice_rm_agg_cfg:
 	ice_release_lock(&pi->sched_lock);
@@ -3852,7 +3852,7 @@ ice_sched_bw_to_rl_profile(struct ice_hw *hw, u32 bw,
 
 /**
  * ice_sched_add_rl_profile - add RL profile
- * @pi: port information structure
+ * @hw: pointer to the hardware structure
  * @rl_type: type of rate limit BW - min, max, or shared
  * @bw: bandwidth in Kbps - Kilo bits per sec
  * @layer_num: specifies in which layer to create profile
@@ -3864,14 +3864,13 @@ ice_sched_bw_to_rl_profile(struct ice_hw *hw, u32 bw,
  * The caller needs to hold the scheduler lock.
  */
 static struct ice_aqc_rl_profile_info *
-ice_sched_add_rl_profile(struct ice_port_info *pi,
-			 enum ice_rl_type rl_type, u32 bw, u8 layer_num)
+ice_sched_add_rl_profile(struct ice_hw *hw, enum ice_rl_type rl_type,
+			 u32 bw, u8 layer_num)
 {
 	struct ice_aqc_rl_profile_info *rl_prof_elem;
 	u16 profiles_added = 0, num_profiles = 1;
 	struct ice_aqc_rl_profile_elem *buf;
 	enum ice_status status;
-	struct ice_hw *hw;
 	u8 profile_type;
 
 	if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
@@ -3890,10 +3889,9 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
 		return NULL;
 	}
 
-	if (!pi)
+	if (!hw)
 		return NULL;
-	hw = pi->hw;
-	LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
+	LIST_FOR_EACH_ENTRY(rl_prof_elem, &hw->rl_prof_list[layer_num],
 			    ice_aqc_rl_profile_info, list_entry)
 		if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
 		    profile_type && rl_prof_elem->bw == bw)
@@ -3926,7 +3924,7 @@ ice_sched_add_rl_profile(struct ice_port_info *pi,
 
 	/* Good entry - add in the list */
 	rl_prof_elem->prof_id_ref = 0;
-	LIST_ADD(&rl_prof_elem->list_entry, &pi->rl_prof_list[layer_num]);
+	LIST_ADD(&rl_prof_elem->list_entry, &hw->rl_prof_list[layer_num]);
 	return rl_prof_elem;
 
 exit_add_rl_prof:
@@ -4105,7 +4103,7 @@ ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
 
 /**
  * ice_sched_rm_rl_profile - remove RL profile ID
- * @pi: port information structure
+ * @hw: pointer to the hardware structure
  * @layer_num: layer number where profiles are saved
  * @profile_type: profile type like EIR, CIR, or SRL
  * @profile_id: profile ID to remove
@@ -4115,7 +4113,7 @@ ice_sched_get_srl_node(struct ice_sched_node *node, u8 srl_layer)
  * scheduler lock.
  */
 static enum ice_status
-ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
+ice_sched_rm_rl_profile(struct ice_hw *hw, u8 layer_num, u8 profile_type,
 			u16 profile_id)
 {
 	struct ice_aqc_rl_profile_info *rl_prof_elem;
@@ -4124,7 +4122,7 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
 	if (layer_num >= ICE_AQC_TOPO_MAX_LEVEL_NUM)
 		return ICE_ERR_PARAM;
 	/* Check the existing list for RL profile */
-	LIST_FOR_EACH_ENTRY(rl_prof_elem, &pi->rl_prof_list[layer_num],
+	LIST_FOR_EACH_ENTRY(rl_prof_elem, &hw->rl_prof_list[layer_num],
 			    ice_aqc_rl_profile_info, list_entry)
 		if ((rl_prof_elem->profile.flags & ICE_AQC_RL_PROFILE_TYPE_M) ==
 		    profile_type &&
@@ -4134,9 +4132,9 @@ ice_sched_rm_rl_profile(struct ice_port_info *pi, u8 layer_num, u8 profile_type,
 				rl_prof_elem->prof_id_ref--;
 
 			/* Remove old profile ID from database */
-			status = ice_sched_del_rl_profile(pi->hw, rl_prof_elem);
+			status = ice_sched_del_rl_profile(hw, rl_prof_elem);
 			if (status && status != ICE_ERR_IN_USE)
-				ice_debug(pi->hw, ICE_DBG_SCHED, "Remove rl profile failed\n");
+				ice_debug(hw, ICE_DBG_SCHED, "Remove rl profile failed\n");
 			break;
 		}
 	if (status == ICE_ERR_IN_USE)
@@ -4196,7 +4194,7 @@ ice_sched_set_node_bw_dflt(struct ice_port_info *pi,
 	    old_id == ICE_SCHED_INVAL_PROF_ID)
 		return ICE_SUCCESS;
 
-	return ice_sched_rm_rl_profile(pi, layer_num, profile_type, old_id);
+	return ice_sched_rm_rl_profile(hw, layer_num, profile_type, old_id);
 }
 
 /**
@@ -4265,7 +4263,7 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
 	struct ice_hw *hw = pi->hw;
 	u16 old_id, rl_prof_id;
 
-	rl_prof_info = ice_sched_add_rl_profile(pi, rl_type, bw, layer_num);
+	rl_prof_info = ice_sched_add_rl_profile(hw, rl_type, bw, layer_num);
 	if (!rl_prof_info)
 		return status;
 
@@ -4287,7 +4285,7 @@ ice_sched_set_node_bw(struct ice_port_info *pi, struct ice_sched_node *node,
 	    old_id == ICE_SCHED_INVAL_PROF_ID || old_id == rl_prof_id)
 		return ICE_SUCCESS;
 
-	return ice_sched_rm_rl_profile(pi, layer_num,
+	return ice_sched_rm_rl_profile(hw, layer_num,
 				       rl_prof_info->profile.flags &
 				       ICE_AQC_RL_PROFILE_TYPE_M, old_id);
 }
@@ -4316,7 +4314,7 @@ ice_sched_set_node_bw_lmt(struct ice_port_info *pi, struct ice_sched_node *node,
 		return ICE_ERR_PARAM;
 	hw = pi->hw;
 	/* Remove unused RL profile IDs from HW and SW DB */
-	ice_sched_rm_unused_rl_prof(pi);
+	ice_sched_rm_unused_rl_prof(hw);
 	layer_num = ice_sched_get_rl_prof_layer(pi, rl_type,
 						node->tx_sched_layer);
 	if (layer_num >= hw->num_tx_sched_layers)
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index f80e19df9..9c2fb560e 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -782,8 +782,6 @@ struct ice_port_info {
 	struct ice_lock sched_lock;	/* protect access to TXSched tree */
 	struct ice_sched_node *
 		sib_head[ICE_MAX_TRAFFIC_CLASS][ICE_AQC_TOPO_MAX_LEVEL_NUM];
-	/* List contain profile ID(s) and other params per layer */
-	struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];
 	struct ice_bw_type_info root_node_bw_t_info;
 	struct ice_bw_type_info tc_node_bw_t_info[ICE_MAX_TRAFFIC_CLASS];
 	struct ice_qos_cfg qos_cfg;
@@ -834,6 +832,8 @@ struct ice_hw {
 	u8 sw_entry_point_layer;
 	u16 max_children[ICE_AQC_TOPO_MAX_LEVEL_NUM];
 	struct LIST_HEAD_TYPE agg_list;	/* lists all aggregator */
+	/* List contain profile ID(s) and other params per layer */
+	struct LIST_HEAD_TYPE rl_prof_list[ICE_AQC_TOPO_MAX_LEVEL_NUM];
 	struct ice_vsi_ctx *vsi_ctx[ICE_MAX_VSI];
 	u8 evb_veb;		/* true for VEB, false for VEPA */
 	u8 reset_ongoing;	/* true if HW is in reset, false otherwise */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 32/40] net/ice/base: enable QinQ filter for switch advanced rule
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (30 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 31/40] net/ice/base: adjust rate limit profile ids runtime database Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 33/40] net/ice/base: create flash info structure and separate NVM version Qi Zhang
                     ` (7 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Wei Zhao

Enable QinQ type filter for switch advanced rule, it support tunnel
and non-tunnel packet use external and inner vlan id as input set
for rules, it also support session id as input set for PPPoE rule
with QinQ flag in packet.

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_protocol_type.h |   8 ++
 drivers/net/ice/base/ice_switch.c        | 236 +++++++++++++++++++++++++++++--
 2 files changed, 230 insertions(+), 14 deletions(-)

diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h
index 4d3136fb2..e8caefd8f 100644
--- a/drivers/net/ice/base/ice_protocol_type.h
+++ b/drivers/net/ice/base/ice_protocol_type.h
@@ -52,6 +52,7 @@ enum ice_protocol_type {
 	ICE_AH,
 	ICE_NAT_T,
 	ICE_GTP_NO_PAY,
+	ICE_VLAN_EX,
 	ICE_PROTOCOL_LAST
 };
 
@@ -102,6 +103,12 @@ enum ice_sw_tunnel_type {
 	ICE_SW_TUN_PROFID_IPV4_PFCP_SESSION,
 	ICE_SW_TUN_PROFID_IPV6_PFCP_NODE,
 	ICE_SW_TUN_PROFID_IPV6_PFCP_SESSION,
+	ICE_SW_TUN_AND_NON_TUN_QINQ,
+	ICE_NON_TUN_QINQ,
+	ICE_SW_TUN_PPPOE_QINQ,
+	ICE_SW_TUN_PPPOE_PAY_QINQ,
+	ICE_SW_TUN_PPPOE_IPV4_QINQ,
+	ICE_SW_TUN_PPPOE_IPV6_QINQ,
 	ICE_ALL_TUNNELS /* All tunnel types including NVGRE */
 };
 
@@ -160,6 +167,7 @@ enum ice_prot_id {
 #define ICE_MAC_OFOS_HW		1
 #define ICE_MAC_IL_HW		4
 #define ICE_ETYPE_OL_HW		9
+#define ICE_VLAN_OF_HW		16
 #define ICE_VLAN_OL_HW		17
 #define ICE_IPV4_OFOS_HW	32
 #define ICE_IPV4_IL_HW		33
diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c
index 1c07c60a1..01d59edf4 100644
--- a/drivers/net/ice/base/ice_switch.c
+++ b/drivers/net/ice/base/ice_switch.c
@@ -1202,6 +1202,153 @@ static const u8 dummy_ipv6_l2tpv3_pkt[] = {
 	0x00, 0x00,		/* 2 bytes for 4 bytes alignment */
 };
 
+static const struct ice_dummy_pkt_offsets dummy_qinq_ipv4_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_VLAN_EX,		14 },
+	{ ICE_VLAN_OFOS,	18 },
+	{ ICE_IPV4_OFOS,	22 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_qinq_ipv4_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x91, 0x00,
+
+	0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */
+	0x00, 0x00, 0x08, 0x00, /* ICE_VLAN_OFOS 18 */
+
+	0x45, 0x00, 0x00, 0x1c, /* ICE_IPV4_OFOS 22 */
+	0x00, 0x01, 0x00, 0x00,
+	0x00, 0x11, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00, 0x00, 0x00, /* ICE_UDP_ILOS 42 */
+	0x00, 0x08, 0x00, 0x00,
+
+	0x00, 0x00,	/* 2 bytes for 4 byte alignment */
+};
+
+static const struct ice_dummy_pkt_offsets dummy_qinq_ipv6_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_VLAN_EX,		14 },
+	{ ICE_VLAN_OFOS,	18 },
+	{ ICE_IPV6_OFOS,	22 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_qinq_ipv6_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x91, 0x00,
+
+	0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */
+	0x00, 0x00, 0x86, 0xDD, /* ICE_VLAN_OFOS 18 */
+
+	0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 22 */
+	0x00, 0x10, 0x11, 0x00, /* Next header UDP */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00, 0x00, 0x00, /* ICE_UDP_ILOS 62 */
+	0x00, 0x10, 0x00, 0x00,
+
+	0x00, 0x00, 0x00, 0x00, /* needed for ESP packets */
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00,	/* 2 bytes for 4 byte alignment */
+};
+
+static const struct ice_dummy_pkt_offsets dummy_qinq_pppoe_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_VLAN_EX,		14 },
+	{ ICE_VLAN_OFOS,	18 },
+	{ ICE_PPPOE,		22 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const
+struct ice_dummy_pkt_offsets dummy_qinq_pppoe_ipv4_packet_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_VLAN_EX,		14 },
+	{ ICE_VLAN_OFOS,	18 },
+	{ ICE_PPPOE,		22 },
+	{ ICE_IPV4_OFOS,	30 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_qinq_pppoe_ipv4_pkt[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x91, 0x00,
+
+	0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */
+	0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 18 */
+
+	0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 22 */
+	0x00, 0x16,
+
+	0x00, 0x21,		/* PPP Link Layer 28 */
+
+	0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 30 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00,	/* 2 bytes for 4 byte alignment */
+};
+
+static const
+struct ice_dummy_pkt_offsets dummy_qinq_pppoe_packet_ipv6_offsets[] = {
+	{ ICE_MAC_OFOS,		0 },
+	{ ICE_ETYPE_OL,		12 },
+	{ ICE_VLAN_EX,		14},
+	{ ICE_VLAN_OFOS,	18 },
+	{ ICE_PPPOE,		22 },
+	{ ICE_IPV6_OFOS,	30 },
+	{ ICE_PROTOCOL_LAST,	0 },
+};
+
+static const u8 dummy_qinq_pppoe_ipv6_packet[] = {
+	0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x91, 0x00,		/* ICE_ETYPE_OL 12 */
+
+	0x00, 0x00, 0x81, 0x00, /* ICE_VLAN_EX 14 */
+	0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 18 */
+
+	0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 22 */
+	0x00, 0x2a,
+
+	0x00, 0x57,		/* PPP Link Layer 28*/
+
+	0x60, 0x00, 0x00, 0x00, /* ICE_IPV6_OFOS 30 */
+	0x00, 0x00, 0x3b, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00,
+
+	0x00, 0x00,		/* 2 bytes for 4 bytes alignment */
+};
+
 /* this is a recipe to profile association bitmap */
 static ice_declare_bitmap(recipe_to_profile[ICE_MAX_NUM_RECIPES],
 			  ICE_MAX_NUM_PROFILES);
@@ -1229,13 +1376,13 @@ static void ice_collect_result_idx(struct ice_aqc_recipe_data_elem *buf,
  * ice_get_tun_type_for_recipe - get tunnel type for the recipe
  * @rid: recipe ID that we are populating
  */
-static enum ice_sw_tunnel_type ice_get_tun_type_for_recipe(u8 rid)
+static enum ice_sw_tunnel_type ice_get_tun_type_for_recipe(u8 rid, bool vlan)
 {
 	u8 vxlan_profile[12] = {10, 11, 12, 16, 17, 18, 22, 23, 24, 25, 26, 27};
 	u8 gre_profile[12] = {13, 14, 15, 19, 20, 21, 28, 29, 30, 31, 32, 33};
 	u8 pppoe_profile[7] = {34, 35, 36, 37, 38, 39, 40};
 	u8 non_tun_profile[6] = {4, 5, 6, 7, 8, 9};
-	enum ice_sw_tunnel_type tun_type = ICE_NON_TUN;
+	enum ice_sw_tunnel_type tun_type;
 	u16 i, j, profile_num = 0;
 	bool non_tun_valid = false;
 	bool pppoe_valid = false;
@@ -1416,6 +1563,19 @@ static enum ice_sw_tunnel_type ice_get_tun_type_for_recipe(u8 rid)
 		}
 	}
 
+	if (vlan && tun_type == ICE_SW_TUN_PPPOE)
+		tun_type = ICE_SW_TUN_PPPOE_QINQ;
+	else if (vlan && tun_type == ICE_SW_TUN_PPPOE_IPV6)
+		tun_type = ICE_SW_TUN_PPPOE_IPV6_QINQ;
+	else if (vlan && tun_type == ICE_SW_TUN_PPPOE_IPV4)
+		tun_type = ICE_SW_TUN_PPPOE_IPV4_QINQ;
+	else if (vlan && tun_type == ICE_SW_TUN_PPPOE_PAY)
+		tun_type = ICE_SW_TUN_PPPOE_PAY_QINQ;
+	else if (vlan && tun_type == ICE_SW_TUN_AND_NON_TUN)
+		tun_type = ICE_SW_TUN_AND_NON_TUN_QINQ;
+	else if (vlan && tun_type == ICE_NON_TUN)
+		tun_type = ICE_NON_TUN_QINQ;
+
 	return tun_type;
 }
 
@@ -1440,6 +1600,7 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,
 	struct ice_prot_lkup_ext *lkup_exts;
 	enum ice_status status;
 	u8 fv_word_idx = 0;
+	bool vlan = false;
 	u16 sub_recps;
 
 	ice_zero_bitmap(result_bm, ICE_MAX_FV_WORDS);
@@ -1528,6 +1689,9 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,
 			lkup_exts->fv_words[fv_word_idx].off = off;
 			lkup_exts->field_mask[fv_word_idx] =
 				rg_entry->fv_mask[i];
+			if (prot == ICE_META_DATA_ID_HW &&
+			    off == ICE_TUN_FLAG_MDID_OFF)
+				vlan = true;
 			fv_word_idx++;
 		}
 		/* populate rg_list with the data from the child entry of this
@@ -1562,7 +1726,7 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,
 	lkup_exts->n_val_words = fv_word_idx;
 	recps[rid].big_recp = (num_recps > 1);
 	recps[rid].n_grp_count = (u8)num_recps;
-	recps[rid].tun_type = ice_get_tun_type_for_recipe(rid);
+	recps[rid].tun_type = ice_get_tun_type_for_recipe(rid, vlan);
 	recps[rid].root_buf = (struct ice_aqc_recipe_data_elem *)
 		ice_memdup(hw, tmp, recps[rid].n_grp_count *
 			   sizeof(*recps[rid].root_buf), ICE_NONDMA_TO_NONDMA);
@@ -2726,7 +2890,7 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)
 	} while (req_desc && !status);
 
 out:
-	ice_free(hw, (void *)rbuf);
+	ice_free(hw, rbuf);
 	return status;
 }
 
@@ -2982,8 +3146,7 @@ ice_add_marker_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
 		m_ent->fltr_info.fwd_id.hw_vsi_id;
 
 	act = ICE_LG_ACT_VSI_FORWARDING | ICE_LG_ACT_VALID_BIT;
-	act |= (id << ICE_LG_ACT_VSI_LIST_ID_S) &
-		ICE_LG_ACT_VSI_LIST_ID_M;
+	act |= (id << ICE_LG_ACT_VSI_LIST_ID_S) & ICE_LG_ACT_VSI_LIST_ID_M;
 	if (m_ent->vsi_count > 1)
 		act |= ICE_LG_ACT_VSI_LIST;
 	lg_act->pdata.lg_act.act[0] = CPU_TO_LE32(act);
@@ -3064,13 +3227,11 @@ ice_add_counter_act(struct ice_hw *hw, struct ice_fltr_mgmt_list_entry *m_ent,
 	 */
 	lg_act_size = (u16)ICE_SW_RULE_LG_ACT_SIZE(num_acts);
 	rules_size = lg_act_size + ICE_SW_RULE_RX_TX_ETH_HDR_SIZE;
-	lg_act = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw,
-								 rules_size);
+	lg_act = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw, rules_size);
 	if (!lg_act)
 		return ICE_ERR_NO_MEMORY;
 
-	rx_tx = (struct ice_aqc_sw_rules_elem *)
-		((u8 *)lg_act + lg_act_size);
+	rx_tx = (struct ice_aqc_sw_rules_elem *)((u8 *)lg_act + lg_act_size);
 
 	/* Fill in the first switch rule i.e. large action */
 	lg_act->type = CPU_TO_LE16(ICE_AQC_SW_RULES_T_LG_ACT);
@@ -4525,7 +4686,8 @@ ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set,
 	hw_vsi_id = ice_get_hw_vsi_num(hw, vsi_handle);
 
 	s_rule_size = set ? ICE_SW_RULE_RX_TX_ETH_HDR_SIZE :
-			    ICE_SW_RULE_RX_TX_NO_HDR_SIZE;
+		ICE_SW_RULE_RX_TX_NO_HDR_SIZE;
+
 	s_rule = (struct ice_aqc_sw_rules_elem *)ice_malloc(hw, s_rule_size);
 	if (!s_rule)
 		return ICE_ERR_NO_MEMORY;
@@ -5825,6 +5987,7 @@ static const struct ice_prot_ext_tbl_entry ice_prot_ext[ICE_PROTOCOL_LAST] = {
 	{ ICE_AH,		{ 0, 2, 4, 6, 8, 10 } },
 	{ ICE_NAT_T,		{ 8, 10, 12, 14 } },
 	{ ICE_GTP_NO_PAY,	{ 8, 10, 12, 14 } },
+	{ ICE_VLAN_EX,		{ 0, 2 } },
 };
 
 /* The following table describes preferred grouping of recipes.
@@ -5858,6 +6021,7 @@ static const struct ice_protocol_entry ice_prot_id_tbl[ICE_PROTOCOL_LAST] = {
 	{ ICE_AH,		ICE_AH_HW },
 	{ ICE_NAT_T,		ICE_UDP_ILOS_HW },
 	{ ICE_GTP_NO_PAY,	ICE_UDP_ILOS_HW },
+	{ ICE_VLAN_EX,		ICE_VLAN_OF_HW },
 };
 
 /**
@@ -6569,6 +6733,12 @@ static bool ice_tun_type_match_word(enum ice_sw_tunnel_type tun_type, u16 *mask)
 	case ICE_SW_TUN_NVGRE:
 	case ICE_SW_TUN_UDP:
 	case ICE_ALL_TUNNELS:
+	case ICE_SW_TUN_AND_NON_TUN_QINQ:
+	case ICE_NON_TUN_QINQ:
+	case ICE_SW_TUN_PPPOE_QINQ:
+	case ICE_SW_TUN_PPPOE_PAY_QINQ:
+	case ICE_SW_TUN_PPPOE_IPV4_QINQ:
+	case ICE_SW_TUN_PPPOE_IPV6_QINQ:
 		*mask = ICE_TUN_FLAG_MASK;
 		return true;
 
@@ -6627,6 +6797,7 @@ ice_get_compat_fv_bitmap(struct ice_hw *hw, struct ice_adv_rule_info *rinfo,
 
 	switch (rinfo->tun_type) {
 	case ICE_NON_TUN:
+	case ICE_NON_TUN_QINQ:
 		prof_type = ICE_PROF_NON_TUN;
 		break;
 	case ICE_ALL_TUNNELS:
@@ -6645,12 +6816,15 @@ ice_get_compat_fv_bitmap(struct ice_hw *hw, struct ice_adv_rule_info *rinfo,
 		prof_type = ICE_PROF_TUN_GRE;
 		break;
 	case ICE_SW_TUN_PPPOE:
+	case ICE_SW_TUN_PPPOE_QINQ:
 		prof_type = ICE_PROF_TUN_PPPOE;
 		break;
 	case ICE_SW_TUN_PPPOE_PAY:
+	case ICE_SW_TUN_PPPOE_PAY_QINQ:
 		ice_set_bit(ICE_PROFID_PPPOE_PAY, bm);
 		return;
 	case ICE_SW_TUN_PPPOE_IPV4:
+	case ICE_SW_TUN_PPPOE_IPV4_QINQ:
 		ice_set_bit(ICE_PROFID_PPPOE_IPV4_OTHER, bm);
 		ice_set_bit(ICE_PROFID_PPPOE_IPV4_UDP, bm);
 		ice_set_bit(ICE_PROFID_PPPOE_IPV4_TCP, bm);
@@ -6662,6 +6836,7 @@ ice_get_compat_fv_bitmap(struct ice_hw *hw, struct ice_adv_rule_info *rinfo,
 		ice_set_bit(ICE_PROFID_PPPOE_IPV4_UDP, bm);
 		return;
 	case ICE_SW_TUN_PPPOE_IPV6:
+	case ICE_SW_TUN_PPPOE_IPV6_QINQ:
 		ice_set_bit(ICE_PROFID_PPPOE_IPV6_OTHER, bm);
 		ice_set_bit(ICE_PROFID_PPPOE_IPV6_UDP, bm);
 		ice_set_bit(ICE_PROFID_PPPOE_IPV6_TCP, bm);
@@ -6757,6 +6932,7 @@ ice_get_compat_fv_bitmap(struct ice_hw *hw, struct ice_adv_rule_info *rinfo,
 		ice_set_bit(ICE_PROFID_IPV6_GTPU_IPV6_TCP, bm);
 		return;
 	case ICE_SW_TUN_AND_NON_TUN:
+	case ICE_SW_TUN_AND_NON_TUN_QINQ:
 	default:
 		prof_type = ICE_PROF_ALL;
 		break;
@@ -7046,6 +7222,38 @@ ice_find_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
 			tcp = true;
 	}
 
+	if ((tun_type == ICE_SW_TUN_AND_NON_TUN_QINQ ||
+	     tun_type == ICE_NON_TUN_QINQ) && ipv6) {
+		*pkt = dummy_qinq_ipv6_pkt;
+		*pkt_len = sizeof(dummy_qinq_ipv6_pkt);
+		*offsets = dummy_qinq_ipv6_packet_offsets;
+		return;
+	} else if (tun_type == ICE_SW_TUN_AND_NON_TUN_QINQ ||
+			   tun_type == ICE_NON_TUN_QINQ) {
+		*pkt = dummy_qinq_ipv4_pkt;
+		*pkt_len = sizeof(dummy_qinq_ipv4_pkt);
+		*offsets = dummy_qinq_ipv4_packet_offsets;
+		return;
+	}
+
+	if (tun_type == ICE_SW_TUN_PPPOE_IPV6_QINQ) {
+		*pkt = dummy_qinq_pppoe_ipv6_packet;
+		*pkt_len = sizeof(dummy_qinq_pppoe_ipv6_packet);
+		*offsets = dummy_qinq_pppoe_packet_ipv6_offsets;
+		return;
+	} else if (tun_type == ICE_SW_TUN_PPPOE_IPV4_QINQ) {
+		*pkt = dummy_qinq_pppoe_ipv4_pkt;
+		*pkt_len = sizeof(dummy_qinq_pppoe_ipv4_pkt);
+		*offsets = dummy_qinq_pppoe_ipv4_packet_offsets;
+		return;
+	} else if (tun_type == ICE_SW_TUN_PPPOE_QINQ ||
+			tun_type == ICE_SW_TUN_PPPOE_PAY_QINQ) {
+		*pkt = dummy_qinq_pppoe_ipv4_pkt;
+		*pkt_len = sizeof(dummy_qinq_pppoe_ipv4_pkt);
+		*offsets = dummy_qinq_pppoe_packet_offsets;
+		return;
+	}
+
 	if (tun_type == ICE_SW_TUN_IPV4_GTPU_NO_PAY) {
 		*pkt = dummy_ipv4_gtpu_ipv4_packet;
 		*pkt_len = sizeof(dummy_ipv4_gtpu_ipv4_packet);
@@ -7364,6 +7572,7 @@ ice_fill_adv_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
 			len = sizeof(struct ice_ethtype_hdr);
 			break;
 		case ICE_VLAN_OFOS:
+		case ICE_VLAN_EX:
 			len = sizeof(struct ice_vlan_hdr);
 			break;
 		case ICE_IPV4_OFOS:
@@ -8038,9 +8247,8 @@ ice_rem_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
 		u16 rule_buf_sz;
 
 		rule_buf_sz = ICE_SW_RULE_RX_TX_NO_HDR_SIZE;
-		s_rule =
-			(struct ice_aqc_sw_rules_elem *)ice_malloc(hw,
-								   rule_buf_sz);
+		s_rule = (struct ice_aqc_sw_rules_elem *)
+			ice_malloc(hw, rule_buf_sz);
 		if (!s_rule)
 			return ICE_ERR_NO_MEMORY;
 		s_rule->pdata.lkup_tx_rx.act = 0;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 33/40] net/ice/base: create flash info structure and separate NVM version
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (31 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 32/40] net/ice/base: enable QinQ filter for switch advanced rule Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 34/40] net/ice/base: remove unused parameter Qi Zhang
                     ` (6 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Jacob Keller

The ice_nvm_info structure has become somewhat of a dumping ground for
all of the fields related to flash version. It holds the NVM version and
EETRACK id, the OptionROM info structure, the flash size, the ShadowRAM
size, and more.

A future change is going to add the ability to read the NVM version and
EETRACK ID from the inactive NVM bank. To make this simpler, it is
useful to have these NVM version info fields extracted to their own
structure.

Rename ice_nvm_info into ice_flash_info, and create a separate
ice_nvm_info structure that will contain the eetrack and NVM map
version. Move the netlist_ver structure into ice_flash_info and rename it
ice_netlist_info for consistency.

Modify the static ice_get_orom_ver_info to take the option rom structure
as a pointer. This makes it more obvious what portion of the hw struct
is being modified. Do the same for ice_get_netlist_ver_info.

Introduce a new ice_get_nvm_ver_info function, which will be similar to
ice_get_orom_ver_info and ice_get_netlist_ver_info, used to keep the NVM
version extraction code co-located.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_common.c |   7 +--
 drivers/net/ice/base/ice_nvm.c    | 108 +++++++++++++++++++-------------------
 drivers/net/ice/base/ice_type.h   |  15 ++++--
 drivers/net/ice/ice_ethdev.c      |  14 ++---
 4 files changed, 75 insertions(+), 69 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index d917f8be7..1b98802d9 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -675,13 +675,14 @@ static void ice_get_itr_intrl_gran(struct ice_hw *hw)
 void ice_print_rollback_msg(struct ice_hw *hw)
 {
 	char nvm_str[ICE_NVM_VER_LEN] = { 0 };
-	struct ice_nvm_info *nvm = &hw->nvm;
 	struct ice_orom_info *orom;
+	struct ice_nvm_info *nvm;
 
-	orom = &nvm->orom;
+	orom = &hw->flash.orom;
+	nvm = &hw->flash.nvm;
 
 	SNPRINTF(nvm_str, sizeof(nvm_str), "%x.%02x 0x%x %d.%d.%d",
-		 nvm->major_ver, nvm->minor_ver, nvm->eetrack, orom->major,
+		 nvm->major, nvm->minor, nvm->eetrack, orom->major,
 		 orom->build, orom->patch);
 	ice_warn(hw,
 		 "Firmware rollback mode detected. Current version is NVM: %s, FW: %d.%d. Device may exhibit limited functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware rollback mode\n",
diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 5df07133b..56a2346a3 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -77,7 +77,7 @@ ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,
 	*length = 0;
 
 	/* Verify the length of the read if this is for the Shadow RAM */
-	if (read_shadow_ram && ((offset + inlen) > (hw->nvm.sr_words * 2u))) {
+	if (read_shadow_ram && ((offset + inlen) > (hw->flash.sr_words * 2u))) {
 		ice_debug(hw, ICE_DBG_NVM, "NVM error: requested data is beyond Shadow RAM limit\n");
 		return ICE_ERR_PARAM;
 	}
@@ -190,7 +190,7 @@ ice_acquire_nvm(struct ice_hw *hw, enum ice_aq_res_access_type access)
 {
 	ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
 
-	if (hw->nvm.blank_nvm_mode)
+	if (hw->flash.blank_nvm_mode)
 		return ICE_SUCCESS;
 
 	return ice_acquire_res(hw, ICE_NVM_RES_ID, access, ICE_NVM_TIMEOUT);
@@ -206,7 +206,7 @@ void ice_release_nvm(struct ice_hw *hw)
 {
 	ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
 
-	if (hw->nvm.blank_nvm_mode)
+	if (hw->flash.blank_nvm_mode)
 		return;
 
 	ice_release_res(hw, ICE_NVM_RES_ID);
@@ -359,16 +359,55 @@ ice_read_pba_string(struct ice_hw *hw, u8 *pba_num, u32 pba_num_size)
 }
 
 /**
+ * ice_get_nvm_ver_info - Read NVM version information
+ * @hw: pointer to the HW struct
+ * @nvm: pointer to NVM info structure
+ *
+ * Read the NVM EETRACK ID and map version of the main NVM image bank, filling
+ * in the nvm info structure.
+ */
+static enum ice_status
+ice_get_nvm_ver_info(struct ice_hw *hw, struct ice_nvm_info *nvm)
+{
+	u16 eetrack_lo, eetrack_hi, ver;
+	enum ice_status status;
+
+	status = ice_read_sr_word(hw, ICE_SR_NVM_DEV_STARTER_VER, &ver);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to read DEV starter version.\n");
+		return status;
+	}
+	nvm->major = (ver & ICE_NVM_VER_HI_MASK) >> ICE_NVM_VER_HI_SHIFT;
+	nvm->minor = (ver & ICE_NVM_VER_LO_MASK) >> ICE_NVM_VER_LO_SHIFT;
+
+	status = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_LO, &eetrack_lo);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to read EETRACK lo.\n");
+		return status;
+	}
+	status = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_HI, &eetrack_hi);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to read EETRACK hi.\n");
+		return status;
+	}
+
+	nvm->eetrack = (eetrack_hi << 16) | eetrack_lo;
+
+	return ICE_SUCCESS;
+}
+
+/**
  * ice_get_orom_ver_info - Read Option ROM version information
  * @hw: pointer to the HW struct
+ * @orom: pointer to Option ROM info structure
  *
  * Read the Combo Image version data from the Boot Configuration TLV and fill
  * in the option ROM version data.
  */
-static enum ice_status ice_get_orom_ver_info(struct ice_hw *hw)
+static enum ice_status
+ice_get_orom_ver_info(struct ice_hw *hw, struct ice_orom_info *orom)
 {
 	u16 combo_hi, combo_lo, boot_cfg_tlv, boot_cfg_tlv_len;
-	struct ice_orom_info *orom = &hw->nvm.orom;
 	enum ice_status status;
 	u32 combo_ver;
 
@@ -455,7 +494,7 @@ static enum ice_status ice_discover_flash_size(struct ice_hw *hw)
 
 	ice_debug(hw, ICE_DBG_NVM, "Predicted flash size is %u bytes\n", max_size);
 
-	hw->nvm.flash_size = max_size;
+	hw->flash.flash_size = max_size;
 
 err_read_flat_nvm:
 	ice_release_nvm(hw);
@@ -472,8 +511,7 @@ static enum ice_status ice_discover_flash_size(struct ice_hw *hw)
  */
 enum ice_status ice_init_nvm(struct ice_hw *hw)
 {
-	struct ice_nvm_info *nvm = &hw->nvm;
-	u16 eetrack_lo, eetrack_hi, ver;
+	struct ice_flash_info *flash = &hw->flash;
 	enum ice_status status;
 	u32 fla, gens_stat;
 	u8 sr_size;
@@ -487,70 +525,32 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)
 	sr_size = (gens_stat & GLNVM_GENS_SR_SIZE_M) >> GLNVM_GENS_SR_SIZE_S;
 
 	/* Switching to words (sr_size contains power of 2) */
-	nvm->sr_words = BIT(sr_size) * ICE_SR_WORDS_IN_1KB;
+	flash->sr_words = BIT(sr_size) * ICE_SR_WORDS_IN_1KB;
 
 	/* Check if we are in the normal or blank NVM programming mode */
 	fla = rd32(hw, GLNVM_FLA);
 	if (fla & GLNVM_FLA_LOCKED_M) { /* Normal programming mode */
-		nvm->blank_nvm_mode = false;
+		flash->blank_nvm_mode = false;
 	} else {
 		/* Blank programming mode */
-		nvm->blank_nvm_mode = true;
+		flash->blank_nvm_mode = true;
 		ice_debug(hw, ICE_DBG_NVM, "NVM init error: unsupported blank mode.\n");
 		return ICE_ERR_NVM_BLANK_MODE;
 	}
 
-	status = ice_read_sr_word(hw, ICE_SR_NVM_DEV_STARTER_VER, &ver);
-	if (status) {
-		ice_debug(hw, ICE_DBG_INIT,
-			  "Failed to read DEV starter version.\n");
-		return status;
-	}
-	nvm->major_ver = (ver & ICE_NVM_VER_HI_MASK) >> ICE_NVM_VER_HI_SHIFT;
-	nvm->minor_ver = (ver & ICE_NVM_VER_LO_MASK) >> ICE_NVM_VER_LO_SHIFT;
-
-	status = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_LO, &eetrack_lo);
-	if (status) {
-		ice_debug(hw, ICE_DBG_INIT, "Failed to read EETRACK lo.\n");
-		return status;
-	}
-	status = ice_read_sr_word(hw, ICE_SR_NVM_EETRACK_HI, &eetrack_hi);
-	if (status) {
-		ice_debug(hw, ICE_DBG_INIT, "Failed to read EETRACK hi.\n");
-		return status;
-	}
-
-	nvm->eetrack = (eetrack_hi << 16) | eetrack_lo;
-
 	status = ice_discover_flash_size(hw);
 	if (status) {
-		ice_debug(hw, ICE_DBG_NVM,
-			  "NVM init error: failed to discover flash size.\n");
+		ice_debug(hw, ICE_DBG_NVM, "NVM init error: failed to discover flash size.\n");
 		return status;
 	}
 
-	switch (hw->device_id) {
-	/* the following devices do not have boot_cfg_tlv yet */
-	case ICE_DEV_ID_E822C_BACKPLANE:
-	case ICE_DEV_ID_E822C_QSFP:
-	case ICE_DEV_ID_E822C_10G_BASE_T:
-	case ICE_DEV_ID_E822C_SGMII:
-	case ICE_DEV_ID_E822C_SFP:
-	case ICE_DEV_ID_E822L_BACKPLANE:
-	case ICE_DEV_ID_E822L_SFP:
-	case ICE_DEV_ID_E822L_10G_BASE_T:
-	case ICE_DEV_ID_E822L_SGMII:
-	case ICE_DEV_ID_E823L_BACKPLANE:
-	case ICE_DEV_ID_E823L_SFP:
-	case ICE_DEV_ID_E823L_10G_BASE_T:
-	case ICE_DEV_ID_E823L_1GBE:
-	case ICE_DEV_ID_E823L_QSFP:
+	status = ice_get_nvm_ver_info(hw, &flash->nvm);
+	if (status) {
+		ice_debug(hw, ICE_DBG_INIT, "Failed to read NVM info.\n");
 		return status;
-	default:
-		break;
 	}
 
-	status = ice_get_orom_ver_info(hw);
+	status = ice_get_orom_ver_info(hw, &flash->orom);
 	if (status) {
 		ice_debug(hw, ICE_DBG_INIT, "Failed to read Option ROM info.\n");
 		return status;
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 9c2fb560e..9e9a2198d 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -511,14 +511,19 @@ struct ice_orom_info {
 	u16 build;			/* Build version of OROM */
 };
 
-/* NVM Information */
+/* NVM version information */
 struct ice_nvm_info {
+	u32 eetrack;
+	u8 major;
+	u8 minor;
+};
+
+/* Flash Chip Information */
+struct ice_flash_info {
 	struct ice_orom_info orom;	/* Option ROM version info */
-	u32 eetrack;			/* NVM data version */
+	struct ice_nvm_info nvm;	/* NVM version information */
 	u16 sr_words;			/* Shadow RAM size in words */
 	u32 flash_size;			/* Size of available flash in bytes */
-	u8 major_ver;			/* major version of dev starter */
-	u8 minor_ver;			/* minor version of dev starter */
 	u8 blank_nvm_mode;		/* is NVM empty (no FW present) */
 };
 
@@ -838,7 +843,7 @@ struct ice_hw {
 	u8 evb_veb;		/* true for VEB, false for VEPA */
 	u8 reset_ongoing;	/* true if HW is in reset, false otherwise */
 	struct ice_bus_info bus;
-	struct ice_nvm_info nvm;
+	struct ice_flash_info flash;
 	struct ice_hw_dev_caps dev_caps;	/* device capabilities */
 	struct ice_hw_func_caps func_caps;	/* function capabilities */
 
diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index d06b05da0..ca1f7d42e 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -4410,15 +4410,15 @@ ice_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
 	u16 build;
 	int ret;
 
-	ver = hw->nvm.orom.major;
-	patch = hw->nvm.orom.patch;
-	build = hw->nvm.orom.build;
+	ver = hw->flash.orom.major;
+	patch = hw->flash.orom.patch;
+	build = hw->flash.orom.build;
 
 	ret = snprintf(fw_version, fw_size,
 			"%d.%d 0x%08x %d.%d.%d",
-			hw->nvm.major_ver,
-			hw->nvm.minor_ver,
-			hw->nvm.eetrack,
+			hw->flash.nvm.major,
+			hw->flash.nvm.minor,
+			hw->flash.nvm.eetrack,
 			ver, build, patch);
 
 	/* add the size of '\0' */
@@ -4516,7 +4516,7 @@ ice_get_eeprom_length(struct rte_eth_dev *dev)
 {
 	struct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 
-	return hw->nvm.flash_size;
+	return hw->flash.flash_size;
 }
 
 static int
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 34/40] net/ice/base: remove unused parameter
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (32 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 33/40] net/ice/base: create flash info structure and separate NVM version Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 35/40] net/ice/base: minor code clean Qi Zhang
                     ` (5 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang

remove unused parameter of ice_parse_fdir_func_caps

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 1b98802d9..879a7d16a 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -1942,13 +1942,11 @@ ice_parse_vsi_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,
  * ice_parse_fdir_func_caps - Parse ICE_AQC_CAPS_FD function caps
  * @hw: pointer to the HW struct
  * @func_p: pointer to function capabilities structure
- * @cap: pointer to the capability element to parse
  *
  * Extract function capabilities for ICE_AQC_CAPS_FD.
  */
 static void
-ice_parse_fdir_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,
-			 struct ice_aqc_list_caps_elem *cap)
+ice_parse_fdir_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p)
 {
 	u32 reg_val, val;
 
@@ -2006,7 +2004,7 @@ ice_parse_func_caps(struct ice_hw *hw, struct ice_hw_func_caps *func_p,
 			ice_parse_vsi_func_caps(hw, func_p, &cap_resp[i]);
 			break;
 		case ICE_AQC_CAPS_FD:
-			ice_parse_fdir_func_caps(hw, func_p, &cap_resp[i]);
+			ice_parse_fdir_func_caps(hw, func_p);
 			break;
 		default:
 			/* Don't list common capabilities as unknown */
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 35/40] net/ice/base: minor code clean
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (33 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 34/40] net/ice/base: remove unused parameter Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 36/40] net/ice/base: cache NVM module bank information Qi Zhang
                     ` (4 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang

Remove unnecessary mac_type check, fix couple comment, and remove
unnecessary empty line.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_common.c | 7 +------
 drivers/net/ice/base/ice_flow.c   | 9 ++++-----
 2 files changed, 5 insertions(+), 11 deletions(-)

diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c
index 879a7d16a..9d8f78fdc 100644
--- a/drivers/net/ice/base/ice_common.c
+++ b/drivers/net/ice/base/ice_common.c
@@ -782,8 +782,7 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
 				     ICE_AQC_REPORT_TOPO_CAP, pcaps, NULL);
 	ice_free(hw, pcaps);
 	if (status)
-		ice_debug(hw, ICE_DBG_PHY, "%s: Get PHY capabilities failed, continuing anyway\n",
-			  __func__);
+		ice_debug(hw, ICE_DBG_PHY, "Get PHY capabilities failed, continuing anyway\n");
 
 	/* Initialize port_info struct with link information */
 	status = ice_aq_get_link_info(hw->port_info, false, NULL, NULL);
@@ -4632,10 +4631,6 @@ enum ice_fw_modes ice_get_fw_mode(struct ice_hw *hw)
  */
 bool ice_fw_supports_link_override(struct ice_hw *hw)
 {
-	/* Currently, only supported for E810 devices */
-	if (hw->mac_type != ICE_MAC_E810)
-		return false;
-
 	if (hw->api_maj_ver == ICE_FW_API_LINK_OVERRIDE_MAJ) {
 		if (hw->api_min_ver > ICE_FW_API_LINK_OVERRIDE_MIN)
 			return true;
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 9e9878ae4..1b0caf642 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -2818,7 +2818,7 @@ ice_flow_acl_add_scen_entry_sync(struct ice_hw *hw, struct ice_flow_prof *prof,
 	if (!entry || !(*entry) || !prof)
 		return ICE_ERR_BAD_PTR;
 
-	e = *(entry);
+	e = *entry;
 
 	do_chg_rng_chk = false;
 	if (e->range_buf) {
@@ -3236,8 +3236,7 @@ ice_flow_add_fld_raw(struct ice_flow_seg_info *seg, u16 off, u8 len,
 	(ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6)
 
 #define ICE_FLOW_RSS_SEG_HDR_L4_MASKS \
-	(ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | \
-	 ICE_FLOW_SEG_HDR_SCTP)
+	(ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_SCTP)
 
 #define ICE_FLOW_RSS_SEG_HDR_VAL_MASKS \
 	(ICE_FLOW_RSS_SEG_HDR_L2_MASKS | \
@@ -3573,7 +3572,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
 	if (status)
 		goto exit;
 
-	/* don't do RSS for GTPU outer */
+	/* Don't do RSS for GTPU Outer */
 	if (segs_cnt == ICE_RSS_OUTER_HEADERS &&
 	    segs[segs_cnt - 1].hdrs & ICE_FLOW_SEG_HDR_GTPU) {
 		status = ICE_SUCCESS;
@@ -3696,7 +3695,6 @@ ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
 	ice_acquire_lock(&hw->rss_locks);
 	status = ice_add_rss_cfg_sync(hw, vsi_handle, hashed_flds, addl_hdrs,
 				      ICE_RSS_OUTER_HEADERS, symm);
-
 	if (!status)
 		status = ice_add_rss_cfg_sync(hw, vsi_handle, hashed_flds,
 					      addl_hdrs, ICE_RSS_INNER_HEADERS,
@@ -3736,6 +3734,7 @@ ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
 	if (status)
 		goto out;
 
+	/* Don't do RSS for GTPU Outer */
 	if (segs_cnt == ICE_RSS_OUTER_HEADERS &&
 	    segs[segs_cnt - 1].hdrs & ICE_FLOW_SEG_HDR_GTPU) {
 		status = ICE_SUCCESS;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 36/40] net/ice/base: cache NVM module bank information
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (34 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 35/40] net/ice/base: minor code clean Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 37/40] net/ice/base: rename function Qi Zhang
                     ` (3 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Jacob Keller

The ice flash contains two copies of each of the NVM, Option ROM, and
Netlist modules. Each bank has a pointer word and a size word. In order
to correctly read from the active flash bank, the driver must calculate
the offset manually.

During NVM initialization, read the Shadow RAM control word and
determine which bank is active for each NVM module. Additionally, cache
the size and pointer values for use in calculating the correct offset.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_nvm.c  | 151 ++++++++++++++++++++++++++++++++++++++++
 drivers/net/ice/base/ice_type.h |  29 ++++++++
 2 files changed, 180 insertions(+)

diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c
index 56a2346a3..61af767ed 100644
--- a/drivers/net/ice/base/ice_nvm.c
+++ b/drivers/net/ice/base/ice_nvm.c
@@ -503,6 +503,151 @@ static enum ice_status ice_discover_flash_size(struct ice_hw *hw)
 }
 
 /**
+ * ice_read_sr_pointer - Read the value of a Shadow RAM pointer word
+ * @hw: pointer to the HW structure
+ * @offset: the word offset of the Shadow RAM word to read
+ * @pointer: pointer value read from Shadow RAM
+ *
+ * Read the given Shadow RAM word, and convert it to a pointer value specified
+ * in bytes. This function assumes the specified offset is a valid pointer
+ * word.
+ *
+ * Each pointer word specifies whether it is stored in word size or 4KB
+ * sector size by using the highest bit. The reported pointer value will be in
+ * bytes, intended for flat NVM reads.
+ */
+static enum ice_status
+ice_read_sr_pointer(struct ice_hw *hw, u16 offset, u32 *pointer)
+{
+	enum ice_status status;
+	u16 value;
+
+	status = ice_read_sr_word(hw, offset, &value);
+	if (status)
+		return status;
+
+	/* Determine if the pointer is in 4KB or word units */
+	if (value & ICE_SR_NVM_PTR_4KB_UNITS)
+		*pointer = (value & ~ICE_SR_NVM_PTR_4KB_UNITS) * 4 * 1024;
+	else
+		*pointer = value * 2;
+
+	return ICE_SUCCESS;
+}
+
+/**
+ * ice_read_sr_area_size - Read an area size from a Shadow RAM word
+ * @hw: pointer to the HW structure
+ * @offset: the word offset of the Shadow RAM to read
+ * @size: size value read from the Shadow RAM
+ *
+ * Read the given Shadow RAM word, and convert it to an area size value
+ * specified in bytes. This function assumes the specified offset is a valid
+ * area size word.
+ *
+ * Each area size word is specified in 4KB sector units. This function reports
+ * the size in bytes, intended for flat NVM reads.
+ */
+static enum ice_status
+ice_read_sr_area_size(struct ice_hw *hw, u16 offset, u32 *size)
+{
+	enum ice_status status;
+	u16 value;
+
+	status = ice_read_sr_word(hw, offset, &value);
+	if (status)
+		return status;
+
+	/* Area sizes are always specified in 4KB units */
+	*size = value * 4 * 1024;
+
+	return ICE_SUCCESS;
+}
+
+/**
+ * ice_determine_active_flash_banks - Discover active bank for each module
+ * @hw: pointer to the HW struct
+ *
+ * Read the Shadow RAM control word and determine which banks are active for
+ * the NVM, OROM, and Netlist modules. Also read and calculate the associated
+ * pointer and size. These values are then cached into the ice_flash_info
+ * structure for later use in order to calculate the correct offset to read
+ * from the active module.
+ */
+static enum ice_status
+ice_determine_active_flash_banks(struct ice_hw *hw)
+{
+	struct ice_bank_info *banks = &hw->flash.banks;
+	enum ice_status status;
+	u16 ctrl_word;
+
+	status = ice_read_sr_word(hw, ICE_SR_NVM_CTRL_WORD, &ctrl_word);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to read the Shadow RAM control word\n");
+		return status;
+	}
+
+	/* Check that the control word indicates validity */
+	if ((ctrl_word & ICE_SR_CTRL_WORD_1_M) >> ICE_SR_CTRL_WORD_1_S != ICE_SR_CTRL_WORD_VALID) {
+		ice_debug(hw, ICE_DBG_NVM, "Shadow RAM control word is invalid\n");
+		return ICE_ERR_CFG;
+	}
+
+	if (!(ctrl_word & ICE_SR_CTRL_WORD_NVM_BANK))
+		banks->nvm_bank = ICE_1ST_FLASH_BANK;
+	else
+		banks->nvm_bank = ICE_2ND_FLASH_BANK;
+
+	if (!(ctrl_word & ICE_SR_CTRL_WORD_OROM_BANK))
+		banks->orom_bank = ICE_1ST_FLASH_BANK;
+	else
+		banks->orom_bank = ICE_2ND_FLASH_BANK;
+
+	if (!(ctrl_word & ICE_SR_CTRL_WORD_NETLIST_BANK))
+		banks->netlist_bank = ICE_1ST_FLASH_BANK;
+	else
+		banks->netlist_bank = ICE_2ND_FLASH_BANK;
+
+	status = ice_read_sr_pointer(hw, ICE_SR_1ST_NVM_BANK_PTR, &banks->nvm_ptr);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to read NVM bank pointer\n");
+		return status;
+	}
+
+	status = ice_read_sr_area_size(hw, ICE_SR_NVM_BANK_SIZE, &banks->nvm_size);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to read NVM bank area size\n");
+		return status;
+	}
+
+	status = ice_read_sr_pointer(hw, ICE_SR_1ST_OROM_BANK_PTR, &banks->orom_ptr);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to read OROM bank pointer\n");
+		return status;
+	}
+
+	status = ice_read_sr_area_size(hw, ICE_SR_OROM_BANK_SIZE, &banks->orom_size);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to read OROM bank area size\n");
+		return status;
+	}
+
+	status = ice_read_sr_pointer(hw, ICE_SR_NETLIST_BANK_PTR, &banks->netlist_ptr);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to read Netlist bank pointer\n");
+		return status;
+	}
+
+	status = ice_read_sr_area_size(hw, ICE_SR_NETLIST_BANK_SIZE, &banks->netlist_size);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to read Netlist bank area size\n");
+		return status;
+	}
+
+	return ICE_SUCCESS;
+}
+
+/**
  * ice_init_nvm - initializes NVM setting
  * @hw: pointer to the HW struct
  *
@@ -544,6 +689,12 @@ enum ice_status ice_init_nvm(struct ice_hw *hw)
 		return status;
 	}
 
+	status = ice_determine_active_flash_banks(hw);
+	if (status) {
+		ice_debug(hw, ICE_DBG_NVM, "Failed to determine active flash banks.\n");
+		return status;
+	}
+
 	status = ice_get_nvm_ver_info(hw, &flash->nvm);
 	if (status) {
 		ice_debug(hw, ICE_DBG_INIT, "Failed to read NVM info.\n");
diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h
index 9e9a2198d..1e1c672cb 100644
--- a/drivers/net/ice/base/ice_type.h
+++ b/drivers/net/ice/base/ice_type.h
@@ -518,10 +518,33 @@ struct ice_nvm_info {
 	u8 minor;
 };
 
+/* Enumeration of possible flash banks for the NVM, OROM, and Netlist modules
+ * of the flash image.
+ */
+enum ice_flash_bank {
+	ICE_INVALID_FLASH_BANK,
+	ICE_1ST_FLASH_BANK,
+	ICE_2ND_FLASH_BANK,
+};
+
+/* information for accessing NVM, OROM, and Netlist flash banks */
+struct ice_bank_info {
+	u32 nvm_ptr;				/* Pointer to 1st NVM bank */
+	u32 nvm_size;				/* Size of NVM bank */
+	u32 orom_ptr;				/* Pointer to 1st OROM bank */
+	u32 orom_size;				/* Size of OROM bank */
+	u32 netlist_ptr;			/* Pointer to 1st Netlist bank */
+	u32 netlist_size;			/* Size of Netlist bank */
+	enum ice_flash_bank nvm_bank;		/* Active NVM bank */
+	enum ice_flash_bank orom_bank;		/* Active OROM bank */
+	enum ice_flash_bank netlist_bank;	/* Active Netlist bank */
+};
+
 /* Flash Chip Information */
 struct ice_flash_info {
 	struct ice_orom_info orom;	/* Option ROM version info */
 	struct ice_nvm_info nvm;	/* NVM version information */
+	struct ice_bank_info banks;	/* Flash Bank information */
 	u16 sr_words;			/* Shadow RAM size in words */
 	u32 flash_size;			/* Size of available flash in bytes */
 	u8 blank_nvm_mode;		/* is NVM empty (no FW present) */
@@ -1099,6 +1122,12 @@ enum ice_sw_fwd_act_type {
 #define ICE_SR_PCIE_ALT_SIZE_WORDS	512
 #define ICE_SR_CTRL_WORD_1_S		0x06
 #define ICE_SR_CTRL_WORD_1_M		(0x03 << ICE_SR_CTRL_WORD_1_S)
+#define ICE_SR_CTRL_WORD_VALID		0x1
+#define ICE_SR_CTRL_WORD_OROM_BANK	BIT(3)
+#define ICE_SR_CTRL_WORD_NETLIST_BANK	BIT(4)
+#define ICE_SR_CTRL_WORD_NVM_BANK	BIT(5)
+
+#define ICE_SR_NVM_PTR_4KB_UNITS	BIT(15)
 
 /* Shadow RAM related */
 #define ICE_SR_SECTOR_SIZE_IN_WORDS	0x800
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 37/40] net/ice/base: rename function
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (35 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 36/40] net/ice/base: cache NVM module bank information Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 38/40] net/ice/base: remove unnecessary conditional Qi Zhang
                     ` (2 subsequent siblings)
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Tony Nguyen

'xtrct' or 'xtract' is currently used in the code to shorten 'extract'.
Rename ice_prgm_acl_prof_extrt() to ice_prgm_acl_prof_xtrct() so we don't
have another variation of a 'extract'.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_acl.c  | 4 ++--
 drivers/net/ice/base/ice_acl.h  | 2 +-
 drivers/net/ice/base/ice_flow.c | 5 ++---
 3 files changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/net/ice/base/ice_acl.c b/drivers/net/ice/base/ice_acl.c
index 435a0cb51..763cd2af9 100644
--- a/drivers/net/ice/base/ice_acl.c
+++ b/drivers/net/ice/base/ice_acl.c
@@ -288,7 +288,7 @@ ice_acl_prof_aq_send(struct ice_hw *hw, u16 opc, u8 prof_id,
 }
 
 /**
- * ice_prgm_acl_prof_extrt - program ACL profile extraction sequence
+ * ice_prgm_acl_prof_xtrct - program ACL profile extraction sequence
  * @hw: pointer to the HW struct
  * @prof_id: profile ID
  * @buf: ptr to buffer
@@ -297,7 +297,7 @@ ice_acl_prof_aq_send(struct ice_hw *hw, u16 opc, u8 prof_id,
  * Program ACL profile extraction (indirect 0x0C1D)
  */
 enum ice_status
-ice_prgm_acl_prof_extrt(struct ice_hw *hw, u8 prof_id,
+ice_prgm_acl_prof_xtrct(struct ice_hw *hw, u8 prof_id,
 			struct ice_aqc_acl_prof_generic_frmt *buf,
 			struct ice_sq_cd *cd)
 {
diff --git a/drivers/net/ice/base/ice_acl.h b/drivers/net/ice/base/ice_acl.h
index be27a545b..f87a0aa79 100644
--- a/drivers/net/ice/base/ice_acl.h
+++ b/drivers/net/ice/base/ice_acl.h
@@ -158,7 +158,7 @@ ice_aq_query_actpair(struct ice_hw *hw, u8 act_mem_idx, u16 act_entry_idx,
 		     struct ice_aqc_actpair *buf, struct ice_sq_cd *cd);
 enum ice_status ice_aq_dealloc_acl_res(struct ice_hw *hw, struct ice_sq_cd *cd);
 enum ice_status
-ice_prgm_acl_prof_extrt(struct ice_hw *hw, u8 prof_id,
+ice_prgm_acl_prof_xtrct(struct ice_hw *hw, u8 prof_id,
 			struct ice_aqc_acl_prof_generic_frmt *buf,
 			struct ice_sq_cd *cd);
 enum ice_status
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 1b0caf642..1f621ca88 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1780,7 +1780,7 @@ ice_flow_acl_disassoc_scen(struct ice_hw *hw, struct ice_flow_prof *prof)
 
 	/* Clear scenario for this PF */
 	buf.pf_scenario_num[hw->pf_id] = ICE_ACL_INVALID_SCEN;
-	status = ice_prgm_acl_prof_extrt(hw, prof_id, &buf, NULL);
+	status = ice_prgm_acl_prof_xtrct(hw, prof_id, &buf, NULL);
 
 	return status;
 }
@@ -2082,7 +2082,7 @@ ice_flow_acl_set_xtrct_seq(struct ice_hw *hw, struct ice_flow_prof *prof)
 
 	/* Update the current PF */
 	buf.pf_scenario_num[hw->pf_id] = (u8)prof->cfg.scen->id;
-	status = ice_prgm_acl_prof_extrt(hw, prof_id, &buf, NULL);
+	status = ice_prgm_acl_prof_xtrct(hw, prof_id, &buf, NULL);
 
 	return status;
 }
@@ -2510,7 +2510,6 @@ ice_flow_acl_frmt_entry(struct ice_hw *hw, struct ice_flow_prof *prof,
 	e->acts = (struct ice_flow_action *)
 		ice_memdup(hw, acts, acts_cnt * sizeof(*acts),
 			   ICE_NONDMA_TO_NONDMA);
-
 	if (!e->acts)
 		goto out;
 
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 38/40] net/ice/base: remove unnecessary conditional
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (36 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 37/40] net/ice/base: rename function Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 39/40] net/ice/base: rename ACL priority values Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 40/40] net/ice/base: preserve default aggr vsi information Qi Zhang
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Bruce Allan

These two conditional statements are unnecessary because the condition
is always true based on existing code flow.  Remove them to resolve
potential errors from some static analysis tools.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_flow.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 1f621ca88..cd3ce8231 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -1089,7 +1089,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
 		 */
 		if (fld == ICE_FLOW_FIELD_IDX_IPV4_TTL)
 			sib = ICE_FLOW_FIELD_IDX_IPV4_PROT;
-		else if (fld == ICE_FLOW_FIELD_IDX_IPV4_PROT)
+		else
 			sib = ICE_FLOW_FIELD_IDX_IPV4_TTL;
 
 		/* If the sibling field is also included, that field's
@@ -1108,7 +1108,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params,
 		 */
 		if (fld == ICE_FLOW_FIELD_IDX_IPV6_TTL)
 			sib = ICE_FLOW_FIELD_IDX_IPV6_PROT;
-		else if (fld == ICE_FLOW_FIELD_IDX_IPV6_PROT)
+		else
 			sib = ICE_FLOW_FIELD_IDX_IPV6_TTL;
 
 		/* If the sibling field is also included, that field's
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 39/40] net/ice/base: rename ACL priority values
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (37 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 38/40] net/ice/base: remove unnecessary conditional Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 40/40] net/ice/base: preserve default aggr vsi information Qi Zhang
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Tony Nguyen

The naming convention used to shorten 'priority' is 'prio'.
Convert the ACL related entries that use 'prior' to 'prio'.

Also, as ICE_LOW, ICE_NORMAL,... are not very descriptive of what
they represent. Add 'ACL_PRIO' to help convey their use.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_acl.h      | 16 ++++++++--------
 drivers/net/ice/base/ice_acl_ctrl.c | 32 +++++++++++++++++---------------
 drivers/net/ice/base/ice_flow.c     | 25 ++++++++++++-------------
 3 files changed, 37 insertions(+), 36 deletions(-)

diff --git a/drivers/net/ice/base/ice_acl.h b/drivers/net/ice/base/ice_acl.h
index f87a0aa79..21aa5088f 100644
--- a/drivers/net/ice/base/ice_acl.h
+++ b/drivers/net/ice/base/ice_acl.h
@@ -47,11 +47,11 @@ struct ice_acl_tbl {
 };
 
 #define ICE_MAX_ACL_TCAM_ENTRY (ICE_AQC_ACL_TCAM_DEPTH * ICE_AQC_ACL_SLICES)
-enum ice_acl_entry_prior {
-	ICE_LOW = 0,
-	ICE_NORMAL,
-	ICE_HIGH,
-	ICE_MAX_PRIOR
+enum ice_acl_entry_prio {
+	ICE_ACL_PRIO_LOW = 0,
+	ICE_ACL_PRIO_NORMAL,
+	ICE_ACL_PRIO_HIGH,
+	ICE_ACL_MAX_PRIO
 };
 
 /* Scenario structure
@@ -74,8 +74,8 @@ struct ice_acl_scen {
 	 * be available in this scenario
 	 */
 	ice_declare_bitmap(entry_bitmap, ICE_MAX_ACL_TCAM_ENTRY);
-	u16 first_idx[ICE_MAX_PRIOR];
-	u16 last_idx[ICE_MAX_PRIOR];
+	u16 first_idx[ICE_ACL_MAX_PRIO];
+	u16 last_idx[ICE_ACL_MAX_PRIO];
 
 	u16 id;
 	u16 start;	/* Number of entry from the start of the parent table */
@@ -192,7 +192,7 @@ ice_aq_query_acl_scen(struct ice_hw *hw, u16 scen_id,
 		      struct ice_aqc_acl_scen *buf, struct ice_sq_cd *cd);
 enum ice_status
 ice_acl_add_entry(struct ice_hw *hw, struct ice_acl_scen *scen,
-		  enum ice_acl_entry_prior prior, u8 *keys, u8 *inverts,
+		  enum ice_acl_entry_prio prio, u8 *keys, u8 *inverts,
 		  struct ice_acl_act_entry *acts, u8 acts_cnt, u16 *entry_idx);
 enum ice_status
 ice_acl_prog_act(struct ice_hw *hw, struct ice_acl_scen *scen,
diff --git a/drivers/net/ice/base/ice_acl_ctrl.c b/drivers/net/ice/base/ice_acl_ctrl.c
index bd09e9d77..3c4d45cc0 100644
--- a/drivers/net/ice/base/ice_acl_ctrl.c
+++ b/drivers/net/ice/base/ice_acl_ctrl.c
@@ -25,19 +25,21 @@ static void ice_acl_init_entry(struct ice_acl_scen *scen)
 	 * normal priority: start from the highest index, 50% of total entries
 	 * high priority: start from the lowest index, 25% of total entries
 	 */
-	scen->first_idx[ICE_LOW] = scen->num_entry - 1;
-	scen->first_idx[ICE_NORMAL] = scen->num_entry - scen->num_entry / 4 - 1;
-	scen->first_idx[ICE_HIGH] = 0;
-
-	scen->last_idx[ICE_LOW] = scen->num_entry - scen->num_entry / 4;
-	scen->last_idx[ICE_NORMAL] = scen->num_entry / 4;
-	scen->last_idx[ICE_HIGH] = scen->num_entry / 4 - 1;
+	scen->first_idx[ICE_ACL_PRIO_LOW] = scen->num_entry - 1;
+	scen->first_idx[ICE_ACL_PRIO_NORMAL] = scen->num_entry -
+		scen->num_entry / 4 - 1;
+	scen->first_idx[ICE_ACL_PRIO_HIGH] = 0;
+
+	scen->last_idx[ICE_ACL_PRIO_LOW] = scen->num_entry -
+		scen->num_entry / 4;
+	scen->last_idx[ICE_ACL_PRIO_NORMAL] = scen->num_entry / 4;
+	scen->last_idx[ICE_ACL_PRIO_HIGH] = scen->num_entry / 4 - 1;
 }
 
 /**
  * ice_acl_scen_assign_entry_idx
  * @scen: pointer to the scenario struct
- * @prior: the priority of the flow entry being allocated
+ * @prio: the priority of the flow entry being allocated
  *
  * To find the index of an available entry in scenario
  *
@@ -46,16 +48,16 @@ static void ice_acl_init_entry(struct ice_acl_scen *scen)
  */
 static u16
 ice_acl_scen_assign_entry_idx(struct ice_acl_scen *scen,
-			      enum ice_acl_entry_prior prior)
+			      enum ice_acl_entry_prio prio)
 {
 	u16 first_idx, last_idx, i;
 	s8 step;
 
-	if (prior >= ICE_MAX_PRIOR)
+	if (prio >= ICE_ACL_MAX_PRIO)
 		return ICE_ACL_SCEN_ENTRY_INVAL;
 
-	first_idx = scen->first_idx[prior];
-	last_idx = scen->last_idx[prior];
+	first_idx = scen->first_idx[prio];
+	last_idx = scen->last_idx[prio];
 	step = first_idx <= last_idx ? 1 : -1;
 
 	for (i = first_idx; i != last_idx + step; i += step)
@@ -953,7 +955,7 @@ enum ice_status ice_acl_destroy_tbl(struct ice_hw *hw)
  * ice_acl_add_entry - Add a flow entry to an ACL scenario
  * @hw: pointer to the HW struct
  * @scen: scenario to add the entry to
- * @prior: priority level of the entry being added
+ * @prio: priority level of the entry being added
  * @keys: buffer of the value of the key to be programmed to the ACL entry
  * @inverts: buffer of the value of the key inverts to be programmed
  * @acts: pointer to a buffer containing formatted actions
@@ -967,7 +969,7 @@ enum ice_status ice_acl_destroy_tbl(struct ice_hw *hw)
  */
 enum ice_status
 ice_acl_add_entry(struct ice_hw *hw, struct ice_acl_scen *scen,
-		  enum ice_acl_entry_prior prior, u8 *keys, u8 *inverts,
+		  enum ice_acl_entry_prio prio, u8 *keys, u8 *inverts,
 		  struct ice_acl_act_entry *acts, u8 acts_cnt, u16 *entry_idx)
 {
 	u8 i, entry_tcam, num_cscd, offset;
@@ -978,7 +980,7 @@ ice_acl_add_entry(struct ice_hw *hw, struct ice_acl_scen *scen,
 	if (!scen)
 		return ICE_ERR_DOES_NOT_EXIST;
 
-	*entry_idx = ice_acl_scen_assign_entry_idx(scen, prior);
+	*entry_idx = ice_acl_scen_assign_entry_idx(scen, prio);
 	if (*entry_idx >= scen->num_entry) {
 		*entry_idx = 0;
 		return ICE_ERR_MAX_LIMIT;
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index cd3ce8231..de5dfb228 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -2715,30 +2715,30 @@ ice_flow_acl_find_scen_entry_cond(struct ice_flow_prof *prof,
 }
 
 /**
- * ice_flow_acl_convert_to_acl_prior - Convert to ACL priority
+ * ice_flow_acl_convert_to_acl_prio - Convert to ACL priority
  * @p: flow priority
  */
-static enum ice_acl_entry_prior
-ice_flow_acl_convert_to_acl_prior(enum ice_flow_priority p)
+static enum ice_acl_entry_prio
+ice_flow_acl_convert_to_acl_prio(enum ice_flow_priority p)
 {
-	enum ice_acl_entry_prior acl_prior;
+	enum ice_acl_entry_prio acl_prio;
 
 	switch (p) {
 	case ICE_FLOW_PRIO_LOW:
-		acl_prior = ICE_LOW;
+		acl_prio = ICE_ACL_PRIO_LOW;
 		break;
 	case ICE_FLOW_PRIO_NORMAL:
-		acl_prior = ICE_NORMAL;
+		acl_prio = ICE_ACL_PRIO_NORMAL;
 		break;
 	case ICE_FLOW_PRIO_HIGH:
-		acl_prior = ICE_HIGH;
+		acl_prio = ICE_ACL_PRIO_HIGH;
 		break;
 	default:
-		acl_prior = ICE_NORMAL;
+		acl_prio = ICE_ACL_PRIO_NORMAL;
 		break;
 	}
 
-	return acl_prior;
+	return acl_prio;
 }
 
 /**
@@ -2878,15 +2878,15 @@ ice_flow_acl_add_scen_entry_sync(struct ice_hw *hw, struct ice_flow_prof *prof,
 			   ICE_NONDMA_TO_NONDMA);
 
 	if (do_add_entry) {
-		enum ice_acl_entry_prior prior;
+		enum ice_acl_entry_prio prio;
 		u8 *keys, *inverts;
 		u16 entry_idx;
 
 		keys = (u8 *)e->entry;
 		inverts = keys + (e->entry_sz / 2);
-		prior = ice_flow_acl_convert_to_acl_prior(e->priority);
+		prio = ice_flow_acl_convert_to_acl_prio(e->priority);
 
-		status = ice_acl_add_entry(hw, prof->cfg.scen, prior, keys,
+		status = ice_acl_add_entry(hw, prof->cfg.scen, prio, keys,
 					   inverts, acts, e->acts_cnt,
 					   &entry_idx);
 		if (status)
@@ -2904,7 +2904,6 @@ ice_flow_acl_add_scen_entry_sync(struct ice_hw *hw, struct ice_flow_prof *prof,
 			exist->acts = (struct ice_flow_action *)
 				ice_calloc(hw, exist->acts_cnt,
 					   sizeof(struct ice_flow_action));
-
 			if (!exist->acts) {
 				status = ICE_ERR_NO_MEMORY;
 				goto out;
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

* [dpdk-dev] [PATCH v2 40/40] net/ice/base: preserve default aggr vsi information
  2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
                     ` (38 preceding siblings ...)
  2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 39/40] net/ice/base: rename ACL priority values Qi Zhang
@ 2020-09-11 13:19   ` Qi Zhang
  39 siblings, 0 replies; 87+ messages in thread
From: Qi Zhang @ 2020-09-11 13:19 UTC (permalink / raw)
  To: ferruh.yigit; +Cc: dev, Qi Zhang, Tarun Singh

Added the change to keep the default aggregator VSI information.

Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
---
 drivers/net/ice/base/ice_sched.c | 11 +----------
 1 file changed, 1 insertion(+), 10 deletions(-)

diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c
index 4be449f61..16314ef18 100644
--- a/drivers/net/ice/base/ice_sched.c
+++ b/drivers/net/ice/base/ice_sched.c
@@ -2852,16 +2852,7 @@ ice_sched_assoc_vsi_to_agg(struct ice_port_info *pi, u32 agg_id,
 		if (status)
 			break;
 
-		if (agg_id != ICE_DFLT_AGG_ID)
-			ice_set_bit(tc, agg_vsi_info->tc_bitmap);
-		else
-			ice_clear_bit(tc, agg_vsi_info->tc_bitmap);
-	}
-	/* If VSI moved back to default aggregator, delete agg_vsi_info. */
-	if (!ice_is_any_bit_set(agg_vsi_info->tc_bitmap,
-				ICE_MAX_TRAFFIC_CLASS)) {
-		LIST_DEL(&agg_vsi_info->list_entry);
-		ice_free(hw, agg_vsi_info);
+		ice_set_bit(tc, agg_vsi_info->tc_bitmap);
 	}
 	return status;
 }
-- 
2.13.6


^ permalink raw reply	[flat|nested] 87+ messages in thread

end of thread, other threads:[~2020-09-11 13:24 UTC | newest]

Thread overview: 87+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-09-07 11:27 [dpdk-dev] [PATCH 00/40] ice base code update Qi Zhang
2020-09-07 11:27 ` [dpdk-dev] [PATCH 01/40] net/ice/base: handle error gracefully in HW table calloc Qi Zhang
2020-09-07 11:27 ` [dpdk-dev] [PATCH 02/40] net/ice/base: split caps discover into two functions Qi Zhang
2020-09-07 11:27 ` [dpdk-dev] [PATCH 03/40] net/ice/base: avoid unnecessary single-member variable-length structs Qi Zhang
2020-09-07 11:27 ` [dpdk-dev] [PATCH 04/40] net/ice/base: fix issues around move nodes Qi Zhang
2020-09-07 11:27 ` [dpdk-dev] [PATCH 05/40] net/ice/base: cleanup stack hog Qi Zhang
2020-09-07 11:27 ` [dpdk-dev] [PATCH 06/40] net/ice/base: clean the code wrapping Qi Zhang
2020-09-07 11:27 ` [dpdk-dev] [PATCH 07/40] net/ice/base: cleanup misleading comment Qi Zhang
2020-09-07 11:27 ` [dpdk-dev] [PATCH 08/40] net/ice/base: silence static analysis warning Qi Zhang
2020-09-07 11:27 ` [dpdk-dev] [PATCH 09/40] net/ice/base: replace single-element array used for C struct hack Qi Zhang
2020-09-07 11:27 ` [dpdk-dev] [PATCH 10/40] net/ice/base: introduce and use bitmap set API Qi Zhang
2020-09-07 11:27 ` [dpdk-dev] [PATCH 11/40] net/ice/base: introduce and use bitmap hamming weight API Qi Zhang
2020-09-07 11:27 ` [dpdk-dev] [PATCH 12/40] net/ice/base: add function header Qi Zhang
2020-09-07 11:27 ` [dpdk-dev] [PATCH 13/40] net/ice/base: introduce and use for each bit iterator Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 14/40] net/ice/base: correct abbreviations Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 15/40] net/ice/base: add AQ cmd 0X0A0A LLDP fltr control Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 16/40] net/ice/base: add support for GTP-U type switch rule Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 17/40] net/ice/base: join format strings to same line Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 18/40] net/ice/base: introduce Tx rate limiting on port level Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 19/40] net/ice/base: reduce profile to recip info get from firmware Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 20/40] net/ice/base: refactor DCB related variables Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 21/40] net/ice/base: support outer IP filter for GTPC Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 22/40] net/ice/base: support outer IP filter for GTPU without inner IP Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 23/40] net/ice/base: move a function Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 24/40] net/ice/base: clear advanced rules in reset preparation Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 25/40] net/ice/base: move a function Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 26/40] net/ice/base: add check for failed acts allocation Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 27/40] net/ice/base: remove repeated words Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 28/40] net/ice/base: remove function ACL count query Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 29/40] net/ice/base: preserve NVM capabilities in safe mode Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 30/40] net/ice/base: misc minor ACL changes Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 31/40] net/ice/base: adjust rate limit profile ids runtime database Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 32/40] net/ice/base: enable QinQ filter for switch advanced rule Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 33/40] net/ice/base: create flash info structure and separate NVM version Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 34/40] net/ice/base: remove unused parameter Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 35/40] net/ice/base: minor code clean Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 36/40] net/ice/base: cache NVM module bank information Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 37/40] net/ice/base: rename function Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 38/40] net/ice/base: remove unnecessary conditional Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 39/40] net/ice/base: rename ACL priority values Qi Zhang
2020-09-07 11:28 ` [dpdk-dev] [PATCH 40/40] net/ice/base: preserve default aggr vsi information Qi Zhang
2020-09-09  7:16 ` [dpdk-dev] [PATCH 00/40] ice base code update Yang, Qiming
2020-09-10  3:26   ` Zhang, Qi Z
2020-09-11 11:07     ` Ferruh Yigit
2020-09-11 11:52       ` Zhang, Qi Z
2020-09-11 12:23         ` Ferruh Yigit
2020-09-11 13:19 ` [dpdk-dev] [PATCH v2 " Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 01/40] net/ice/base: handle error gracefully in HW table calloc Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 02/40] net/ice/base: split caps discover into two functions Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 03/40] net/ice/base: avoid unnecessary single-member variable-length structs Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 04/40] net/ice/base: fix issues around move nodes Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 05/40] net/ice/base: cleanup stack hog Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 06/40] net/ice/base: clean the code wrapping Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 07/40] net/ice/base: cleanup misleading comment Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 08/40] net/ice/base: silence static analysis warning Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 09/40] net/ice/base: replace single-element array used for C struct hack Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 10/40] net/ice/base: introduce and use bitmap set API Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 11/40] net/ice/base: introduce and use bitmap hamming weight API Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 12/40] net/ice/base: add function header Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 13/40] net/ice/base: introduce and use for each bit iterator Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 14/40] net/ice/base: correct abbreviations Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 15/40] net/ice/base: add AQ cmd 0X0A0A LLDP fltr control Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 16/40] net/ice/base: add support for GTP-U type switch rule Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 17/40] net/ice/base: join format strings to same line Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 18/40] net/ice/base: introduce Tx rate limiting on port level Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 19/40] net/ice/base: reduce profile to recip info get from firmware Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 20/40] net/ice/base: refactor DCB related variables Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 21/40] net/ice/base: support outer IP filter for GTPC Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 22/40] net/ice/base: support outer IP filter for GTPU without inner IP Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 23/40] net/ice/base: move a function Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 24/40] net/ice/base: clear advanced rules in reset preparation Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 25/40] net/ice/base: move a function Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 26/40] net/ice/base: add check for failed acts allocation Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 27/40] net/ice/base: remove repeated words Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 28/40] net/ice/base: remove function ACL count query Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 29/40] net/ice/base: preserve NVM capabilities in safe mode Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 30/40] net/ice/base: misc minor ACL changes Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 31/40] net/ice/base: adjust rate limit profile ids runtime database Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 32/40] net/ice/base: enable QinQ filter for switch advanced rule Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 33/40] net/ice/base: create flash info structure and separate NVM version Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 34/40] net/ice/base: remove unused parameter Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 35/40] net/ice/base: minor code clean Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 36/40] net/ice/base: cache NVM module bank information Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 37/40] net/ice/base: rename function Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 38/40] net/ice/base: remove unnecessary conditional Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 39/40] net/ice/base: rename ACL priority values Qi Zhang
2020-09-11 13:19   ` [dpdk-dev] [PATCH v2 40/40] net/ice/base: preserve default aggr vsi information Qi Zhang

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