From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A68EFA04AA; Mon, 7 Sep 2020 23:43:54 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 45ACA1C1E5; Mon, 7 Sep 2020 23:41:07 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 8970E1C0D8 for ; Mon, 7 Sep 2020 23:40:53 +0200 (CEST) IronPort-SDR: cFxYQaXoIHTtrGOYHtmKDtWpL/2ul6yYoKLtq81cRWseR9BSodfYt24JBPPL2V3hBPlIHRMzbZ 1BTJt9OcPDMw== X-IronPort-AV: E=McAfee;i="6000,8403,9737"; a="176099094" X-IronPort-AV: E=Sophos;i="5.76,403,1592895600"; d="scan'208";a="176099094" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Sep 2020 14:40:53 -0700 IronPort-SDR: PS/wR57mNlE+6gnHB9TiY60kAtVEw7eQAIBJOIIaue/sTYZ9touqAqS0fG5/03CYjxUhYFpMXi VSKG1+/Zf1zA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,403,1592895600"; d="scan'208";a="336190171" Received: from silpixa00400573.ir.intel.com (HELO silpixa00400573.ger.corp.intel.com) ([10.237.223.107]) by fmsmga002.fm.intel.com with ESMTP; 07 Sep 2020 14:40:52 -0700 From: Cristian Dumitrescu To: dev@dpdk.org Date: Mon, 7 Sep 2020 22:40:11 +0100 Message-Id: <20200907214032.95052-21-cristian.dumitrescu@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200907214032.95052-1-cristian.dumitrescu@intel.com> References: <20200826151445.51500-2-cristian.dumitrescu@intel.com> <20200907214032.95052-1-cristian.dumitrescu@intel.com> Subject: [dpdk-dev] [PATCH v2 20/41] pipeline: introduce SWX xor instruction X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" The xor (i.e. bitwise exclusive or) instruction source can be header field (H), meta-data field (M), extern object (E) or function (F) mailbox field, table entry action data field (T) or immediate value (I). The destination is HMEF. Signed-off-by: Cristian Dumitrescu --- lib/librte_pipeline/rte_swx_pipeline.c | 114 +++++++++++++++++++++++++ 1 file changed, 114 insertions(+) diff --git a/lib/librte_pipeline/rte_swx_pipeline.c b/lib/librte_pipeline/rte_swx_pipeline.c index 88d1b2d1a..6024c800c 100644 --- a/lib/librte_pipeline/rte_swx_pipeline.c +++ b/lib/librte_pipeline/rte_swx_pipeline.c @@ -319,6 +319,14 @@ enum instruction_type { INSTR_ALU_OR, /* dst = MEF, src = MEFT */ INSTR_ALU_OR_S, /* (dst, src) = (MEF, H) or (dst, src) = (H, MEFT) */ INSTR_ALU_OR_I, /* dst = HMEF, src = I */ + + /* xor dst src + * dst ^= src + * dst = HMEF, src = HMEFTI + */ + INSTR_ALU_XOR, /* dst = MEF, src = MEFT */ + INSTR_ALU_XOR_S, /* (dst, src) = (MEF, H) or (dst, src) = (H, MEFT) */ + INSTR_ALU_XOR_I, /* dst = HMEF, src = I */ }; struct instr_operand { @@ -3184,6 +3192,55 @@ instr_alu_or_translate(struct rte_swx_pipeline *p, return 0; } +static int +instr_alu_xor_translate(struct rte_swx_pipeline *p, + struct action *action, + char **tokens, + int n_tokens, + struct instruction *instr, + struct instruction_data *data __rte_unused) +{ + char *dst = tokens[1], *src = tokens[2]; + struct field *fdst, *fsrc; + uint32_t dst_struct_id, src_struct_id, src_val; + + CHECK(n_tokens == 3, EINVAL); + + fdst = struct_field_parse(p, NULL, dst, &dst_struct_id); + CHECK(fdst, EINVAL); + + /* XOR or XOR_S. */ + fsrc = struct_field_parse(p, action, src, &src_struct_id); + if (fsrc) { + instr->type = INSTR_ALU_XOR; + if ((dst[0] == 'h' && src[0] != 'h') || + (dst[0] != 'h' && src[0] == 'h')) + instr->type = INSTR_ALU_XOR_S; + + instr->alu.dst.struct_id = (uint8_t)dst_struct_id; + instr->alu.dst.n_bits = fdst->n_bits; + instr->alu.dst.offset = fdst->offset / 8; + instr->alu.src.struct_id = (uint8_t)src_struct_id; + instr->alu.src.n_bits = fsrc->n_bits; + instr->alu.src.offset = fsrc->offset / 8; + return 0; + } + + /* XOR_I. */ + src_val = strtoul(src, &src, 0); + CHECK(!src[0], EINVAL); + + if (dst[0] == 'h') + src_val = htonl(src_val); + + instr->type = INSTR_ALU_XOR_I; + instr->alu.dst.struct_id = (uint8_t)dst_struct_id; + instr->alu.dst.n_bits = fdst->n_bits; + instr->alu.dst.offset = fdst->offset / 8; + instr->alu.src_val = (uint32_t)src_val; + return 0; +} + static inline void instr_alu_add_exec(struct rte_swx_pipeline *p) { @@ -3454,6 +3511,51 @@ instr_alu_or_i_exec(struct rte_swx_pipeline *p) thread_ip_inc(p); } +static inline void +instr_alu_xor_exec(struct rte_swx_pipeline *p) +{ + struct thread *t = &p->threads[p->thread_id]; + struct instruction *ip = t->ip; + + TRACE("[Thread %2u] xor\n", p->thread_id); + + /* Structs. */ + ALU(t, ip, ^); + + /* Thread. */ + thread_ip_inc(p); +} + +static inline void +instr_alu_xor_s_exec(struct rte_swx_pipeline *p) +{ + struct thread *t = &p->threads[p->thread_id]; + struct instruction *ip = t->ip; + + TRACE("[Thread %2u] xor (s)\n", p->thread_id); + + /* Structs. */ + ALU_S(t, ip, ^); + + /* Thread. */ + thread_ip_inc(p); +} + +static inline void +instr_alu_xor_i_exec(struct rte_swx_pipeline *p) +{ + struct thread *t = &p->threads[p->thread_id]; + struct instruction *ip = t->ip; + + TRACE("[Thread %2u] xor (i)\n", p->thread_id); + + /* Structs. */ + ALU_I(t, ip, ^); + + /* Thread. */ + thread_ip_inc(p); +} + static inline void instr_alu_ckadd_field_exec(struct rte_swx_pipeline *p) { @@ -3837,6 +3939,14 @@ instr_translate(struct rte_swx_pipeline *p, instr, data); + if (!strcmp(tokens[tpos], "xor")) + return instr_alu_xor_translate(p, + action, + &tokens[tpos], + n_tokens - tpos, + instr, + data); + CHECK(0, EINVAL); } @@ -4021,6 +4131,10 @@ static instr_exec_t instruction_table[] = { [INSTR_ALU_OR] = instr_alu_or_exec, [INSTR_ALU_OR_S] = instr_alu_or_s_exec, [INSTR_ALU_OR_I] = instr_alu_or_i_exec, + + [INSTR_ALU_XOR] = instr_alu_xor_exec, + [INSTR_ALU_XOR_S] = instr_alu_xor_s_exec, + [INSTR_ALU_XOR_I] = instr_alu_xor_i_exec, }; static inline void -- 2.17.1