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From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
To: dev@dpdk.org
Cc: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Subject: [dpdk-dev] [PATCH v2 2/3] crypto/aesni_mb: support SNOW3G-UEA2/UIA2
Date: Fri, 11 Sep 2020 11:38:00 +0000
Message-ID: <20200911113801.2664990-2-pablo.de.lara.guarch@intel.com> (raw)
In-Reply-To: <20200911113801.2664990-1-pablo.de.lara.guarch@intel.com>

Add support for SNOW3G-UEA2/UIA2 algorithms through the intel-ipsec-mb
job API, allowing the mix of these algorithms with others.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
---
v2:
- Added commit description

---
 doc/guides/cryptodevs/aesni_mb.rst            |  2 +
 doc/guides/cryptodevs/features/aesni_mb.ini   |  2 +
 doc/guides/rel_notes/release_20_11.rst        |  1 +
 .../crypto/aesni_mb/aesni_mb_pmd_private.h    |  7 +++
 drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c    | 47 ++++++++++++++++---
 .../crypto/aesni_mb/rte_aesni_mb_pmd_ops.c    | 45 ++++++++++++++++++
 6 files changed, 98 insertions(+), 6 deletions(-)

diff --git a/doc/guides/cryptodevs/aesni_mb.rst b/doc/guides/cryptodevs/aesni_mb.rst
index 0cb58bfe5..12bcafcba 100644
--- a/doc/guides/cryptodevs/aesni_mb.rst
+++ b/doc/guides/cryptodevs/aesni_mb.rst
@@ -33,6 +33,7 @@ Cipher algorithms:
 * RTE_CRYPTO_CIPHER_3DES_CBC
 * RTE_CRYPTO_CIPHER_DES_DOCSISBPI
 * RTE_CRYPTO_CIPHER_ZUC_EEA3
+* RTE_CRYPTO_CIPHER_SNOW3G_UEA2
 
 Authentication algorithms:
 
@@ -51,6 +52,7 @@ Authentication algorithms:
 * RTE_CRYPTO_AUTH_SHA384
 * RTE_CRYPTO_AUTH_SHA512
 * RTE_CRYPTO_AUTH_ZUC_EIA3
+* RTE_CRYPTO_AUTH_SNOW3G_UIA2
 
 AEAD algorithms:
 
diff --git a/doc/guides/cryptodevs/features/aesni_mb.ini b/doc/guides/cryptodevs/features/aesni_mb.ini
index 47210333c..76a0fd149 100644
--- a/doc/guides/cryptodevs/features/aesni_mb.ini
+++ b/doc/guides/cryptodevs/features/aesni_mb.ini
@@ -31,6 +31,7 @@ DES CBC        = Y
 3DES CBC       = Y
 DES DOCSIS BPI = Y
 ZUC EEA3       = Y
+SNOW3G UEA2    = Y
 
 ;
 ; Supported authentication algorithms of the 'aesni_mb' crypto driver.
@@ -51,6 +52,7 @@ AES XCBC MAC = Y
 AES CMAC (128)  = Y
 AES GMAC     = Y
 ZUC EIA3     = Y
+SNOW3G UIA2  = Y
 
 ;
 ; Supported AEAD algorithms of the 'aesni_mb' crypto driver.
diff --git a/doc/guides/rel_notes/release_20_11.rst b/doc/guides/rel_notes/release_20_11.rst
index 1dc822cb7..ee8dff904 100644
--- a/doc/guides/rel_notes/release_20_11.rst
+++ b/doc/guides/rel_notes/release_20_11.rst
@@ -58,6 +58,7 @@ New Features
 * **Updated the AESNI MB crypto PMD.**
 
   * Added support for ZUC-EEA3/EIA3 algorithms.
+  * Added support for SNOW3G-UEA2/UIA2 algorithms.
 
 
 Removed Items
diff --git a/drivers/crypto/aesni_mb/aesni_mb_pmd_private.h b/drivers/crypto/aesni_mb/aesni_mb_pmd_private.h
index 601ab9a40..75d01264e 100644
--- a/drivers/crypto/aesni_mb/aesni_mb_pmd_private.h
+++ b/drivers/crypto/aesni_mb/aesni_mb_pmd_private.h
@@ -57,6 +57,7 @@ static const unsigned auth_blocksize[] = {
 		[PLAIN_SHA_512]			= 128,
 #if IMB_VERSION(0, 53, 3) <= IMB_VERSION_NUM
 		[IMB_AUTH_ZUC_EIA3_BITLEN]	= 16
+		[IMB_AUTH_SNOW3G_UIA2_BITLEN]	= 16
 #endif
 };
 
@@ -91,6 +92,7 @@ static const unsigned auth_truncated_digest_byte_lengths[] = {
 		[PLAIN_SHA_512]			= 64,
 #if IMB_VERSION(0, 53, 3) <= IMB_VERSION_NUM
 		[IMB_AUTH_ZUC_EIA3_BITLEN]	= 4
+		[IMB_AUTH_SNOW3G_UIA2_BITLEN]	= 4
 #endif
 };
 
@@ -126,6 +128,7 @@ static const unsigned auth_digest_byte_lengths[] = {
 		[PLAIN_SHA_512]			= 64,
 #if IMB_VERSION(0, 53, 3) <= IMB_VERSION_NUM
 		[IMB_AUTH_ZUC_EIA3_BITLEN]	= 4
+		[IMB_AUTH_SNOW3G_UIA2_BITLEN]	= 4
 #endif
 	/**< Vector mode dependent pointer table of the multi-buffer APIs */
 
@@ -238,6 +241,8 @@ struct aesni_mb_session {
 			/**< Expanded GCM key */
 			uint8_t zuc_cipher_key[16];
 			/**< ZUC cipher key */
+			snow3g_key_schedule_t pKeySched_snow3g_cipher;
+			/**< SNOW3G scheduled cipher key */
 		};
 	} cipher;
 
@@ -279,6 +284,8 @@ struct aesni_mb_session {
 			/**< Expanded XCBC authentication keys */
 			uint8_t zuc_auth_key[16];
 			/**< ZUC authentication key */
+			snow3g_key_schedule_t pKeySched_snow3g_auth;
+			/**< SNOW3G scheduled authentication key */
 		};
 	/** Generated digest size by the Multi-buffer library */
 	uint16_t gen_digest_len;
diff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
index 54023e013..42f89a955 100644
--- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
+++ b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
@@ -266,6 +266,19 @@ aesni_mb_set_session_auth_parameters(const MB_MGR *mb_mgr,
 
 		memcpy(sess->auth.zuc_auth_key, xform->auth.key.data, 16);
 		return 0;
+	} else if (xform->auth.algo == RTE_CRYPTO_AUTH_SNOW3G_UIA2) {
+		sess->auth.algo = IMB_AUTH_SNOW3G_UIA2_BITLEN;
+		uint16_t snow3g_uia2_digest_len =
+			get_truncated_digest_byte_length(IMB_AUTH_SNOW3G_UIA2_BITLEN);
+		if (sess->auth.req_digest_len != snow3g_uia2_digest_len) {
+			AESNI_MB_LOG(ERR, "Invalid digest size\n");
+			return -EINVAL;
+		}
+		sess->auth.gen_digest_len = sess->auth.req_digest_len;
+
+		IMB_SNOW3G_INIT_KEY_SCHED(mb_mgr, xform->auth.key.data,
+					&sess->auth.pKeySched_snow3g_auth);
+		return 0;
 	}
 #endif
 
@@ -403,6 +416,7 @@ aesni_mb_set_session_cipher_parameters(const MB_MGR *mb_mgr,
 	uint8_t is_docsis = 0;
 #if IMB_VERSION(0, 53, 3) <= IMB_VERSION_NUM
 	uint8_t is_zuc = 0;
+	uint8_t is_snow3g = 0;
 #endif
 
 	if (xform == NULL) {
@@ -457,6 +471,10 @@ aesni_mb_set_session_cipher_parameters(const MB_MGR *mb_mgr,
 		sess->cipher.mode = IMB_CIPHER_ZUC_EEA3;
 		is_zuc = 1;
 		break;
+	case RTE_CRYPTO_CIPHER_SNOW3G_UEA2:
+		sess->cipher.mode = IMB_CIPHER_SNOW3G_UEA2_BITLEN;
+		is_snow3g = 1;
+		break;
 #endif
 	default:
 		AESNI_MB_LOG(ERR, "Unsupported cipher mode parameter");
@@ -565,6 +583,14 @@ aesni_mb_set_session_cipher_parameters(const MB_MGR *mb_mgr,
 		sess->cipher.key_length_in_bytes = 16;
 		memcpy(sess->cipher.zuc_cipher_key, xform->cipher.key.data,
 			16);
+	} else if (is_snow3g) {
+		if (xform->cipher.key.length != 16) {
+			AESNI_MB_LOG(ERR, "Invalid cipher key length");
+			return -EINVAL;
+		}
+		sess->cipher.key_length_in_bytes = 16;
+		IMB_SNOW3G_INIT_KEY_SCHED(mb_mgr, xform->cipher.key.data,
+					&sess->cipher.pKeySched_snow3g_cipher);
 #endif
 	} else {
 		if (xform->cipher.key.length != 8) {
@@ -1214,6 +1240,11 @@ set_mb_job_params(JOB_AES_HMAC *job, struct aesni_mb_qp *qp,
 		job->u.ZUC_EIA3._iv = rte_crypto_op_ctod_offset(op, uint8_t *,
 						session->auth_iv.offset);
 		break;
+	case IMB_AUTH_SNOW3G_UIA2_BITLEN:
+		job->u.SNOW3G_UIA2._key = (void *) &session->auth.pKeySched_snow3g_auth;
+		job->u.SNOW3G_UIA2._iv = rte_crypto_op_ctod_offset(op, uint8_t *,
+						session->auth_iv.offset);
+		break;
 #endif
 	default:
 		job->u.HMAC._hashed_auth_key_xor_ipad = session->auth.pads.inner;
@@ -1232,10 +1263,19 @@ set_mb_job_params(JOB_AES_HMAC *job, struct aesni_mb_qp *qp,
 		}
 	}
 
+	if (job->hash_alg == AES_CCM || (job->hash_alg == AES_GMAC &&
+			session->cipher.mode == GCM))
+		m_offset = op->sym->aead.data.offset;
+	else
+		m_offset = op->sym->cipher.data.offset;
+
 #if IMB_VERSION(0, 53, 3) <= IMB_VERSION_NUM
 	if (job->cipher_mode == IMB_CIPHER_ZUC_EEA3) {
 		job->aes_enc_key_expanded = session->cipher.zuc_cipher_key;
 		job->aes_dec_key_expanded = session->cipher.zuc_cipher_key;
+	} else if (job->cipher_mode == IMB_CIPHER_SNOW3G_UEA2_BITLEN) {
+		job->enc_keys = &session->cipher.pKeySched_snow3g_cipher;
+		m_offset = 0;
 	}
 #endif
 
@@ -1253,12 +1293,6 @@ set_mb_job_params(JOB_AES_HMAC *job, struct aesni_mb_qp *qp,
 		oop = 1;
 	}
 
-	if (job->hash_alg == AES_CCM || (job->hash_alg == AES_GMAC &&
-			session->cipher.mode == GCM))
-		m_offset = op->sym->aead.data.offset;
-	else
-		m_offset = op->sym->cipher.data.offset;
-
 	/* Set digest output location */
 	if (job->hash_alg != NULL_HASH &&
 			session->auth.operation == RTE_CRYPTO_AUTH_OP_VERIFY) {
@@ -1327,6 +1361,7 @@ set_mb_job_params(JOB_AES_HMAC *job, struct aesni_mb_qp *qp,
 		break;
 
 	default:
+		/* For SNOW3G, length and offsets are already in bits */
 		job->cipher_start_src_offset_in_bytes =
 				op->sym->cipher.data.offset;
 		job->msg_len_to_cipher_in_bytes = op->sym->cipher.data.length;
diff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c
index f4c4f56fe..9554ff0e7 100644
--- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c
+++ b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c
@@ -543,6 +543,51 @@ static const struct rte_cryptodev_capabilities aesni_mb_pmd_capabilities[] = {
 			}, }
 		}, }
 	},
+	{	/* SNOW 3G (UIA2) */
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+		{.sym = {
+			.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+			{.auth = {
+				.algo = RTE_CRYPTO_AUTH_SNOW3G_UIA2,
+				.block_size = 16,
+				.key_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				},
+				.digest_size = {
+					.min = 4,
+					.max = 4,
+					.increment = 0
+				},
+				.iv_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				}
+			}, }
+		}, }
+	},
+	{	/* SNOW 3G (UEA2) */
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+		{.sym = {
+			.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
+			{.cipher = {
+				.algo = RTE_CRYPTO_CIPHER_SNOW3G_UEA2,
+				.block_size = 16,
+				.key_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				},
+				.iv_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				}
+			}, }
+		}, }
+	},
 #endif
 	RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 };
-- 
2.25.1


  reply	other threads:[~2020-09-11 11:38 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-11 11:18 [dpdk-dev] [PATCH 1/3] crypto/aesni_mb: support ZUC-EEA3/EIA3 Pablo de Lara
2020-09-11 11:19 ` [dpdk-dev] [PATCH 2/3] crypto/aesni_mb: support SNOW3G-UEA2/UIA2 Pablo de Lara
2020-09-11 11:19 ` [dpdk-dev] [PATCH 3/3] crypto/aesni_mb: support KASUMI F8/F9 Pablo de Lara
2020-09-11 11:37 ` [dpdk-dev] [PATCH v2 1/3] crypto/aesni_mb: support ZUC-EEA3/EIA3 Pablo de Lara
2020-09-11 11:38   ` Pablo de Lara [this message]
2020-09-11 11:38   ` [dpdk-dev] [PATCH v2 3/3] crypto/aesni_mb: support KASUMI F8/F9 Pablo de Lara
2020-09-11 15:54   ` [dpdk-dev] [PATCH v3 1/3] crypto/aesni_mb: support ZUC-EEA3/EIA3 Pablo de Lara
2020-09-11 15:54     ` [dpdk-dev] [PATCH v3 2/3] crypto/aesni_mb: support SNOW3G-UEA2/UIA2 Pablo de Lara
2020-09-11 15:54     ` [dpdk-dev] [PATCH v3 3/3] crypto/aesni_mb: support KASUMI F8/F9 Pablo de Lara
2020-09-21 11:45     ` [dpdk-dev] [PATCH v4 1/3] crypto/aesni_mb: support ZUC-EEA3/EIA3 Pablo de Lara
2020-09-21 11:45       ` [dpdk-dev] [PATCH v4 2/3] crypto/aesni_mb: support SNOW3G-UEA2/UIA2 Pablo de Lara
2020-09-21 11:45       ` [dpdk-dev] [PATCH v4 3/3] crypto/aesni_mb: support KASUMI F8/F9 Pablo de Lara
2020-10-09 11:29       ` [dpdk-dev] [PATCH v5 1/3] crypto/aesni_mb: support ZUC-EEA3/EIA3 Pablo de Lara
2020-10-09 11:29         ` [dpdk-dev] [PATCH v5 2/3] crypto/aesni_mb: support SNOW3G-UEA2/UIA2 Pablo de Lara
2020-10-09 11:29         ` [dpdk-dev] [PATCH v5 3/3] crypto/aesni_mb: support KASUMI F8/F9 Pablo de Lara
2020-10-09 14:11         ` [dpdk-dev] [PATCH v5 1/3] crypto/aesni_mb: support ZUC-EEA3/EIA3 Akhil Goyal

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