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From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
To: dev@dpdk.org
Cc: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Subject: [dpdk-dev] [PATCH v2 3/3] crypto/aesni_mb: support KASUMI F8/F9
Date: Fri, 11 Sep 2020 11:38:01 +0000
Message-ID: <20200911113801.2664990-3-pablo.de.lara.guarch@intel.com> (raw)
In-Reply-To: <20200911113801.2664990-1-pablo.de.lara.guarch@intel.com>

Add support for KASUMI-F8/F9 algorithms through the intel-ipsec-mb
job API, allowing the mix of these algorithms with others.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
---
v2:
- Added commit description

---

 doc/guides/cryptodevs/aesni_mb.rst            |  2 +
 doc/guides/cryptodevs/features/aesni_mb.ini   |  2 +
 doc/guides/rel_notes/release_20_11.rst        |  1 +
 .../crypto/aesni_mb/aesni_mb_pmd_private.h    |  7 ++++
 drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c    | 34 +++++++++++++++
 .../crypto/aesni_mb/rte_aesni_mb_pmd_ops.c    | 41 +++++++++++++++++++
 6 files changed, 87 insertions(+)

diff --git a/doc/guides/cryptodevs/aesni_mb.rst b/doc/guides/cryptodevs/aesni_mb.rst
index 12bcafcba..85c462e62 100644
--- a/doc/guides/cryptodevs/aesni_mb.rst
+++ b/doc/guides/cryptodevs/aesni_mb.rst
@@ -34,6 +34,7 @@ Cipher algorithms:
 * RTE_CRYPTO_CIPHER_DES_DOCSISBPI
 * RTE_CRYPTO_CIPHER_ZUC_EEA3
 * RTE_CRYPTO_CIPHER_SNOW3G_UEA2
+* RTE_CRYPTO_CIPHER_KASUMI_F8
 
 Authentication algorithms:
 
@@ -53,6 +54,7 @@ Authentication algorithms:
 * RTE_CRYPTO_AUTH_SHA512
 * RTE_CRYPTO_AUTH_ZUC_EIA3
 * RTE_CRYPTO_AUTH_SNOW3G_UIA2
+* RTE_CRYPTO_AUTH_KASUMI_F9
 
 AEAD algorithms:
 
diff --git a/doc/guides/cryptodevs/features/aesni_mb.ini b/doc/guides/cryptodevs/features/aesni_mb.ini
index 76a0fd149..f70adcec9 100644
--- a/doc/guides/cryptodevs/features/aesni_mb.ini
+++ b/doc/guides/cryptodevs/features/aesni_mb.ini
@@ -32,6 +32,7 @@ DES CBC        = Y
 DES DOCSIS BPI = Y
 ZUC EEA3       = Y
 SNOW3G UEA2    = Y
+KASUMI F8      = Y
 
 ;
 ; Supported authentication algorithms of the 'aesni_mb' crypto driver.
@@ -53,6 +54,7 @@ AES CMAC (128)  = Y
 AES GMAC     = Y
 ZUC EIA3     = Y
 SNOW3G UIA2  = Y
+KASUMI F9    = Y
 
 ;
 ; Supported AEAD algorithms of the 'aesni_mb' crypto driver.
diff --git a/doc/guides/rel_notes/release_20_11.rst b/doc/guides/rel_notes/release_20_11.rst
index ee8dff904..2b6370025 100644
--- a/doc/guides/rel_notes/release_20_11.rst
+++ b/doc/guides/rel_notes/release_20_11.rst
@@ -59,6 +59,7 @@ New Features
 
   * Added support for ZUC-EEA3/EIA3 algorithms.
   * Added support for SNOW3G-UEA2/UIA2 algorithms.
+  * Added support for KASUMI-F8/F9 algorithms.
 
 
 Removed Items
diff --git a/drivers/crypto/aesni_mb/aesni_mb_pmd_private.h b/drivers/crypto/aesni_mb/aesni_mb_pmd_private.h
index 75d01264e..0177b9180 100644
--- a/drivers/crypto/aesni_mb/aesni_mb_pmd_private.h
+++ b/drivers/crypto/aesni_mb/aesni_mb_pmd_private.h
@@ -58,6 +58,7 @@ static const unsigned auth_blocksize[] = {
 #if IMB_VERSION(0, 53, 3) <= IMB_VERSION_NUM
 		[IMB_AUTH_ZUC_EIA3_BITLEN]	= 16
 		[IMB_AUTH_SNOW3G_UIA2_BITLEN]	= 16
+		[IMB_AUTH_KASUMI_UIA1]		= 16
 #endif
 };
 
@@ -93,6 +94,7 @@ static const unsigned auth_truncated_digest_byte_lengths[] = {
 #if IMB_VERSION(0, 53, 3) <= IMB_VERSION_NUM
 		[IMB_AUTH_ZUC_EIA3_BITLEN]	= 4
 		[IMB_AUTH_SNOW3G_UIA2_BITLEN]	= 4
+		[IMB_AUTH_KASUMI_UIA1]		= 4
 #endif
 };
 
@@ -129,6 +131,7 @@ static const unsigned auth_digest_byte_lengths[] = {
 #if IMB_VERSION(0, 53, 3) <= IMB_VERSION_NUM
 		[IMB_AUTH_ZUC_EIA3_BITLEN]	= 4
 		[IMB_AUTH_SNOW3G_UIA2_BITLEN]	= 4
+		[IMB_AUTH_KASUMI_UIA1]		= 4
 #endif
 	/**< Vector mode dependent pointer table of the multi-buffer APIs */
 
@@ -243,6 +246,8 @@ struct aesni_mb_session {
 			/**< ZUC cipher key */
 			snow3g_key_schedule_t pKeySched_snow3g_cipher;
 			/**< SNOW3G scheduled cipher key */
+			kasumi_key_sched_t pKeySched_kasumi_cipher;
+			/**< KASUMI scheduled cipher key */
 		};
 	} cipher;
 
@@ -286,6 +291,8 @@ struct aesni_mb_session {
 			/**< ZUC authentication key */
 			snow3g_key_schedule_t pKeySched_snow3g_auth;
 			/**< SNOW3G scheduled authentication key */
+			kasumi_key_sched_t pKeySched_kasumi_auth;
+			/**< KASUMI scheduled authentication key */
 		};
 	/** Generated digest size by the Multi-buffer library */
 	uint16_t gen_digest_len;
diff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
index 42f89a955..df4d86d0f 100644
--- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
+++ b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd.c
@@ -279,6 +279,19 @@ aesni_mb_set_session_auth_parameters(const MB_MGR *mb_mgr,
 		IMB_SNOW3G_INIT_KEY_SCHED(mb_mgr, xform->auth.key.data,
 					&sess->auth.pKeySched_snow3g_auth);
 		return 0;
+	} else if (xform->auth.algo == RTE_CRYPTO_AUTH_KASUMI_F9) {
+		sess->auth.algo = IMB_AUTH_KASUMI_UIA1;
+		uint16_t kasumi_f9_digest_len =
+			get_truncated_digest_byte_length(IMB_AUTH_KASUMI_UIA1);
+		if (sess->auth.req_digest_len != kasumi_f9_digest_len) {
+			AESNI_MB_LOG(ERR, "Invalid digest size\n");
+			return -EINVAL;
+		}
+		sess->auth.gen_digest_len = sess->auth.req_digest_len;
+
+		IMB_KASUMI_INIT_F9_KEY_SCHED(mb_mgr, xform->auth.key.data,
+					&sess->auth.pKeySched_kasumi_auth);
+		return 0;
 	}
 #endif
 
@@ -417,6 +430,7 @@ aesni_mb_set_session_cipher_parameters(const MB_MGR *mb_mgr,
 #if IMB_VERSION(0, 53, 3) <= IMB_VERSION_NUM
 	uint8_t is_zuc = 0;
 	uint8_t is_snow3g = 0;
+	uint8_t is_kasumi = 0;
 #endif
 
 	if (xform == NULL) {
@@ -475,6 +489,10 @@ aesni_mb_set_session_cipher_parameters(const MB_MGR *mb_mgr,
 		sess->cipher.mode = IMB_CIPHER_SNOW3G_UEA2_BITLEN;
 		is_snow3g = 1;
 		break;
+	case RTE_CRYPTO_CIPHER_KASUMI_F8:
+		sess->cipher.mode = IMB_CIPHER_KASUMI_UEA1_BITLEN;
+		is_kasumi = 1;
+		break;
 #endif
 	default:
 		AESNI_MB_LOG(ERR, "Unsupported cipher mode parameter");
@@ -591,6 +609,14 @@ aesni_mb_set_session_cipher_parameters(const MB_MGR *mb_mgr,
 		sess->cipher.key_length_in_bytes = 16;
 		IMB_SNOW3G_INIT_KEY_SCHED(mb_mgr, xform->cipher.key.data,
 					&sess->cipher.pKeySched_snow3g_cipher);
+	} else if (is_kasumi) {
+		if (xform->cipher.key.length != 16) {
+			AESNI_MB_LOG(ERR, "Invalid cipher key length");
+			return -EINVAL;
+		}
+		sess->cipher.key_length_in_bytes = 16;
+		IMB_KASUMI_INIT_F8_KEY_SCHED(mb_mgr, xform->cipher.key.data,
+					&sess->cipher.pKeySched_kasumi_cipher);
 #endif
 	} else {
 		if (xform->cipher.key.length != 8) {
@@ -1245,6 +1271,9 @@ set_mb_job_params(JOB_AES_HMAC *job, struct aesni_mb_qp *qp,
 		job->u.SNOW3G_UIA2._iv = rte_crypto_op_ctod_offset(op, uint8_t *,
 						session->auth_iv.offset);
 		break;
+	case IMB_AUTH_KASUMI_UIA1:
+		job->u.KASUMI_UIA1._key = (void *) &session->auth.pKeySched_kasumi_auth;
+		break;
 #endif
 	default:
 		job->u.HMAC._hashed_auth_key_xor_ipad = session->auth.pads.inner;
@@ -1276,6 +1305,9 @@ set_mb_job_params(JOB_AES_HMAC *job, struct aesni_mb_qp *qp,
 	} else if (job->cipher_mode == IMB_CIPHER_SNOW3G_UEA2_BITLEN) {
 		job->enc_keys = &session->cipher.pKeySched_snow3g_cipher;
 		m_offset = 0;
+	} else if (job->cipher_mode == IMB_CIPHER_KASUMI_UEA1_BITLEN) {
+		job->enc_keys = &session->cipher.pKeySched_kasumi_cipher;
+		m_offset = 0;
 	}
 #endif
 
@@ -1377,6 +1409,8 @@ set_mb_job_params(JOB_AES_HMAC *job, struct aesni_mb_qp *qp,
 #if IMB_VERSION(0, 53, 3) <= IMB_VERSION_NUM
 	if (job->cipher_mode == IMB_CIPHER_ZUC_EEA3)
 		job->msg_len_to_cipher_in_bytes >>= 3;
+	else if (job->hash_alg == IMB_AUTH_KASUMI_UIA1)
+		job->msg_len_to_hash_in_bytes >>= 3;
 #endif
 
 	/* Set user data to be crypto operation data struct */
diff --git a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c
index 9554ff0e7..7f5ef66c5 100644
--- a/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c
+++ b/drivers/crypto/aesni_mb/rte_aesni_mb_pmd_ops.c
@@ -588,6 +588,47 @@ static const struct rte_cryptodev_capabilities aesni_mb_pmd_capabilities[] = {
 			}, }
 		}, }
 	},
+	{	/* KASUMI (F9) */
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+		{.sym = {
+			.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
+			{.auth = {
+				.algo = RTE_CRYPTO_AUTH_KASUMI_F9,
+				.block_size = 8,
+				.key_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				},
+				.digest_size = {
+					.min = 4,
+					.max = 4,
+					.increment = 0
+				},
+				.iv_size = { 0 }
+			}, }
+		}, }
+	},
+	{	/* KASUMI (F8) */
+		.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
+		{.sym = {
+			.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
+			{.cipher = {
+				.algo = RTE_CRYPTO_CIPHER_KASUMI_F8,
+				.block_size = 8,
+				.key_size = {
+					.min = 16,
+					.max = 16,
+					.increment = 0
+				},
+				.iv_size = {
+					.min = 8,
+					.max = 8,
+					.increment = 0
+				}
+			}, }
+		}, }
+	},
 #endif
 	RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
 };
-- 
2.25.1


  parent reply	other threads:[~2020-09-11 11:38 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-11 11:18 [dpdk-dev] [PATCH 1/3] crypto/aesni_mb: support ZUC-EEA3/EIA3 Pablo de Lara
2020-09-11 11:19 ` [dpdk-dev] [PATCH 2/3] crypto/aesni_mb: support SNOW3G-UEA2/UIA2 Pablo de Lara
2020-09-11 11:19 ` [dpdk-dev] [PATCH 3/3] crypto/aesni_mb: support KASUMI F8/F9 Pablo de Lara
2020-09-11 11:37 ` [dpdk-dev] [PATCH v2 1/3] crypto/aesni_mb: support ZUC-EEA3/EIA3 Pablo de Lara
2020-09-11 11:38   ` [dpdk-dev] [PATCH v2 2/3] crypto/aesni_mb: support SNOW3G-UEA2/UIA2 Pablo de Lara
2020-09-11 11:38   ` Pablo de Lara [this message]
2020-09-11 15:54   ` [dpdk-dev] [PATCH v3 1/3] crypto/aesni_mb: support ZUC-EEA3/EIA3 Pablo de Lara
2020-09-11 15:54     ` [dpdk-dev] [PATCH v3 2/3] crypto/aesni_mb: support SNOW3G-UEA2/UIA2 Pablo de Lara
2020-09-11 15:54     ` [dpdk-dev] [PATCH v3 3/3] crypto/aesni_mb: support KASUMI F8/F9 Pablo de Lara
2020-09-21 11:45     ` [dpdk-dev] [PATCH v4 1/3] crypto/aesni_mb: support ZUC-EEA3/EIA3 Pablo de Lara
2020-09-21 11:45       ` [dpdk-dev] [PATCH v4 2/3] crypto/aesni_mb: support SNOW3G-UEA2/UIA2 Pablo de Lara
2020-09-21 11:45       ` [dpdk-dev] [PATCH v4 3/3] crypto/aesni_mb: support KASUMI F8/F9 Pablo de Lara
2020-10-09 11:29       ` [dpdk-dev] [PATCH v5 1/3] crypto/aesni_mb: support ZUC-EEA3/EIA3 Pablo de Lara
2020-10-09 11:29         ` [dpdk-dev] [PATCH v5 2/3] crypto/aesni_mb: support SNOW3G-UEA2/UIA2 Pablo de Lara
2020-10-09 11:29         ` [dpdk-dev] [PATCH v5 3/3] crypto/aesni_mb: support KASUMI F8/F9 Pablo de Lara
2020-10-09 14:11         ` [dpdk-dev] [PATCH v5 1/3] crypto/aesni_mb: support ZUC-EEA3/EIA3 Akhil Goyal

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