From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 2AD84A04C7; Tue, 15 Sep 2020 04:47:44 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B5B461BE8E; Tue, 15 Sep 2020 04:47:43 +0200 (CEST) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 69158160 for ; Tue, 15 Sep 2020 04:47:41 +0200 (CEST) IronPort-SDR: HAu2s5BNA9iltAnYelcDTEeYiQ3c7rFU+WS6STttDDFBLd3mazk+MeUi3c3TyzAW7WZ1PEy+I7 dznij3v5ja9g== X-IronPort-AV: E=McAfee;i="6000,8403,9744"; a="156621407" X-IronPort-AV: E=Sophos;i="5.76,428,1592895600"; d="scan'208";a="156621407" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Sep 2020 19:47:40 -0700 IronPort-SDR: nyiMvL4BsGF2T1O/1DrSn9/92virnOZHoJBkTOyXsyYPrxe+CrZZpNLvuHwMpjvElV8i+QUPER 4RvjWwv1qOxg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.76,428,1592895600"; d="scan'208";a="319277232" Received: from shwdenpg235.ccr.corp.intel.com ([10.240.182.60]) by orsmga002.jf.intel.com with ESMTP; 14 Sep 2020 19:47:38 -0700 From: alvinx.zhang@intel.com To: jia.guo@intel.com, qi.z.zhang@intel.com Cc: dev@dpdk.org, Alvin Zhang Date: Tue, 15 Sep 2020 10:43:44 +0800 Message-Id: <20200915024344.31056-1-alvinx.zhang@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20200914090316.49740-1-alvinx.zhang@intel.com> References: <20200914090316.49740-1-alvinx.zhang@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v6] net/iavf: support outer IP hash for no inner GTPU X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Alvin Zhang Outer IP hash can be configured as input sets for no inner GTPU packets. Signed-off-by: Alvin Zhang V2: Modify codes according to comments. V3: Refact all codes. V4: Fix compatibility issues. V5, V6: Modify codes according to comments. --- drivers/net/iavf/iavf_hash.c | 26 ++++++++++++++++---------- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/drivers/net/iavf/iavf_hash.c b/drivers/net/iavf/iavf_hash.c index 780ec27..3152218 100644 --- a/drivers/net/iavf/iavf_hash.c +++ b/drivers/net/iavf/iavf_hash.c @@ -359,6 +359,7 @@ struct virtchnl_proto_hdrs ipv6_udp_gtpc_tmplt = { {iavf_pattern_eth_vlan_ipv4_udp, IAVF_RSS_TYPE_VLAN_IPV4_UDP, &outer_ipv4_udp_tmplt}, {iavf_pattern_eth_vlan_ipv4_tcp, IAVF_RSS_TYPE_VLAN_IPV4_TCP, &outer_ipv4_tcp_tmplt}, {iavf_pattern_eth_vlan_ipv4_sctp, IAVF_RSS_TYPE_VLAN_IPV4_SCTP, &outer_ipv4_sctp_tmplt}, + {iavf_pattern_eth_ipv4_gtpu, ETH_RSS_IPV4, &outer_ipv4_udp_tmplt}, {iavf_pattern_eth_ipv4_gtpu_ipv4, IAVF_RSS_TYPE_GTPU_IPV4, &inner_ipv4_tmplt}, {iavf_pattern_eth_ipv4_gtpu_ipv4_udp, IAVF_RSS_TYPE_GTPU_IPV4_UDP, &inner_ipv4_udp_tmplt}, {iavf_pattern_eth_ipv4_gtpu_ipv4_tcp, IAVF_RSS_TYPE_GTPU_IPV4_TCP, &inner_ipv4_tcp_tmplt}, @@ -386,6 +387,7 @@ struct virtchnl_proto_hdrs ipv6_udp_gtpc_tmplt = { {iavf_pattern_eth_vlan_ipv6_udp, IAVF_RSS_TYPE_VLAN_IPV6_UDP, &outer_ipv6_udp_tmplt}, {iavf_pattern_eth_vlan_ipv6_tcp, IAVF_RSS_TYPE_VLAN_IPV6_TCP, &outer_ipv6_tcp_tmplt}, {iavf_pattern_eth_vlan_ipv6_sctp, IAVF_RSS_TYPE_VLAN_IPV6_SCTP, &outer_ipv6_sctp_tmplt}, + {iavf_pattern_eth_ipv6_gtpu, ETH_RSS_IPV6, &outer_ipv6_udp_tmplt}, {iavf_pattern_eth_ipv4_gtpu_ipv6, IAVF_RSS_TYPE_GTPU_IPV6, &inner_ipv6_tmplt}, {iavf_pattern_eth_ipv4_gtpu_ipv6_udp, IAVF_RSS_TYPE_GTPU_IPV6_UDP, &inner_ipv6_udp_tmplt}, {iavf_pattern_eth_ipv4_gtpu_ipv6_tcp, IAVF_RSS_TYPE_GTPU_IPV6_TCP, &inner_ipv6_tcp_tmplt}, @@ -714,22 +716,26 @@ struct virtchnl_proto_hdrs *iavf_hash_default_hdrs[] = { struct virtchnl_proto_hdr *hdr2; int i; - if (!(phint & IAVF_PHINT_GTPU_MSK) || - proto_hdrs->tunnel_level == 0) + if (!(phint & IAVF_PHINT_GTPU_MSK)) return; - /* shift headers 1 layer */ - for (i = proto_hdrs->count; i > 0; i--) { - hdr1 = &proto_hdrs->proto_hdr[i]; - hdr2 = &proto_hdrs->proto_hdr[i - 1]; + if (proto_hdrs->tunnel_level == TUNNEL_LEVEL_INNER) { + /* shift headers 1 layer */ + for (i = proto_hdrs->count; i > 0; i--) { + hdr1 = &proto_hdrs->proto_hdr[i]; + hdr2 = &proto_hdrs->proto_hdr[i - 1]; - *hdr1 = *hdr2; + *hdr1 = *hdr2; + } + + /* adding gtpu header at layer 0 */ + hdr1 = &proto_hdrs->proto_hdr[0]; + } else { + hdr1 = &proto_hdrs->proto_hdr[proto_hdrs->count]; } - /* adding gtpu header at layer 0 */ - proto_hdrs->count++; - hdr1 = &proto_hdrs->proto_hdr[0]; hdr1->field_selector = 0; + proto_hdrs->count++; if (phint & IAVF_PHINT_GTPU_EH_DWN) VIRTCHNL_SET_PROTO_HDR_TYPE(hdr1, GTPU_EH_PDU_DWN); -- 1.8.3.1