DPDK patches and discussions
 help / color / mirror / Atom feed
From: Leyi Rong <leyi.rong@intel.com>
To: qi.z.zhang@intel.com, wenzhuo.lu@intel.com, burce.richardson@intel.com
Cc: dev@dpdk.org, Leyi Rong <leyi.rong@intel.com>
Subject: [dpdk-dev] [PATCH v2 2/3] net/ice: add RSS hash parsing in AVX512 path
Date: Fri, 18 Sep 2020 11:35:27 +0800
Message-ID: <20200918033528.110297-3-leyi.rong@intel.com> (raw)
In-Reply-To: <20200918033528.110297-1-leyi.rong@intel.com>

Support RSS hash parsing in AVX512 data path as the default
RXDID is set to #22, that means the RSS hash field locates
in the 2nd 16B of each Flex Rx descriptor.

Signed-off-by: Leyi Rong <leyi.rong@intel.com>
---
 drivers/net/ice/ice_rxtx_vec_avx512.c | 105 ++++++++++++++++++++++++--
 1 file changed, 98 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ice/ice_rxtx_vec_avx512.c b/drivers/net/ice/ice_rxtx_vec_avx512.c
index 6a9d0a8eaa..a2a5d9987a 100644
--- a/drivers/net/ice/ice_rxtx_vec_avx512.c
+++ b/drivers/net/ice/ice_rxtx_vec_avx512.c
@@ -176,8 +176,8 @@ _ice_recv_raw_pkts_vec_avx512(struct ice_rx_queue *rxq,
 	/* mask to shuffle from desc. to mbuf (4 descriptors)*/
 	const __m512i shuf_msk =
 		_mm512_set4_epi32
-			(/* octet 12~15, 32 bits rss */
-			 15 << 24 | 14 << 16 | 13 << 8 | 12,
+			(/* rss hash parsed separately */
+			 0xFFFFFFFF,
 			 /* octet 10~11, 16 bits vlan_macip */
 			 /* octet 4~5, 16 bits data_len */
 			 11 << 24 | 10 << 16 | 5 << 8 | 4,
@@ -399,6 +399,11 @@ _ice_recv_raw_pkts_vec_avx512(struct ice_rx_queue *rxq,
 		mb4_7 = _mm512_mask_blend_epi32(0x1111, mb4_7, ptype4_7);
 		mb0_3 = _mm512_mask_blend_epi32(0x1111, mb0_3, ptype0_3);
 
+		__m256i mb4_5 = _mm512_extracti64x4_epi64(mb4_7, 0);
+		__m256i mb6_7 = _mm512_extracti64x4_epi64(mb4_7, 1);
+		__m256i mb0_1 = _mm512_extracti64x4_epi64(mb0_3, 0);
+		__m256i mb2_3 = _mm512_extracti64x4_epi64(mb0_3, 1);
+
 		/**
 		 * use permute/extract to get status content
 		 * After the operations, the packets status flags are in the
@@ -438,6 +443,97 @@ _ice_recv_raw_pkts_vec_avx512(struct ice_rx_queue *rxq,
 		/* merge flags */
 		const __m256i mbuf_flags = _mm256_or_si256(l3_l4_flags,
 				rss_vlan_flags);
+
+#ifndef RTE_LIBRTE_ICE_16BYTE_RX_DESC
+		/**
+		 * needs to load 2nd 16B of each desc for RSS hash parsing,
+		 * will cause performance drop to get into this context.
+		 */
+		if (rxq->vsi->adapter->eth_dev->data->dev_conf.rxmode.offloads &
+				DEV_RX_OFFLOAD_RSS_HASH) {
+			/* load bottom half of every 32B desc */
+			const __m128i raw_desc_bh7 =
+				_mm_load_si128
+					((void *)(&rxdp[7].wb.status_error1));
+			rte_compiler_barrier();
+			const __m128i raw_desc_bh6 =
+				_mm_load_si128
+					((void *)(&rxdp[6].wb.status_error1));
+			rte_compiler_barrier();
+			const __m128i raw_desc_bh5 =
+				_mm_load_si128
+					((void *)(&rxdp[5].wb.status_error1));
+			rte_compiler_barrier();
+			const __m128i raw_desc_bh4 =
+				_mm_load_si128
+					((void *)(&rxdp[4].wb.status_error1));
+			rte_compiler_barrier();
+			const __m128i raw_desc_bh3 =
+				_mm_load_si128
+					((void *)(&rxdp[3].wb.status_error1));
+			rte_compiler_barrier();
+			const __m128i raw_desc_bh2 =
+				_mm_load_si128
+					((void *)(&rxdp[2].wb.status_error1));
+			rte_compiler_barrier();
+			const __m128i raw_desc_bh1 =
+				_mm_load_si128
+					((void *)(&rxdp[1].wb.status_error1));
+			rte_compiler_barrier();
+			const __m128i raw_desc_bh0 =
+				_mm_load_si128
+					((void *)(&rxdp[0].wb.status_error1));
+
+			__m256i raw_desc_bh6_7 =
+				_mm256_inserti128_si256
+					(_mm256_castsi128_si256(raw_desc_bh6),
+					raw_desc_bh7, 1);
+			__m256i raw_desc_bh4_5 =
+				_mm256_inserti128_si256
+					(_mm256_castsi128_si256(raw_desc_bh4),
+					raw_desc_bh5, 1);
+			__m256i raw_desc_bh2_3 =
+				_mm256_inserti128_si256
+					(_mm256_castsi128_si256(raw_desc_bh2),
+					raw_desc_bh3, 1);
+			__m256i raw_desc_bh0_1 =
+				_mm256_inserti128_si256
+					(_mm256_castsi128_si256(raw_desc_bh0),
+					raw_desc_bh1, 1);
+
+			/**
+			 * to shift the 32b RSS hash value to the
+			 * highest 32b of each 128b before mask
+			 */
+			__m256i rss_hash6_7 =
+				_mm256_slli_epi64(raw_desc_bh6_7, 32);
+			__m256i rss_hash4_5 =
+				_mm256_slli_epi64(raw_desc_bh4_5, 32);
+			__m256i rss_hash2_3 =
+				_mm256_slli_epi64(raw_desc_bh2_3, 32);
+			__m256i rss_hash0_1 =
+				_mm256_slli_epi64(raw_desc_bh0_1, 32);
+
+			__m256i rss_hash_msk =
+				_mm256_set_epi32(0xFFFFFFFF, 0, 0, 0,
+						 0xFFFFFFFF, 0, 0, 0);
+
+			rss_hash6_7 = _mm256_and_si256
+					(rss_hash6_7, rss_hash_msk);
+			rss_hash4_5 = _mm256_and_si256
+					(rss_hash4_5, rss_hash_msk);
+			rss_hash2_3 = _mm256_and_si256
+					(rss_hash2_3, rss_hash_msk);
+			rss_hash0_1 = _mm256_and_si256
+					(rss_hash0_1, rss_hash_msk);
+
+			mb6_7 = _mm256_or_si256(mb6_7, rss_hash6_7);
+			mb4_5 = _mm256_or_si256(mb4_5, rss_hash4_5);
+			mb2_3 = _mm256_or_si256(mb2_3, rss_hash2_3);
+			mb0_1 = _mm256_or_si256(mb0_1, rss_hash0_1);
+		} /* if() on RSS hash parsing */
+#endif
+
 		/**
 		 * At this point, we have the 8 sets of flags in the low 16-bits
 		 * of each 32-bit value in vlan0.
@@ -471,11 +567,6 @@ _ice_recv_raw_pkts_vec_avx512(struct ice_rx_queue *rxq,
 					    _mm256_srli_si256(mbuf_flags, 4),
 					    0x04);
 
-		const __m256i mb4_5 = _mm512_extracti64x4_epi64(mb4_7, 0);
-		const __m256i mb6_7 = _mm512_extracti64x4_epi64(mb4_7, 1);
-		const __m256i mb0_1 = _mm512_extracti64x4_epi64(mb0_3, 0);
-		const __m256i mb2_3 = _mm512_extracti64x4_epi64(mb0_3, 1);
-
 		/* permute to add in the rx_descriptor e.g. rss fields */
 		rearm6 = _mm256_permute2f128_si256(rearm6, mb6_7, 0x20);
 		rearm4 = _mm256_permute2f128_si256(rearm4, mb4_5, 0x20);
-- 
2.17.1


  parent reply	other threads:[~2020-09-18  3:53 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-10  6:55 [dpdk-dev] [PATCH v1 0/2] AVX512 vPMD on ice Leyi Rong
2020-09-10  6:55 ` [dpdk-dev] [PATCH v1 1/2] net/ice: add AVX512 vector path Leyi Rong
2020-09-10  9:32   ` Bruce Richardson
2020-09-10  6:55 ` [dpdk-dev] [PATCH v1 2/2] net/ice: optimize Tx path on AVX512 vPMD Leyi Rong
2020-09-15  1:17   ` Wang, Haiyue
2020-09-18  3:35 ` [dpdk-dev] [PATCH v2 0/3] AVX512 vPMD on ice Leyi Rong
2020-09-18  3:35   ` [dpdk-dev] [PATCH v2 1/3] net/ice: add AVX512 vector path Leyi Rong
2020-09-18  3:35   ` Leyi Rong [this message]
2020-09-18  3:35   ` [dpdk-dev] [PATCH v2 3/3] net/ice: optimize Tx path on AVX512 vPMD Leyi Rong
2020-10-20 10:51 ` [dpdk-dev] [PATCH v3 0/3] AVX512 vPMD on ice Leyi Rong
2020-10-20 10:51   ` [dpdk-dev] [PATCH v3 1/3] net/ice: add AVX512 vector path Leyi Rong
2020-10-20 10:51   ` [dpdk-dev] [PATCH v3 2/3] net/ice: add RSS hash parsing in AVX512 path Leyi Rong
2020-10-20 10:51   ` [dpdk-dev] [PATCH v3 3/3] net/ice: optimize Tx path on AVX512 vPMD Leyi Rong
2020-10-23  4:14 ` [dpdk-dev] [PATCH v4 0/3] AVX512 vPMD on ice Leyi Rong
2020-10-23  4:14   ` [dpdk-dev] [PATCH v4 1/3] net/ice: add AVX512 vector path Leyi Rong
2020-10-25 16:23     ` David Marchand
2020-10-26  7:12       ` Rong, Leyi
2020-10-26  8:09         ` David Marchand
2020-10-27 10:19           ` Bruce Richardson
2020-10-27 10:22         ` Ferruh Yigit
2020-10-27  8:32     ` Ali Alnubani
2020-10-27  8:42       ` Ali Alnubani
2020-10-23  4:14   ` [dpdk-dev] [PATCH v4 2/3] net/ice: add RSS hash parsing in AVX512 path Leyi Rong
2020-10-23  4:14   ` [dpdk-dev] [PATCH v4 3/3] net/ice: optimize Tx path on AVX512 vPMD Leyi Rong
2020-10-23  9:39   ` [dpdk-dev] [PATCH v4 0/3] AVX512 vPMD on ice Zhang, Qi Z

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200918033528.110297-3-leyi.rong@intel.com \
    --to=leyi.rong@intel.com \
    --cc=burce.richardson@intel.com \
    --cc=dev@dpdk.org \
    --cc=qi.z.zhang@intel.com \
    --cc=wenzhuo.lu@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

DPDK patches and discussions

This inbox may be cloned and mirrored by anyone:

	git clone --mirror https://inbox.dpdk.org/dev/0 dev/git/0.git

	# If you have public-inbox 1.1+ installed, you may
	# initialize and index your mirror using the following commands:
	public-inbox-init -V2 dev dev/ https://inbox.dpdk.org/dev \
		dev@dpdk.org
	public-inbox-index dev

Example config snippet for mirrors.
Newsgroup available over NNTP:
	nntp://inbox.dpdk.org/inbox.dpdk.dev


AGPL code for this site: git clone https://public-inbox.org/public-inbox.git