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From: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
To: dev@dpdk.org
Cc: thomas@monjalon.net,
david.marchand@redhat.com
Date: Wed, 23 Sep 2020 19:06:24 +0100
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<20200923180645.55852-1-cristian.dumitrescu@intel.com>
Subject: [dpdk-dev] [PATCH v5 20/41] pipeline: introduce SWX XOR instruction
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The xor (i.e. bitwise exclusive or) instruction source can be header
field (H), meta-data field (M), extern object (E) or function (F)
mailbox field, table entry action data field (T) or immediate value
(I). The destination is HMEF.
Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
---
lib/librte_pipeline/rte_swx_pipeline.c | 114 +++++++++++++++++++++++++
1 file changed, 114 insertions(+)
diff --git a/lib/librte_pipeline/rte_swx_pipeline.c b/lib/librte_pipeline/rte_swx_pipeline.c
index 88d1b2d1a..6024c800c 100644
--- a/lib/librte_pipeline/rte_swx_pipeline.c
+++ b/lib/librte_pipeline/rte_swx_pipeline.c
@@ -319,6 +319,14 @@ enum instruction_type {
INSTR_ALU_OR, /* dst = MEF, src = MEFT */
INSTR_ALU_OR_S, /* (dst, src) = (MEF, H) or (dst, src) = (H, MEFT) */
INSTR_ALU_OR_I, /* dst = HMEF, src = I */
+
+ /* xor dst src
+ * dst ^= src
+ * dst = HMEF, src = HMEFTI
+ */
+ INSTR_ALU_XOR, /* dst = MEF, src = MEFT */
+ INSTR_ALU_XOR_S, /* (dst, src) = (MEF, H) or (dst, src) = (H, MEFT) */
+ INSTR_ALU_XOR_I, /* dst = HMEF, src = I */
};
struct instr_operand {
@@ -3184,6 +3192,55 @@ instr_alu_or_translate(struct rte_swx_pipeline *p,
return 0;
}
+static int
+instr_alu_xor_translate(struct rte_swx_pipeline *p,
+ struct action *action,
+ char **tokens,
+ int n_tokens,
+ struct instruction *instr,
+ struct instruction_data *data __rte_unused)
+{
+ char *dst = tokens[1], *src = tokens[2];
+ struct field *fdst, *fsrc;
+ uint32_t dst_struct_id, src_struct_id, src_val;
+
+ CHECK(n_tokens == 3, EINVAL);
+
+ fdst = struct_field_parse(p, NULL, dst, &dst_struct_id);
+ CHECK(fdst, EINVAL);
+
+ /* XOR or XOR_S. */
+ fsrc = struct_field_parse(p, action, src, &src_struct_id);
+ if (fsrc) {
+ instr->type = INSTR_ALU_XOR;
+ if ((dst[0] == 'h' && src[0] != 'h') ||
+ (dst[0] != 'h' && src[0] == 'h'))
+ instr->type = INSTR_ALU_XOR_S;
+
+ instr->alu.dst.struct_id = (uint8_t)dst_struct_id;
+ instr->alu.dst.n_bits = fdst->n_bits;
+ instr->alu.dst.offset = fdst->offset / 8;
+ instr->alu.src.struct_id = (uint8_t)src_struct_id;
+ instr->alu.src.n_bits = fsrc->n_bits;
+ instr->alu.src.offset = fsrc->offset / 8;
+ return 0;
+ }
+
+ /* XOR_I. */
+ src_val = strtoul(src, &src, 0);
+ CHECK(!src[0], EINVAL);
+
+ if (dst[0] == 'h')
+ src_val = htonl(src_val);
+
+ instr->type = INSTR_ALU_XOR_I;
+ instr->alu.dst.struct_id = (uint8_t)dst_struct_id;
+ instr->alu.dst.n_bits = fdst->n_bits;
+ instr->alu.dst.offset = fdst->offset / 8;
+ instr->alu.src_val = (uint32_t)src_val;
+ return 0;
+}
+
static inline void
instr_alu_add_exec(struct rte_swx_pipeline *p)
{
@@ -3454,6 +3511,51 @@ instr_alu_or_i_exec(struct rte_swx_pipeline *p)
thread_ip_inc(p);
}
+static inline void
+instr_alu_xor_exec(struct rte_swx_pipeline *p)
+{
+ struct thread *t = &p->threads[p->thread_id];
+ struct instruction *ip = t->ip;
+
+ TRACE("[Thread %2u] xor\n", p->thread_id);
+
+ /* Structs. */
+ ALU(t, ip, ^);
+
+ /* Thread. */
+ thread_ip_inc(p);
+}
+
+static inline void
+instr_alu_xor_s_exec(struct rte_swx_pipeline *p)
+{
+ struct thread *t = &p->threads[p->thread_id];
+ struct instruction *ip = t->ip;
+
+ TRACE("[Thread %2u] xor (s)\n", p->thread_id);
+
+ /* Structs. */
+ ALU_S(t, ip, ^);
+
+ /* Thread. */
+ thread_ip_inc(p);
+}
+
+static inline void
+instr_alu_xor_i_exec(struct rte_swx_pipeline *p)
+{
+ struct thread *t = &p->threads[p->thread_id];
+ struct instruction *ip = t->ip;
+
+ TRACE("[Thread %2u] xor (i)\n", p->thread_id);
+
+ /* Structs. */
+ ALU_I(t, ip, ^);
+
+ /* Thread. */
+ thread_ip_inc(p);
+}
+
static inline void
instr_alu_ckadd_field_exec(struct rte_swx_pipeline *p)
{
@@ -3837,6 +3939,14 @@ instr_translate(struct rte_swx_pipeline *p,
instr,
data);
+ if (!strcmp(tokens[tpos], "xor"))
+ return instr_alu_xor_translate(p,
+ action,
+ &tokens[tpos],
+ n_tokens - tpos,
+ instr,
+ data);
+
CHECK(0, EINVAL);
}
@@ -4021,6 +4131,10 @@ static instr_exec_t instruction_table[] = {
[INSTR_ALU_OR] = instr_alu_or_exec,
[INSTR_ALU_OR_S] = instr_alu_or_s_exec,
[INSTR_ALU_OR_I] = instr_alu_or_i_exec,
+
+ [INSTR_ALU_XOR] = instr_alu_xor_exec,
+ [INSTR_ALU_XOR_S] = instr_alu_xor_s_exec,
+ [INSTR_ALU_XOR_I] = instr_alu_xor_i_exec,
};
static inline void
--
2.17.1