From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 07585A04B5; Wed, 30 Sep 2020 15:08:45 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 107FE1DA10; Wed, 30 Sep 2020 15:08:12 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id 19A5A1D619 for ; Wed, 30 Sep 2020 15:08:06 +0200 (CEST) IronPort-SDR: 4z/LzyksNqQS5Ry3HitqHW9JFIoKDXP7quMpCuvMT32eGmp8NX0HNVSjADnBPaL1tleVfXB5IR 5Epn3P/EoKyA== X-IronPort-AV: E=McAfee;i="6000,8403,9759"; a="150223441" X-IronPort-AV: E=Sophos;i="5.77,322,1596524400"; d="scan'208";a="150223441" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2020 06:08:06 -0700 IronPort-SDR: 280JDzs4QW/IroXsDY2Fn/1+VVotWSMydoX5F9GJxf9W6TQR2Vy38RHpPkdSB1U1TLzI04RrAN JCBy4iss3okQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,322,1596524400"; d="scan'208";a="294603170" Received: from silpixa00399953.ir.intel.com (HELO silpixa00399953.ger.corp.intel.com) ([10.237.222.53]) by fmsmga008.fm.intel.com with ESMTP; 30 Sep 2020 06:08:04 -0700 From: Ciara Power To: dev@dpdk.org Cc: Ciara Power , Ruifeng Wang , Jerin Jacob , Honnappa Nagarahalli , David Christensen , Jan Viktorin , Bruce Richardson , Konstantin Ananyev Date: Wed, 30 Sep 2020 14:03:58 +0100 Message-Id: <20200930130415.11211-3-ciara.power@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200930130415.11211-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20200930130415.11211-1-ciara.power@intel.com> Subject: [dpdk-dev] [PATCH v3 02/18] eal: add default SIMD bitwidth values X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Each arch has a define for the default SIMD bitwidth value, this is used on EAL init to set the config max SIMD bitwidth. Cc: Ruifeng Wang Cc: Jerin Jacob Cc: Honnappa Nagarahalli Cc: David Christensen Signed-off-by: Ciara Power --- v3: - Removed unnecessary define in generic rte_vect.h - Changed default bitwidth for ARM to UINT16_MAX, to allow for SVE. v2: Changed default bitwidth for Arm to 128. --- lib/librte_eal/arm/include/rte_vect.h | 2 ++ lib/librte_eal/common/eal_common_options.c | 3 +++ lib/librte_eal/ppc/include/rte_vect.h | 2 ++ lib/librte_eal/x86/include/rte_vect.h | 2 ++ 4 files changed, 9 insertions(+) diff --git a/lib/librte_eal/arm/include/rte_vect.h b/lib/librte_eal/arm/include/rte_vect.h index 01c51712a1..a3508e69d5 100644 --- a/lib/librte_eal/arm/include/rte_vect.h +++ b/lib/librte_eal/arm/include/rte_vect.h @@ -14,6 +14,8 @@ extern "C" { #endif +#define RTE_DEFAULT_SIMD_BITWIDTH UINT16_MAX + typedef int32x4_t xmm_t; #define XMM_SIZE (sizeof(xmm_t)) diff --git a/lib/librte_eal/common/eal_common_options.c b/lib/librte_eal/common/eal_common_options.c index e9117a96af..d412cae89b 100644 --- a/lib/librte_eal/common/eal_common_options.c +++ b/lib/librte_eal/common/eal_common_options.c @@ -35,6 +35,7 @@ #ifndef RTE_EXEC_ENV_WINDOWS #include #endif +#include #include "eal_internal_cfg.h" #include "eal_options.h" @@ -344,6 +345,8 @@ eal_reset_internal_config(struct internal_config *internal_cfg) internal_cfg->user_mbuf_pool_ops_name = NULL; CPU_ZERO(&internal_cfg->ctrl_cpuset); internal_cfg->init_complete = 0; + internal_cfg->max_simd_bitwidth.bitwidth = RTE_DEFAULT_SIMD_BITWIDTH; + internal_cfg->max_simd_bitwidth.locked = 0; } static int diff --git a/lib/librte_eal/ppc/include/rte_vect.h b/lib/librte_eal/ppc/include/rte_vect.h index b0545c878c..70fbd0c423 100644 --- a/lib/librte_eal/ppc/include/rte_vect.h +++ b/lib/librte_eal/ppc/include/rte_vect.h @@ -15,6 +15,8 @@ extern "C" { #endif +#define RTE_DEFAULT_SIMD_BITWIDTH 256 + typedef vector signed int xmm_t; #define XMM_SIZE (sizeof(xmm_t)) diff --git a/lib/librte_eal/x86/include/rte_vect.h b/lib/librte_eal/x86/include/rte_vect.h index df5a607623..b1df75aca7 100644 --- a/lib/librte_eal/x86/include/rte_vect.h +++ b/lib/librte_eal/x86/include/rte_vect.h @@ -35,6 +35,8 @@ extern "C" { #endif +#define RTE_DEFAULT_SIMD_BITWIDTH 256 + typedef __m128i xmm_t; #define XMM_SIZE (sizeof(xmm_t)) -- 2.17.1