From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <dev-bounces@dpdk.org>
Received: from dpdk.org (dpdk.org [92.243.14.124])
	by inbox.dpdk.org (Postfix) with ESMTP id A1CF6A04B5;
	Thu,  1 Oct 2020 12:35:31 +0200 (CEST)
Received: from [92.243.14.124] (localhost [127.0.0.1])
	by dpdk.org (Postfix) with ESMTP id 07D621DC5C;
	Thu,  1 Oct 2020 12:21:22 +0200 (CEST)
Received: from mga06.intel.com (mga06.intel.com [134.134.136.31])
 by dpdk.org (Postfix) with ESMTP id 7172D1DC24
 for <dev@dpdk.org>; Thu,  1 Oct 2020 12:21:09 +0200 (CEST)
IronPort-SDR: LWL8AlHrxVCrijiLpRf+ShzuCB0BPwi2741lMlyDb0+3IwR0B5buZr/gvrjHAgo0EH7KUxKkH7
 iTrX2IxTWUFQ==
X-IronPort-AV: E=McAfee;i="6000,8403,9760"; a="224297251"
X-IronPort-AV: E=Sophos;i="5.77,323,1596524400"; d="scan'208";a="224297251"
X-Amp-Result: SKIPPED(no attachment in message)
X-Amp-File-Uploaded: False
Received: from fmsmga005.fm.intel.com ([10.253.24.32])
 by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;
 01 Oct 2020 03:21:08 -0700
IronPort-SDR: x3BsruGQqsSd6535ePCh6zEFg0/MEpbvsdbELLNcEVXPyLaBXKxbGGiICHMunDpE5yqCuXezad
 B8ZkmetfqgvA==
X-ExtLoop1: 1
X-IronPort-AV: E=Sophos;i="5.77,323,1596524400"; d="scan'208";a="515443523"
Received: from silpixa00400573.ir.intel.com (HELO
 silpixa00400573.ger.corp.intel.com) ([10.237.223.107])
 by fmsmga005.fm.intel.com with ESMTP; 01 Oct 2020 03:21:07 -0700
From: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
To: dev@dpdk.org
Cc: thomas@monjalon.net,
	david.marchand@redhat.com
Date: Thu,  1 Oct 2020 11:20:08 +0100
Message-Id: <20201001102010.36861-41-cristian.dumitrescu@intel.com>
X-Mailer: git-send-email 2.17.1
In-Reply-To: <20201001102010.36861-1-cristian.dumitrescu@intel.com>
References: <20200930063416.68428-2-cristian.dumitrescu@intel.com>
 <20201001102010.36861-1-cristian.dumitrescu@intel.com>
Subject: [dpdk-dev] [PATCH v7 40/42] examples/pipeline: add l2fwd with MAC
	swap example
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.15
Precedence: list
List-Id: DPDK patches and discussions <dev.dpdk.org>
List-Unsubscribe: <https://mails.dpdk.org/options/dev>,
 <mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://mails.dpdk.org/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <https://mails.dpdk.org/listinfo/dev>,
 <mailto:dev-request@dpdk.org?subject=subscribe>
Errors-To: dev-bounces@dpdk.org
Sender: "dev" <dev-bounces@dpdk.org>

Add L2 Forwarding example with MAC destination and source address swap
to the SWX pipeline application. Example command line:
./build/pipeline -l0-1 -- -s ./examples/l2fwd_macswp.cli

Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
---
 examples/pipeline/examples/l2fwd_macswp.cli   | 25 ++++++++
 examples/pipeline/examples/l2fwd_macswp.spec  | 59 +++++++++++++++++++
 .../pipeline/examples/l2fwd_macswp_pcap.cli   | 20 +++++++
 3 files changed, 104 insertions(+)
 create mode 100644 examples/pipeline/examples/l2fwd_macswp.cli
 create mode 100644 examples/pipeline/examples/l2fwd_macswp.spec
 create mode 100644 examples/pipeline/examples/l2fwd_macswp_pcap.cli

diff --git a/examples/pipeline/examples/l2fwd_macswp.cli b/examples/pipeline/examples/l2fwd_macswp.cli
new file mode 100644
index 000000000..0f2a89ac5
--- /dev/null
+++ b/examples/pipeline/examples/l2fwd_macswp.cli
@@ -0,0 +1,25 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+mempool MEMPOOL0 buffer 2304 pool 32K cache 256 cpu 0
+
+link LINK0 dev 0000:18:00.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+link LINK1 dev 0000:18:00.1 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+link LINK2 dev 0000:3b:00.0 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+link LINK3 dev 0000:3b:00.1 rxq 1 128 MEMPOOL0 txq 1 512 promiscuous on
+
+pipeline PIPELINE0 create 0
+
+pipeline PIPELINE0 port in 0 link LINK0 rxq 0 bsz 32
+pipeline PIPELINE0 port in 1 link LINK1 rxq 0 bsz 32
+pipeline PIPELINE0 port in 2 link LINK2 rxq 0 bsz 32
+pipeline PIPELINE0 port in 3 link LINK3 rxq 0 bsz 32
+
+pipeline PIPELINE0 port out 0 link LINK0 txq 0 bsz 32
+pipeline PIPELINE0 port out 1 link LINK1 txq 0 bsz 32
+pipeline PIPELINE0 port out 2 link LINK2 txq 0 bsz 32
+pipeline PIPELINE0 port out 3 link LINK3 txq 0 bsz 32
+
+pipeline PIPELINE0 build ./examples/pipeline/examples/l2fwd_macswp.spec
+
+thread 1 pipeline PIPELINE0 enable
diff --git a/examples/pipeline/examples/l2fwd_macswp.spec b/examples/pipeline/examples/l2fwd_macswp.spec
new file mode 100644
index 000000000..e81f20622
--- /dev/null
+++ b/examples/pipeline/examples/l2fwd_macswp.spec
@@ -0,0 +1,59 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+//
+// Packet headers.
+//
+struct ethernet_h {
+	bit<48> dst_addr
+	bit<48> src_addr
+	bit<16> ether_type
+}
+
+header ethernet instanceof ethernet_h
+
+//
+// Packet meta-data.
+//
+struct metadata_t {
+	bit<32> port
+	bit<48> addr
+}
+
+metadata instanceof metadata_t
+
+//
+// Actions.
+//
+action macswp args none {
+	mov m.addr h.ethernet.dst_addr
+	mov h.ethernet.dst_addr h.ethernet.src_addr
+	mov h.ethernet.src_addr m.addr
+	return
+}
+
+//
+// Tables.
+//
+table stub {
+	key {
+	}
+
+	actions {
+		macswp
+	}
+
+	default_action macswp args none const
+}
+
+//
+// Pipeline.
+//
+apply {
+	rx m.port
+	extract h.ethernet
+	table stub
+	xor m.port 1
+	emit h.ethernet
+	tx m.port
+}
diff --git a/examples/pipeline/examples/l2fwd_macswp_pcap.cli b/examples/pipeline/examples/l2fwd_macswp_pcap.cli
new file mode 100644
index 000000000..043379cdd
--- /dev/null
+++ b/examples/pipeline/examples/l2fwd_macswp_pcap.cli
@@ -0,0 +1,20 @@
+; SPDX-License-Identifier: BSD-3-Clause
+; Copyright(c) 2020 Intel Corporation
+
+mempool MEMPOOL0 buffer 2304 pool 32K cache 256 cpu 0
+
+pipeline PIPELINE0 create 0
+
+pipeline PIPELINE0 port in 0 source MEMPOOL0 ./examples/packet.pcap
+pipeline PIPELINE0 port in 1 source MEMPOOL0 ./examples/packet.pcap
+pipeline PIPELINE0 port in 2 source MEMPOOL0 ./examples/packet.pcap
+pipeline PIPELINE0 port in 3 source MEMPOOL0 ./examples/packet.pcap
+
+pipeline PIPELINE0 port out 0 sink none
+pipeline PIPELINE0 port out 1 sink none
+pipeline PIPELINE0 port out 2 sink none
+pipeline PIPELINE0 port out 3 sink none
+
+pipeline PIPELINE0 build ./examples/l2fwd_macswp.spec
+
+thread 1 pipeline PIPELINE0 enable
-- 
2.17.1