From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 76023A04BB; Tue, 6 Oct 2020 07:30:50 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 92A6B37B7; Tue, 6 Oct 2020 07:30:30 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 996412B82 for ; Tue, 6 Oct 2020 07:30:28 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 0965UQoI029434 for ; Mon, 5 Oct 2020 22:30:26 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=+ROMVs4xjSoR0CzHtEsE5A0blyOWMBey0v6v/I513jU=; b=Quj+nVPoN9+yZVo/6DXuE5W2cUTlnlAOwtay8N26dt7T6RAOfaeG7JA3vX7Z3ewR9w/q HDJMovJ1WrmMmaJWtu1T/gn0nlp8aFb0rNzbAR4aI/VbkZNTBibRFJD/4T2A5Gy2gfiV ZvYlflsKwyvXiRLtuXH8bzDEPvqyEux8bZFxogeO4cEUT79JW9JuXIlu7cujIiZ/b+7M +VgAA+UZ2OWVz8KzodEmyFN/n0Q7263fYX5+Dfv5L94Aaaj8rs8yTBJw2wz/soRhX5sW QphpVGuH0sP2LQbDPI9iEHyiy6w10OVTalae6+1jctjVEtNGFv1JIkDCWjE/L/orBea9 Aw== Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0a-0016f401.pphosted.com with ESMTP id 33xpnpqwd0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Mon, 05 Oct 2020 22:30:26 -0700 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 5 Oct 2020 22:30:25 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 5 Oct 2020 22:30:25 -0700 Received: from rchin-dellt430.marvell.com (rchin-dellt430.marvell.com [10.85.176.141]) by maili.marvell.com (Postfix) with ESMTP id 81E1C3F703F; Mon, 5 Oct 2020 22:30:25 -0700 (PDT) From: Radha Mohan Chintakuntla To: , CC: , Radha Mohan Chintakuntla , Satananda Burla Date: Mon, 5 Oct 2020 22:30:21 -0700 Message-ID: <20201006053021.134706-2-radhac@marvell.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20201006053021.134706-1-radhac@marvell.com> References: <20201006053021.134706-1-radhac@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-10-06_02:2020-10-05, 2020-10-06 signatures=0 Subject: [dpdk-dev] [PATCH RESEND 2/2] raw/octeontx2_dma: Add support in case of multiple DPI blocks X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This patch adds support for multiple DPI blocks by removing the fixed macro that was writing to same sysfs entry for different DPI blocks. Signed-off-by: Radha Mohan Chintakuntla Reviewed-by: Satananda Burla --- drivers/raw/octeontx2_dma/otx2_dpi_msg.c | 18 +++++++++--------- drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 4 ++-- drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h | 4 ++-- 3 files changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_msg.c b/drivers/raw/octeontx2_dma/otx2_dpi_msg.c index aa361cb8a..655de216a 100644 --- a/drivers/raw/octeontx2_dma/otx2_dpi_msg.c +++ b/drivers/raw/octeontx2_dma/otx2_dpi_msg.c @@ -39,14 +39,14 @@ union dpi_mbox_message_u { }; static inline int -send_msg_to_pf(const char *value, int size) +send_msg_to_pf(struct rte_pci_addr *pci, const char *value, int size) { char buff[255] = { 0 }; int res, fd; res = snprintf(buff, sizeof(buff), "%s/" PCI_PRI_FMT "/%s", - rte_pci_get_sysfs_path(), DPI_PF_DBDF_DOMAIN, - DPI_PF_DBDF_BUS, DPI_PF_DBDF_DEVICE & 0x7, + rte_pci_get_sysfs_path(), pci->domain, + pci->bus, DPI_PF_DBDF_DEVICE & 0x7, DPI_PF_DBDF_FUNCTION & 0x7, DPI_PF_MBOX_SYSFS_ENTRY); if ((res < 0) || ((size_t)res > sizeof(buff))) return -ERANGE; @@ -63,20 +63,20 @@ send_msg_to_pf(const char *value, int size) } int -otx2_dpi_queue_open(uint16_t vf_id, uint32_t size, uint32_t gaura) +otx2_dpi_queue_open(struct dpi_vf_s *dpivf, uint32_t size, uint32_t gaura) { union dpi_mbox_message_u mbox_msg; int ret = 0; /* DPI PF driver expects vfid starts from index 0 */ - mbox_msg.s.vfid = vf_id; + mbox_msg.s.vfid = dpivf->vf_id; mbox_msg.s.cmd = DPI_QUEUE_OPEN; mbox_msg.s.csize = size; mbox_msg.s.aura = gaura; mbox_msg.s.sso_pf_func = otx2_sso_pf_func_get(); mbox_msg.s.npa_pf_func = otx2_npa_pf_func_get(); - ret = send_msg_to_pf((const char *)&mbox_msg, + ret = send_msg_to_pf(&dpivf->dev->addr, (const char *)&mbox_msg, sizeof(mbox_msg)); if (ret < 0) otx2_dpi_dbg("Failed to send mbox message to dpi pf"); @@ -85,16 +85,16 @@ otx2_dpi_queue_open(uint16_t vf_id, uint32_t size, uint32_t gaura) } int -otx2_dpi_queue_close(uint16_t vf_id) +otx2_dpi_queue_close(struct dpi_vf_s *dpivf) { union dpi_mbox_message_u mbox_msg; int ret = 0; /* DPI PF driver expects vfid starts from index 0 */ - mbox_msg.s.vfid = vf_id; + mbox_msg.s.vfid = dpivf->vf_id; mbox_msg.s.cmd = DPI_QUEUE_CLOSE; - ret = send_msg_to_pf((const char *)&mbox_msg, + ret = send_msg_to_pf(&dpivf->dev->addr, (const char *)&mbox_msg, sizeof(mbox_msg)); if (ret < 0) otx2_dpi_dbg("Failed to send mbox message to dpi pf"); diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c index a1b94ce1d..efdba2779 100644 --- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c +++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c @@ -60,7 +60,7 @@ dma_queue_finish(struct dpi_vf_s *dpivf) reg = otx2_read64(dpivf->vf_bar0 + DPI_VDMA_SADDR); } - if (otx2_dpi_queue_close(dpivf->vf_id) < 0) + if (otx2_dpi_queue_close(dpivf) < 0) return -EACCES; rte_mempool_put(dpivf->chunk_pool, dpivf->base_ptr); @@ -323,7 +323,7 @@ otx2_dpi_rawdev_configure(const struct rte_rawdev *dev, rte_rawdev_obj_t config, otx2_write64(0, dpivf->vf_bar0 + DPI_VDMA_REQQ_CTL); otx2_write64(((uint64_t)buf >> 7) << 7, dpivf->vf_bar0 + DPI_VDMA_SADDR); - if (otx2_dpi_queue_open(dpivf->vf_id, DPI_CHUNK_SIZE, gaura) < 0) { + if (otx2_dpi_queue_open(dpivf, DPI_CHUNK_SIZE, gaura) < 0) { otx2_err("Unable to open DPI VF %d", dpivf->vf_id); rte_mempool_put(conf->chunk_pool, buf); return -EACCES; diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h index 81740e84b..2bc9e3da3 100644 --- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h +++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h @@ -190,8 +190,8 @@ union dpi_dma_instr_hdr_u { } s; }; -int otx2_dpi_queue_open(uint16_t vf_id, uint32_t size, uint32_t gaura); -int otx2_dpi_queue_close(uint16_t vf_id); +int otx2_dpi_queue_open(struct dpi_vf_s *dpivf, uint32_t size, uint32_t gaura); +int otx2_dpi_queue_close(struct dpi_vf_s *dpivf); int test_otx2_dma_rawdev(uint16_t val); #endif /* _DPI_RAWDEV_H_ */ -- 2.24.1