From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 61853A04B7; Tue, 13 Oct 2020 13:05:16 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id F01481DA8B; Tue, 13 Oct 2020 13:04:52 +0200 (CEST) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id C89471DA76 for ; Tue, 13 Oct 2020 13:04:49 +0200 (CEST) IronPort-SDR: qoiLPg8fiHrjwUABqSo35T+mPIYSIa4R5X/s8hfgsR4IWlPpwhCSj0Rfw6rvoAIzrtBrWQEDJh OwCldaqES3AA== X-IronPort-AV: E=McAfee;i="6000,8403,9772"; a="250584535" X-IronPort-AV: E=Sophos;i="5.77,370,1596524400"; d="scan'208";a="250584535" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Oct 2020 04:04:44 -0700 IronPort-SDR: MgPrFiL+xIhZ5nMsWTQ0D73vndJbZvgOnowl/Ild3USxo+dv9MnWaioJCQ+Pv4xAoyJG8h6Xiy RXyNgYU86v5g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,370,1596524400"; d="scan'208";a="299525036" Received: from silpixa00400355.ir.intel.com (HELO silpixa00400355.ger.corp.intel.com) ([10.237.222.239]) by fmsmga007.fm.intel.com with ESMTP; 13 Oct 2020 04:04:40 -0700 From: Ciara Power To: dev@dpdk.org Cc: viktorin@rehivetech.com, ruifeng.wang@arm.com, jerinj@marvell.com, drc@linux.vnet.ibm.com, bruce.richardson@intel.com, konstantin.ananyev@intel.com, Ciara Power Date: Tue, 13 Oct 2020 12:04:20 +0100 Message-Id: <20201013110437.309110-1-ciara.power@intel.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20200807155859.63888-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v5 00/17] add max SIMD bitwidth to EAL X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" A number of components in DPDK have optional AVX-512 or other vector code paths which can be selected at runtime. Rather than having each component provide its own mechanism to select a code path, this patchset adds support for a single setting to control what code paths are used. This can be used to enable some non-default code paths e.g. ones using AVX-512, but also to limit the code paths to certain vector widths, or to scalar code only, which is useful for testing. The max SIMD bitwidth setting can be set by the app itself through use of the available API, or can be overriden by a commandline argument passed by the user. v5: Fixed cc list. v4: - Dropped LPM patch as the lookupx4 function is called from SSE/NEON headers, so is already on a vectorised path. Given the performance impact for an unnecessary change, it was decided the check is not needed. - Renamed enum values for readability. - Added patch to add check for node library. - Reworked net patch to choose default handlers rather than scalar by default. - Updated some Doxygen comments. - Fixed some other small comments on v3. v3: - Added patch to add check for LPM lib - Modified default max bitwidth for Arm to disable max SIMD bitwidth, which will allow for SVE. - Added "0" as an acceptable value for command-line flag, which internally is used as UINT16_MAX to essentially disable max SIMD bitwidth limits. - Made suggested changes to net lib patch. - Rebased onto main. v2: - Added some documentation. - Modified default max bitwidth for Arm. - Moved mlx5 condition check into existing check vec support function. - Added max SIMD bitwidth checks to some libraries. Ciara Power (17): eal: add max SIMD bitwidth doc: add detail on using max SIMD bitwidth net/i40e: add checks for max SIMD bitwidth net/axgbe: add checks for max SIMD bitwidth net/bnxt: add checks for max SIMD bitwidth net/enic: add checks for max SIMD bitwidth net/fm10k: add checks for max SIMD bitwidth net/iavf: add checks for max SIMD bitwidth net/ice: add checks for max SIMD bitwidth net/ixgbe: add checks for max SIMD bitwidth net/mlx5: add checks for max SIMD bitwidth net/virtio: add checks for max SIMD bitwidth distributor: add checks for max SIMD bitwidth member: add checks for max SIMD bitwidth efd: add checks for max SIMD bitwidth net: add checks for max SIMD bitwidth node: choose vector path at runtime doc/guides/howto/avx512.rst | 36 +++++++++ doc/guides/howto/index.rst | 1 + doc/guides/linux_gsg/eal_args.include.rst | 16 ++++ .../prog_guide/env_abstraction_layer.rst | 32 ++++++++ drivers/net/axgbe/axgbe_rxtx.c | 3 +- drivers/net/bnxt/bnxt_ethdev.c | 6 +- drivers/net/enic/enic_rxtx_vec_avx2.c | 3 +- drivers/net/fm10k/fm10k_ethdev.c | 11 ++- drivers/net/i40e/i40e_rxtx.c | 18 +++-- drivers/net/iavf/iavf_rxtx.c | 16 ++-- drivers/net/ice/ice_rxtx.c | 20 +++-- drivers/net/ixgbe/ixgbe_rxtx.c | 5 +- drivers/net/mlx5/mlx5_rxtx_vec.c | 2 + drivers/net/virtio/virtio_ethdev.c | 9 ++- lib/librte_distributor/rte_distributor.c | 3 +- lib/librte_eal/arm/include/rte_vect.h | 2 + lib/librte_eal/common/eal_common_options.c | 66 ++++++++++++++++ lib/librte_eal/common/eal_internal_cfg.h | 8 ++ lib/librte_eal/common/eal_options.h | 2 + lib/librte_eal/include/rte_eal.h | 40 ++++++++++ lib/librte_eal/ppc/include/rte_vect.h | 2 + lib/librte_eal/rte_eal_exports.def | 2 + lib/librte_eal/rte_eal_version.map | 2 + lib/librte_eal/x86/include/rte_vect.h | 2 + lib/librte_efd/rte_efd.c | 7 +- lib/librte_member/rte_member_ht.c | 3 +- lib/librte_net/rte_net_crc.c | 75 ++++++++++++++++--- lib/librte_net/rte_net_crc.h | 8 ++ lib/librte_node/ip4_lookup.c | 13 +++- lib/librte_node/ip4_lookup_neon.h | 2 +- lib/librte_node/ip4_lookup_sse.h | 2 +- 31 files changed, 371 insertions(+), 46 deletions(-) create mode 100644 doc/guides/howto/avx512.rst -- 2.22.0