From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A3F9EA04B7; Tue, 13 Oct 2020 13:09:12 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id D77361DB09; Tue, 13 Oct 2020 13:05:19 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id 0F1C81DB09 for ; Tue, 13 Oct 2020 13:05:16 +0200 (CEST) IronPort-SDR: Bmux/V5MOZ72rh44W+Ctk4GGJT32llQC/i7XDMbXSnYtPE+OHqA4ckDAcxwZ040u9EDxX/vt+h FGCyQNZRwmzA== X-IronPort-AV: E=McAfee;i="6000,8403,9772"; a="153720470" X-IronPort-AV: E=Sophos;i="5.77,370,1596524400"; d="scan'208";a="153720470" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Oct 2020 04:05:16 -0700 IronPort-SDR: jhQq5pAa5N91gkp6ZVDR7jxPCsQBpEa+oqf98folKqFGeAHT9na/mtwNZU+MVhu7db4ZcJv9hh mCFeWfz4pYrw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,370,1596524400"; d="scan'208";a="299525175" Received: from silpixa00400355.ir.intel.com (HELO silpixa00400355.ger.corp.intel.com) ([10.237.222.239]) by fmsmga007.fm.intel.com with ESMTP; 13 Oct 2020 04:05:13 -0700 From: Ciara Power To: dev@dpdk.org Cc: viktorin@rehivetech.com, ruifeng.wang@arm.com, jerinj@marvell.com, drc@linux.vnet.ibm.com, bruce.richardson@intel.com, konstantin.ananyev@intel.com, Ciara Power , Maxime Coquelin , Chenbo Xia , Zhihong Wang Date: Tue, 13 Oct 2020 12:04:32 +0100 Message-Id: <20201013110437.309110-13-ciara.power@intel.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20201013110437.309110-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20201013110437.309110-1-ciara.power@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v5 12/17] net/virtio: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: Maxime Coquelin Cc: Chenbo Xia Cc: Zhihong Wang Signed-off-by: Ciara Power --- v4: Updated enum name. v3: Moved max SIMD bitwidth check to configure function with other vec support checks. --- drivers/net/virtio/virtio_ethdev.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/net/virtio/virtio_ethdev.c b/drivers/net/virtio/virtio_ethdev.c index 0236c756dc..70955e5cc0 100644 --- a/drivers/net/virtio/virtio_ethdev.c +++ b/drivers/net/virtio/virtio_ethdev.c @@ -2313,7 +2313,8 @@ virtio_dev_configure(struct rte_eth_dev *dev) if ((hw->use_vec_rx || hw->use_vec_tx) && (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) || !vtpci_with_feature(hw, VIRTIO_F_IN_ORDER) || - !vtpci_with_feature(hw, VIRTIO_F_VERSION_1))) { + !vtpci_with_feature(hw, VIRTIO_F_VERSION_1) || + rte_get_max_simd_bitwidth() < RTE_SIMD_512)) { PMD_DRV_LOG(INFO, "disabled packed ring vectorized path for requirements not met"); hw->use_vec_rx = 0; @@ -2366,6 +2367,12 @@ virtio_dev_configure(struct rte_eth_dev *dev) "disabled split ring vectorized rx for offloading enabled"); hw->use_vec_rx = 0; } + + if (rte_get_max_simd_bitwidth() < RTE_SIMD_128) { + PMD_DRV_LOG(INFO, + "disabled split ring vectorized rx, max SIMD bitwidth too low"); + hw->use_vec_rx = 0; + } } } -- 2.22.0