From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0C9BBA04DB; Fri, 16 Oct 2020 10:18:14 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id BF4881EB91; Fri, 16 Oct 2020 10:14:07 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id 17CE11EB76 for ; Fri, 16 Oct 2020 10:14:04 +0200 (CEST) IronPort-SDR: h0pYoBnCcZXUePlhUFQaT14jqHPR1CZ6alY8arm/bXeigHt47Ky2goGLak8azqTZtSxXt1hjPL 65R19D2qH/+Q== X-IronPort-AV: E=McAfee;i="6000,8403,9775"; a="163937684" X-IronPort-AV: E=Sophos;i="5.77,382,1596524400"; d="scan'208";a="163937684" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Oct 2020 01:14:04 -0700 IronPort-SDR: IduFpk001Z3A4cGClGpWo1dGyT5FG5d6DlTml0y1feKB87i8CbSwOdRGTzhQntOQJm0BZi71Of igpZJnOrs+yw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,382,1596524400"; d="scan'208";a="521097012" Received: from silpixa00400355.ir.intel.com (HELO silpixa00400355.ger.corp.intel.com) ([10.237.222.239]) by fmsmga006.fm.intel.com with ESMTP; 16 Oct 2020 01:14:02 -0700 From: Ciara Power To: dev@dpdk.org Cc: viktorin@rehivetech.com, ruifeng.wang@arm.com, jerinj@marvell.com, drc@linux.vnet.ibm.com, bruce.richardson@intel.com, konstantin.ananyev@intel.com, david.marchand@redhat.com, Ciara Power , Yipeng Wang , Sameh Gobriel Date: Fri, 16 Oct 2020 09:13:16 +0100 Message-Id: <20201016081320.186775-15-ciara.power@intel.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20201016081320.186775-1-ciara.power@intel.com> References: <20200807155859.63888-1-ciara.power@intel.com> <20201016081320.186775-1-ciara.power@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v8 14/18] member: add checks for max SIMD bitwidth X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Cc: Yipeng Wang Cc: Sameh Gobriel Signed-off-by: Ciara Power Acked-by: Yipeng Wang --- v4: Updated enum name. --- lib/librte_member/rte_member_ht.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/librte_member/rte_member_ht.c b/lib/librte_member/rte_member_ht.c index 3ea293a094..98c8aac248 100644 --- a/lib/librte_member/rte_member_ht.c +++ b/lib/librte_member/rte_member_ht.c @@ -113,7 +113,8 @@ rte_member_create_ht(struct rte_member_setsum *ss, } #if defined(RTE_ARCH_X86) if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2) && - RTE_MEMBER_BUCKET_ENTRIES == 16) + RTE_MEMBER_BUCKET_ENTRIES == 16 && + rte_get_max_simd_bitwidth() >= RTE_SIMD_256) ss->sig_cmp_fn = RTE_MEMBER_COMPARE_AVX2; else #endif -- 2.22.0