From: Ajit Khaparde <ajit.khaparde@broadcom.com>
To: dev@dpdk.org
Cc: Peter Spreadborough <peter.spreadborough@broadcom.com>,
Jay Ding <jay.ding@broadcom.com>,
Farah Smith <farah.smith@broadcom.com>
Subject: [dpdk-dev] [PATCH v2 01/11] net/bnxt: add stingray support to core layer
Date: Tue, 20 Oct 2020 14:55:28 -0700
Message-ID: <20201020215538.59242-2-ajit.khaparde@broadcom.com> (raw)
In-Reply-To: <20201020215538.59242-1-ajit.khaparde@broadcom.com>
From: Peter Spreadborough <peter.spreadborough@broadcom.com>
- Moved P4 specific code under the P4 directory
- Added P45 skeleton code for SR to build on
- Add SR support in truflow core layer
Signed-off-by: Peter Spreadborough <peter.spreadborough@broadcom.com>
Signed-off-by: Jay Ding <jay.ding@broadcom.com>
Reviewed-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
---
drivers/net/bnxt/hcapi/hcapi_cfa.h | 39 +++++--
drivers/net/bnxt/tf_core/cfa_resource_types.h | 95 ++++++----------
drivers/net/bnxt/tf_core/tf_core.c | 3 +-
drivers/net/bnxt/tf_core/tf_core.h | 2 +-
drivers/net/bnxt/tf_core/tf_device.c | 9 +-
drivers/net/bnxt/tf_core/tf_device_p4.c | 25 ++++-
drivers/net/bnxt/tf_core/tf_device_p4.h | 6 +
drivers/net/bnxt/tf_core/tf_device_p45.h | 105 ++++++++++++++++++
drivers/net/bnxt/tf_core/tf_em.h | 6 -
9 files changed, 207 insertions(+), 83 deletions(-)
create mode 100644 drivers/net/bnxt/tf_core/tf_device_p45.h
diff --git a/drivers/net/bnxt/hcapi/hcapi_cfa.h b/drivers/net/bnxt/hcapi/hcapi_cfa.h
index c7d87dec7..aa218d714 100644
--- a/drivers/net/bnxt/hcapi/hcapi_cfa.h
+++ b/drivers/net/bnxt/hcapi/hcapi_cfa.h
@@ -14,7 +14,15 @@
#include "hcapi_cfa_defs.h"
+#if CHIP_CFG == SR_A
+#define SUPPORT_CFA_HW_P45 1
+#undef SUPPORT_CFA_HW_P4
+#define SUPPORT_CFA_HW_P4 0
+#elif CHIP_CFG == CMB_A
#define SUPPORT_CFA_HW_P4 1
+#else
+#error "Chip not supported"
+#endif
#if SUPPORT_CFA_HW_P4 && SUPPORT_CFA_HW_P58 && SUPPORT_CFA_HW_P59
#define SUPPORT_CFA_HW_ALL 1
@@ -81,17 +89,20 @@ struct hcapi_cfa_key_result {
/* common CFA register access macros */
#define CFA_REG(x) OFFSETOF(cfa_reg_t, cfa_##x)
-#ifndef REG_WR
-#define REG_WR(_p, x, y) (*((uint32_t volatile *)(x)) = (y))
+#ifndef TF_REG_WR
+#define TF_REG_WR(_p, x, y) (*((uint32_t volatile *)(x)) = (y))
#endif
-#ifndef REG_RD
-#define REG_RD(_p, x) (*((uint32_t volatile *)(x)))
+#ifndef TF_REG_RD
+#define TF_REG_RD(_p, x) (*((uint32_t volatile *)(x)))
+#endif
+#ifndef TF_CFA_REG_RD
+#define TF_CFA_REG_RD(_p, x) \
+ TF_REG_RD(0, (uint32_t)(_p)->base_addr + CFA_REG(x))
+#endif
+#ifndef TF_CFA_REG_WR
+#define TF_CFA_REG_WR(_p, x, y) \
+ TF_REG_WR(0, (uint32_t)(_p)->base_addr + CFA_REG(x), y)
#endif
-#define CFA_REG_RD(_p, x) \
- REG_RD(0, (uint32_t)(_p)->base_addr + CFA_REG(x))
-#define CFA_REG_WR(_p, x, y) \
- REG_WR(0, (uint32_t)(_p)->base_addr + CFA_REG(x), y)
-
/* Constants used by Resource Manager Registration*/
#define RM_CLIENT_NAME_MAX_LEN 32
@@ -248,7 +259,15 @@ int hcapi_cfa_p4_mirror_hwop(struct hcapi_cfa_hwop *op,
int hcapi_cfa_p4_global_cfg_hwop(struct hcapi_cfa_hwop *op,
uint32_t type,
struct hcapi_cfa_data *config);
-#endif /* SUPPORT_CFA_HW_P4 */
+/* SUPPORT_CFA_HW_P4 */
+#elif SUPPORT_CFA_HW_P45
+int hcapi_cfa_p45_mirror_hwop(struct hcapi_cfa_hwop *op,
+ struct hcapi_cfa_data *mirror);
+int hcapi_cfa_p45_global_cfg_hwop(struct hcapi_cfa_hwop *op,
+ uint32_t type,
+ struct hcapi_cfa_data *config);
+/* SUPPORT_CFA_HW_P45 */
+#endif
/**
* HCAPI CFA device HW operation function callback definition
* This is standardized function callback hook to install different
diff --git a/drivers/net/bnxt/tf_core/cfa_resource_types.h b/drivers/net/bnxt/tf_core/cfa_resource_types.h
index 19838c393..a62063b0e 100644
--- a/drivers/net/bnxt/tf_core/cfa_resource_types.h
+++ b/drivers/net/bnxt/tf_core/cfa_resource_types.h
@@ -1,6 +1,13 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2019-2020 Broadcom
- * All rights reserved.
+/*
+ * Copyright(c) 2001-2020, Broadcom. All rights reserved. The
+ * term Broadcom refers to Broadcom Inc. and/or its subsidiaries.
+ * Proprietary and Confidential Information.
+ *
+ * This source file is the property of Broadcom Corporation, and
+ * may not be copied or distributed in any isomorphic form without
+ * the prior written consent of Broadcom Corporation.
+ *
+ * DO NOT MODIFY!!! This file is automatically generated.
*/
#ifndef _CFA_RESOURCE_TYPES_H_
@@ -64,79 +71,47 @@
#define CFA_RESOURCE_TYPE_P59_LAST CFA_RESOURCE_TYPE_P59_VEB_TCAM
-/* Multicast Group */
-#define CFA_RESOURCE_TYPE_P58_MCG 0x0UL
-/* Encap 8 byte record */
-#define CFA_RESOURCE_TYPE_P58_ENCAP_8B 0x1UL
-/* Encap 16 byte record */
-#define CFA_RESOURCE_TYPE_P58_ENCAP_16B 0x2UL
-/* Encap 64 byte record */
-#define CFA_RESOURCE_TYPE_P58_ENCAP_64B 0x3UL
-/* Source Property MAC */
-#define CFA_RESOURCE_TYPE_P58_SP_MAC 0x4UL
-/* Source Property MAC and IPv4 */
-#define CFA_RESOURCE_TYPE_P58_SP_MAC_IPV4 0x5UL
-/* Source Property MAC and IPv6 */
-#define CFA_RESOURCE_TYPE_P58_SP_MAC_IPV6 0x6UL
-/* Network Address Translation Port */
-#define CFA_RESOURCE_TYPE_P58_NAT_PORT 0x7UL
-/* Network Address Translation IPv4 address */
-#define CFA_RESOURCE_TYPE_P58_NAT_IPV4 0x8UL
/* Meter */
-#define CFA_RESOURCE_TYPE_P58_METER 0x9UL
-/* Flow State */
-#define CFA_RESOURCE_TYPE_P58_FLOW_STATE 0xaUL
-/* Full Action Records */
-#define CFA_RESOURCE_TYPE_P58_FULL_ACTION 0xbUL
-/* Action Record Format 0 */
-#define CFA_RESOURCE_TYPE_P58_FORMAT_0_ACTION 0xcUL
-/* Action Record Ext Format 0 */
-#define CFA_RESOURCE_TYPE_P58_EXT_FORMAT_0_ACTION 0xdUL
-/* Action Record Format 1 */
-#define CFA_RESOURCE_TYPE_P58_FORMAT_1_ACTION 0xeUL
-/* Action Record Format 2 */
-#define CFA_RESOURCE_TYPE_P58_FORMAT_2_ACTION 0xfUL
-/* Action Record Format 3 */
-#define CFA_RESOURCE_TYPE_P58_FORMAT_3_ACTION 0x10UL
-/* Action Record Format 4 */
-#define CFA_RESOURCE_TYPE_P58_FORMAT_4_ACTION 0x11UL
-/* Action Record Format 5 */
-#define CFA_RESOURCE_TYPE_P58_FORMAT_5_ACTION 0x12UL
-/* Action Record Format 6 */
-#define CFA_RESOURCE_TYPE_P58_FORMAT_6_ACTION 0x13UL
+#define CFA_RESOURCE_TYPE_P58_METER 0x0UL
+/* SRAM_Bank_0 */
+#define CFA_RESOURCE_TYPE_P58_SRAM_BANK_0 0x1UL
+/* SRAM_Bank_1 */
+#define CFA_RESOURCE_TYPE_P58_SRAM_BANK_1 0x2UL
+/* SRAM_Bank_2 */
+#define CFA_RESOURCE_TYPE_P58_SRAM_BANK_2 0x3UL
+/* SRAM_Bank_3 */
+#define CFA_RESOURCE_TYPE_P58_SRAM_BANK_3 0x4UL
/* L2 Context TCAM High priority entries */
-#define CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_HIGH 0x14UL
+#define CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_HIGH 0x5UL
/* L2 Context TCAM Low priority entries */
-#define CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_LOW 0x15UL
+#define CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM_LOW 0x6UL
/* L2 Context REMAP high priority entries */
-#define CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_HIGH 0x16UL
+#define CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_HIGH 0x7UL
/* L2 Context REMAP Low priority entries */
-#define CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_LOW 0x17UL
+#define CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP_LOW 0x8UL
/* Profile Func */
-#define CFA_RESOURCE_TYPE_P58_PROF_FUNC 0x18UL
+#define CFA_RESOURCE_TYPE_P58_PROF_FUNC 0x9UL
/* Profile TCAM */
-#define CFA_RESOURCE_TYPE_P58_PROF_TCAM 0x19UL
+#define CFA_RESOURCE_TYPE_P58_PROF_TCAM 0xaUL
/* Exact Match Profile Id */
-#define CFA_RESOURCE_TYPE_P58_EM_PROF_ID 0x1aUL
+#define CFA_RESOURCE_TYPE_P58_EM_PROF_ID 0xbUL
/* Wildcard Profile Id */
-#define CFA_RESOURCE_TYPE_P58_WC_TCAM_PROF_ID 0x1bUL
+#define CFA_RESOURCE_TYPE_P58_WC_TCAM_PROF_ID 0xcUL
/* Exact Match Record */
-#define CFA_RESOURCE_TYPE_P58_EM_REC 0x1cUL
+#define CFA_RESOURCE_TYPE_P58_EM_REC 0xdUL
/* Wildcard TCAM */
-#define CFA_RESOURCE_TYPE_P58_WC_TCAM 0x1dUL
+#define CFA_RESOURCE_TYPE_P58_WC_TCAM 0xeUL
/* Meter profile */
-#define CFA_RESOURCE_TYPE_P58_METER_PROF 0x1eUL
+#define CFA_RESOURCE_TYPE_P58_METER_PROF 0xfUL
/* Meter */
-#define CFA_RESOURCE_TYPE_P58_MIRROR 0x1fUL
-/* Source Property TCAM */
-#define CFA_RESOURCE_TYPE_P58_SP_TCAM 0x20UL
+#define CFA_RESOURCE_TYPE_P58_MIRROR 0x10UL
/* Exact Match Flexible Key Builder */
-#define CFA_RESOURCE_TYPE_P58_EM_FKB 0x21UL
+#define CFA_RESOURCE_TYPE_P58_EM_FKB 0x11UL
/* Wildcard Flexible Key Builder */
-#define CFA_RESOURCE_TYPE_P58_WC_FKB 0x22UL
+#define CFA_RESOURCE_TYPE_P58_WC_FKB 0x12UL
/* VEB TCAM */
-#define CFA_RESOURCE_TYPE_P58_VEB_TCAM 0x23UL
-#define CFA_RESOURCE_TYPE_P58_LAST CFA_RESOURCE_TYPE_P58_VEB_TCAM
+#define CFA_RESOURCE_TYPE_P58_VEB_TCAM 0x13UL
+#define CFA_RESOURCE_TYPE_P58_LAST CFA_RESOURCE_TYPE_P58_VEB_TCAM
/* Multicast Group */
diff --git a/drivers/net/bnxt/tf_core/tf_core.c b/drivers/net/bnxt/tf_core/tf_core.c
index 0dbde1de2..788335b81 100644
--- a/drivers/net/bnxt/tf_core/tf_core.c
+++ b/drivers/net/bnxt/tf_core/tf_core.c
@@ -34,7 +34,8 @@ tf_open_session(struct tf *tfp,
* side. It is assumed that the Firmware will be supported if
* firmware open session succeeds.
*/
- if (parms->device_type != TF_DEVICE_TYPE_WH) {
+ if (parms->device_type != TF_DEVICE_TYPE_WH &&
+ parms->device_type != TF_DEVICE_TYPE_SR) {
TFP_DRV_LOG(ERR,
"Unsupported device type %d\n",
parms->device_type);
diff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h
index db1093515..65be8f54a 100644
--- a/drivers/net/bnxt/tf_core/tf_core.h
+++ b/drivers/net/bnxt/tf_core/tf_core.h
@@ -10,7 +10,7 @@
#include <stdlib.h>
#include <stdbool.h>
#include <stdio.h>
-#include "hcapi/hcapi_cfa.h"
+#include "hcapi/hcapi_cfa_defs.h"
#include "tf_project.h"
/**
diff --git a/drivers/net/bnxt/tf_core/tf_device.c b/drivers/net/bnxt/tf_core/tf_device.c
index 112944095..838982801 100644
--- a/drivers/net/bnxt/tf_core/tf_device.c
+++ b/drivers/net/bnxt/tf_core/tf_device.c
@@ -47,7 +47,6 @@ tf_dev_bind_p4(struct tf *tfp,
struct tf_if_tbl_cfg_parms if_tbl_cfg;
struct tf_global_cfg_cfg_parms global_cfg;
- dev_handle->type = TF_DEVICE_TYPE_WH;
/* Initial function initialization */
dev_handle->ops = &tf_dev_ops_p4_init;
@@ -90,7 +89,10 @@ tf_dev_bind_p4(struct tf *tfp,
* EEM
*/
em_cfg.num_elements = TF_EM_TBL_TYPE_MAX;
- em_cfg.cfg = tf_em_ext_p4;
+ if (dev_handle->type == TF_DEVICE_TYPE_WH)
+ em_cfg.cfg = tf_em_ext_p4;
+ else
+ em_cfg.cfg = tf_em_ext_p45;
em_cfg.resources = resources;
em_cfg.mem_type = TF_EEM_MEM_TYPE_HOST;
rc = tf_em_ext_common_bind(tfp, &em_cfg);
@@ -241,6 +243,8 @@ tf_dev_bind(struct tf *tfp __rte_unused,
{
switch (type) {
case TF_DEVICE_TYPE_WH:
+ case TF_DEVICE_TYPE_SR:
+ dev_handle->type = type;
return tf_dev_bind_p4(tfp,
shadow_copy,
resources,
@@ -258,6 +262,7 @@ tf_dev_unbind(struct tf *tfp,
{
switch (dev_handle->type) {
case TF_DEVICE_TYPE_WH:
+ case TF_DEVICE_TYPE_SR:
return tf_dev_unbind_p4(tfp);
default:
TFP_DRV_LOG(ERR,
diff --git a/drivers/net/bnxt/tf_core/tf_device_p4.c b/drivers/net/bnxt/tf_core/tf_device_p4.c
index fe8dec3af..0344565d7 100644
--- a/drivers/net/bnxt/tf_core/tf_device_p4.c
+++ b/drivers/net/bnxt/tf_core/tf_device_p4.c
@@ -28,13 +28,32 @@
* - (-EINVAL) on failure.
*/
static int
-tf_dev_p4_get_max_types(struct tf *tfp __rte_unused,
+tf_dev_p4_get_max_types(struct tf *tfp,
uint16_t *max_types)
{
- if (max_types == NULL)
+ struct tf_session *tfs;
+ struct tf_dev_info *dev;
+ int rc;
+
+ if (max_types == NULL || tfp == NULL)
return -EINVAL;
- *max_types = CFA_RESOURCE_TYPE_P4_LAST + 1;
+ /* Retrieve the session information */
+ rc = tf_session_get_session(tfp, &tfs);
+ if (rc)
+ return rc;
+
+ /* Retrieve the device information */
+ rc = tf_session_get_device(tfs, &dev);
+ if (rc)
+ return rc;
+
+ if (dev->type == TF_DEVICE_TYPE_WH)
+ *max_types = CFA_RESOURCE_TYPE_P4_LAST + 1;
+ else if (dev->type == TF_DEVICE_TYPE_SR)
+ *max_types = CFA_RESOURCE_TYPE_P45_LAST + 1;
+ else
+ return -ENODEV;
return 0;
}
diff --git a/drivers/net/bnxt/tf_core/tf_device_p4.h b/drivers/net/bnxt/tf_core/tf_device_p4.h
index 7e58469a0..aba28fe5f 100644
--- a/drivers/net/bnxt/tf_core/tf_device_p4.h
+++ b/drivers/net/bnxt/tf_core/tf_device_p4.h
@@ -83,6 +83,12 @@ struct tf_rm_element_cfg tf_em_ext_p4[TF_EM_TBL_TYPE_MAX] = {
{ TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P4_TBL_SCOPE },
};
+struct tf_rm_element_cfg tf_em_ext_p45[TF_EM_TBL_TYPE_MAX] = {
+ /* CFA_RESOURCE_TYPE_P4_EM_REC */
+ { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_TBL_SCOPE },
+};
+
struct tf_rm_element_cfg tf_em_int_p4[TF_EM_TBL_TYPE_MAX] = {
{ TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P4_EM_REC },
/* CFA_RESOURCE_TYPE_P4_TBL_SCOPE */
diff --git a/drivers/net/bnxt/tf_core/tf_device_p45.h b/drivers/net/bnxt/tf_core/tf_device_p45.h
new file mode 100644
index 000000000..016d6e254
--- /dev/null
+++ b/drivers/net/bnxt/tf_core/tf_device_p45.h
@@ -0,0 +1,105 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright(c) 2019-2020 Broadcom
+ * All rights reserved.
+ */
+
+#ifndef _TF_DEVICE_P45_H_
+#define _TF_DEVICE_P45_H_
+
+#include <cfa_resource_types.h>
+
+#include "tf_core.h"
+#include "tf_rm.h"
+#include "tf_if_tbl.h"
+#include "tf_global_cfg.h"
+
+struct tf_rm_element_cfg tf_ident_p4[TF_IDENT_TYPE_MAX] = {
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_L2_CTXT_REMAP_HIGH },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_L2_CTXT_REMAP_LOW },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_PROF_FUNC },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_WC_TCAM_PROF_ID },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_EM_PROF_ID },
+ /* CFA_RESOURCE_TYPE_P45_L2_FUNC */
+ { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }
+};
+
+struct tf_rm_element_cfg tf_tcam_p4[TF_TCAM_TBL_TYPE_MAX] = {
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_L2_CTXT_TCAM_HIGH },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_L2_CTXT_TCAM_LOW },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_PROF_TCAM },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_WC_TCAM },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_SP_TCAM },
+ /* CFA_RESOURCE_TYPE_P45_CT_RULE_TCAM */
+ { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
+ /* CFA_RESOURCE_TYPE_P45_VEB_TCAM */
+ { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }
+};
+
+struct tf_rm_element_cfg tf_tbl_p4[TF_TBL_TYPE_MAX] = {
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_FULL_ACTION },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_MCG },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_ENCAP_8B },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_ENCAP_16B },
+ /* CFA_RESOURCE_TYPE_P45_ENCAP_32B */
+ { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_ENCAP_64B },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_SP_MAC },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_SP_MAC_IPV4 },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_SP_MAC_IPV6 },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_COUNTER_64B },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_NAT_PORT },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_NAT_PORT },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_NAT_IPV4 },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_METER_PROF },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_METER },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_MIRROR },
+ /* CFA_RESOURCE_TYPE_P45_UPAR */
+ { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
+ /* CFA_RESOURCE_TYPE_P45_EPOC */
+ { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
+ /* CFA_RESOURCE_TYPE_P45_METADATA */
+ { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
+ /* CFA_RESOURCE_TYPE_P45_CT_STATE */
+ { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
+ /* CFA_RESOURCE_TYPE_P45_RANGE_PROF */
+ { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
+ /* CFA_RESOURCE_TYPE_P45_RANGE_ENTRY */
+ { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
+ /* CFA_RESOURCE_TYPE_P45_LAG */
+ { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
+ /* CFA_RESOURCE_TYPE_P45_VNIC_SVIF */
+ { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
+ /* CFA_RESOURCE_TYPE_P45_EM_FBK */
+ { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
+ /* CFA_RESOURCE_TYPE_P45_WC_FKB */
+ { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
+ /* CFA_RESOURCE_TYPE_P45_EXT */
+ { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID }
+};
+
+struct tf_rm_element_cfg tf_em_ext_p4[TF_EM_TBL_TYPE_MAX] = {
+ /* CFA_RESOURCE_TYPE_P45_EM_REC */
+ { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
+ { TF_RM_ELEM_CFG_HCAPI_BA, CFA_RESOURCE_TYPE_P45_TBL_SCOPE },
+};
+
+struct tf_rm_element_cfg tf_em_int_p4[TF_EM_TBL_TYPE_MAX] = {
+ { TF_RM_ELEM_CFG_HCAPI, CFA_RESOURCE_TYPE_P45_EM_REC },
+ /* CFA_RESOURCE_TYPE_P45_TBL_SCOPE */
+ { TF_RM_ELEM_CFG_NULL, CFA_RESOURCE_TYPE_INVALID },
+};
+
+struct tf_if_tbl_cfg tf_if_tbl_p4[TF_IF_TBL_TYPE_MAX] = {
+ { TF_IF_TBL_CFG, CFA_P4_TBL_PROF_SPIF_DFLT_L2CTXT },
+ { TF_IF_TBL_CFG, CFA_P4_TBL_PROF_PARIF_DFLT_ACT_REC_PTR },
+ { TF_IF_TBL_CFG, CFA_P4_TBL_PROF_PARIF_ERR_ACT_REC_PTR },
+ { TF_IF_TBL_CFG, CFA_P4_TBL_LKUP_PARIF_DFLT_ACT_REC_PTR },
+ { TF_IF_TBL_CFG_NULL, CFA_IF_TBL_TYPE_INVALID },
+ { TF_IF_TBL_CFG_NULL, CFA_IF_TBL_TYPE_INVALID }
+};
+
+struct tf_global_cfg_cfg tf_global_cfg_p4[TF_GLOBAL_CFG_TYPE_MAX] = {
+ { TF_GLOBAL_CFG_CFG_HCAPI, TF_TUNNEL_ENCAP },
+ { TF_GLOBAL_CFG_CFG_HCAPI, TF_ACTION_BLOCK },
+};
+#endif /* _TF_DEVICE_P45_H_ */
diff --git a/drivers/net/bnxt/tf_core/tf_em.h b/drivers/net/bnxt/tf_core/tf_em.h
index 2a67e4760..51b08138e 100644
--- a/drivers/net/bnxt/tf_core/tf_em.h
+++ b/drivers/net/bnxt/tf_core/tf_em.h
@@ -9,12 +9,6 @@
#include "tf_core.h"
#include "tf_session.h"
-
-#define SUPPORT_CFA_HW_P4 1
-#define SUPPORT_CFA_HW_P58 0
-#define SUPPORT_CFA_HW_P59 0
-#define SUPPORT_CFA_HW_ALL 0
-
#include "hcapi/hcapi_cfa_defs.h"
#define TF_EM_MIN_ENTRIES (1 << 15) /* 32K */
--
2.21.1 (Apple Git-122.3)
next prev parent reply other threads:[~2020-10-20 21:56 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-17 6:27 [dpdk-dev] [PATCH 00/14] bnxt patches Venkat Duvvuru
2020-10-17 6:27 ` [dpdk-dev] [PATCH 01/14] net/bnxt: device cleanup of FW Venkat Duvvuru
2020-10-17 6:27 ` [dpdk-dev] [PATCH 02/14] net/bnxt: add stingray support Venkat Duvvuru
2020-10-17 6:27 ` [dpdk-dev] [PATCH 03/14] net/bnxt: changes to support 2 table scopes Venkat Duvvuru
2020-10-17 6:27 ` [dpdk-dev] [PATCH 04/14] net/bnxt: map table scope API Venkat Duvvuru
2020-10-17 6:28 ` [dpdk-dev] [PATCH 05/14] net/bnxt: table scope to PF Mapping for SR and Wh+ Venkat Duvvuru
2020-10-17 6:28 ` [dpdk-dev] [PATCH 06/14] net/bnxt: add build option for EM slot allocation Venkat Duvvuru
2020-10-17 6:28 ` [dpdk-dev] [PATCH 07/14] net/bnxt: update SR ULP resource counts Venkat Duvvuru
2020-10-17 6:28 ` [dpdk-dev] [PATCH 08/14] net/bnxt: fix infinite loop in flow query count API Venkat Duvvuru
2020-10-17 6:28 ` [dpdk-dev] [PATCH 09/14] net/bnxt: add support for parent flow accumulation counters Venkat Duvvuru
2020-10-17 6:28 ` [dpdk-dev] [PATCH 10/14] net/bnxt: use cfa pair alloc for configuring reps Venkat Duvvuru
2020-10-17 6:28 ` [dpdk-dev] [PATCH 11/14] net/bnxt: add mapper support for wildcard TCAM entry Venkat Duvvuru
2020-10-17 6:28 ` [dpdk-dev] [PATCH 12/14] net/bnxt: refactor flow id allocation Venkat Duvvuru
2020-10-17 6:28 ` [dpdk-dev] [PATCH 13/14] net/bnxt: add support for VXLAN decap templates Venkat Duvvuru
2020-10-17 6:28 ` [dpdk-dev] [PATCH 14/14] net/bnxt: add VXLAN decap offload support Venkat Duvvuru
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 00/11] bnxt fixes and enhancements to TRUFLOW support Ajit Khaparde
2020-10-20 21:55 ` Ajit Khaparde [this message]
2020-10-21 18:07 ` [dpdk-dev] [PATCH v2 01/11] net/bnxt: add stingray support to core layer Ferruh Yigit
2020-10-21 18:11 ` Ajit Khaparde
2020-10-22 9:11 ` Ferruh Yigit
2020-10-23 5:10 ` Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 02/11] net/bnxt: changes to support two table scopes Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 03/11] net/bnxt: add table scope to PF Mapping Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 04/11] net/bnxt: update ULP resource counts Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 05/11] net/bnxt: fix infinite loop in flow query count Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 06/11] net/bnxt: add support for flow counter accumulation Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 07/11] net/bnxt: change HWRM command to create reps Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 08/11] net/bnxt: add mapper support for wildcard TCAM Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 09/11] net/bnxt: refactor flow id allocation Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 10/11] net/bnxt: add support for VXLAN decap templates Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 11/11] net/bnxt: add VXLAN decap offload support Ajit Khaparde
2020-10-21 5:31 ` [dpdk-dev] [PATCH v2 00/11] bnxt fixes and enhancements to TRUFLOW support Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 " Ajit Khaparde
2020-10-23 5:08 ` Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 00/15] bnxt fixes and enhancements Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 01/15] net/bnxt: add stingray support to core layer Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 02/15] net/bnxt: support two table scopes Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 03/15] net/bnxt: add table scope to PF Mapping Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 04/15] net/bnxt: update ULP resource counts Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 05/15] net/bnxt: fix flow query count Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 06/15] net/bnxt: add hierarchical flow counters Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 07/15] net/bnxt: modify HWRM command to create reps Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 08/15] net/bnxt: add mapper support for wildcard TCAM Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 09/15] net/bnxt: refactor flow id allocation Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 10/15] net/bnxt: add VXLAN decap templates Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 11/15] net/bnxt: add VXLAN decap offload support Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 12/15] net/bnxt: increase the size of Rx CQ Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 13/15] net/bnxt: fix to reset mbuf data offset Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 14/15] net/bnxt: set thread safe flow ops flag Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 15/15] net/bnxt: fix Rx performance by removing spinlock Ajit Khaparde
2020-10-26 17:42 ` [dpdk-dev] [PATCH v4 00/15] bnxt fixes and enhancements Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 01/11] net/bnxt: add stingray support to core layer Ajit Khaparde
2020-10-23 10:54 ` Ferruh Yigit
2020-10-23 16:32 ` Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 02/11] net/bnxt: changes to support two table scopes Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 03/11] net/bnxt: add table scope to PF Mapping Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 04/11] net/bnxt: update ULP resource counts Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 05/11] net/bnxt: fix infinite loop in flow query count Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 06/11] net/bnxt: add support for flow counter accumulation Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 07/11] net/bnxt: change HWRM command to create reps Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 08/11] net/bnxt: add mapper support for wildcard TCAM Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 09/11] net/bnxt: refactor flow id allocation Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 10/11] net/bnxt: add support for VXLAN decap templates Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 11/11] net/bnxt: add VXLAN decap offload support Ajit Khaparde
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