From: Ajit Khaparde <ajit.khaparde@broadcom.com>
To: dev@dpdk.org
Cc: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>,
Mike Baucom <michael.baucom@broadcom.com>
Subject: [dpdk-dev] [PATCH v3 10/11] net/bnxt: add support for VXLAN decap templates
Date: Thu, 22 Oct 2020 15:05:42 -0700 [thread overview]
Message-ID: <20201022220542.84166-11-ajit.khaparde@broadcom.com> (raw)
In-Reply-To: <20201020215538.59242-1-ajit.khaparde@broadcom.com>
From: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Templates for outer tunnel & inner tunnel flow are added in this patch.
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
---
drivers/net/bnxt/tf_ulp/ulp_rte_parser.c | 10 +
drivers/net/bnxt/tf_ulp/ulp_rte_parser.h | 5 +
.../net/bnxt/tf_ulp/ulp_template_db_class.c | 962 ++++---
.../net/bnxt/tf_ulp/ulp_template_db_enum.h | 35 +-
.../net/bnxt/tf_ulp/ulp_template_db_field.h | 363 ++-
.../tf_ulp/ulp_template_db_stingray_act.c | 116 +-
.../tf_ulp/ulp_template_db_stingray_class.c | 2493 ++++++++++++++---
drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c | 9 +-
.../bnxt/tf_ulp/ulp_template_db_wh_plus_act.c | 116 +-
.../tf_ulp/ulp_template_db_wh_plus_class.c | 2489 +++++++++++++---
10 files changed, 5127 insertions(+), 1471 deletions(-)
diff --git a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c
index 770fec55c2..42021ae8d5 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c
@@ -2110,3 +2110,13 @@ ulp_rte_dec_ttl_act_handler(const struct rte_flow_action *act __rte_unused,
ULP_BITMAP_SET(params->act_bitmap.bits, BNXT_ULP_ACTION_BIT_DEC_TTL);
return BNXT_TF_RC_SUCCESS;
}
+
+/* Function to handle the parsing of RTE Flow action JUMP */
+int32_t
+ulp_rte_jump_act_handler(const struct rte_flow_action *action_item __rte_unused,
+ struct ulp_rte_parser_params *params)
+{
+ /* Update the act_bitmap with dec ttl */
+ ULP_BITMAP_SET(params->act_bitmap.bits, BNXT_ULP_ACTION_BIT_JUMP);
+ return BNXT_TF_RC_SUCCESS;
+}
diff --git a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h
index bb5a8a477e..a71aabe5f0 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h
+++ b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h
@@ -233,4 +233,9 @@ int32_t
ulp_rte_dec_ttl_act_handler(const struct rte_flow_action *action_item,
struct ulp_rte_parser_params *params);
+/* Function to handle the parsing of RTE Flow action JUMP .*/
+int32_t
+ulp_rte_jump_act_handler(const struct rte_flow_action *action_item,
+ struct ulp_rte_parser_params *params);
+
#endif /* _ULP_RTE_PARSER_H_ */
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c
index c348abe136..fdb26da3e0 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_class.c
@@ -157,58 +157,74 @@ uint16_t ulp_class_sig_tbl[BNXT_ULP_CLASS_SIG_TBL_MAX_SZ] = {
[BNXT_ULP_CLASS_HID_05b9] = 146,
[BNXT_ULP_CLASS_HID_0371] = 147,
[BNXT_ULP_CLASS_HID_00e1] = 148,
- [BNXT_ULP_CLASS_HID_048b] = 149,
- [BNXT_ULP_CLASS_HID_0749] = 150,
- [BNXT_ULP_CLASS_HID_05f1] = 151,
- [BNXT_ULP_CLASS_HID_04b7] = 152,
- [BNXT_ULP_CLASS_HID_049b] = 153,
- [BNXT_ULP_CLASS_HID_0759] = 154,
- [BNXT_ULP_CLASS_HID_05e1] = 155,
- [BNXT_ULP_CLASS_HID_04a7] = 156,
- [BNXT_ULP_CLASS_HID_0301] = 157,
- [BNXT_ULP_CLASS_HID_07f9] = 158,
- [BNXT_ULP_CLASS_HID_0397] = 159,
- [BNXT_ULP_CLASS_HID_068f] = 160,
- [BNXT_ULP_CLASS_HID_02f1] = 161,
- [BNXT_ULP_CLASS_HID_0609] = 162,
- [BNXT_ULP_CLASS_HID_0267] = 163,
- [BNXT_ULP_CLASS_HID_077f] = 164,
- [BNXT_ULP_CLASS_HID_01e1] = 165,
- [BNXT_ULP_CLASS_HID_0329] = 166,
- [BNXT_ULP_CLASS_HID_01c1] = 167,
- [BNXT_ULP_CLASS_HID_0309] = 168,
- [BNXT_ULP_CLASS_HID_01d1] = 169,
- [BNXT_ULP_CLASS_HID_0319] = 170,
- [BNXT_ULP_CLASS_HID_01e2] = 171,
- [BNXT_ULP_CLASS_HID_032a] = 172,
- [BNXT_ULP_CLASS_HID_0650] = 173,
- [BNXT_ULP_CLASS_HID_0198] = 174,
- [BNXT_ULP_CLASS_HID_01c2] = 175,
- [BNXT_ULP_CLASS_HID_030a] = 176,
- [BNXT_ULP_CLASS_HID_0670] = 177,
- [BNXT_ULP_CLASS_HID_01b8] = 178,
- [BNXT_ULP_CLASS_HID_01d2] = 179,
- [BNXT_ULP_CLASS_HID_031a] = 180,
- [BNXT_ULP_CLASS_HID_0660] = 181,
- [BNXT_ULP_CLASS_HID_01a8] = 182,
- [BNXT_ULP_CLASS_HID_01dd] = 183,
- [BNXT_ULP_CLASS_HID_0315] = 184,
- [BNXT_ULP_CLASS_HID_003d] = 185,
- [BNXT_ULP_CLASS_HID_02f5] = 186,
- [BNXT_ULP_CLASS_HID_01cd] = 187,
- [BNXT_ULP_CLASS_HID_0305] = 188,
- [BNXT_ULP_CLASS_HID_01de] = 189,
- [BNXT_ULP_CLASS_HID_0316] = 190,
- [BNXT_ULP_CLASS_HID_066c] = 191,
- [BNXT_ULP_CLASS_HID_01a4] = 192,
- [BNXT_ULP_CLASS_HID_003e] = 193,
- [BNXT_ULP_CLASS_HID_02f6] = 194,
- [BNXT_ULP_CLASS_HID_078c] = 195,
- [BNXT_ULP_CLASS_HID_0044] = 196,
- [BNXT_ULP_CLASS_HID_01ce] = 197,
- [BNXT_ULP_CLASS_HID_0306] = 198,
- [BNXT_ULP_CLASS_HID_067c] = 199,
- [BNXT_ULP_CLASS_HID_01b4] = 200
+ [BNXT_ULP_CLASS_HID_0000] = 149,
+ [BNXT_ULP_CLASS_HID_00ce] = 150,
+ [BNXT_ULP_CLASS_HID_01b6] = 151,
+ [BNXT_ULP_CLASS_HID_0074] = 152,
+ [BNXT_ULP_CLASS_HID_00fe] = 153,
+ [BNXT_ULP_CLASS_HID_03bc] = 154,
+ [BNXT_ULP_CLASS_HID_0206] = 155,
+ [BNXT_ULP_CLASS_HID_02c4] = 156,
+ [BNXT_ULP_CLASS_HID_055a] = 157,
+ [BNXT_ULP_CLASS_HID_045a] = 158,
+ [BNXT_ULP_CLASS_HID_061a] = 159,
+ [BNXT_ULP_CLASS_HID_051a] = 160,
+ [BNXT_ULP_CLASS_HID_074a] = 161,
+ [BNXT_ULP_CLASS_HID_004e] = 162,
+ [BNXT_ULP_CLASS_HID_040a] = 163,
+ [BNXT_ULP_CLASS_HID_010e] = 164,
+ [BNXT_ULP_CLASS_HID_048b] = 165,
+ [BNXT_ULP_CLASS_HID_0749] = 166,
+ [BNXT_ULP_CLASS_HID_05f1] = 167,
+ [BNXT_ULP_CLASS_HID_04b7] = 168,
+ [BNXT_ULP_CLASS_HID_049b] = 169,
+ [BNXT_ULP_CLASS_HID_0759] = 170,
+ [BNXT_ULP_CLASS_HID_05e1] = 171,
+ [BNXT_ULP_CLASS_HID_04a7] = 172,
+ [BNXT_ULP_CLASS_HID_0301] = 173,
+ [BNXT_ULP_CLASS_HID_07f9] = 174,
+ [BNXT_ULP_CLASS_HID_0397] = 175,
+ [BNXT_ULP_CLASS_HID_068f] = 176,
+ [BNXT_ULP_CLASS_HID_02f1] = 177,
+ [BNXT_ULP_CLASS_HID_0609] = 178,
+ [BNXT_ULP_CLASS_HID_0267] = 179,
+ [BNXT_ULP_CLASS_HID_077f] = 180,
+ [BNXT_ULP_CLASS_HID_01e1] = 181,
+ [BNXT_ULP_CLASS_HID_0329] = 182,
+ [BNXT_ULP_CLASS_HID_01c1] = 183,
+ [BNXT_ULP_CLASS_HID_0309] = 184,
+ [BNXT_ULP_CLASS_HID_01d1] = 185,
+ [BNXT_ULP_CLASS_HID_0319] = 186,
+ [BNXT_ULP_CLASS_HID_01e2] = 187,
+ [BNXT_ULP_CLASS_HID_032a] = 188,
+ [BNXT_ULP_CLASS_HID_0650] = 189,
+ [BNXT_ULP_CLASS_HID_0198] = 190,
+ [BNXT_ULP_CLASS_HID_01c2] = 191,
+ [BNXT_ULP_CLASS_HID_030a] = 192,
+ [BNXT_ULP_CLASS_HID_0670] = 193,
+ [BNXT_ULP_CLASS_HID_01b8] = 194,
+ [BNXT_ULP_CLASS_HID_01d2] = 195,
+ [BNXT_ULP_CLASS_HID_031a] = 196,
+ [BNXT_ULP_CLASS_HID_0660] = 197,
+ [BNXT_ULP_CLASS_HID_01a8] = 198,
+ [BNXT_ULP_CLASS_HID_01dd] = 199,
+ [BNXT_ULP_CLASS_HID_0315] = 200,
+ [BNXT_ULP_CLASS_HID_003d] = 201,
+ [BNXT_ULP_CLASS_HID_02f5] = 202,
+ [BNXT_ULP_CLASS_HID_01cd] = 203,
+ [BNXT_ULP_CLASS_HID_0305] = 204,
+ [BNXT_ULP_CLASS_HID_01de] = 205,
+ [BNXT_ULP_CLASS_HID_0316] = 206,
+ [BNXT_ULP_CLASS_HID_066c] = 207,
+ [BNXT_ULP_CLASS_HID_01a4] = 208,
+ [BNXT_ULP_CLASS_HID_003e] = 209,
+ [BNXT_ULP_CLASS_HID_02f6] = 210,
+ [BNXT_ULP_CLASS_HID_078c] = 211,
+ [BNXT_ULP_CLASS_HID_0044] = 212,
+ [BNXT_ULP_CLASS_HID_01ce] = 213,
+ [BNXT_ULP_CLASS_HID_0306] = 214,
+ [BNXT_ULP_CLASS_HID_067c] = 215,
+ [BNXT_ULP_CLASS_HID_01b4] = 216
};
struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
@@ -2831,305 +2847,617 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
.wc_pri = 23
},
[149] = {
- .class_hid = BNXT_ULP_CLASS_HID_048b,
+ .class_hid = BNXT_ULP_CLASS_HID_0000,
.hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_F1 |
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
+ BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF18_BITMASK_O_ETH_SMAC |
BNXT_ULP_HF18_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 18,
.wc_pri = 0
},
[150] = {
- .class_hid = BNXT_ULP_CLASS_HID_0749,
+ .class_hid = BNXT_ULP_CLASS_HID_00ce,
.hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_F1 |
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
+ BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF18_BITMASK_O_ETH_SMAC |
BNXT_ULP_HF18_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |
BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 18,
.wc_pri = 1
},
[151] = {
- .class_hid = BNXT_ULP_CLASS_HID_05f1,
+ .class_hid = BNXT_ULP_CLASS_HID_01b6,
.hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_F1 |
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |
- BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF18_BITMASK_O_ETH_SMAC |
BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 18,
.wc_pri = 2
},
[152] = {
- .class_hid = BNXT_ULP_CLASS_HID_04b7,
+ .class_hid = BNXT_ULP_CLASS_HID_0074,
.hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_F1 |
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF18_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF18_BITMASK_O_ETH_SMAC |
BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 18,
.wc_pri = 3
},
[153] = {
- .class_hid = BNXT_ULP_CLASS_HID_049b,
+ .class_hid = BNXT_ULP_CLASS_HID_00fe,
.hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_F1 |
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .field_sig = { .bits =
+ BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF18_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 18,
+ .wc_pri = 4
+ },
+ [154] = {
+ .class_hid = BNXT_ULP_CLASS_HID_03bc,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_F1 |
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .field_sig = { .bits =
+ BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF18_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 18,
+ .wc_pri = 5
+ },
+ [155] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0206,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_F1 |
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .field_sig = { .bits =
+ BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 18,
+ .wc_pri = 6
+ },
+ [156] = {
+ .class_hid = BNXT_ULP_CLASS_HID_02c4,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_F1 |
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .field_sig = { .bits =
+ BNXT_ULP_HF18_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF18_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 18,
+ .wc_pri = 7
+ },
+ [157] = {
+ .class_hid = BNXT_ULP_CLASS_HID_055a,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_HDR_BIT_I_ETH |
+ BNXT_ULP_HDR_BIT_I_IPV4 |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF19_BITMASK_O_ETH_TYPE |
BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 19,
.wc_pri = 0
},
- [154] = {
- .class_hid = BNXT_ULP_CLASS_HID_0759,
+ [158] = {
+ .class_hid = BNXT_ULP_CLASS_HID_045a,
.hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_HDR_BIT_I_ETH |
+ BNXT_ULP_HDR_BIT_I_IPV4 |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
- BNXT_ULP_HF19_BITMASK_O_ETH_TYPE |
BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 19,
.wc_pri = 1
},
- [155] = {
- .class_hid = BNXT_ULP_CLASS_HID_05e1,
+ [159] = {
+ .class_hid = BNXT_ULP_CLASS_HID_061a,
.hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_HDR_BIT_I_ETH |
+ BNXT_ULP_HDR_BIT_I_IPV4 |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID |
- BNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 19,
.wc_pri = 2
},
- [156] = {
- .class_hid = BNXT_ULP_CLASS_HID_04a7,
+ [160] = {
+ .class_hid = BNXT_ULP_CLASS_HID_051a,
.hdr_sig = { .bits =
- BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
- BNXT_ULP_HDR_BIT_O_TCP |
- BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_HDR_BIT_I_ETH |
+ BNXT_ULP_HDR_BIT_I_IPV4 |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
.field_sig = { .bits =
BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
- BNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT |
- BNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_SMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 19,
.wc_pri = 3
},
- [157] = {
- .class_hid = BNXT_ULP_CLASS_HID_0301,
+ [161] = {
+ .class_hid = BNXT_ULP_CLASS_HID_074a,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_HDR_BIT_I_ETH |
+ BNXT_ULP_HDR_BIT_I_IPV4 |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .field_sig = { .bits =
+ BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 19,
+ .wc_pri = 4
+ },
+ [162] = {
+ .class_hid = BNXT_ULP_CLASS_HID_004e,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_HDR_BIT_I_ETH |
+ BNXT_ULP_HDR_BIT_I_IPV4 |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .field_sig = { .bits =
+ BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_PROTO_ID |
+ BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 19,
+ .wc_pri = 5
+ },
+ [163] = {
+ .class_hid = BNXT_ULP_CLASS_HID_040a,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_HDR_BIT_I_ETH |
+ BNXT_ULP_HDR_BIT_I_IPV4 |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .field_sig = { .bits =
+ BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 19,
+ .wc_pri = 6
+ },
+ [164] = {
+ .class_hid = BNXT_ULP_CLASS_HID_010e,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_HDR_BIT_T_VXLAN |
+ BNXT_ULP_HDR_BIT_I_ETH |
+ BNXT_ULP_HDR_BIT_I_IPV4 |
+ BNXT_ULP_FLOW_DIR_BITMASK_ING },
+ .field_sig = { .bits =
+ BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI |
+ BNXT_ULP_HF19_BITMASK_I_ETH_DMAC |
+ BNXT_ULP_HF19_BITMASK_I_ETH_TYPE |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 19,
+ .wc_pri = 7
+ },
+ [165] = {
+ .class_hid = BNXT_ULP_CLASS_HID_048b,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
BNXT_ULP_HF20_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF20_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 20,
.wc_pri = 0
},
- [158] = {
- .class_hid = BNXT_ULP_CLASS_HID_07f9,
+ [166] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0749,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
BNXT_ULP_HF20_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 20,
.wc_pri = 1
},
- [159] = {
- .class_hid = BNXT_ULP_CLASS_HID_0397,
+ [167] = {
+ .class_hid = BNXT_ULP_CLASS_HID_05f1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF20_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 20,
.wc_pri = 2
},
- [160] = {
- .class_hid = BNXT_ULP_CLASS_HID_068f,
+ [168] = {
+ .class_hid = BNXT_ULP_CLASS_HID_04b7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF20_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT |
BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 20,
.wc_pri = 3
},
- [161] = {
- .class_hid = BNXT_ULP_CLASS_HID_02f1,
+ [169] = {
+ .class_hid = BNXT_ULP_CLASS_HID_049b,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF21_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT |
BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 21,
.wc_pri = 0
},
- [162] = {
- .class_hid = BNXT_ULP_CLASS_HID_0609,
+ [170] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0759,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
BNXT_ULP_HF21_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT |
BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 21,
.wc_pri = 1
},
- [163] = {
- .class_hid = BNXT_ULP_CLASS_HID_0267,
+ [171] = {
+ .class_hid = BNXT_ULP_CLASS_HID_05e1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR |
- BNXT_ULP_HF21_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV4_PROTO_ID |
BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT |
BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 21,
.wc_pri = 2
},
- [164] = {
- .class_hid = BNXT_ULP_CLASS_HID_077f,
+ [172] = {
+ .class_hid = BNXT_ULP_CLASS_HID_04a7,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR |
- BNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR |
+ BNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR |
BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT |
BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 21,
.wc_pri = 3
},
- [165] = {
- .class_hid = BNXT_ULP_CLASS_HID_01e1,
+ [173] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0301,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
- BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF22_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF22_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF22_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF22_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF22_BITMASK_O_UDP_DST_PORT |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
.class_tid = 22,
.wc_pri = 0
},
- [166] = {
+ [174] = {
+ .class_hid = BNXT_ULP_CLASS_HID_07f9,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF22_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF22_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF22_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF22_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 22,
+ .wc_pri = 1
+ },
+ [175] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0397,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF22_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF22_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF22_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF22_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF22_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 22,
+ .wc_pri = 2
+ },
+ [176] = {
+ .class_hid = BNXT_ULP_CLASS_HID_068f,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_UDP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF22_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF22_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF22_BITMASK_O_UDP_SRC_PORT |
+ BNXT_ULP_HF22_BITMASK_O_UDP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 22,
+ .wc_pri = 3
+ },
+ [177] = {
+ .class_hid = BNXT_ULP_CLASS_HID_02f1,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF23_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF23_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF23_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 0
+ },
+ [178] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0609,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF23_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF23_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 1
+ },
+ [179] = {
+ .class_hid = BNXT_ULP_CLASS_HID_0267,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF23_BITMASK_O_IPV6_PROTO_ID |
+ BNXT_ULP_HF23_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF23_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 2
+ },
+ [180] = {
+ .class_hid = BNXT_ULP_CLASS_HID_077f,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV6 |
+ BNXT_ULP_HDR_BIT_O_TCP |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR |
+ BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR |
+ BNXT_ULP_HF23_BITMASK_O_TCP_SRC_PORT |
+ BNXT_ULP_HF23_BITMASK_O_TCP_DST_PORT |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 23,
+ .wc_pri = 3
+ },
+ [181] = {
+ .class_hid = BNXT_ULP_CLASS_HID_01e1,
+ .hdr_sig = { .bits =
+ BNXT_ULP_HDR_BIT_O_ETH |
+ BNXT_ULP_HDR_BIT_O_IPV4 |
+ BNXT_ULP_FLOW_DIR_BITMASK_EGR },
+ .field_sig = { .bits =
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_MATCH_TYPE_BITMASK_EM },
+ .class_tid = 24,
+ .wc_pri = 0
+ },
+ [182] = {
.class_hid = BNXT_ULP_CLASS_HID_0329,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 1
},
- [167] = {
+ [183] = {
.class_hid = BNXT_ULP_CLASS_HID_01c1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3137,14 +3465,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 2
},
- [168] = {
+ [184] = {
.class_hid = BNXT_ULP_CLASS_HID_0309,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3152,13 +3480,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 3
},
- [169] = {
+ [185] = {
.class_hid = BNXT_ULP_CLASS_HID_01d1,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3166,14 +3494,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 4
},
- [170] = {
+ [186] = {
.class_hid = BNXT_ULP_CLASS_HID_0319,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3181,13 +3509,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 5
},
- [171] = {
+ [187] = {
.class_hid = BNXT_ULP_CLASS_HID_01e2,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3195,14 +3523,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 6
},
- [172] = {
+ [188] = {
.class_hid = BNXT_ULP_CLASS_HID_032a,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3210,13 +3538,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 7
},
- [173] = {
+ [189] = {
.class_hid = BNXT_ULP_CLASS_HID_0650,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3224,15 +3552,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF22_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF24_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 8
},
- [174] = {
+ [190] = {
.class_hid = BNXT_ULP_CLASS_HID_0198,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3240,14 +3568,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_IPV4 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 9
},
- [175] = {
+ [191] = {
.class_hid = BNXT_ULP_CLASS_HID_01c2,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3256,14 +3584,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 10
},
- [176] = {
+ [192] = {
.class_hid = BNXT_ULP_CLASS_HID_030a,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3272,13 +3600,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 11
},
- [177] = {
+ [193] = {
.class_hid = BNXT_ULP_CLASS_HID_0670,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3287,15 +3615,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF22_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF24_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 12
},
- [178] = {
+ [194] = {
.class_hid = BNXT_ULP_CLASS_HID_01b8,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3304,14 +3632,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 13
},
- [179] = {
+ [195] = {
.class_hid = BNXT_ULP_CLASS_HID_01d2,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3320,14 +3648,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 14
},
- [180] = {
+ [196] = {
.class_hid = BNXT_ULP_CLASS_HID_031a,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3336,13 +3664,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 15
},
- [181] = {
+ [197] = {
.class_hid = BNXT_ULP_CLASS_HID_0660,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3351,15 +3679,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF22_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF24_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 16
},
- [182] = {
+ [198] = {
.class_hid = BNXT_ULP_CLASS_HID_01a8,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3368,41 +3696,41 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF22_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF22_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF22_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF24_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 22,
+ .class_tid = 24,
.wc_pri = 17
},
- [183] = {
+ [199] = {
.class_hid = BNXT_ULP_CLASS_HID_01dd,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 0
},
- [184] = {
+ [200] = {
.class_hid = BNXT_ULP_CLASS_HID_0315,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 1
},
- [185] = {
+ [201] = {
.class_hid = BNXT_ULP_CLASS_HID_003d,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3410,14 +3738,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 2
},
- [186] = {
+ [202] = {
.class_hid = BNXT_ULP_CLASS_HID_02f5,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3425,13 +3753,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 3
},
- [187] = {
+ [203] = {
.class_hid = BNXT_ULP_CLASS_HID_01cd,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3439,14 +3767,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 4
},
- [188] = {
+ [204] = {
.class_hid = BNXT_ULP_CLASS_HID_0305,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3454,13 +3782,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 5
},
- [189] = {
+ [205] = {
.class_hid = BNXT_ULP_CLASS_HID_01de,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3468,14 +3796,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 6
},
- [190] = {
+ [206] = {
.class_hid = BNXT_ULP_CLASS_HID_0316,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3483,13 +3811,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 7
},
- [191] = {
+ [207] = {
.class_hid = BNXT_ULP_CLASS_HID_066c,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3497,15 +3825,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF23_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF25_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 8
},
- [192] = {
+ [208] = {
.class_hid = BNXT_ULP_CLASS_HID_01a4,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3513,14 +3841,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_IPV6 |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 9
},
- [193] = {
+ [209] = {
.class_hid = BNXT_ULP_CLASS_HID_003e,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3529,14 +3857,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 10
},
- [194] = {
+ [210] = {
.class_hid = BNXT_ULP_CLASS_HID_02f6,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3545,13 +3873,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 11
},
- [195] = {
+ [211] = {
.class_hid = BNXT_ULP_CLASS_HID_078c,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3560,15 +3888,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF23_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF25_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 12
},
- [196] = {
+ [212] = {
.class_hid = BNXT_ULP_CLASS_HID_0044,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3577,14 +3905,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_UDP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 13
},
- [197] = {
+ [213] = {
.class_hid = BNXT_ULP_CLASS_HID_01ce,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3593,14 +3921,14 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 14
},
- [198] = {
+ [214] = {
.class_hid = BNXT_ULP_CLASS_HID_0306,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3609,13 +3937,13 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 15
},
- [199] = {
+ [215] = {
.class_hid = BNXT_ULP_CLASS_HID_067c,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3624,15 +3952,15 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_TYPE |
- BNXT_ULP_HF23_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_TYPE |
+ BNXT_ULP_HF25_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 16
},
- [200] = {
+ [216] = {
.class_hid = BNXT_ULP_CLASS_HID_01b4,
.hdr_sig = { .bits =
BNXT_ULP_HDR_BIT_O_ETH |
@@ -3641,11 +3969,11 @@ struct bnxt_ulp_class_match_info ulp_class_match_list[] = {
BNXT_ULP_HDR_BIT_O_TCP |
BNXT_ULP_FLOW_DIR_BITMASK_EGR },
.field_sig = { .bits =
- BNXT_ULP_HF23_BITMASK_O_ETH_SMAC |
- BNXT_ULP_HF23_BITMASK_O_ETH_DMAC |
- BNXT_ULP_HF23_BITMASK_OO_VLAN_VID |
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC |
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC |
+ BNXT_ULP_HF25_BITMASK_OO_VLAN_VID |
BNXT_ULP_MATCH_TYPE_BITMASK_EM },
- .class_tid = 23,
+ .class_tid = 25,
.wc_pri = 17
}
};
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h
index 6dade9afdb..10838f5cc2 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h
@@ -11,7 +11,7 @@
#define BNXT_ULP_LOG2_MAX_NUM_DEV 2
#define BNXT_ULP_CACHE_TBL_MAX_SZ 4
#define BNXT_ULP_CLASS_SIG_TBL_MAX_SZ 2048
-#define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 201
+#define BNXT_ULP_CLASS_MATCH_LIST_MAX_SZ 217
#define BNXT_ULP_CLASS_HID_LOW_PRIME 7919
#define BNXT_ULP_CLASS_HID_HIGH_PRIME 7907
#define BNXT_ULP_CLASS_HID_SHFTR 32
@@ -52,7 +52,8 @@ enum bnxt_ulp_action_bit {
BNXT_ULP_ACTION_BIT_SET_TP_SRC = 0x0000000000100000,
BNXT_ULP_ACTION_BIT_SET_TP_DST = 0x0000000000200000,
BNXT_ULP_ACTION_BIT_VXLAN_ENCAP = 0x0000000000400000,
- BNXT_ULP_ACTION_BIT_LAST = 0x0000000000800000
+ BNXT_ULP_ACTION_BIT_JUMP = 0x0000000000800000,
+ BNXT_ULP_ACTION_BIT_LAST = 0x0000000001000000
};
enum bnxt_ulp_hdr_bit {
@@ -72,7 +73,8 @@ enum bnxt_ulp_hdr_bit {
BNXT_ULP_HDR_BIT_I_IPV6 = 0x0000000000002000,
BNXT_ULP_HDR_BIT_I_TCP = 0x0000000000004000,
BNXT_ULP_HDR_BIT_I_UDP = 0x0000000000008000,
- BNXT_ULP_HDR_BIT_LAST = 0x0000000000010000
+ BNXT_ULP_HDR_BIT_F1 = 0x0000000000010000,
+ BNXT_ULP_HDR_BIT_LAST = 0x0000000000020000
};
enum bnxt_ulp_act_type {
@@ -341,6 +343,10 @@ enum bnxt_ulp_resource_sub_type {
enum bnxt_ulp_sym {
BNXT_ULP_SYM_PKT_TYPE_IGNORE = 0,
BNXT_ULP_SYM_PKT_TYPE_L2 = 0,
+ BNXT_ULP_SYM_PKT_TYPE_0_IGNORE = 0,
+ BNXT_ULP_SYM_PKT_TYPE_0_L2 = 0,
+ BNXT_ULP_SYM_PKT_TYPE_1_IGNORE = 0,
+ BNXT_ULP_SYM_PKT_TYPE_1_L2 = 0,
BNXT_ULP_SYM_RECYCLE_CNT_IGNORE = 0,
BNXT_ULP_SYM_RECYCLE_CNT_ZERO = 0,
BNXT_ULP_SYM_RECYCLE_CNT_ONE = 1,
@@ -551,7 +557,8 @@ enum bnxt_ulp_sym {
BNXT_ULP_SYM_IP_PROTO_UDP = 17,
BNXT_ULP_SYM_VF_FUNC_PARIF = 15,
BNXT_ULP_SYM_NO = 0,
- BNXT_ULP_SYM_YES = 1
+ BNXT_ULP_SYM_YES = 1,
+ BNXT_ULP_SYM_RECYCLE_DST = 0x800
};
enum bnxt_ulp_wh_plus {
@@ -600,6 +607,7 @@ enum bnxt_ulp_act_prop_sz {
BNXT_ULP_ACT_PROP_SZ_ENCAP_IP_SRC = 16,
BNXT_ULP_ACT_PROP_SZ_ENCAP_UDP = 4,
BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN = 32,
+ BNXT_ULP_ACT_PROP_SZ_JUMP = 4,
BNXT_ULP_ACT_PROP_SZ_LAST = 4
};
@@ -644,7 +652,8 @@ enum bnxt_ulp_act_prop_idx {
BNXT_ULP_ACT_PROP_IDX_ENCAP_IP_SRC = 205,
BNXT_ULP_ACT_PROP_IDX_ENCAP_UDP = 221,
BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN = 225,
- BNXT_ULP_ACT_PROP_IDX_LAST = 257
+ BNXT_ULP_ACT_PROP_IDX_JUMP = 257,
+ BNXT_ULP_ACT_PROP_IDX_LAST = 261
};
enum bnxt_ulp_class_hid {
@@ -796,6 +805,22 @@ enum bnxt_ulp_class_hid {
BNXT_ULP_CLASS_HID_05b9 = 0x05b9,
BNXT_ULP_CLASS_HID_0371 = 0x0371,
BNXT_ULP_CLASS_HID_00e1 = 0x00e1,
+ BNXT_ULP_CLASS_HID_0000 = 0x0000,
+ BNXT_ULP_CLASS_HID_00ce = 0x00ce,
+ BNXT_ULP_CLASS_HID_01b6 = 0x01b6,
+ BNXT_ULP_CLASS_HID_0074 = 0x0074,
+ BNXT_ULP_CLASS_HID_00fe = 0x00fe,
+ BNXT_ULP_CLASS_HID_03bc = 0x03bc,
+ BNXT_ULP_CLASS_HID_0206 = 0x0206,
+ BNXT_ULP_CLASS_HID_02c4 = 0x02c4,
+ BNXT_ULP_CLASS_HID_055a = 0x055a,
+ BNXT_ULP_CLASS_HID_045a = 0x045a,
+ BNXT_ULP_CLASS_HID_061a = 0x061a,
+ BNXT_ULP_CLASS_HID_051a = 0x051a,
+ BNXT_ULP_CLASS_HID_074a = 0x074a,
+ BNXT_ULP_CLASS_HID_004e = 0x004e,
+ BNXT_ULP_CLASS_HID_040a = 0x040a,
+ BNXT_ULP_CLASS_HID_010e = 0x010e,
BNXT_ULP_CLASS_HID_048b = 0x048b,
BNXT_ULP_CLASS_HID_0749 = 0x0749,
BNXT_ULP_CLASS_HID_05f1 = 0x05f1,
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h
index 137b7fd138..516f471c0c 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h
@@ -382,7 +382,11 @@ enum bnxt_ulp_hf18 {
BNXT_ULP_HF18_IDX_O_UDP_SRC_PORT = 20,
BNXT_ULP_HF18_IDX_O_UDP_DST_PORT = 21,
BNXT_ULP_HF18_IDX_O_UDP_LENGTH = 22,
- BNXT_ULP_HF18_IDX_O_UDP_CSUM = 23
+ BNXT_ULP_HF18_IDX_O_UDP_CSUM = 23,
+ BNXT_ULP_HF18_IDX_T_VXLAN_FLAGS = 24,
+ BNXT_ULP_HF18_IDX_T_VXLAN_RSVD0 = 25,
+ BNXT_ULP_HF18_IDX_T_VXLAN_VNI = 26,
+ BNXT_ULP_HF18_IDX_T_VXLAN_RSVD1 = 27
};
enum bnxt_ulp_hf19 {
@@ -406,15 +410,33 @@ enum bnxt_ulp_hf19 {
BNXT_ULP_HF19_IDX_O_IPV4_CSUM = 17,
BNXT_ULP_HF19_IDX_O_IPV4_SRC_ADDR = 18,
BNXT_ULP_HF19_IDX_O_IPV4_DST_ADDR = 19,
- BNXT_ULP_HF19_IDX_O_TCP_SRC_PORT = 20,
- BNXT_ULP_HF19_IDX_O_TCP_DST_PORT = 21,
- BNXT_ULP_HF19_IDX_O_TCP_SENT_SEQ = 22,
- BNXT_ULP_HF19_IDX_O_TCP_RECV_ACK = 23,
- BNXT_ULP_HF19_IDX_O_TCP_DATA_OFF = 24,
- BNXT_ULP_HF19_IDX_O_TCP_TCP_FLAGS = 25,
- BNXT_ULP_HF19_IDX_O_TCP_RX_WIN = 26,
- BNXT_ULP_HF19_IDX_O_TCP_CSUM = 27,
- BNXT_ULP_HF19_IDX_O_TCP_URP = 28
+ BNXT_ULP_HF19_IDX_O_UDP_SRC_PORT = 20,
+ BNXT_ULP_HF19_IDX_O_UDP_DST_PORT = 21,
+ BNXT_ULP_HF19_IDX_O_UDP_LENGTH = 22,
+ BNXT_ULP_HF19_IDX_O_UDP_CSUM = 23,
+ BNXT_ULP_HF19_IDX_T_VXLAN_FLAGS = 24,
+ BNXT_ULP_HF19_IDX_T_VXLAN_RSVD0 = 25,
+ BNXT_ULP_HF19_IDX_T_VXLAN_VNI = 26,
+ BNXT_ULP_HF19_IDX_T_VXLAN_RSVD1 = 27,
+ BNXT_ULP_HF19_IDX_I_ETH_DMAC = 28,
+ BNXT_ULP_HF19_IDX_I_ETH_SMAC = 29,
+ BNXT_ULP_HF19_IDX_I_ETH_TYPE = 30,
+ BNXT_ULP_HF19_IDX_IO_VLAN_CFI_PRI = 31,
+ BNXT_ULP_HF19_IDX_IO_VLAN_VID = 32,
+ BNXT_ULP_HF19_IDX_IO_VLAN_TYPE = 33,
+ BNXT_ULP_HF19_IDX_II_VLAN_CFI_PRI = 34,
+ BNXT_ULP_HF19_IDX_II_VLAN_VID = 35,
+ BNXT_ULP_HF19_IDX_II_VLAN_TYPE = 36,
+ BNXT_ULP_HF19_IDX_I_IPV4_VER = 37,
+ BNXT_ULP_HF19_IDX_I_IPV4_TOS = 38,
+ BNXT_ULP_HF19_IDX_I_IPV4_LEN = 39,
+ BNXT_ULP_HF19_IDX_I_IPV4_FRAG_ID = 40,
+ BNXT_ULP_HF19_IDX_I_IPV4_FRAG_OFF = 41,
+ BNXT_ULP_HF19_IDX_I_IPV4_TTL = 42,
+ BNXT_ULP_HF19_IDX_I_IPV4_PROTO_ID = 43,
+ BNXT_ULP_HF19_IDX_I_IPV4_CSUM = 44,
+ BNXT_ULP_HF19_IDX_I_IPV4_SRC_ADDR = 45,
+ BNXT_ULP_HF19_IDX_I_IPV4_DST_ADDR = 46
};
enum bnxt_ulp_hf20 {
@@ -428,18 +450,20 @@ enum bnxt_ulp_hf20 {
BNXT_ULP_HF20_IDX_OI_VLAN_CFI_PRI = 7,
BNXT_ULP_HF20_IDX_OI_VLAN_VID = 8,
BNXT_ULP_HF20_IDX_OI_VLAN_TYPE = 9,
- BNXT_ULP_HF20_IDX_O_IPV6_VER = 10,
- BNXT_ULP_HF20_IDX_O_IPV6_TC = 11,
- BNXT_ULP_HF20_IDX_O_IPV6_FLOW_LABEL = 12,
- BNXT_ULP_HF20_IDX_O_IPV6_PAYLOAD_LEN = 13,
- BNXT_ULP_HF20_IDX_O_IPV6_PROTO_ID = 14,
- BNXT_ULP_HF20_IDX_O_IPV6_TTL = 15,
- BNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR = 16,
- BNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR = 17,
- BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT = 18,
- BNXT_ULP_HF20_IDX_O_UDP_DST_PORT = 19,
- BNXT_ULP_HF20_IDX_O_UDP_LENGTH = 20,
- BNXT_ULP_HF20_IDX_O_UDP_CSUM = 21
+ BNXT_ULP_HF20_IDX_O_IPV4_VER = 10,
+ BNXT_ULP_HF20_IDX_O_IPV4_TOS = 11,
+ BNXT_ULP_HF20_IDX_O_IPV4_LEN = 12,
+ BNXT_ULP_HF20_IDX_O_IPV4_FRAG_ID = 13,
+ BNXT_ULP_HF20_IDX_O_IPV4_FRAG_OFF = 14,
+ BNXT_ULP_HF20_IDX_O_IPV4_TTL = 15,
+ BNXT_ULP_HF20_IDX_O_IPV4_PROTO_ID = 16,
+ BNXT_ULP_HF20_IDX_O_IPV4_CSUM = 17,
+ BNXT_ULP_HF20_IDX_O_IPV4_SRC_ADDR = 18,
+ BNXT_ULP_HF20_IDX_O_IPV4_DST_ADDR = 19,
+ BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT = 20,
+ BNXT_ULP_HF20_IDX_O_UDP_DST_PORT = 21,
+ BNXT_ULP_HF20_IDX_O_UDP_LENGTH = 22,
+ BNXT_ULP_HF20_IDX_O_UDP_CSUM = 23
};
enum bnxt_ulp_hf21 {
@@ -453,23 +477,25 @@ enum bnxt_ulp_hf21 {
BNXT_ULP_HF21_IDX_OI_VLAN_CFI_PRI = 7,
BNXT_ULP_HF21_IDX_OI_VLAN_VID = 8,
BNXT_ULP_HF21_IDX_OI_VLAN_TYPE = 9,
- BNXT_ULP_HF21_IDX_O_IPV6_VER = 10,
- BNXT_ULP_HF21_IDX_O_IPV6_TC = 11,
- BNXT_ULP_HF21_IDX_O_IPV6_FLOW_LABEL = 12,
- BNXT_ULP_HF21_IDX_O_IPV6_PAYLOAD_LEN = 13,
- BNXT_ULP_HF21_IDX_O_IPV6_PROTO_ID = 14,
- BNXT_ULP_HF21_IDX_O_IPV6_TTL = 15,
- BNXT_ULP_HF21_IDX_O_IPV6_SRC_ADDR = 16,
- BNXT_ULP_HF21_IDX_O_IPV6_DST_ADDR = 17,
- BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT = 18,
- BNXT_ULP_HF21_IDX_O_TCP_DST_PORT = 19,
- BNXT_ULP_HF21_IDX_O_TCP_SENT_SEQ = 20,
- BNXT_ULP_HF21_IDX_O_TCP_RECV_ACK = 21,
- BNXT_ULP_HF21_IDX_O_TCP_DATA_OFF = 22,
- BNXT_ULP_HF21_IDX_O_TCP_TCP_FLAGS = 23,
- BNXT_ULP_HF21_IDX_O_TCP_RX_WIN = 24,
- BNXT_ULP_HF21_IDX_O_TCP_CSUM = 25,
- BNXT_ULP_HF21_IDX_O_TCP_URP = 26
+ BNXT_ULP_HF21_IDX_O_IPV4_VER = 10,
+ BNXT_ULP_HF21_IDX_O_IPV4_TOS = 11,
+ BNXT_ULP_HF21_IDX_O_IPV4_LEN = 12,
+ BNXT_ULP_HF21_IDX_O_IPV4_FRAG_ID = 13,
+ BNXT_ULP_HF21_IDX_O_IPV4_FRAG_OFF = 14,
+ BNXT_ULP_HF21_IDX_O_IPV4_TTL = 15,
+ BNXT_ULP_HF21_IDX_O_IPV4_PROTO_ID = 16,
+ BNXT_ULP_HF21_IDX_O_IPV4_CSUM = 17,
+ BNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR = 18,
+ BNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR = 19,
+ BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT = 20,
+ BNXT_ULP_HF21_IDX_O_TCP_DST_PORT = 21,
+ BNXT_ULP_HF21_IDX_O_TCP_SENT_SEQ = 22,
+ BNXT_ULP_HF21_IDX_O_TCP_RECV_ACK = 23,
+ BNXT_ULP_HF21_IDX_O_TCP_DATA_OFF = 24,
+ BNXT_ULP_HF21_IDX_O_TCP_TCP_FLAGS = 25,
+ BNXT_ULP_HF21_IDX_O_TCP_RX_WIN = 26,
+ BNXT_ULP_HF21_IDX_O_TCP_CSUM = 27,
+ BNXT_ULP_HF21_IDX_O_TCP_URP = 28
};
enum bnxt_ulp_hf22 {
@@ -483,16 +509,18 @@ enum bnxt_ulp_hf22 {
BNXT_ULP_HF22_IDX_OI_VLAN_CFI_PRI = 7,
BNXT_ULP_HF22_IDX_OI_VLAN_VID = 8,
BNXT_ULP_HF22_IDX_OI_VLAN_TYPE = 9,
- BNXT_ULP_HF22_IDX_O_IPV4_VER = 10,
- BNXT_ULP_HF22_IDX_O_IPV4_TOS = 11,
- BNXT_ULP_HF22_IDX_O_IPV4_LEN = 12,
- BNXT_ULP_HF22_IDX_O_IPV4_FRAG_ID = 13,
- BNXT_ULP_HF22_IDX_O_IPV4_FRAG_OFF = 14,
- BNXT_ULP_HF22_IDX_O_IPV4_TTL = 15,
- BNXT_ULP_HF22_IDX_O_IPV4_PROTO_ID = 16,
- BNXT_ULP_HF22_IDX_O_IPV4_CSUM = 17,
- BNXT_ULP_HF22_IDX_O_IPV4_SRC_ADDR = 18,
- BNXT_ULP_HF22_IDX_O_IPV4_DST_ADDR = 19
+ BNXT_ULP_HF22_IDX_O_IPV6_VER = 10,
+ BNXT_ULP_HF22_IDX_O_IPV6_TC = 11,
+ BNXT_ULP_HF22_IDX_O_IPV6_FLOW_LABEL = 12,
+ BNXT_ULP_HF22_IDX_O_IPV6_PAYLOAD_LEN = 13,
+ BNXT_ULP_HF22_IDX_O_IPV6_PROTO_ID = 14,
+ BNXT_ULP_HF22_IDX_O_IPV6_TTL = 15,
+ BNXT_ULP_HF22_IDX_O_IPV6_SRC_ADDR = 16,
+ BNXT_ULP_HF22_IDX_O_IPV6_DST_ADDR = 17,
+ BNXT_ULP_HF22_IDX_O_UDP_SRC_PORT = 18,
+ BNXT_ULP_HF22_IDX_O_UDP_DST_PORT = 19,
+ BNXT_ULP_HF22_IDX_O_UDP_LENGTH = 20,
+ BNXT_ULP_HF22_IDX_O_UDP_CSUM = 21
};
enum bnxt_ulp_hf23 {
@@ -513,7 +541,60 @@ enum bnxt_ulp_hf23 {
BNXT_ULP_HF23_IDX_O_IPV6_PROTO_ID = 14,
BNXT_ULP_HF23_IDX_O_IPV6_TTL = 15,
BNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR = 16,
- BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR = 17
+ BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR = 17,
+ BNXT_ULP_HF23_IDX_O_TCP_SRC_PORT = 18,
+ BNXT_ULP_HF23_IDX_O_TCP_DST_PORT = 19,
+ BNXT_ULP_HF23_IDX_O_TCP_SENT_SEQ = 20,
+ BNXT_ULP_HF23_IDX_O_TCP_RECV_ACK = 21,
+ BNXT_ULP_HF23_IDX_O_TCP_DATA_OFF = 22,
+ BNXT_ULP_HF23_IDX_O_TCP_TCP_FLAGS = 23,
+ BNXT_ULP_HF23_IDX_O_TCP_RX_WIN = 24,
+ BNXT_ULP_HF23_IDX_O_TCP_CSUM = 25,
+ BNXT_ULP_HF23_IDX_O_TCP_URP = 26
+};
+
+enum bnxt_ulp_hf24 {
+ BNXT_ULP_HF24_IDX_SVIF_INDEX = 0,
+ BNXT_ULP_HF24_IDX_O_ETH_DMAC = 1,
+ BNXT_ULP_HF24_IDX_O_ETH_SMAC = 2,
+ BNXT_ULP_HF24_IDX_O_ETH_TYPE = 3,
+ BNXT_ULP_HF24_IDX_OO_VLAN_CFI_PRI = 4,
+ BNXT_ULP_HF24_IDX_OO_VLAN_VID = 5,
+ BNXT_ULP_HF24_IDX_OO_VLAN_TYPE = 6,
+ BNXT_ULP_HF24_IDX_OI_VLAN_CFI_PRI = 7,
+ BNXT_ULP_HF24_IDX_OI_VLAN_VID = 8,
+ BNXT_ULP_HF24_IDX_OI_VLAN_TYPE = 9,
+ BNXT_ULP_HF24_IDX_O_IPV4_VER = 10,
+ BNXT_ULP_HF24_IDX_O_IPV4_TOS = 11,
+ BNXT_ULP_HF24_IDX_O_IPV4_LEN = 12,
+ BNXT_ULP_HF24_IDX_O_IPV4_FRAG_ID = 13,
+ BNXT_ULP_HF24_IDX_O_IPV4_FRAG_OFF = 14,
+ BNXT_ULP_HF24_IDX_O_IPV4_TTL = 15,
+ BNXT_ULP_HF24_IDX_O_IPV4_PROTO_ID = 16,
+ BNXT_ULP_HF24_IDX_O_IPV4_CSUM = 17,
+ BNXT_ULP_HF24_IDX_O_IPV4_SRC_ADDR = 18,
+ BNXT_ULP_HF24_IDX_O_IPV4_DST_ADDR = 19
+};
+
+enum bnxt_ulp_hf25 {
+ BNXT_ULP_HF25_IDX_SVIF_INDEX = 0,
+ BNXT_ULP_HF25_IDX_O_ETH_DMAC = 1,
+ BNXT_ULP_HF25_IDX_O_ETH_SMAC = 2,
+ BNXT_ULP_HF25_IDX_O_ETH_TYPE = 3,
+ BNXT_ULP_HF25_IDX_OO_VLAN_CFI_PRI = 4,
+ BNXT_ULP_HF25_IDX_OO_VLAN_VID = 5,
+ BNXT_ULP_HF25_IDX_OO_VLAN_TYPE = 6,
+ BNXT_ULP_HF25_IDX_OI_VLAN_CFI_PRI = 7,
+ BNXT_ULP_HF25_IDX_OI_VLAN_VID = 8,
+ BNXT_ULP_HF25_IDX_OI_VLAN_TYPE = 9,
+ BNXT_ULP_HF25_IDX_O_IPV6_VER = 10,
+ BNXT_ULP_HF25_IDX_O_IPV6_TC = 11,
+ BNXT_ULP_HF25_IDX_O_IPV6_FLOW_LABEL = 12,
+ BNXT_ULP_HF25_IDX_O_IPV6_PAYLOAD_LEN = 13,
+ BNXT_ULP_HF25_IDX_O_IPV6_PROTO_ID = 14,
+ BNXT_ULP_HF25_IDX_O_IPV6_TTL = 15,
+ BNXT_ULP_HF25_IDX_O_IPV6_SRC_ADDR = 16,
+ BNXT_ULP_HF25_IDX_O_IPV6_DST_ADDR = 17
};
enum bnxt_ulp_hf_bitmask1 {
@@ -892,7 +973,11 @@ enum bnxt_ulp_hf_bitmask18 {
BNXT_ULP_HF18_BITMASK_O_UDP_SRC_PORT = 0x0000080000000000,
BNXT_ULP_HF18_BITMASK_O_UDP_DST_PORT = 0x0000040000000000,
BNXT_ULP_HF18_BITMASK_O_UDP_LENGTH = 0x0000020000000000,
- BNXT_ULP_HF18_BITMASK_O_UDP_CSUM = 0x0000010000000000
+ BNXT_ULP_HF18_BITMASK_O_UDP_CSUM = 0x0000010000000000,
+ BNXT_ULP_HF18_BITMASK_T_VXLAN_FLAGS = 0x0000008000000000,
+ BNXT_ULP_HF18_BITMASK_T_VXLAN_RSVD0 = 0x0000004000000000,
+ BNXT_ULP_HF18_BITMASK_T_VXLAN_VNI = 0x0000002000000000,
+ BNXT_ULP_HF18_BITMASK_T_VXLAN_RSVD1 = 0x0000001000000000
};
enum bnxt_ulp_hf_bitmask19 {
@@ -916,15 +1001,33 @@ enum bnxt_ulp_hf_bitmask19 {
BNXT_ULP_HF19_BITMASK_O_IPV4_CSUM = 0x0000400000000000,
BNXT_ULP_HF19_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000,
BNXT_ULP_HF19_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000,
- BNXT_ULP_HF19_BITMASK_O_TCP_SRC_PORT = 0x0000080000000000,
- BNXT_ULP_HF19_BITMASK_O_TCP_DST_PORT = 0x0000040000000000,
- BNXT_ULP_HF19_BITMASK_O_TCP_SENT_SEQ = 0x0000020000000000,
- BNXT_ULP_HF19_BITMASK_O_TCP_RECV_ACK = 0x0000010000000000,
- BNXT_ULP_HF19_BITMASK_O_TCP_DATA_OFF = 0x0000008000000000,
- BNXT_ULP_HF19_BITMASK_O_TCP_TCP_FLAGS = 0x0000004000000000,
- BNXT_ULP_HF19_BITMASK_O_TCP_RX_WIN = 0x0000002000000000,
- BNXT_ULP_HF19_BITMASK_O_TCP_CSUM = 0x0000001000000000,
- BNXT_ULP_HF19_BITMASK_O_TCP_URP = 0x0000000800000000
+ BNXT_ULP_HF19_BITMASK_O_UDP_SRC_PORT = 0x0000080000000000,
+ BNXT_ULP_HF19_BITMASK_O_UDP_DST_PORT = 0x0000040000000000,
+ BNXT_ULP_HF19_BITMASK_O_UDP_LENGTH = 0x0000020000000000,
+ BNXT_ULP_HF19_BITMASK_O_UDP_CSUM = 0x0000010000000000,
+ BNXT_ULP_HF19_BITMASK_T_VXLAN_FLAGS = 0x0000008000000000,
+ BNXT_ULP_HF19_BITMASK_T_VXLAN_RSVD0 = 0x0000004000000000,
+ BNXT_ULP_HF19_BITMASK_T_VXLAN_VNI = 0x0000002000000000,
+ BNXT_ULP_HF19_BITMASK_T_VXLAN_RSVD1 = 0x0000001000000000,
+ BNXT_ULP_HF19_BITMASK_I_ETH_DMAC = 0x0000000800000000,
+ BNXT_ULP_HF19_BITMASK_I_ETH_SMAC = 0x0000000400000000,
+ BNXT_ULP_HF19_BITMASK_I_ETH_TYPE = 0x0000000200000000,
+ BNXT_ULP_HF19_BITMASK_IO_VLAN_CFI_PRI = 0x0000000100000000,
+ BNXT_ULP_HF19_BITMASK_IO_VLAN_VID = 0x0000000080000000,
+ BNXT_ULP_HF19_BITMASK_IO_VLAN_TYPE = 0x0000000040000000,
+ BNXT_ULP_HF19_BITMASK_II_VLAN_CFI_PRI = 0x0000000020000000,
+ BNXT_ULP_HF19_BITMASK_II_VLAN_VID = 0x0000000010000000,
+ BNXT_ULP_HF19_BITMASK_II_VLAN_TYPE = 0x0000000008000000,
+ BNXT_ULP_HF19_BITMASK_I_IPV4_VER = 0x0000000004000000,
+ BNXT_ULP_HF19_BITMASK_I_IPV4_TOS = 0x0000000002000000,
+ BNXT_ULP_HF19_BITMASK_I_IPV4_LEN = 0x0000000001000000,
+ BNXT_ULP_HF19_BITMASK_I_IPV4_FRAG_ID = 0x0000000000800000,
+ BNXT_ULP_HF19_BITMASK_I_IPV4_FRAG_OFF = 0x0000000000400000,
+ BNXT_ULP_HF19_BITMASK_I_IPV4_TTL = 0x0000000000200000,
+ BNXT_ULP_HF19_BITMASK_I_IPV4_PROTO_ID = 0x0000000000100000,
+ BNXT_ULP_HF19_BITMASK_I_IPV4_CSUM = 0x0000000000080000,
+ BNXT_ULP_HF19_BITMASK_I_IPV4_SRC_ADDR = 0x0000000000040000,
+ BNXT_ULP_HF19_BITMASK_I_IPV4_DST_ADDR = 0x0000000000020000
};
enum bnxt_ulp_hf_bitmask20 {
@@ -938,18 +1041,20 @@ enum bnxt_ulp_hf_bitmask20 {
BNXT_ULP_HF20_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000,
BNXT_ULP_HF20_BITMASK_OI_VLAN_VID = 0x0080000000000000,
BNXT_ULP_HF20_BITMASK_OI_VLAN_TYPE = 0x0040000000000000,
- BNXT_ULP_HF20_BITMASK_O_IPV6_VER = 0x0020000000000000,
- BNXT_ULP_HF20_BITMASK_O_IPV6_TC = 0x0010000000000000,
- BNXT_ULP_HF20_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000,
- BNXT_ULP_HF20_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000,
- BNXT_ULP_HF20_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000,
- BNXT_ULP_HF20_BITMASK_O_IPV6_TTL = 0x0001000000000000,
- BNXT_ULP_HF20_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000,
- BNXT_ULP_HF20_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000,
- BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT = 0x0000200000000000,
- BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT = 0x0000100000000000,
- BNXT_ULP_HF20_BITMASK_O_UDP_LENGTH = 0x0000080000000000,
- BNXT_ULP_HF20_BITMASK_O_UDP_CSUM = 0x0000040000000000
+ BNXT_ULP_HF20_BITMASK_O_IPV4_VER = 0x0020000000000000,
+ BNXT_ULP_HF20_BITMASK_O_IPV4_TOS = 0x0010000000000000,
+ BNXT_ULP_HF20_BITMASK_O_IPV4_LEN = 0x0008000000000000,
+ BNXT_ULP_HF20_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000,
+ BNXT_ULP_HF20_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000,
+ BNXT_ULP_HF20_BITMASK_O_IPV4_TTL = 0x0001000000000000,
+ BNXT_ULP_HF20_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000,
+ BNXT_ULP_HF20_BITMASK_O_IPV4_CSUM = 0x0000400000000000,
+ BNXT_ULP_HF20_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000,
+ BNXT_ULP_HF20_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000,
+ BNXT_ULP_HF20_BITMASK_O_UDP_SRC_PORT = 0x0000080000000000,
+ BNXT_ULP_HF20_BITMASK_O_UDP_DST_PORT = 0x0000040000000000,
+ BNXT_ULP_HF20_BITMASK_O_UDP_LENGTH = 0x0000020000000000,
+ BNXT_ULP_HF20_BITMASK_O_UDP_CSUM = 0x0000010000000000
};
enum bnxt_ulp_hf_bitmask21 {
@@ -963,23 +1068,25 @@ enum bnxt_ulp_hf_bitmask21 {
BNXT_ULP_HF21_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000,
BNXT_ULP_HF21_BITMASK_OI_VLAN_VID = 0x0080000000000000,
BNXT_ULP_HF21_BITMASK_OI_VLAN_TYPE = 0x0040000000000000,
- BNXT_ULP_HF21_BITMASK_O_IPV6_VER = 0x0020000000000000,
- BNXT_ULP_HF21_BITMASK_O_IPV6_TC = 0x0010000000000000,
- BNXT_ULP_HF21_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000,
- BNXT_ULP_HF21_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000,
- BNXT_ULP_HF21_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000,
- BNXT_ULP_HF21_BITMASK_O_IPV6_TTL = 0x0001000000000000,
- BNXT_ULP_HF21_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000,
- BNXT_ULP_HF21_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000,
- BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT = 0x0000200000000000,
- BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT = 0x0000100000000000,
- BNXT_ULP_HF21_BITMASK_O_TCP_SENT_SEQ = 0x0000080000000000,
- BNXT_ULP_HF21_BITMASK_O_TCP_RECV_ACK = 0x0000040000000000,
- BNXT_ULP_HF21_BITMASK_O_TCP_DATA_OFF = 0x0000020000000000,
- BNXT_ULP_HF21_BITMASK_O_TCP_TCP_FLAGS = 0x0000010000000000,
- BNXT_ULP_HF21_BITMASK_O_TCP_RX_WIN = 0x0000008000000000,
- BNXT_ULP_HF21_BITMASK_O_TCP_CSUM = 0x0000004000000000,
- BNXT_ULP_HF21_BITMASK_O_TCP_URP = 0x0000002000000000
+ BNXT_ULP_HF21_BITMASK_O_IPV4_VER = 0x0020000000000000,
+ BNXT_ULP_HF21_BITMASK_O_IPV4_TOS = 0x0010000000000000,
+ BNXT_ULP_HF21_BITMASK_O_IPV4_LEN = 0x0008000000000000,
+ BNXT_ULP_HF21_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000,
+ BNXT_ULP_HF21_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000,
+ BNXT_ULP_HF21_BITMASK_O_IPV4_TTL = 0x0001000000000000,
+ BNXT_ULP_HF21_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000,
+ BNXT_ULP_HF21_BITMASK_O_IPV4_CSUM = 0x0000400000000000,
+ BNXT_ULP_HF21_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000,
+ BNXT_ULP_HF21_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000,
+ BNXT_ULP_HF21_BITMASK_O_TCP_SRC_PORT = 0x0000080000000000,
+ BNXT_ULP_HF21_BITMASK_O_TCP_DST_PORT = 0x0000040000000000,
+ BNXT_ULP_HF21_BITMASK_O_TCP_SENT_SEQ = 0x0000020000000000,
+ BNXT_ULP_HF21_BITMASK_O_TCP_RECV_ACK = 0x0000010000000000,
+ BNXT_ULP_HF21_BITMASK_O_TCP_DATA_OFF = 0x0000008000000000,
+ BNXT_ULP_HF21_BITMASK_O_TCP_TCP_FLAGS = 0x0000004000000000,
+ BNXT_ULP_HF21_BITMASK_O_TCP_RX_WIN = 0x0000002000000000,
+ BNXT_ULP_HF21_BITMASK_O_TCP_CSUM = 0x0000001000000000,
+ BNXT_ULP_HF21_BITMASK_O_TCP_URP = 0x0000000800000000
};
enum bnxt_ulp_hf_bitmask22 {
@@ -993,16 +1100,18 @@ enum bnxt_ulp_hf_bitmask22 {
BNXT_ULP_HF22_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000,
BNXT_ULP_HF22_BITMASK_OI_VLAN_VID = 0x0080000000000000,
BNXT_ULP_HF22_BITMASK_OI_VLAN_TYPE = 0x0040000000000000,
- BNXT_ULP_HF22_BITMASK_O_IPV4_VER = 0x0020000000000000,
- BNXT_ULP_HF22_BITMASK_O_IPV4_TOS = 0x0010000000000000,
- BNXT_ULP_HF22_BITMASK_O_IPV4_LEN = 0x0008000000000000,
- BNXT_ULP_HF22_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000,
- BNXT_ULP_HF22_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000,
- BNXT_ULP_HF22_BITMASK_O_IPV4_TTL = 0x0001000000000000,
- BNXT_ULP_HF22_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000,
- BNXT_ULP_HF22_BITMASK_O_IPV4_CSUM = 0x0000400000000000,
- BNXT_ULP_HF22_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000,
- BNXT_ULP_HF22_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000
+ BNXT_ULP_HF22_BITMASK_O_IPV6_VER = 0x0020000000000000,
+ BNXT_ULP_HF22_BITMASK_O_IPV6_TC = 0x0010000000000000,
+ BNXT_ULP_HF22_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000,
+ BNXT_ULP_HF22_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000,
+ BNXT_ULP_HF22_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000,
+ BNXT_ULP_HF22_BITMASK_O_IPV6_TTL = 0x0001000000000000,
+ BNXT_ULP_HF22_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000,
+ BNXT_ULP_HF22_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000,
+ BNXT_ULP_HF22_BITMASK_O_UDP_SRC_PORT = 0x0000200000000000,
+ BNXT_ULP_HF22_BITMASK_O_UDP_DST_PORT = 0x0000100000000000,
+ BNXT_ULP_HF22_BITMASK_O_UDP_LENGTH = 0x0000080000000000,
+ BNXT_ULP_HF22_BITMASK_O_UDP_CSUM = 0x0000040000000000
};
enum bnxt_ulp_hf_bitmask23 {
@@ -1023,6 +1132,60 @@ enum bnxt_ulp_hf_bitmask23 {
BNXT_ULP_HF23_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000,
BNXT_ULP_HF23_BITMASK_O_IPV6_TTL = 0x0001000000000000,
BNXT_ULP_HF23_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000,
- BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000
+ BNXT_ULP_HF23_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000,
+ BNXT_ULP_HF23_BITMASK_O_TCP_SRC_PORT = 0x0000200000000000,
+ BNXT_ULP_HF23_BITMASK_O_TCP_DST_PORT = 0x0000100000000000,
+ BNXT_ULP_HF23_BITMASK_O_TCP_SENT_SEQ = 0x0000080000000000,
+ BNXT_ULP_HF23_BITMASK_O_TCP_RECV_ACK = 0x0000040000000000,
+ BNXT_ULP_HF23_BITMASK_O_TCP_DATA_OFF = 0x0000020000000000,
+ BNXT_ULP_HF23_BITMASK_O_TCP_TCP_FLAGS = 0x0000010000000000,
+ BNXT_ULP_HF23_BITMASK_O_TCP_RX_WIN = 0x0000008000000000,
+ BNXT_ULP_HF23_BITMASK_O_TCP_CSUM = 0x0000004000000000,
+ BNXT_ULP_HF23_BITMASK_O_TCP_URP = 0x0000002000000000
};
+
+enum bnxt_ulp_hf_bitmask24 {
+ BNXT_ULP_HF24_BITMASK_SVIF_INDEX = 0x8000000000000000,
+ BNXT_ULP_HF24_BITMASK_O_ETH_DMAC = 0x4000000000000000,
+ BNXT_ULP_HF24_BITMASK_O_ETH_SMAC = 0x2000000000000000,
+ BNXT_ULP_HF24_BITMASK_O_ETH_TYPE = 0x1000000000000000,
+ BNXT_ULP_HF24_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000,
+ BNXT_ULP_HF24_BITMASK_OO_VLAN_VID = 0x0400000000000000,
+ BNXT_ULP_HF24_BITMASK_OO_VLAN_TYPE = 0x0200000000000000,
+ BNXT_ULP_HF24_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000,
+ BNXT_ULP_HF24_BITMASK_OI_VLAN_VID = 0x0080000000000000,
+ BNXT_ULP_HF24_BITMASK_OI_VLAN_TYPE = 0x0040000000000000,
+ BNXT_ULP_HF24_BITMASK_O_IPV4_VER = 0x0020000000000000,
+ BNXT_ULP_HF24_BITMASK_O_IPV4_TOS = 0x0010000000000000,
+ BNXT_ULP_HF24_BITMASK_O_IPV4_LEN = 0x0008000000000000,
+ BNXT_ULP_HF24_BITMASK_O_IPV4_FRAG_ID = 0x0004000000000000,
+ BNXT_ULP_HF24_BITMASK_O_IPV4_FRAG_OFF = 0x0002000000000000,
+ BNXT_ULP_HF24_BITMASK_O_IPV4_TTL = 0x0001000000000000,
+ BNXT_ULP_HF24_BITMASK_O_IPV4_PROTO_ID = 0x0000800000000000,
+ BNXT_ULP_HF24_BITMASK_O_IPV4_CSUM = 0x0000400000000000,
+ BNXT_ULP_HF24_BITMASK_O_IPV4_SRC_ADDR = 0x0000200000000000,
+ BNXT_ULP_HF24_BITMASK_O_IPV4_DST_ADDR = 0x0000100000000000
+};
+
+enum bnxt_ulp_hf_bitmask25 {
+ BNXT_ULP_HF25_BITMASK_SVIF_INDEX = 0x8000000000000000,
+ BNXT_ULP_HF25_BITMASK_O_ETH_DMAC = 0x4000000000000000,
+ BNXT_ULP_HF25_BITMASK_O_ETH_SMAC = 0x2000000000000000,
+ BNXT_ULP_HF25_BITMASK_O_ETH_TYPE = 0x1000000000000000,
+ BNXT_ULP_HF25_BITMASK_OO_VLAN_CFI_PRI = 0x0800000000000000,
+ BNXT_ULP_HF25_BITMASK_OO_VLAN_VID = 0x0400000000000000,
+ BNXT_ULP_HF25_BITMASK_OO_VLAN_TYPE = 0x0200000000000000,
+ BNXT_ULP_HF25_BITMASK_OI_VLAN_CFI_PRI = 0x0100000000000000,
+ BNXT_ULP_HF25_BITMASK_OI_VLAN_VID = 0x0080000000000000,
+ BNXT_ULP_HF25_BITMASK_OI_VLAN_TYPE = 0x0040000000000000,
+ BNXT_ULP_HF25_BITMASK_O_IPV6_VER = 0x0020000000000000,
+ BNXT_ULP_HF25_BITMASK_O_IPV6_TC = 0x0010000000000000,
+ BNXT_ULP_HF25_BITMASK_O_IPV6_FLOW_LABEL = 0x0008000000000000,
+ BNXT_ULP_HF25_BITMASK_O_IPV6_PAYLOAD_LEN = 0x0004000000000000,
+ BNXT_ULP_HF25_BITMASK_O_IPV6_PROTO_ID = 0x0002000000000000,
+ BNXT_ULP_HF25_BITMASK_O_IPV6_TTL = 0x0001000000000000,
+ BNXT_ULP_HF25_BITMASK_O_IPV6_SRC_ADDR = 0x0000800000000000,
+ BNXT_ULP_HF25_BITMASK_O_IPV6_DST_ADDR = 0x0000400000000000
+};
+
#endif
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_act.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_act.c
index 2237ffb942..7a4d492850 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_act.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_act.c
@@ -55,9 +55,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 64,
.result_num_fields = 1,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -72,9 +72,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -89,9 +89,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -105,9 +105,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 0,
.result_num_fields = 0,
.encap_num_fields = 12,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_GLOBAL,
- .index_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -121,9 +121,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -137,9 +137,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -154,9 +154,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 64,
.result_num_fields = 1,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -170,9 +170,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -186,9 +186,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -203,9 +203,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 64,
.result_num_fields = 1,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -219,9 +219,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -235,9 +235,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -252,9 +252,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 64,
.result_num_fields = 1,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -269,9 +269,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 0,
.result_num_fields = 0,
.encap_num_fields = 3,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -286,9 +286,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 0,
.result_num_fields = 0,
.encap_num_fields = 3,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -301,9 +301,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 0,
.result_num_fields = 0,
.encap_num_fields = 12,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -317,9 +317,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 12,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -333,9 +333,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -350,9 +350,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 64,
.result_num_fields = 1,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -367,9 +367,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -384,9 +384,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -400,9 +400,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 0,
.result_num_fields = 0,
.encap_num_fields = 12,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_GLOBAL,
- .index_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -416,9 +416,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -432,9 +432,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 11,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -449,9 +449,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 64,
.result_num_fields = 1,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -467,9 +467,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 0,
.result_num_fields = 0,
.encap_num_fields = 12,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -483,9 +483,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -501,9 +501,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -519,9 +519,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 11,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
}
};
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c
index 62b940daa4..346e15581d 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_stingray_class.c
@@ -96,33 +96,43 @@ struct bnxt_ulp_mapper_tbl_list_info ulp_stingray_class_tmpl_list[] = {
},
[18] = {
.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
- .num_tbls = 6,
+ .num_tbls = 5,
.start_tbl_idx = 92
},
[19] = {
.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
- .num_tbls = 6,
- .start_tbl_idx = 98
+ .num_tbls = 5,
+ .start_tbl_idx = 97
},
[20] = {
.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
.num_tbls = 6,
- .start_tbl_idx = 104
+ .start_tbl_idx = 102
},
[21] = {
.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
.num_tbls = 6,
- .start_tbl_idx = 110
+ .start_tbl_idx = 108
},
[22] = {
.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
- .num_tbls = 5,
- .start_tbl_idx = 116
+ .num_tbls = 6,
+ .start_tbl_idx = 114
},
[23] = {
.device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
+ .num_tbls = 6,
+ .start_tbl_idx = 120
+ },
+ [24] = {
+ .device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
+ .num_tbls = 5,
+ .start_tbl_idx = 126
+ },
+ [25] = {
+ .device_name = BNXT_ULP_DEVICE_ID_STINGRAY,
.num_tbls = 5,
- .start_tbl_idx = 121
+ .start_tbl_idx = 131
}
};
@@ -133,6 +143,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL,
.direction = TF_DIR_RX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
.result_start_idx = 0,
.result_bit_size = 128,
.result_num_fields = 26,
@@ -162,8 +173,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 1,
.blob_key_bit_size = 171,
.key_bit_size = 171,
@@ -216,6 +227,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION,
.direction = TF_DIR_TX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
.result_start_idx = 43,
.result_bit_size = 128,
.result_num_fields = 26,
@@ -230,8 +242,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.cond_opcode = BNXT_ULP_COND_OPCODE_COMP_FIELD_IS_SET,
.cond_operand = BNXT_ULP_CF_IDX_VFR_MODE,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 14,
.blob_key_bit_size = 171,
.key_bit_size = 171,
@@ -270,8 +282,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.cond_opcode = BNXT_ULP_COND_OPCODE_COMP_FIELD_NOT_SET,
.cond_operand = BNXT_ULP_CF_IDX_VFR_MODE,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 28,
.blob_key_bit_size = 171,
.key_bit_size = 171,
@@ -324,6 +336,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL,
.direction = TF_DIR_TX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
.result_start_idx = 99,
.result_bit_size = 0,
.result_num_fields = 0,
@@ -338,6 +351,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION,
.direction = TF_DIR_TX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
.result_start_idx = 111,
.result_bit_size = 128,
.result_num_fields = 26,
@@ -367,8 +381,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 42,
.blob_key_bit_size = 171,
.key_bit_size = 171,
@@ -388,6 +402,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL,
.direction = TF_DIR_RX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
.result_start_idx = 150,
.result_bit_size = 128,
.result_num_fields = 26,
@@ -400,8 +415,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 55,
.blob_key_bit_size = 171,
.key_bit_size = 171,
@@ -419,8 +434,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 68,
.blob_key_bit_size = 171,
.key_bit_size = 171,
@@ -455,8 +470,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 82,
.blob_key_bit_size = 171,
.key_bit_size = 171,
@@ -509,6 +524,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL,
.direction = TF_DIR_RX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
.result_start_idx = 219,
.result_bit_size = 128,
.result_num_fields = 26,
@@ -521,8 +537,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 95,
.blob_key_bit_size = 171,
.key_bit_size = 171,
@@ -542,6 +558,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION,
.direction = TF_DIR_TX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
.result_start_idx = 258,
.result_bit_size = 128,
.result_num_fields = 26,
@@ -554,8 +571,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 108,
.blob_key_bit_size = 171,
.key_bit_size = 171,
@@ -590,8 +607,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_1,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_1,
.key_start_idx = 124,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -645,8 +662,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 189,
.blob_key_bit_size = 171,
.key_bit_size = 171,
@@ -681,8 +698,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_1,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_1,
.key_start_idx = 205,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -753,8 +770,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 271,
.blob_key_bit_size = 171,
.key_bit_size = 171,
@@ -789,8 +806,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 287,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -861,8 +878,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 353,
.blob_key_bit_size = 171,
.key_bit_size = 171,
@@ -897,8 +914,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 369,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -969,8 +986,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 435,
.blob_key_bit_size = 171,
.key_bit_size = 171,
@@ -1005,8 +1022,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 451,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -1077,8 +1094,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 517,
.blob_key_bit_size = 171,
.key_bit_size = 171,
@@ -1113,8 +1130,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 533,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -1168,8 +1185,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 598,
.blob_key_bit_size = 171,
.key_bit_size = 171,
@@ -1204,8 +1221,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 614,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -1259,8 +1276,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 679,
.blob_key_bit_size = 171,
.key_bit_size = 171,
@@ -1295,8 +1312,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 695,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -1350,8 +1367,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 760,
.blob_key_bit_size = 171,
.key_bit_size = 171,
@@ -1386,8 +1403,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 776,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -1441,8 +1458,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 841,
.blob_key_bit_size = 171,
.key_bit_size = 171,
@@ -1477,8 +1494,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 857,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -1532,8 +1549,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 922,
.blob_key_bit_size = 171,
.key_bit_size = 171,
@@ -1568,8 +1585,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 938,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -1623,8 +1640,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 1003,
.blob_key_bit_size = 171,
.key_bit_size = 171,
@@ -1659,8 +1676,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 1019,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -1711,29 +1728,29 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
},
{
- .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+ .resource_type = TF_TBL_TYPE_ACT_STATS_64,
.resource_sub_type =
- BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
- .direction = TF_DIR_TX,
- .key_start_idx = 1084,
- .blob_key_bit_size = 12,
- .key_bit_size = 12,
- .key_num_fields = 1,
+ BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT_ACC,
+ .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET,
+ .cond_operand = BNXT_ULP_ACTION_BIT_COUNT,
+ .direction = TF_DIR_RX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
.result_start_idx = 768,
- .result_bit_size = 10,
+ .result_bit_size = 64,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 27,
- .ident_nums = 1
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
+ .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
+ .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
- .direction = TF_DIR_TX,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
+ .direction = TF_DIR_RX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
- .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1085,
+ .key_start_idx = 1084,
.blob_key_bit_size = 171,
.key_bit_size = 171,
.key_num_fields = 13,
@@ -1741,8 +1758,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 28,
- .ident_nums = 0,
+ .ident_start_idx = 27,
+ .ident_nums = 1,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
},
@@ -1751,71 +1768,145 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
- .direction = TF_DIR_TX,
- .key_start_idx = 1098,
+ .direction = TF_DIR_RX,
+ .key_start_idx = 1097,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
.result_start_idx = 782,
- .result_bit_size = 10,
- .result_num_fields = 1,
+ .result_bit_size = 20,
+ .result_num_fields = 2,
.encap_num_fields = 0,
.ident_start_idx = 28,
- .ident_nums = 1
+ .ident_nums = 2
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
- .direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .direction = TF_DIR_RX,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1101,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1100,
.blob_key_bit_size = 81,
.key_bit_size = 81,
.key_num_fields = 43,
- .result_start_idx = 783,
+ .result_start_idx = 784,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
- .ident_start_idx = 29,
+ .ident_start_idx = 30,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
},
{
- .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
- .resource_type = TF_MEM_EXTERNAL,
- .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT,
- .direction = TF_DIR_TX,
- .key_start_idx = 1144,
- .blob_key_bit_size = 448,
- .key_bit_size = 448,
- .key_num_fields = 11,
- .result_start_idx = 791,
- .result_bit_size = 64,
- .result_num_fields = 9,
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM,
+ .direction = TF_DIR_RX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1143,
+ .blob_key_bit_size = 192,
+ .key_bit_size = 160,
+ .key_num_fields = 5,
+ .result_start_idx = 792,
+ .result_bit_size = 19,
+ .result_num_fields = 3,
.encap_num_fields = 0,
- .ident_start_idx = 29,
+ .ident_start_idx = 30,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
},
{
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
+ .direction = TF_DIR_RX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1148,
+ .blob_key_bit_size = 171,
+ .key_bit_size = 171,
+ .key_num_fields = 13,
+ .result_start_idx = 795,
+ .result_bit_size = 64,
+ .result_num_fields = 13,
+ .encap_num_fields = 0,
+ .ident_start_idx = 30,
+ .ident_nums = 1,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
+ .resource_sub_type =
+ BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
+ .direction = TF_DIR_RX,
+ .key_start_idx = 1161,
+ .blob_key_bit_size = 16,
+ .key_bit_size = 16,
+ .key_num_fields = 3,
+ .result_start_idx = 808,
+ .result_bit_size = 20,
+ .result_num_fields = 2,
+ .encap_num_fields = 0,
+ .ident_start_idx = 31,
+ .ident_nums = 2
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
+ .direction = TF_DIR_RX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1164,
+ .blob_key_bit_size = 81,
+ .key_bit_size = 81,
+ .key_num_fields = 43,
+ .result_start_idx = 810,
+ .result_bit_size = 38,
+ .result_num_fields = 8,
+ .encap_num_fields = 0,
+ .ident_start_idx = 33,
+ .ident_nums = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
+ },
+ {
.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
.resource_type = TF_MEM_INTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT,
- .direction = TF_DIR_TX,
- .key_start_idx = 1155,
- .blob_key_bit_size = 200,
- .key_bit_size = 200,
- .key_num_fields = 11,
- .result_start_idx = 800,
+ .direction = TF_DIR_RX,
+ .key_start_idx = 1207,
+ .blob_key_bit_size = 112,
+ .key_bit_size = 112,
+ .key_num_fields = 8,
+ .result_start_idx = 818,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 29,
+ .ident_start_idx = 33,
.ident_nums = 0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
+ .resource_type = TF_MEM_EXTERNAL,
+ .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT,
+ .direction = TF_DIR_RX,
+ .key_start_idx = 1215,
+ .blob_key_bit_size = 448,
+ .key_bit_size = 448,
+ .key_num_fields = 8,
+ .result_start_idx = 827,
+ .result_bit_size = 64,
+ .result_num_fields = 9,
+ .encap_num_fields = 0,
+ .ident_start_idx = 33,
+ .ident_nums = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
},
{
@@ -1824,32 +1915,32 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1166,
+ .key_start_idx = 1223,
.blob_key_bit_size = 12,
.key_bit_size = 12,
.key_num_fields = 1,
- .result_start_idx = 809,
+ .result_start_idx = 836,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 29,
+ .ident_start_idx = 33,
.ident_nums = 1
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1167,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1224,
.blob_key_bit_size = 171,
.key_bit_size = 171,
.key_num_fields = 13,
- .result_start_idx = 810,
+ .result_start_idx = 837,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 30,
+ .ident_start_idx = 34,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
@@ -1860,32 +1951,32 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1180,
+ .key_start_idx = 1237,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 823,
+ .result_start_idx = 850,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 30,
+ .ident_start_idx = 34,
.ident_nums = 1
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1183,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1240,
.blob_key_bit_size = 81,
.key_bit_size = 81,
.key_num_fields = 43,
- .result_start_idx = 824,
+ .result_start_idx = 851,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
- .ident_start_idx = 31,
+ .ident_start_idx = 35,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
@@ -1895,15 +1986,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_type = TF_MEM_EXTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT,
.direction = TF_DIR_TX,
- .key_start_idx = 1226,
+ .key_start_idx = 1283,
.blob_key_bit_size = 448,
.key_bit_size = 448,
.key_num_fields = 11,
- .result_start_idx = 832,
+ .result_start_idx = 859,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 31,
+ .ident_start_idx = 35,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
@@ -1913,15 +2004,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_type = TF_MEM_INTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT,
.direction = TF_DIR_TX,
- .key_start_idx = 1237,
+ .key_start_idx = 1294,
.blob_key_bit_size = 200,
.key_bit_size = 200,
.key_num_fields = 11,
- .result_start_idx = 841,
+ .result_start_idx = 868,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 31,
+ .ident_start_idx = 35,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
@@ -1932,32 +2023,32 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1248,
+ .key_start_idx = 1305,
.blob_key_bit_size = 12,
.key_bit_size = 12,
.key_num_fields = 1,
- .result_start_idx = 850,
+ .result_start_idx = 877,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 31,
+ .ident_start_idx = 35,
.ident_nums = 1
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1249,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1306,
.blob_key_bit_size = 171,
.key_bit_size = 171,
.key_num_fields = 13,
- .result_start_idx = 851,
+ .result_start_idx = 878,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 32,
+ .ident_start_idx = 36,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
@@ -1968,32 +2059,32 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1262,
+ .key_start_idx = 1319,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 864,
+ .result_start_idx = 891,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 32,
+ .ident_start_idx = 36,
.ident_nums = 1
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1265,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1322,
.blob_key_bit_size = 81,
.key_bit_size = 81,
.key_num_fields = 43,
- .result_start_idx = 865,
+ .result_start_idx = 892,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
- .ident_start_idx = 33,
+ .ident_start_idx = 37,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
@@ -2003,15 +2094,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_type = TF_MEM_EXTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT,
.direction = TF_DIR_TX,
- .key_start_idx = 1308,
+ .key_start_idx = 1365,
.blob_key_bit_size = 448,
.key_bit_size = 448,
.key_num_fields = 11,
- .result_start_idx = 873,
+ .result_start_idx = 900,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 33,
+ .ident_start_idx = 37,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
@@ -2021,15 +2112,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_type = TF_MEM_INTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT,
.direction = TF_DIR_TX,
- .key_start_idx = 1319,
- .blob_key_bit_size = 392,
- .key_bit_size = 392,
+ .key_start_idx = 1376,
+ .blob_key_bit_size = 200,
+ .key_bit_size = 200,
.key_num_fields = 11,
- .result_start_idx = 882,
+ .result_start_idx = 909,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 33,
+ .ident_start_idx = 37,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
@@ -2040,32 +2131,32 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1330,
+ .key_start_idx = 1387,
.blob_key_bit_size = 12,
.key_bit_size = 12,
.key_num_fields = 1,
- .result_start_idx = 891,
+ .result_start_idx = 918,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 33,
+ .ident_start_idx = 37,
.ident_nums = 1
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1331,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1388,
.blob_key_bit_size = 171,
.key_bit_size = 171,
.key_num_fields = 13,
- .result_start_idx = 892,
+ .result_start_idx = 919,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 34,
+ .ident_start_idx = 38,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
@@ -2076,32 +2167,140 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1344,
+ .key_start_idx = 1401,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 905,
+ .result_start_idx = 932,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 34,
+ .ident_start_idx = 38,
.ident_nums = 1
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_TX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1404,
+ .blob_key_bit_size = 81,
+ .key_bit_size = 81,
+ .key_num_fields = 43,
+ .result_start_idx = 933,
+ .result_bit_size = 38,
+ .result_num_fields = 8,
+ .encap_num_fields = 0,
+ .ident_start_idx = 39,
+ .ident_nums = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
+ .resource_type = TF_MEM_EXTERNAL,
+ .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT,
+ .direction = TF_DIR_TX,
+ .key_start_idx = 1447,
+ .blob_key_bit_size = 448,
+ .key_bit_size = 448,
+ .key_num_fields = 11,
+ .result_start_idx = 941,
+ .result_bit_size = 64,
+ .result_num_fields = 9,
+ .encap_num_fields = 0,
+ .ident_start_idx = 39,
+ .ident_nums = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
+ .resource_type = TF_MEM_INTERNAL,
+ .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT,
+ .direction = TF_DIR_TX,
+ .key_start_idx = 1458,
+ .blob_key_bit_size = 392,
+ .key_bit_size = 392,
+ .key_num_fields = 11,
+ .result_start_idx = 950,
+ .result_bit_size = 64,
+ .result_num_fields = 9,
+ .encap_num_fields = 0,
+ .ident_start_idx = 39,
+ .ident_nums = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
+ .resource_sub_type =
+ BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
+ .direction = TF_DIR_TX,
+ .key_start_idx = 1469,
+ .blob_key_bit_size = 12,
+ .key_bit_size = 12,
+ .key_num_fields = 1,
+ .result_start_idx = 959,
+ .result_bit_size = 10,
+ .result_num_fields = 1,
+ .encap_num_fields = 0,
+ .ident_start_idx = 39,
+ .ident_nums = 1
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
+ .direction = TF_DIR_TX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1470,
+ .blob_key_bit_size = 171,
+ .key_bit_size = 171,
+ .key_num_fields = 13,
+ .result_start_idx = 960,
+ .result_bit_size = 64,
+ .result_num_fields = 13,
+ .encap_num_fields = 0,
+ .ident_start_idx = 40,
+ .ident_nums = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
+ .resource_sub_type =
+ BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
+ .direction = TF_DIR_TX,
+ .key_start_idx = 1483,
+ .blob_key_bit_size = 16,
+ .key_bit_size = 16,
+ .key_num_fields = 3,
+ .result_start_idx = 973,
+ .result_bit_size = 10,
+ .result_num_fields = 1,
+ .encap_num_fields = 0,
+ .ident_start_idx = 40,
+ .ident_nums = 1
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
+ .direction = TF_DIR_TX,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1347,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1486,
.blob_key_bit_size = 81,
.key_bit_size = 81,
.key_num_fields = 43,
- .result_start_idx = 906,
+ .result_start_idx = 974,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
- .ident_start_idx = 35,
+ .ident_start_idx = 41,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
@@ -2111,15 +2310,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_type = TF_MEM_EXTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT,
.direction = TF_DIR_TX,
- .key_start_idx = 1390,
+ .key_start_idx = 1529,
.blob_key_bit_size = 448,
.key_bit_size = 448,
.key_num_fields = 11,
- .result_start_idx = 914,
+ .result_start_idx = 982,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 35,
+ .ident_start_idx = 41,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
@@ -2129,15 +2328,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_type = TF_MEM_INTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT,
.direction = TF_DIR_TX,
- .key_start_idx = 1401,
+ .key_start_idx = 1540,
.blob_key_bit_size = 392,
.key_bit_size = 392,
.key_num_fields = 11,
- .result_start_idx = 923,
+ .result_start_idx = 991,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 35,
+ .ident_start_idx = 41,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
@@ -2146,17 +2345,17 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_UPDATE,
- .key_start_idx = 1412,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1551,
.blob_key_bit_size = 171,
.key_bit_size = 171,
.key_num_fields = 13,
- .result_start_idx = 932,
+ .result_start_idx = 1000,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 35,
+ .ident_start_idx = 41,
.ident_nums = 1,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
@@ -2167,32 +2366,32 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1425,
+ .key_start_idx = 1564,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 945,
+ .result_start_idx = 1013,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 36,
+ .ident_start_idx = 42,
.ident_nums = 1
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1428,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1567,
.blob_key_bit_size = 81,
.key_bit_size = 81,
.key_num_fields = 43,
- .result_start_idx = 946,
+ .result_start_idx = 1014,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
- .ident_start_idx = 37,
+ .ident_start_idx = 43,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
@@ -2202,15 +2401,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_type = TF_MEM_EXTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT,
.direction = TF_DIR_TX,
- .key_start_idx = 1471,
+ .key_start_idx = 1610,
.blob_key_bit_size = 448,
.key_bit_size = 448,
.key_num_fields = 7,
- .result_start_idx = 954,
+ .result_start_idx = 1022,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 37,
+ .ident_start_idx = 43,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
@@ -2220,15 +2419,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_type = TF_MEM_INTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT,
.direction = TF_DIR_TX,
- .key_start_idx = 1478,
+ .key_start_idx = 1617,
.blob_key_bit_size = 104,
.key_bit_size = 104,
.key_num_fields = 7,
- .result_start_idx = 963,
+ .result_start_idx = 1031,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 37,
+ .ident_start_idx = 43,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
@@ -2237,17 +2436,17 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_UPDATE,
- .key_start_idx = 1485,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1624,
.blob_key_bit_size = 171,
.key_bit_size = 171,
.key_num_fields = 13,
- .result_start_idx = 972,
+ .result_start_idx = 1040,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 37,
+ .ident_start_idx = 43,
.ident_nums = 1,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
@@ -2258,32 +2457,32 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1498,
+ .key_start_idx = 1637,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 985,
+ .result_start_idx = 1053,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 38,
+ .ident_start_idx = 44,
.ident_nums = 1
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1501,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1640,
.blob_key_bit_size = 81,
.key_bit_size = 81,
.key_num_fields = 43,
- .result_start_idx = 986,
+ .result_start_idx = 1054,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
- .ident_start_idx = 39,
+ .ident_start_idx = 45,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
@@ -2293,15 +2492,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_type = TF_MEM_EXTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT,
.direction = TF_DIR_TX,
- .key_start_idx = 1544,
+ .key_start_idx = 1683,
.blob_key_bit_size = 448,
.key_bit_size = 448,
.key_num_fields = 7,
- .result_start_idx = 994,
+ .result_start_idx = 1062,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 39,
+ .ident_start_idx = 45,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
@@ -2311,15 +2510,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_stingray_class_tbl_list[] = {
.resource_type = TF_MEM_INTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT,
.direction = TF_DIR_TX,
- .key_start_idx = 1551,
+ .key_start_idx = 1690,
.blob_key_bit_size = 104,
.key_bit_size = 104,
.key_num_fields = 7,
- .result_start_idx = 1003,
+ .result_start_idx = 1071,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 39,
+ .ident_start_idx = 45,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
@@ -9156,68 +9355,1047 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
.spec_operand = {
- (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
- BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
+ (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 3,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_IP_PROTO_UDP,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 32,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 32,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 24,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 10,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF17_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF17_IDX_O_ETH_DMAC & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .mask_operand = {
+ (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .mask_operand = {
+ (BNXT_ULP_HF17_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF17_IDX_OO_VLAN_VID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF17_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF17_IDX_OO_VLAN_VID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 7,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TUN_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL4_HDR_TYPE_UDP,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL4_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL3_HDR_TYPE_IPV6,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL3_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL2_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 9,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 7,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 59,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_IP_PROTO_UDP,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 128,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 128,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 24,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 10,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 3,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_IP_PROTO_UDP,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 128,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 128,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 24,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 10,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF18_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF18_IDX_O_ETH_DMAC & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .mask_operand = {
+ (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 7,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TUN_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL4_HDR_TYPE_UDP,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL4_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL3_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL2_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 9,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 7,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 3,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 3,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 16,
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 16,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 8,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_IP_PROTO_UDP,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 32,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
.spec_operand = {
- (BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR & 0xff,
+ (BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 32,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 48,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 24,
+ .field_bit_size = 10,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 10,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
.spec_operand = {
(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
@@ -9226,14 +10404,16 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 8,
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 128,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
- .spec_operand = {
- (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
- BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 12,
@@ -9252,8 +10432,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF17_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_O_ETH_DMAC & 0xff,
+ (BNXT_ULP_HF19_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_O_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -9261,31 +10441,26 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
.field_bit_size = 12,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .mask_operand = {
- (BNXT_ULP_HF17_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_OO_VLAN_VID & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .spec_operand = {
- (BNXT_ULP_HF17_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_OO_VLAN_VID & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 12,
@@ -9307,12 +10482,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
- .spec_operand = {
- (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,
- BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 4,
@@ -9327,11 +10497,6 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 4,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
.field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
@@ -9358,12 +10523,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
{
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
- .spec_operand = {
- (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff,
- BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
@@ -9529,11 +10689,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_TL3_HDR_TYPE_IPV6,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
@@ -9644,56 +10800,42 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 59,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
.field_bit_size = 3,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 16,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 16,
+ .field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 8,
+ .field_bit_size = 48,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- BNXT_ULP_SYM_IP_PROTO_UDP,
+ (BNXT_ULP_HF19_IDX_I_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_I_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 128,
+ .field_bit_size = 24,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR & 0xff,
+ (BNXT_ULP_HF19_IDX_T_VXLAN_VNI >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_T_VXLAN_VNI & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 128,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 48,
+ .field_bit_size = 3,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 24,
+ .field_bit_size = 4,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
@@ -9718,56 +10860,42 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 3,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 3,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 16,
+ .field_bit_size = 339,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 16,
+ .field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 8,
+ .field_bit_size = 48,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- BNXT_ULP_SYM_IP_PROTO_UDP,
+ (BNXT_ULP_HF19_IDX_I_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_I_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 128,
+ .field_bit_size = 24,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR & 0xff,
+ (BNXT_ULP_HF19_IDX_T_VXLAN_VNI >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_T_VXLAN_VNI & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 128,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 48,
+ .field_bit_size = 3,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 24,
+ .field_bit_size = 4,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
@@ -9796,8 +10924,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -9820,14 +10948,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10190,8 +11318,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_O_UDP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_O_UDP_DST_PORT & 0xff,
+ (BNXT_ULP_HF20_IDX_O_UDP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_O_UDP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10200,8 +11328,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_O_UDP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10219,8 +11347,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR & 0xff,
+ (BNXT_ULP_HF20_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_O_IPV4_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10229,8 +11357,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF20_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_O_IPV4_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10279,8 +11407,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_O_UDP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_O_UDP_DST_PORT & 0xff,
+ (BNXT_ULP_HF20_IDX_O_UDP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_O_UDP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10289,8 +11417,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_O_UDP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10308,8 +11436,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR & 0xff,
+ (BNXT_ULP_HF20_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_O_IPV4_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10318,8 +11446,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF20_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_O_IPV4_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10358,8 +11486,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10382,14 +11510,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10748,8 +11876,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_TCP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_TCP_DST_PORT & 0xff,
+ (BNXT_ULP_HF21_IDX_O_TCP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_O_TCP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10758,8 +11886,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_TCP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10777,8 +11905,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_IPV4_DST_ADDR & 0xff,
+ (BNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10787,8 +11915,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_IPV4_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10837,8 +11965,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_TCP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_TCP_DST_PORT & 0xff,
+ (BNXT_ULP_HF21_IDX_O_TCP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_O_TCP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10847,8 +11975,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_TCP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10866,8 +11994,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_IPV4_DST_ADDR & 0xff,
+ (BNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10876,8 +12004,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_IPV4_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10916,8 +12044,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10940,14 +12068,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11314,8 +12442,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_O_UDP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_O_UDP_DST_PORT & 0xff,
+ (BNXT_ULP_HF22_IDX_O_UDP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_O_UDP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11324,8 +12452,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF22_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_O_UDP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11343,8 +12471,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR & 0xff,
+ (BNXT_ULP_HF22_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_O_IPV6_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11353,8 +12481,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF22_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_O_IPV6_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11403,8 +12531,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_O_UDP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_O_UDP_DST_PORT & 0xff,
+ (BNXT_ULP_HF22_IDX_O_UDP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_O_UDP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11413,8 +12541,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF22_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_O_UDP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11432,8 +12560,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR & 0xff,
+ (BNXT_ULP_HF22_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_O_IPV6_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11442,8 +12570,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF22_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_O_IPV6_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11481,9 +12609,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .spec_operand = {
- (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,
+ .spec_operand = {
+ (BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11506,14 +12634,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11876,8 +13004,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_O_TCP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_O_TCP_DST_PORT & 0xff,
+ (BNXT_ULP_HF23_IDX_O_TCP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_O_TCP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11886,8 +13014,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF23_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_O_TCP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11905,8 +13033,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_O_IPV6_DST_ADDR & 0xff,
+ (BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11915,8 +13043,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_O_IPV6_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11965,8 +13093,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_O_TCP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_O_TCP_DST_PORT & 0xff,
+ (BNXT_ULP_HF23_IDX_O_TCP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_O_TCP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11975,8 +13103,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF23_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_O_TCP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11994,8 +13122,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_O_IPV6_DST_ADDR & 0xff,
+ (BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -12004,8 +13132,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_O_IPV6_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -12043,14 +13171,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF22_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF22_IDX_OO_VLAN_VID & 0xff,
+ (BNXT_ULP_HF24_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF24_IDX_OO_VLAN_VID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF22_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF22_IDX_OO_VLAN_VID & 0xff,
+ (BNXT_ULP_HF24_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF24_IDX_OO_VLAN_VID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -12063,14 +13191,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.field_bit_size = 48,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF22_IDX_O_ETH_SMAC >> 8) & 0xff,
- BNXT_ULP_HF22_IDX_O_ETH_SMAC & 0xff,
+ (BNXT_ULP_HF24_IDX_O_ETH_SMAC >> 8) & 0xff,
+ BNXT_ULP_HF24_IDX_O_ETH_SMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF22_IDX_O_ETH_SMAC >> 8) & 0xff,
- BNXT_ULP_HF22_IDX_O_ETH_SMAC & 0xff,
+ (BNXT_ULP_HF24_IDX_O_ETH_SMAC >> 8) & 0xff,
+ BNXT_ULP_HF24_IDX_O_ETH_SMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -12078,14 +13206,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF24_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF24_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF24_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF24_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -12465,8 +13593,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF22_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF22_IDX_O_ETH_DMAC & 0xff,
+ (BNXT_ULP_HF24_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF24_IDX_O_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -12515,8 +13643,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF22_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF22_IDX_O_ETH_DMAC & 0xff,
+ (BNXT_ULP_HF24_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF24_IDX_O_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -12544,14 +13672,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF23_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF23_IDX_OO_VLAN_VID & 0xff,
+ (BNXT_ULP_HF25_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF25_IDX_OO_VLAN_VID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF23_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF23_IDX_OO_VLAN_VID & 0xff,
+ (BNXT_ULP_HF25_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF25_IDX_OO_VLAN_VID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -12564,14 +13692,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.field_bit_size = 48,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF23_IDX_O_ETH_SMAC >> 8) & 0xff,
- BNXT_ULP_HF23_IDX_O_ETH_SMAC & 0xff,
+ (BNXT_ULP_HF25_IDX_O_ETH_SMAC >> 8) & 0xff,
+ BNXT_ULP_HF25_IDX_O_ETH_SMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF23_IDX_O_ETH_SMAC >> 8) & 0xff,
- BNXT_ULP_HF23_IDX_O_ETH_SMAC & 0xff,
+ (BNXT_ULP_HF25_IDX_O_ETH_SMAC >> 8) & 0xff,
+ BNXT_ULP_HF25_IDX_O_ETH_SMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -12579,14 +13707,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF25_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF25_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF25_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF25_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -12970,8 +14098,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF23_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF23_IDX_O_ETH_DMAC & 0xff,
+ (BNXT_ULP_HF25_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF25_IDX_O_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -13020,8 +14148,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_stingray_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF23_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF23_IDX_O_ETH_DMAC & 0xff,
+ (BNXT_ULP_HF25_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF25_IDX_O_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -15685,7 +16813,239 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[]
{
.field_bit_size = 5,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00,
+ .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 33,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 5,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 9,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {
+ (0x0185 >> 8) & 0xff,
+ 0x0185 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 11,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 33,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 5,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 9,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {
+ (0x0185 >> 8) & 0xff,
+ 0x0185 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 11,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 7,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .result_operand = {
+ (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 6,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 2,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 4,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 8,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {
+ (0x00f9 >> 8) & 0xff,
+ 0x00f9 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 5,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
@@ -15736,8 +17096,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[]
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x0185 >> 8) & 0xff,
- 0x0185 & 0xff,
+ (0x00c5 >> 8) & 0xff,
+ 0x00c5 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -15790,8 +17150,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[]
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x0185 >> 8) & 0xff,
- 0x0185 & 0xff,
+ (0x00c5 >> 8) & 0xff,
+ 0x00c5 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -16149,7 +17509,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[]
{
.field_bit_size = 5,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,
+ .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
@@ -16200,8 +17560,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[]
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x00c5 >> 8) & 0xff,
- 0x00c5 & 0xff,
+ (0x0185 >> 8) & 0xff,
+ 0x0185 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -16254,8 +17614,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[]
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x00c5 >> 8) & 0xff,
- 0x00c5 & 0xff,
+ (0x0185 >> 8) & 0xff,
+ 0x0185 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -16524,8 +17884,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[]
.field_bit_size = 7,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.result_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -16605,15 +17965,15 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[]
.field_bit_size = 10,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x00f9 >> 8) & 0xff,
- 0x00f9 & 0xff,
+ (0x0031 >> 8) & 0xff,
+ 0x0031 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 5,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00,
+ .result_operand = {0x14, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
@@ -16664,8 +18024,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[]
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x0185 >> 8) & 0xff,
- 0x0185 & 0xff,
+ (0x00c5 >> 8) & 0xff,
+ 0x00c5 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -16718,8 +18078,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[]
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x0185 >> 8) & 0xff,
- 0x0185 & 0xff,
+ (0x00c5 >> 8) & 0xff,
+ 0x00c5 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -16845,7 +18205,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[]
{
.field_bit_size = 5,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x14, 0x00, 0x00, 0x00, 0x00, 0x00,
+ .result_operand = {0x18, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
@@ -16896,8 +18256,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[]
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x00c5 >> 8) & 0xff,
- 0x00c5 & 0xff,
+ (0x0185 >> 8) & 0xff,
+ 0x0185 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -16950,8 +18310,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[]
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x00c5 >> 8) & 0xff,
- 0x00c5 & 0xff,
+ (0x0185 >> 8) & 0xff,
+ 0x0185 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -16976,6 +18336,10 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[]
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
+ .field_bit_size = 64,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
.field_bit_size = 10,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
.result_operand = {
@@ -17054,30 +18418,46 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[]
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
.field_bit_size = 4,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 8,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 10,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x0031 >> 8) & 0xff,
- 0x0031 & 0xff,
+ (0x001b >> 8) & 0xff,
+ 0x001b & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 5,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x18, 0x00, 0x00, 0x00, 0x00, 0x00,
+ .result_operand = {0x08, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
@@ -17100,6 +18480,146 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[]
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
+ .field_bit_size = 2,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 16,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 7,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .result_operand = {
+ (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 6,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 2,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 4,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 8,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 5,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 8,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
.field_bit_size = 33,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
.result_operand = {
@@ -17128,8 +18648,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[]
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x0185 >> 8) & 0xff,
- 0x0185 & 0xff,
+ (0x006d >> 8) & 0xff,
+ 0x006d & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -17182,8 +18702,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_stingray_class_result_field_list[]
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x0185 >> 8) & 0xff,
- 0x0185 & 0xff,
+ (0x006d >> 8) & 0xff,
+ 0x006d & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -18933,6 +20453,48 @@ struct bnxt_ulp_mapper_ident_info ulp_stingray_class_ident_list[] = {
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+ .ident_type = TF_IDENT_TYPE_EM_PROF,
+ .regfile_idx = BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0,
+ .ident_bit_size = 10,
+ .ident_bit_pos = 0
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+ .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH,
+ .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,
+ .ident_bit_size = 10,
+ .ident_bit_pos = 0
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+ .ident_type = TF_IDENT_TYPE_EM_PROF,
+ .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,
+ .ident_bit_size = 10,
+ .ident_bit_pos = 0
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+ .ident_type = TF_IDENT_TYPE_EM_PROF,
+ .regfile_idx = BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0,
+ .ident_bit_size = 10,
+ .ident_bit_pos = 0
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+ .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH,
+ .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,
+ .ident_bit_size = 10,
+ .ident_bit_pos = 0
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+ .ident_type = TF_IDENT_TYPE_EM_PROF,
+ .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,
+ .ident_bit_size = 10,
+ .ident_bit_pos = 0
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
.ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH,
.regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,
.ident_bit_size = 10,
@@ -19002,4 +20564,3 @@ struct bnxt_ulp_mapper_ident_info ulp_stingray_class_ident_list[] = {
.ident_bit_pos = 0
}
};
-
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c
index 7f5a316804..c5f340d7bb 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c
@@ -90,6 +90,8 @@ uint32_t ulp_act_prop_map_table[] = {
BNXT_ULP_ACT_PROP_SZ_ENCAP_UDP,
[BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN] =
BNXT_ULP_ACT_PROP_SZ_ENCAP_TUN,
+ [BNXT_ULP_ACT_PROP_IDX_JUMP] =
+ BNXT_ULP_ACT_PROP_SZ_JUMP,
[BNXT_ULP_ACT_PROP_IDX_LAST] =
BNXT_ULP_ACT_PROP_SZ_LAST
};
@@ -108,8 +110,8 @@ struct bnxt_ulp_rte_act_info ulp_act_info[] = {
.proto_act_func = NULL
},
[RTE_FLOW_ACTION_TYPE_JUMP] = {
- .act_type = BNXT_ULP_ACT_TYPE_NOT_SUPPORTED,
- .proto_act_func = NULL
+ .act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
+ .proto_act_func = ulp_rte_jump_act_handler
},
[RTE_FLOW_ACTION_TYPE_MARK] = {
.act_type = BNXT_ULP_ACT_TYPE_SUPPORTED,
@@ -369,6 +371,7 @@ struct bnxt_ulp_device_params ulp_device_params[BNXT_ULP_DEVICE_ID_LAST] = {
.mark_db_lfid_entries = 65536,
.mark_db_gfid_entries = 65536,
.flow_count_db_entries = 16384,
+ .fdb_parent_flow_entries = 2,
.num_resources_per_flow = 8,
.num_phy_ports = 2,
.ext_cntr_table_type = 0,
@@ -414,7 +417,7 @@ struct bnxt_ulp_glb_resource_info ulp_glb_resource_tbl[] = {
[5] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
.resource_type = TF_IDENT_TYPE_PROF_FUNC,
- .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID,
+ .glb_regfile_index = BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID,
.direction = TF_DIR_RX
},
[6] = {
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c
index 39e8ec40b7..33e758555f 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c
@@ -55,9 +55,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 64,
.result_num_fields = 1,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -72,9 +72,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -89,9 +89,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -104,9 +104,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 0,
.result_num_fields = 0,
.encap_num_fields = 12,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_GLOBAL,
- .index_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -120,9 +120,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -136,9 +136,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -153,9 +153,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 64,
.result_num_fields = 1,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -169,9 +169,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -185,9 +185,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -202,9 +202,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 64,
.result_num_fields = 1,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -218,9 +218,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -234,9 +234,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -251,9 +251,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 64,
.result_num_fields = 1,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -268,9 +268,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 0,
.result_num_fields = 0,
.encap_num_fields = 3,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -285,9 +285,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 0,
.result_num_fields = 0,
.encap_num_fields = 3,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_SP_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -300,9 +300,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 0,
.result_num_fields = 0,
.encap_num_fields = 12,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -316,9 +316,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 12,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -332,9 +332,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -349,9 +349,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 64,
.result_num_fields = 1,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -366,9 +366,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_SRC_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -383,9 +383,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 32,
.result_num_fields = 1,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MODIFY_IPV4_DST_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -399,9 +399,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 0,
.result_num_fields = 0,
.encap_num_fields = 12,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_GLOBAL,
- .index_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_GLB_REGFILE_INDEX_ENCAP_MAC_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -415,9 +415,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -431,9 +431,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 11,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -448,9 +448,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 64,
.result_num_fields = 1,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -466,9 +466,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 0,
.result_num_fields = 0,
.encap_num_fields = 12,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_ENCAP_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -482,9 +482,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -500,9 +500,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
@@ -518,9 +518,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = {
.result_bit_size = 128,
.result_num_fields = 26,
.encap_num_fields = 11,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
- .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP
+ .index_operand = BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR
}
};
diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c
index 470d91ce22..2270691571 100644
--- a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c
+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c
@@ -96,33 +96,43 @@ struct bnxt_ulp_mapper_tbl_list_info ulp_wh_plus_class_tmpl_list[] = {
},
[18] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
- .num_tbls = 6,
+ .num_tbls = 5,
.start_tbl_idx = 92
},
[19] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
- .num_tbls = 6,
- .start_tbl_idx = 98
+ .num_tbls = 5,
+ .start_tbl_idx = 97
},
[20] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
.num_tbls = 6,
- .start_tbl_idx = 104
+ .start_tbl_idx = 102
},
[21] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
.num_tbls = 6,
- .start_tbl_idx = 110
+ .start_tbl_idx = 108
},
[22] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
- .num_tbls = 5,
- .start_tbl_idx = 116
+ .num_tbls = 6,
+ .start_tbl_idx = 114
},
[23] = {
.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
+ .num_tbls = 6,
+ .start_tbl_idx = 120
+ },
+ [24] = {
+ .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
+ .num_tbls = 5,
+ .start_tbl_idx = 126
+ },
+ [25] = {
+ .device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,
.num_tbls = 5,
- .start_tbl_idx = 121
+ .start_tbl_idx = 131
}
};
@@ -133,6 +143,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL,
.direction = TF_DIR_RX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
.result_start_idx = 0,
.result_bit_size = 128,
.result_num_fields = 26,
@@ -162,8 +173,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 1,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -216,6 +227,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION,
.direction = TF_DIR_TX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
.result_start_idx = 43,
.result_bit_size = 128,
.result_num_fields = 26,
@@ -230,8 +242,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.cond_opcode = BNXT_ULP_COND_OPCODE_COMP_FIELD_IS_SET,
.cond_operand = BNXT_ULP_CF_IDX_VFR_MODE,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 14,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -270,8 +282,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.cond_opcode = BNXT_ULP_COND_OPCODE_COMP_FIELD_NOT_SET,
.cond_operand = BNXT_ULP_CF_IDX_VFR_MODE,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 28,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -324,6 +336,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL,
.direction = TF_DIR_TX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
.result_start_idx = 99,
.result_bit_size = 0,
.result_num_fields = 0,
@@ -338,6 +351,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION,
.direction = TF_DIR_TX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
.result_start_idx = 111,
.result_bit_size = 128,
.result_num_fields = 26,
@@ -367,8 +381,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 42,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -388,6 +402,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL,
.direction = TF_DIR_RX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
.result_start_idx = 150,
.result_bit_size = 128,
.result_num_fields = 26,
@@ -400,8 +415,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 55,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -419,8 +434,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 68,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -455,8 +470,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 82,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -509,6 +524,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_NORMAL,
.direction = TF_DIR_RX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
.result_start_idx = 219,
.result_bit_size = 128,
.result_num_fields = 26,
@@ -521,8 +537,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 95,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -542,6 +558,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_VFR_CFA_ACTION,
.direction = TF_DIR_TX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
.result_start_idx = 258,
.result_bit_size = 128,
.result_num_fields = 26,
@@ -554,8 +571,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 108,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -590,8 +607,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_1,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_1,
.key_start_idx = 124,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -645,8 +662,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 189,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -681,8 +698,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_1,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_1,
.key_start_idx = 205,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -753,8 +770,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 271,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -789,8 +806,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 287,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -861,8 +878,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 353,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -897,8 +914,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 369,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -969,8 +986,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 435,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -1005,8 +1022,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 451,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -1077,8 +1094,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 517,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -1113,8 +1130,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 533,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -1168,8 +1185,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 598,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -1204,8 +1221,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 614,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -1259,8 +1276,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 679,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -1295,8 +1312,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 695,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -1350,8 +1367,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 760,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -1386,8 +1403,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 776,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -1441,8 +1458,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 841,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -1477,8 +1494,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 857,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -1532,8 +1549,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 922,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -1568,8 +1585,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 938,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -1623,8 +1640,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 1003,
.blob_key_bit_size = 167,
.key_bit_size = 167,
@@ -1659,8 +1676,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_RX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.key_start_idx = 1019,
.blob_key_bit_size = 81,
.key_bit_size = 81,
@@ -1711,29 +1728,29 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
},
{
- .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
+ .resource_type = TF_TBL_TYPE_ACT_STATS_64,
.resource_sub_type =
- BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
- .direction = TF_DIR_TX,
- .key_start_idx = 1084,
- .blob_key_bit_size = 8,
- .key_bit_size = 8,
- .key_num_fields = 1,
+ BNXT_ULP_RESOURCE_SUB_TYPE_INDEX_TYPE_INT_COUNT_ACC,
+ .cond_opcode = BNXT_ULP_COND_OPCODE_ACTION_BIT_IS_SET,
+ .cond_operand = BNXT_ULP_ACTION_BIT_COUNT,
+ .direction = TF_DIR_RX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
.result_start_idx = 768,
- .result_bit_size = 10,
+ .result_bit_size = 64,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 27,
- .ident_nums = 1
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
+ .index_opcode = BNXT_ULP_INDEX_OPCODE_ALLOCATE,
+ .index_operand = BNXT_ULP_REGFILE_INDEX_FLOW_CNTR_PTR_0
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
- .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
- .direction = TF_DIR_TX,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
+ .direction = TF_DIR_RX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
- .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1085,
+ .key_start_idx = 1084,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
@@ -1741,8 +1758,8 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 28,
- .ident_nums = 0,
+ .ident_start_idx = 27,
+ .ident_nums = 1,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
},
@@ -1751,71 +1768,145 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
- .direction = TF_DIR_TX,
- .key_start_idx = 1098,
+ .direction = TF_DIR_RX,
+ .key_start_idx = 1097,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
.result_start_idx = 782,
- .result_bit_size = 10,
- .result_num_fields = 1,
+ .result_bit_size = 20,
+ .result_num_fields = 2,
.encap_num_fields = 0,
.ident_start_idx = 28,
- .ident_nums = 1
+ .ident_nums = 2
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
- .direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .direction = TF_DIR_RX,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1101,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1100,
.blob_key_bit_size = 81,
.key_bit_size = 81,
.key_num_fields = 43,
- .result_start_idx = 783,
+ .result_start_idx = 784,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
- .ident_start_idx = 29,
+ .ident_start_idx = 30,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
},
{
- .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
- .resource_type = TF_MEM_EXTERNAL,
- .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT,
- .direction = TF_DIR_TX,
- .key_start_idx = 1144,
- .blob_key_bit_size = 448,
- .key_bit_size = 448,
- .key_num_fields = 11,
- .result_start_idx = 791,
- .result_bit_size = 64,
- .result_num_fields = 9,
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_WC_TCAM,
+ .direction = TF_DIR_RX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1143,
+ .blob_key_bit_size = 192,
+ .key_bit_size = 160,
+ .key_num_fields = 5,
+ .result_start_idx = 792,
+ .result_bit_size = 19,
+ .result_num_fields = 3,
.encap_num_fields = 0,
- .ident_start_idx = 29,
+ .ident_start_idx = 30,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
},
{
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
+ .direction = TF_DIR_RX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_SKIP,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1148,
+ .blob_key_bit_size = 167,
+ .key_bit_size = 167,
+ .key_num_fields = 13,
+ .result_start_idx = 795,
+ .result_bit_size = 64,
+ .result_num_fields = 13,
+ .encap_num_fields = 0,
+ .ident_start_idx = 30,
+ .ident_nums = 1,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
+ .resource_sub_type =
+ BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
+ .direction = TF_DIR_RX,
+ .key_start_idx = 1161,
+ .blob_key_bit_size = 16,
+ .key_bit_size = 16,
+ .key_num_fields = 3,
+ .result_start_idx = 808,
+ .result_bit_size = 20,
+ .result_num_fields = 2,
+ .encap_num_fields = 0,
+ .ident_start_idx = 31,
+ .ident_nums = 2
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
+ .direction = TF_DIR_RX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1164,
+ .blob_key_bit_size = 81,
+ .key_bit_size = 81,
+ .key_num_fields = 43,
+ .result_start_idx = 810,
+ .result_bit_size = 38,
+ .result_num_fields = 8,
+ .encap_num_fields = 0,
+ .ident_start_idx = 33,
+ .ident_nums = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
+ },
+ {
.resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
.resource_type = TF_MEM_INTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT,
- .direction = TF_DIR_TX,
- .key_start_idx = 1155,
- .blob_key_bit_size = 200,
- .key_bit_size = 200,
- .key_num_fields = 11,
- .result_start_idx = 800,
+ .direction = TF_DIR_RX,
+ .key_start_idx = 1207,
+ .blob_key_bit_size = 112,
+ .key_bit_size = 112,
+ .key_num_fields = 8,
+ .result_start_idx = 818,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 29,
+ .ident_start_idx = 33,
.ident_nums = 0,
- .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
+ .resource_type = TF_MEM_EXTERNAL,
+ .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT,
+ .direction = TF_DIR_RX,
+ .key_start_idx = 1215,
+ .blob_key_bit_size = 448,
+ .key_bit_size = 448,
+ .key_num_fields = 8,
+ .result_start_idx = 827,
+ .result_bit_size = 64,
+ .result_num_fields = 9,
+ .encap_num_fields = 0,
+ .ident_start_idx = 33,
+ .ident_nums = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
},
{
@@ -1824,32 +1915,32 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1166,
+ .key_start_idx = 1223,
.blob_key_bit_size = 8,
.key_bit_size = 8,
.key_num_fields = 1,
- .result_start_idx = 809,
+ .result_start_idx = 836,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 29,
+ .ident_start_idx = 33,
.ident_nums = 1
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1167,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1224,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 810,
+ .result_start_idx = 837,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 30,
+ .ident_start_idx = 34,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
@@ -1860,32 +1951,32 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1180,
+ .key_start_idx = 1237,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 823,
+ .result_start_idx = 850,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 30,
+ .ident_start_idx = 34,
.ident_nums = 1
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1183,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1240,
.blob_key_bit_size = 81,
.key_bit_size = 81,
.key_num_fields = 43,
- .result_start_idx = 824,
+ .result_start_idx = 851,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
- .ident_start_idx = 31,
+ .ident_start_idx = 35,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
@@ -1895,15 +1986,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_type = TF_MEM_EXTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT,
.direction = TF_DIR_TX,
- .key_start_idx = 1226,
+ .key_start_idx = 1283,
.blob_key_bit_size = 448,
.key_bit_size = 448,
.key_num_fields = 11,
- .result_start_idx = 832,
+ .result_start_idx = 859,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 31,
+ .ident_start_idx = 35,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
@@ -1913,15 +2004,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_type = TF_MEM_INTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT,
.direction = TF_DIR_TX,
- .key_start_idx = 1237,
+ .key_start_idx = 1294,
.blob_key_bit_size = 200,
.key_bit_size = 200,
.key_num_fields = 11,
- .result_start_idx = 841,
+ .result_start_idx = 868,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 31,
+ .ident_start_idx = 35,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
@@ -1932,32 +2023,32 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1248,
+ .key_start_idx = 1305,
.blob_key_bit_size = 8,
.key_bit_size = 8,
.key_num_fields = 1,
- .result_start_idx = 850,
+ .result_start_idx = 877,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 31,
+ .ident_start_idx = 35,
.ident_nums = 1
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1249,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1306,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 851,
+ .result_start_idx = 878,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 32,
+ .ident_start_idx = 36,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
@@ -1968,32 +2059,32 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1262,
+ .key_start_idx = 1319,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 864,
+ .result_start_idx = 891,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 32,
+ .ident_start_idx = 36,
.ident_nums = 1
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1265,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1322,
.blob_key_bit_size = 81,
.key_bit_size = 81,
.key_num_fields = 43,
- .result_start_idx = 865,
+ .result_start_idx = 892,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
- .ident_start_idx = 33,
+ .ident_start_idx = 37,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
@@ -2003,15 +2094,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_type = TF_MEM_EXTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT,
.direction = TF_DIR_TX,
- .key_start_idx = 1308,
+ .key_start_idx = 1365,
.blob_key_bit_size = 448,
.key_bit_size = 448,
.key_num_fields = 11,
- .result_start_idx = 873,
+ .result_start_idx = 900,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 33,
+ .ident_start_idx = 37,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
@@ -2021,15 +2112,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_type = TF_MEM_INTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT,
.direction = TF_DIR_TX,
- .key_start_idx = 1319,
- .blob_key_bit_size = 392,
- .key_bit_size = 392,
+ .key_start_idx = 1376,
+ .blob_key_bit_size = 200,
+ .key_bit_size = 200,
.key_num_fields = 11,
- .result_start_idx = 882,
+ .result_start_idx = 909,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 33,
+ .ident_start_idx = 37,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
@@ -2040,32 +2131,32 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1330,
+ .key_start_idx = 1387,
.blob_key_bit_size = 8,
.key_bit_size = 8,
.key_num_fields = 1,
- .result_start_idx = 891,
+ .result_start_idx = 918,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 33,
+ .ident_start_idx = 37,
.ident_nums = 1
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1331,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1388,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 892,
+ .result_start_idx = 919,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 34,
+ .ident_start_idx = 38,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
@@ -2076,32 +2167,140 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1344,
+ .key_start_idx = 1401,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 905,
+ .result_start_idx = 932,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 34,
+ .ident_start_idx = 38,
.ident_nums = 1
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_TX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1404,
+ .blob_key_bit_size = 81,
+ .key_bit_size = 81,
+ .key_num_fields = 43,
+ .result_start_idx = 933,
+ .result_bit_size = 38,
+ .result_num_fields = 8,
+ .encap_num_fields = 0,
+ .ident_start_idx = 39,
+ .ident_nums = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE,
+ .resource_type = TF_MEM_EXTERNAL,
+ .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT,
+ .direction = TF_DIR_TX,
+ .key_start_idx = 1447,
+ .blob_key_bit_size = 448,
+ .key_bit_size = 448,
+ .key_num_fields = 11,
+ .result_start_idx = 941,
+ .result_bit_size = 64,
+ .result_num_fields = 9,
+ .encap_num_fields = 0,
+ .ident_start_idx = 39,
+ .ident_nums = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_INT_EM_TABLE,
+ .resource_type = TF_MEM_INTERNAL,
+ .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT,
+ .direction = TF_DIR_TX,
+ .key_start_idx = 1458,
+ .blob_key_bit_size = 392,
+ .key_bit_size = 392,
+ .key_num_fields = 11,
+ .result_start_idx = 950,
+ .result_bit_size = 64,
+ .result_num_fields = 9,
+ .encap_num_fields = 0,
+ .ident_start_idx = 39,
+ .ident_nums = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
+ .resource_sub_type =
+ BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_L2_CNTXT_TCAM,
+ .direction = TF_DIR_TX,
+ .key_start_idx = 1469,
+ .blob_key_bit_size = 8,
+ .key_bit_size = 8,
+ .key_num_fields = 1,
+ .result_start_idx = 959,
+ .result_bit_size = 10,
+ .result_num_fields = 1,
+ .encap_num_fields = 0,
+ .ident_start_idx = 39,
+ .ident_nums = 1
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_LOW,
+ .direction = TF_DIR_TX,
+ .srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
.priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1470,
+ .blob_key_bit_size = 167,
+ .key_bit_size = 167,
+ .key_num_fields = 13,
+ .result_start_idx = 960,
+ .result_bit_size = 64,
+ .result_num_fields = 13,
+ .encap_num_fields = 0,
+ .ident_start_idx = 40,
+ .ident_nums = 0,
+ .mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
+ .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_CACHE_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
+ .resource_sub_type =
+ BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
+ .direction = TF_DIR_TX,
+ .key_start_idx = 1483,
+ .blob_key_bit_size = 16,
+ .key_bit_size = 16,
+ .key_num_fields = 3,
+ .result_start_idx = 973,
+ .result_bit_size = 10,
+ .result_num_fields = 1,
+ .encap_num_fields = 0,
+ .ident_start_idx = 40,
+ .ident_nums = 1
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
+ .resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
+ .direction = TF_DIR_TX,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1347,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1486,
.blob_key_bit_size = 81,
.key_bit_size = 81,
.key_num_fields = 43,
- .result_start_idx = 906,
+ .result_start_idx = 974,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
- .ident_start_idx = 35,
+ .ident_start_idx = 41,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
@@ -2111,15 +2310,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_type = TF_MEM_EXTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT,
.direction = TF_DIR_TX,
- .key_start_idx = 1390,
+ .key_start_idx = 1529,
.blob_key_bit_size = 448,
.key_bit_size = 448,
.key_num_fields = 11,
- .result_start_idx = 914,
+ .result_start_idx = 982,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 35,
+ .ident_start_idx = 41,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
@@ -2129,15 +2328,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_type = TF_MEM_INTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT,
.direction = TF_DIR_TX,
- .key_start_idx = 1401,
+ .key_start_idx = 1540,
.blob_key_bit_size = 392,
.key_bit_size = 392,
.key_num_fields = 11,
- .result_start_idx = 923,
+ .result_start_idx = 991,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 35,
+ .ident_start_idx = 41,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_SET_IF_MARK_ACTION,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
@@ -2146,17 +2345,17 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_UPDATE,
- .key_start_idx = 1412,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1551,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 932,
+ .result_start_idx = 1000,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 35,
+ .ident_start_idx = 41,
.ident_nums = 1,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
@@ -2167,32 +2366,32 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1425,
+ .key_start_idx = 1564,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 945,
+ .result_start_idx = 1013,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 36,
+ .ident_start_idx = 42,
.ident_nums = 1
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1428,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1567,
.blob_key_bit_size = 81,
.key_bit_size = 81,
.key_num_fields = 43,
- .result_start_idx = 946,
+ .result_start_idx = 1014,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
- .ident_start_idx = 37,
+ .ident_start_idx = 43,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
@@ -2202,15 +2401,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_type = TF_MEM_EXTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT,
.direction = TF_DIR_TX,
- .key_start_idx = 1471,
+ .key_start_idx = 1610,
.blob_key_bit_size = 448,
.key_bit_size = 448,
.key_num_fields = 7,
- .result_start_idx = 954,
+ .result_start_idx = 1022,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 37,
+ .ident_start_idx = 43,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
@@ -2220,15 +2419,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_type = TF_MEM_INTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT,
.direction = TF_DIR_TX,
- .key_start_idx = 1478,
+ .key_start_idx = 1617,
.blob_key_bit_size = 104,
.key_bit_size = 104,
.key_num_fields = 7,
- .result_start_idx = 963,
+ .result_start_idx = 1031,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 37,
+ .ident_start_idx = 43,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
@@ -2237,17 +2436,17 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_SEARCH_IF_HIT_UPDATE,
- .key_start_idx = 1485,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1624,
.blob_key_bit_size = 167,
.key_bit_size = 167,
.key_num_fields = 13,
- .result_start_idx = 972,
+ .result_start_idx = 1040,
.result_bit_size = 64,
.result_num_fields = 13,
.encap_num_fields = 0,
- .ident_start_idx = 37,
+ .ident_start_idx = 43,
.ident_nums = 1,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
@@ -2258,32 +2457,32 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_sub_type =
BNXT_ULP_RESOURCE_SUB_TYPE_CACHE_TYPE_PROFILE_TCAM,
.direction = TF_DIR_TX,
- .key_start_idx = 1498,
+ .key_start_idx = 1637,
.blob_key_bit_size = 16,
.key_bit_size = 16,
.key_num_fields = 3,
- .result_start_idx = 985,
+ .result_start_idx = 1053,
.result_bit_size = 10,
.result_num_fields = 1,
.encap_num_fields = 0,
- .ident_start_idx = 38,
+ .ident_start_idx = 44,
.ident_nums = 1
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_PROF_TCAM,
.direction = TF_DIR_TX,
- .priority = BNXT_ULP_PRIORITY_LEVEL_0,
.srch_b4_alloc = BNXT_ULP_SEARCH_BEFORE_ALLOC_NO,
- .key_start_idx = 1501,
+ .priority = BNXT_ULP_PRIORITY_LEVEL_0,
+ .key_start_idx = 1640,
.blob_key_bit_size = 81,
.key_bit_size = 81,
.key_num_fields = 43,
- .result_start_idx = 986,
+ .result_start_idx = 1054,
.result_bit_size = 38,
.result_num_fields = 8,
.encap_num_fields = 0,
- .ident_start_idx = 39,
+ .ident_start_idx = 45,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO
@@ -2293,15 +2492,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_type = TF_MEM_EXTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_EXT,
.direction = TF_DIR_TX,
- .key_start_idx = 1544,
+ .key_start_idx = 1683,
.blob_key_bit_size = 448,
.key_bit_size = 448,
.key_num_fields = 7,
- .result_start_idx = 994,
+ .result_start_idx = 1062,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 39,
+ .ident_start_idx = 45,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
@@ -2311,15 +2510,15 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.resource_type = TF_MEM_INTERNAL,
.mem_type_opcode = BNXT_ULP_MEM_TYPE_OPCODE_EXECUTE_IF_INT,
.direction = TF_DIR_TX,
- .key_start_idx = 1551,
+ .key_start_idx = 1690,
.blob_key_bit_size = 104,
.key_bit_size = 104,
.key_num_fields = 7,
- .result_start_idx = 1003,
+ .result_start_idx = 1071,
.result_bit_size = 64,
.result_num_fields = 9,
.encap_num_fields = 0,
- .ident_start_idx = 39,
+ .ident_start_idx = 45,
.ident_nums = 0,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPCODE_NOP,
.critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES
@@ -9152,72 +9351,1051 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 8,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 3,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_IP_PROTO_UDP,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 32,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 32,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 24,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 10,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF17_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF17_IDX_O_ETH_DMAC & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .mask_operand = {
+ (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .mask_operand = {
+ (BNXT_ULP_HF17_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF17_IDX_OO_VLAN_VID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF17_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF17_IDX_OO_VLAN_VID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 7,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TUN_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL4_HDR_TYPE_UDP,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL4_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL3_HDR_TYPE_IPV6,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL3_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL2_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 9,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 7,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 59,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_IP_PROTO_UDP,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 128,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 128,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 24,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 10,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 3,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_IP_PROTO_UDP,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 128,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 128,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 24,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 10,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF18_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF18_IDX_O_ETH_DMAC & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .mask_operand = {
+ (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .spec_operand = {
+ (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 12,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 48,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 7,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
+ .spec_operand = {
+ (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TUN_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL4_HDR_TYPE_UDP,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL4_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL3_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_operand = {
+ BNXT_ULP_SYM_TL2_HDR_VALID_YES,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 9,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 7,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.spec_operand = {
- (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
- BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 3,
+ .field_bit_size = 1,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 3,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 16,
+ .field_bit_size = 2,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 16,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .field_bit_size = 2,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 8,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .field_bit_size = 1,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_IP_PROTO_UDP,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 32,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
+ .field_bit_size = 8,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
.spec_operand = {
- (BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF16_IDX_O_IPV4_DST_ADDR & 0xff,
+ (BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 32,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 48,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 24,
+ .field_bit_size = 10,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 10,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
.spec_operand = {
(BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
@@ -9226,14 +10404,16 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 8,
+ .field_bit_size = 4,
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 128,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
- .spec_operand = {
- (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
- BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 12,
@@ -9252,8 +10432,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF17_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_O_ETH_DMAC & 0xff,
+ (BNXT_ULP_HF19_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_O_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -9261,14 +10441,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF17_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -9279,18 +10459,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
},
{
.field_bit_size = 12,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .mask_operand = {
- (BNXT_ULP_HF17_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_OO_VLAN_VID & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .spec_operand = {
- (BNXT_ULP_HF17_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_OO_VLAN_VID & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 12,
@@ -9312,12 +10482,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
- .spec_operand = {
- (BNXT_ULP_CF_IDX_O_VTAG_NUM >> 8) & 0xff,
- BNXT_ULP_CF_IDX_O_VTAG_NUM & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 4,
@@ -9358,12 +10523,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
{
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
- .spec_operand = {
- (BNXT_ULP_REGFILE_INDEX_CLASS_TID >> 8) & 0xff,
- BNXT_ULP_REGFILE_INDEX_CLASS_TID & 0xff,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
@@ -9529,11 +10689,7 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.mask_operand = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff},
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .spec_operand = {
- BNXT_ULP_SYM_TL3_HDR_TYPE_IPV6,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 1,
@@ -9644,56 +10800,42 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 59,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
.field_bit_size = 3,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 16,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 16,
+ .field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 8,
+ .field_bit_size = 48,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- BNXT_ULP_SYM_IP_PROTO_UDP,
+ (BNXT_ULP_HF19_IDX_I_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_I_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 128,
+ .field_bit_size = 24,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR & 0xff,
+ (BNXT_ULP_HF19_IDX_T_VXLAN_VNI >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_T_VXLAN_VNI & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 128,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 48,
+ .field_bit_size = 3,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 24,
+ .field_bit_size = 4,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
@@ -9718,56 +10860,42 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 3,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 3,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 16,
+ .field_bit_size = 339,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 16,
+ .field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 8,
+ .field_bit_size = 48,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- BNXT_ULP_SYM_IP_PROTO_UDP,
+ (BNXT_ULP_HF19_IDX_I_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_I_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 128,
+ .field_bit_size = 24,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF17_IDX_O_IPV6_DST_ADDR & 0xff,
+ (BNXT_ULP_HF19_IDX_T_VXLAN_VNI >> 8) & 0xff,
+ BNXT_ULP_HF19_IDX_T_VXLAN_VNI & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
- .field_bit_size = 128,
- .mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
- .spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
- },
- {
- .field_bit_size = 48,
+ .field_bit_size = 3,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
- .field_bit_size = 24,
+ .field_bit_size = 4,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
@@ -9796,8 +10924,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -9820,14 +10948,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10190,8 +11318,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_O_UDP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_O_UDP_DST_PORT & 0xff,
+ (BNXT_ULP_HF20_IDX_O_UDP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_O_UDP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10200,8 +11328,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_O_UDP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10219,8 +11347,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR & 0xff,
+ (BNXT_ULP_HF20_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_O_IPV4_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10229,8 +11357,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF20_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_O_IPV4_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10279,8 +11407,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_O_UDP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_O_UDP_DST_PORT & 0xff,
+ (BNXT_ULP_HF20_IDX_O_UDP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_O_UDP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10289,8 +11417,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_O_UDP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10308,8 +11436,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_O_IPV4_DST_ADDR & 0xff,
+ (BNXT_ULP_HF20_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_O_IPV4_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10318,8 +11446,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF18_IDX_O_IPV4_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF20_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF20_IDX_O_IPV4_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10358,8 +11486,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10382,14 +11510,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10748,8 +11876,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_TCP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_TCP_DST_PORT & 0xff,
+ (BNXT_ULP_HF21_IDX_O_TCP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_O_TCP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10758,8 +11886,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_TCP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10777,8 +11905,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_IPV4_DST_ADDR & 0xff,
+ (BNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10787,8 +11915,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_IPV4_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10837,8 +11965,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_TCP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_TCP_DST_PORT & 0xff,
+ (BNXT_ULP_HF21_IDX_O_TCP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_O_TCP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10847,8 +11975,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_TCP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10866,8 +11994,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_IPV4_DST_ADDR & 0xff,
+ (BNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_O_IPV4_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10876,8 +12004,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF19_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF19_IDX_O_IPV4_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF21_IDX_O_IPV4_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10916,8 +12044,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -10940,14 +12068,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11314,8 +12442,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_O_UDP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_O_UDP_DST_PORT & 0xff,
+ (BNXT_ULP_HF22_IDX_O_UDP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_O_UDP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11324,8 +12452,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF22_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_O_UDP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11343,8 +12471,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR & 0xff,
+ (BNXT_ULP_HF22_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_O_IPV6_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11353,8 +12481,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF22_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_O_IPV6_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11403,8 +12531,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_O_UDP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_O_UDP_DST_PORT & 0xff,
+ (BNXT_ULP_HF22_IDX_O_UDP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_O_UDP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11413,8 +12541,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_O_UDP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF22_IDX_O_UDP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_O_UDP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11432,8 +12560,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_O_IPV6_DST_ADDR & 0xff,
+ (BNXT_ULP_HF22_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_O_IPV6_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11442,8 +12570,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF20_IDX_O_IPV6_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF22_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF22_IDX_O_IPV6_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11481,9 +12609,9 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
- .spec_operand = {
- (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,
+ .spec_operand = {
+ (BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11506,14 +12634,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11876,8 +13004,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_O_TCP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_O_TCP_DST_PORT & 0xff,
+ (BNXT_ULP_HF23_IDX_O_TCP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_O_TCP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11886,8 +13014,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF23_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_O_TCP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11905,8 +13033,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_O_IPV6_DST_ADDR & 0xff,
+ (BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11915,8 +13043,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_O_IPV6_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11965,8 +13093,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_O_TCP_DST_PORT >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_O_TCP_DST_PORT & 0xff,
+ (BNXT_ULP_HF23_IDX_O_TCP_DST_PORT >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_O_TCP_DST_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11975,8 +13103,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_O_TCP_SRC_PORT & 0xff,
+ (BNXT_ULP_HF23_IDX_O_TCP_SRC_PORT >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_O_TCP_SRC_PORT & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -11994,8 +13122,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_O_IPV6_DST_ADDR & 0xff,
+ (BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_O_IPV6_DST_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -12004,8 +13132,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF21_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
- BNXT_ULP_HF21_IDX_O_IPV6_SRC_ADDR & 0xff,
+ (BNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR >> 8) & 0xff,
+ BNXT_ULP_HF23_IDX_O_IPV6_SRC_ADDR & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -12043,14 +13171,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF22_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF22_IDX_OO_VLAN_VID & 0xff,
+ (BNXT_ULP_HF24_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF24_IDX_OO_VLAN_VID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF22_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF22_IDX_OO_VLAN_VID & 0xff,
+ (BNXT_ULP_HF24_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF24_IDX_OO_VLAN_VID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -12063,14 +13191,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.field_bit_size = 48,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF22_IDX_O_ETH_SMAC >> 8) & 0xff,
- BNXT_ULP_HF22_IDX_O_ETH_SMAC & 0xff,
+ (BNXT_ULP_HF24_IDX_O_ETH_SMAC >> 8) & 0xff,
+ BNXT_ULP_HF24_IDX_O_ETH_SMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF22_IDX_O_ETH_SMAC >> 8) & 0xff,
- BNXT_ULP_HF22_IDX_O_ETH_SMAC & 0xff,
+ (BNXT_ULP_HF24_IDX_O_ETH_SMAC >> 8) & 0xff,
+ BNXT_ULP_HF24_IDX_O_ETH_SMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -12078,14 +13206,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF24_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF24_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF22_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF22_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF24_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF24_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -12465,8 +13593,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF22_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF22_IDX_O_ETH_DMAC & 0xff,
+ (BNXT_ULP_HF24_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF24_IDX_O_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -12515,8 +13643,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF22_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF22_IDX_O_ETH_DMAC & 0xff,
+ (BNXT_ULP_HF24_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF24_IDX_O_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -12544,14 +13672,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.field_bit_size = 12,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF23_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF23_IDX_OO_VLAN_VID & 0xff,
+ (BNXT_ULP_HF25_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF25_IDX_OO_VLAN_VID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF23_IDX_OO_VLAN_VID >> 8) & 0xff,
- BNXT_ULP_HF23_IDX_OO_VLAN_VID & 0xff,
+ (BNXT_ULP_HF25_IDX_OO_VLAN_VID >> 8) & 0xff,
+ BNXT_ULP_HF25_IDX_OO_VLAN_VID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -12564,14 +13692,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.field_bit_size = 48,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF23_IDX_O_ETH_SMAC >> 8) & 0xff,
- BNXT_ULP_HF23_IDX_O_ETH_SMAC & 0xff,
+ (BNXT_ULP_HF25_IDX_O_ETH_SMAC >> 8) & 0xff,
+ BNXT_ULP_HF25_IDX_O_ETH_SMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF23_IDX_O_ETH_SMAC >> 8) & 0xff,
- BNXT_ULP_HF23_IDX_O_ETH_SMAC & 0xff,
+ (BNXT_ULP_HF25_IDX_O_ETH_SMAC >> 8) & 0xff,
+ BNXT_ULP_HF25_IDX_O_ETH_SMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -12579,14 +13707,14 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.field_bit_size = 8,
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.mask_operand = {
- (BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF25_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF25_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF23_IDX_SVIF_INDEX >> 8) & 0xff,
- BNXT_ULP_HF23_IDX_SVIF_INDEX & 0xff,
+ (BNXT_ULP_HF25_IDX_SVIF_INDEX >> 8) & 0xff,
+ BNXT_ULP_HF25_IDX_SVIF_INDEX & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -12970,8 +14098,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF23_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF23_IDX_O_ETH_DMAC & 0xff,
+ (BNXT_ULP_HF25_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF25_IDX_O_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -13020,8 +14148,8 @@ struct bnxt_ulp_mapper_key_field_info ulp_wh_plus_class_key_field_list[] = {
.mask_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO,
.spec_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_HDR_FIELD,
.spec_operand = {
- (BNXT_ULP_HF23_IDX_O_ETH_DMAC >> 8) & 0xff,
- BNXT_ULP_HF23_IDX_O_ETH_DMAC & 0xff,
+ (BNXT_ULP_HF25_IDX_O_ETH_DMAC >> 8) & 0xff,
+ BNXT_ULP_HF25_IDX_O_ETH_DMAC & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -15685,7 +16813,239 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] =
{
.field_bit_size = 5,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00,
+ .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 33,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 5,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 9,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {
+ (0x0185 >> 8) & 0xff,
+ 0x0185 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 11,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 33,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 5,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 9,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {
+ (0x0185 >> 8) & 0xff,
+ 0x0185 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 11,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 7,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .result_operand = {
+ (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 6,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 2,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 4,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 8,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {
+ (0x00f9 >> 8) & 0xff,
+ 0x00f9 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 5,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
@@ -15736,8 +17096,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] =
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x0185 >> 8) & 0xff,
- 0x0185 & 0xff,
+ (0x00c5 >> 8) & 0xff,
+ 0x00c5 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -15790,8 +17150,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] =
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x0185 >> 8) & 0xff,
- 0x0185 & 0xff,
+ (0x00c5 >> 8) & 0xff,
+ 0x00c5 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -16149,7 +17509,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] =
{
.field_bit_size = 5,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x15, 0x00, 0x00, 0x00, 0x00, 0x00,
+ .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
@@ -16200,8 +17560,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] =
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x00c5 >> 8) & 0xff,
- 0x00c5 & 0xff,
+ (0x0185 >> 8) & 0xff,
+ 0x0185 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -16254,8 +17614,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] =
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x00c5 >> 8) & 0xff,
- 0x00c5 & 0xff,
+ (0x0185 >> 8) & 0xff,
+ 0x0185 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -16524,8 +17884,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] =
.field_bit_size = 7,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
.result_operand = {
- (BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID >> 8) & 0xff,
- BNXT_ULP_GLB_REGFILE_INDEX_L2_PROF_FUNC_ID & 0xff,
+ (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -16605,15 +17965,15 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] =
.field_bit_size = 10,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x00f9 >> 8) & 0xff,
- 0x00f9 & 0xff,
+ (0x0031 >> 8) & 0xff,
+ 0x0031 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 5,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x19, 0x00, 0x00, 0x00, 0x00, 0x00,
+ .result_operand = {0x14, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
@@ -16664,8 +18024,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] =
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x0185 >> 8) & 0xff,
- 0x0185 & 0xff,
+ (0x00c5 >> 8) & 0xff,
+ 0x00c5 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -16718,8 +18078,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] =
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x0185 >> 8) & 0xff,
- 0x0185 & 0xff,
+ (0x00c5 >> 8) & 0xff,
+ 0x00c5 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -16845,7 +18205,7 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] =
{
.field_bit_size = 5,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x14, 0x00, 0x00, 0x00, 0x00, 0x00,
+ .result_operand = {0x18, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
@@ -16896,8 +18256,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] =
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x00c5 >> 8) & 0xff,
- 0x00c5 & 0xff,
+ (0x0185 >> 8) & 0xff,
+ 0x0185 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -16950,8 +18310,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] =
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x00c5 >> 8) & 0xff,
- 0x00c5 & 0xff,
+ (0x0185 >> 8) & 0xff,
+ 0x0185 & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -16976,6 +18336,10 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] =
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
+ .field_bit_size = 64,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
.field_bit_size = 10,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
.result_operand = {
@@ -17054,30 +18418,46 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] =
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
.field_bit_size = 4,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
.field_bit_size = 8,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 1,
- .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 10,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x0031 >> 8) & 0xff,
- 0x0031 & 0xff,
+ (0x001b >> 8) & 0xff,
+ 0x001b & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
.field_bit_size = 5,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
- .result_operand = {0x18, 0x00, 0x00, 0x00, 0x00, 0x00,
+ .result_operand = {0x08, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
{
@@ -17100,6 +18480,146 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] =
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
},
{
+ .field_bit_size = 2,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x03, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 16,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_MAIN_ACTION_PTR & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 7,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_GLB_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID >> 8) & 0xff,
+ BNXT_ULP_GLB_REGFILE_INDEX_VXLAN_PROF_FUNC_ID & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 4,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_COMP_FIELD,
+ .result_operand = {
+ (BNXT_ULP_CF_IDX_PHY_PORT_PARIF >> 8) & 0xff,
+ BNXT_ULP_CF_IDX_PHY_PORT_PARIF & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 8,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 6,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 3,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 16,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
+ .result_operand = {0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 2,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 2,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
+ .result_operand = {
+ (BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 >> 8) & 0xff,
+ BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0 & 0xff,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
+ },
+ {
+ .field_bit_size = 4,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 8,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 10,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 5,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 8,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
+ .field_bit_size = 1,
+ .result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_ZERO
+ },
+ {
.field_bit_size = 33,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_REGFILE,
.result_operand = {
@@ -17128,8 +18648,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] =
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x0185 >> 8) & 0xff,
- 0x0185 & 0xff,
+ (0x006d >> 8) & 0xff,
+ 0x006d & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -17182,8 +18702,8 @@ struct bnxt_ulp_mapper_result_field_info ulp_wh_plus_class_result_field_list[] =
.field_bit_size = 9,
.result_opcode = BNXT_ULP_MAPPER_OPC_SET_TO_CONSTANT,
.result_operand = {
- (0x0185 >> 8) & 0xff,
- 0x0185 & 0xff,
+ (0x006d >> 8) & 0xff,
+ 0x006d & 0xff,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
},
@@ -18933,6 +20453,48 @@ struct bnxt_ulp_mapper_ident_info ulp_wh_plus_class_ident_list[] = {
},
{
.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+ .ident_type = TF_IDENT_TYPE_EM_PROF,
+ .regfile_idx = BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0,
+ .ident_bit_size = 10,
+ .ident_bit_pos = 0
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+ .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH,
+ .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,
+ .ident_bit_size = 10,
+ .ident_bit_pos = 0
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+ .ident_type = TF_IDENT_TYPE_EM_PROF,
+ .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,
+ .ident_bit_size = 10,
+ .ident_bit_pos = 0
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+ .ident_type = TF_IDENT_TYPE_EM_PROF,
+ .regfile_idx = BNXT_ULP_REGFILE_INDEX_WC_PROFILE_ID_0,
+ .ident_bit_size = 10,
+ .ident_bit_pos = 0
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+ .ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH,
+ .regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,
+ .ident_bit_size = 10,
+ .ident_bit_pos = 0
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
+ .ident_type = TF_IDENT_TYPE_EM_PROF,
+ .regfile_idx = BNXT_ULP_REGFILE_INDEX_EM_PROFILE_ID_0,
+ .ident_bit_size = 10,
+ .ident_bit_pos = 0
+ },
+ {
+ .resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
.ident_type = TF_IDENT_TYPE_L2_CTXT_HIGH,
.regfile_idx = BNXT_ULP_REGFILE_INDEX_L2_CNTXT_ID_0,
.ident_bit_size = 10,
@@ -19002,4 +20564,3 @@ struct bnxt_ulp_mapper_ident_info ulp_wh_plus_class_ident_list[] = {
.ident_bit_pos = 0
}
};
-
--
2.21.1 (Apple Git-122.3)
next prev parent reply other threads:[~2020-10-22 22:11 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-17 6:27 [dpdk-dev] [PATCH 00/14] bnxt patches Venkat Duvvuru
2020-10-17 6:27 ` [dpdk-dev] [PATCH 01/14] net/bnxt: device cleanup of FW Venkat Duvvuru
2020-10-17 6:27 ` [dpdk-dev] [PATCH 02/14] net/bnxt: add stingray support Venkat Duvvuru
2020-10-17 6:27 ` [dpdk-dev] [PATCH 03/14] net/bnxt: changes to support 2 table scopes Venkat Duvvuru
2020-10-17 6:27 ` [dpdk-dev] [PATCH 04/14] net/bnxt: map table scope API Venkat Duvvuru
2020-10-17 6:28 ` [dpdk-dev] [PATCH 05/14] net/bnxt: table scope to PF Mapping for SR and Wh+ Venkat Duvvuru
2020-10-17 6:28 ` [dpdk-dev] [PATCH 06/14] net/bnxt: add build option for EM slot allocation Venkat Duvvuru
2020-10-17 6:28 ` [dpdk-dev] [PATCH 07/14] net/bnxt: update SR ULP resource counts Venkat Duvvuru
2020-10-17 6:28 ` [dpdk-dev] [PATCH 08/14] net/bnxt: fix infinite loop in flow query count API Venkat Duvvuru
2020-10-17 6:28 ` [dpdk-dev] [PATCH 09/14] net/bnxt: add support for parent flow accumulation counters Venkat Duvvuru
2020-10-17 6:28 ` [dpdk-dev] [PATCH 10/14] net/bnxt: use cfa pair alloc for configuring reps Venkat Duvvuru
2020-10-17 6:28 ` [dpdk-dev] [PATCH 11/14] net/bnxt: add mapper support for wildcard TCAM entry Venkat Duvvuru
2020-10-17 6:28 ` [dpdk-dev] [PATCH 12/14] net/bnxt: refactor flow id allocation Venkat Duvvuru
2020-10-17 6:28 ` [dpdk-dev] [PATCH 13/14] net/bnxt: add support for VXLAN decap templates Venkat Duvvuru
2020-10-17 6:28 ` [dpdk-dev] [PATCH 14/14] net/bnxt: add VXLAN decap offload support Venkat Duvvuru
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 00/11] bnxt fixes and enhancements to TRUFLOW support Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 01/11] net/bnxt: add stingray support to core layer Ajit Khaparde
2020-10-21 18:07 ` Ferruh Yigit
2020-10-21 18:11 ` Ajit Khaparde
2020-10-22 9:11 ` Ferruh Yigit
2020-10-23 5:10 ` Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 02/11] net/bnxt: changes to support two table scopes Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 03/11] net/bnxt: add table scope to PF Mapping Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 04/11] net/bnxt: update ULP resource counts Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 05/11] net/bnxt: fix infinite loop in flow query count Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 06/11] net/bnxt: add support for flow counter accumulation Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 07/11] net/bnxt: change HWRM command to create reps Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 08/11] net/bnxt: add mapper support for wildcard TCAM Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 09/11] net/bnxt: refactor flow id allocation Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 10/11] net/bnxt: add support for VXLAN decap templates Ajit Khaparde
2020-10-20 21:55 ` [dpdk-dev] [PATCH v2 11/11] net/bnxt: add VXLAN decap offload support Ajit Khaparde
2020-10-21 5:31 ` [dpdk-dev] [PATCH v2 00/11] bnxt fixes and enhancements to TRUFLOW support Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 " Ajit Khaparde
2020-10-23 5:08 ` Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 00/15] bnxt fixes and enhancements Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 01/15] net/bnxt: add stingray support to core layer Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 02/15] net/bnxt: support two table scopes Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 03/15] net/bnxt: add table scope to PF Mapping Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 04/15] net/bnxt: update ULP resource counts Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 05/15] net/bnxt: fix flow query count Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 06/15] net/bnxt: add hierarchical flow counters Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 07/15] net/bnxt: modify HWRM command to create reps Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 08/15] net/bnxt: add mapper support for wildcard TCAM Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 09/15] net/bnxt: refactor flow id allocation Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 10/15] net/bnxt: add VXLAN decap templates Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 11/15] net/bnxt: add VXLAN decap offload support Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 12/15] net/bnxt: increase the size of Rx CQ Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 13/15] net/bnxt: fix to reset mbuf data offset Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 14/15] net/bnxt: set thread safe flow ops flag Ajit Khaparde
2020-10-26 3:56 ` [dpdk-dev] [PATCH v4 15/15] net/bnxt: fix Rx performance by removing spinlock Ajit Khaparde
2020-10-26 17:42 ` [dpdk-dev] [PATCH v4 00/15] bnxt fixes and enhancements Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 01/11] net/bnxt: add stingray support to core layer Ajit Khaparde
2020-10-23 10:54 ` Ferruh Yigit
2020-10-23 16:32 ` Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 02/11] net/bnxt: changes to support two table scopes Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 03/11] net/bnxt: add table scope to PF Mapping Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 04/11] net/bnxt: update ULP resource counts Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 05/11] net/bnxt: fix infinite loop in flow query count Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 06/11] net/bnxt: add support for flow counter accumulation Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 07/11] net/bnxt: change HWRM command to create reps Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 08/11] net/bnxt: add mapper support for wildcard TCAM Ajit Khaparde
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 09/11] net/bnxt: refactor flow id allocation Ajit Khaparde
2020-10-22 22:05 ` Ajit Khaparde [this message]
2020-10-22 22:05 ` [dpdk-dev] [PATCH v3 11/11] net/bnxt: add VXLAN decap offload support Ajit Khaparde
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20201022220542.84166-11-ajit.khaparde@broadcom.com \
--to=ajit.khaparde@broadcom.com \
--cc=dev@dpdk.org \
--cc=michael.baucom@broadcom.com \
--cc=venkatkumar.duvvuru@broadcom.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).